CN1988378A - Method and its circuit for realizing multiplication capacitor - Google Patents

Abstract

This invention discloses a realization method for multiple capacitors, which multiples the value of a capacitor by a capacitance multiple circuit and integrates the equivalent capacitors into an IC.

Description

A kind of multiplication capacitor implementation method and circuit thereof

Affiliated technical field

The present invention relates to the integrated circuit (IC) design technical field, particularly about a kind of multiplication capacitor implementation method and circuit thereof.

Background technology

At present, increasing household electrical appliance, office equipment adopt the power supply of pulse width modulation (PWM) (Pulse-Width Modulation) Switch power supply, error amplifier then is the Key Circuit in the PWM switching power circuit, for guaranteeing the reliable and stable work of whole PWM switch power supply system, must carry out frequency compensation to error amplifier, make it have low-frequency filter characteristics and form corresponding zero point with other limit in the bucking-out system.Circuit is the typical compensating circuit of transconductance type error amplifier as shown in Figure 1.This compensating circuit comprises the external external discrete capacitor 12 of discrete resistors 11, integrated circuit of transconductance type error amplifier 10, integrated circuit that is integrated in IC interior, wherein, the capacitance approximate number nF of discrete capacitor 12, because capacitance is too big, can't be integrated in the integrated circuit as integrated device and go, must be as external discrete device.

In PWM Switch power-supply system, the feedback signal of FB port receiving system output voltage also compares the error current signal of an amplification of output with the reference voltage V REF of IC interior, this current signal is through external discrete capacitor 12 filtering, produce a dominant pole, discrete resistors 11 and electric capacity 12 series connection produce other limit that is used for bucking-out system zero point simultaneously.External discrete resistors and electric capacity make system be easier to compensation.But, this circuit is on the one hand owing to need extra pin, be unfavorable for that (the miniaturization encapsulation is the prerequisite that realizes various electric system miniaturizations development for the realization of miniaturization encapsulation, be the trend of integrated circuit development), simultaneously along with the complexity of integrated circuit is increasing, the circuit function that is integrated in the integrated circuit is more and more, often can't provide extra pin to be used for external discrete resistors and electric capacity carries out frequency compensation; External on the other hand discrete resistors and electric capacity have increased the complexity of system, have reduced the reliability of system, have increased the cost of system simultaneously.

Summary of the invention

The object of the present invention is to provide a kind of multiplication capacitor implementation method and circuit thereof, electric capacity is integrated in the integrated circuit goes, reduce integrated circuit chip area effectively, reduce cost.

The invention provides a kind of multiplication capacitor implementation method and double, the equivalent capacity after the multiplication is integrated in the integrated circuit by the appearance value of capacitance multiplier circuit to electric capacity.

Electric capacity after the described multiplication is integrated in the integrated circuit as the building-out capacitor of error amplifier.

By providing additional passageway for the charging current of electric capacity and discharging current and then to the appearance value multiplication of electric capacity.

One end of described electric capacity is connected with the current amplifier input, and the other end is connected with the current amplifier output, and the electric current of the described electric capacity of process amplifies as the charging of described electric capacity and another path of discharging current through current amplifier.

Described current amplifier is operated in the linear work district, and amplifier out provides additional passageway for charging current and discharging current simultaneously.

Described circuit comprises electric capacity and current amplifier, a port of described electric capacity is connected with the current amplifier input, the another port is connected with the output of current amplifier, and the output of described current amplifier can equivalently be the simulated capacitance after the capacitor's capacity multiplication.

Described current amplifier is operated in the linear work district.

The capacitance that the capacitance of described simulated capacitance is proportional to entity capacitance multiply by current amplifier current gain and 1 sum.

Described current amplifier comprises first current source, second current source, is worth circuit and amplifying circuit partially, wherein, described electric capacity is connected with second current source with first current source respectively, the charging of electric capacity and discharging current are via described electric capacity and be worth circuit partially, amplify back another path as charging and discharging current by amplifying circuit.

Described amplifying circuit refers to the single tube grounded emitter amplifier, and described first current source links to each other with the collector electrode of single tube grounded emitter amplifier as the active load of single tube grounded emitter amplifier, and its tie point is as the output of current amplifier;

Described second current source links to each other with inclined to one side value circuit as the inclined to one side value current source that is worth circuit partially, and tie point is as the input of current amplifier;

The value circuit makes amplifier be operated in linear zone for the base stage of single tube grounded emitter amplifier provides inclined to one side value partially.

Described single tube grounded emitter amplifier is a NPN, and its collector electrode links to each other with described first current source, and link is described current amplifier output, NPN emission collection ground connection.

Described inclined to one side value circuit comprises the 2nd NPN and the 3rd NPN, and wherein, the 2nd NPN base stage links to each other with the 3rd NPN collector electrode, and links to each other with described second source, and link is described current amplifier input; The emitter of the 2nd NPN links to each other with the base stage of the 3rd NPN, and this tie point is that the base stage of described single tube grounded emitter amplifier is worth a little partially; The 2nd NPN collector electrode connects power supply, and the emitter of the 3rd NPN links to each other with resistance, the other end ground connection of resistance.

Described inclined to one side value circuit comprises the 4th NPN, and the base stage of this NPN links to each other with collector electrode, and links to each other with described second source, and link is described current amplifier input; The emitter of the 4th NPN links to each other with resistance, the other end ground connection of resistance.

Described first current source and second current source are mirror current source.

Described image current source circuit comprises six PNP and a resistance, and wherein, the base stage of first, second, third PNP links to each other, and wherein the emitter of the first and the 3rd PNP connects power supply, emitter connecting resistance one end of the 2nd PNP, another termination power of resistance; The emitter of the 4th PNP connects the base stage of first, second, third PNP, the grounded collector of the 4th PNP, four, the base stage of the 5th, the 6th PNP links to each other with the collector electrode of a PNP, and its tie point links to each other with current source and is used to produce first current source and second current source; The emitter of the 5th PNP links to each other with the collector electrode of the 2nd PNP, and the collector electrode of the 5th PNP is as the output of described second current source; The emitter of the 6th PNP links to each other with the collector electrode of the 3rd PNP, and the collector electrode of the 6th PNP is as the output of described first current source.

Described image current source circuit comprises four PNP and a resistance, and wherein, the base stage of first, second, third PNP links to each other, and wherein the emitter of the first and the 3rd PNP connects power supply, emitter connecting resistance one end of the 2nd PNP, another termination power of resistance; The emitter of the 4th PNP connects the base stage of first, second, third PNP, the grounded collector of the 4th PNP, the output that the extremely electricity collection of second and third PNP flows as described second and first power supply respectively.

Described NPN and PNP can corresponding all or part of being replaced by NMOS and PMOS.

Described mirror current source can be produced by NPN or NMOS.

Described inclined to one side value circuit can be realized by PNP or PMOS.

Described amplifying circuit is realized by PNP or PMOS.

The present invention also discloses a kind of error and amplifies compensating circuit, comprise the transconductance type error amplifier that is integrated in IC interior, comprise that also one is integrated in the multiple circuit of integrated circuit, described amplifier port receives the voltage signal from system's output, and relatively drawing the error signal of amplification with internal reference voltage, the output of error amplifier links to each other with multiple circuit and carries out frequency compensation.

Described multiple circuit comprises electric capacity and current amplifier, a port of described electric capacity is connected with the current amplifier input, the another port is connected with the output of current amplifier, and the output of described current amplifier can equivalently be the simulated capacitance after the capacitor's capacity multiplication.

Described current amplifier comprises first current source, second current source, is worth circuit and amplifying circuit partially, wherein, described electric capacity is connected with second current source with first current source respectively, the charging of electric capacity and discharging current are via described electric capacity and be worth circuit partially, amplify back another path as charging and discharging current by amplifying circuit.

The present invention is by capacitance multiplier circuit, and the capacitance multiplication that capacitance is less to realize the bigger equivalent capacity of capacitance, is integrated into it in integrated circuit, can realize effectively that the integrated circuit of big electric capacity is integrated, reduces integrated circuit chip area, reduces cost.

Description of drawings

Fig. 1 is the error amplifier compensating circuit schematic diagram of prior art;

Fig. 2 is a capacitance multiplication schematic equivalent circuit of the present invention;

Fig. 3 is the error amplifier compensating circuit schematic diagram of the embodiment of the invention;

The capacitance multiplier circuit schematic diagram of Fig. 4 embodiment of the invention;

Fig. 5 another embodiment of the present invention is simplified the circuit structure structure chart;

Fig. 6 third embodiment of the invention is simplified electrical block diagram;

Fig. 7 fourth embodiment of the invention is simplified electrical block diagram;

Fig. 8 fifth embodiment of the invention is simplified electrical block diagram.

Embodiment

How the present invention mainly solves electric capacity is integrated into relevant issues in the integrated circuit as integrated device.The electric capacity that the integrated capacitance value is bigger in integrated circuit is unusual difficulty, because the size of integrated capacitance is directly proportional with the chip area that is used to make electric capacity, the entity capacitance of integrated 1nF need take about 1mm ²Chip area.But many circuit functions need be used the bigger electric capacity of capacitance, and the bigger electric capacity of these capacitances can not be integrated in the integrated circuit with real electric capacity entity.

The present invention addresses the above problem by utilizing capacitance multiplier circuit.The purpose of this invention is to provide a kind of multiplication capacitor implementation method and circuit thereof, the capacitance multiplication that capacitance is less realizing the bigger equivalent capacity of capacitance, and is integrated in the integrated circuit as the building-out capacitor of error amplifier.

The present invention has utilized the charge and discharge electric current for electric capacity to provide the method for additional passageway to realize the multiplication of electric capacity.One port of entity capacitance is connected with the current amplifier input, the another port is connected with the current amplifier output, the electric current that flows through entity capacitance is through current amplifier amplification another path of charge and discharge electric current as entity capacitance, therefore the equivalent capacity of amplifier out be entity capacitance (M+1) doubly, M is the current gain of current amplifier.Current amplifier is operated in the linear work district, makes amplifier out simultaneously can provide additional passageway for charging current and discharging current.

As shown in Figure 2, the present invention also provides a kind of multiplication capacitor equivalent electric circuit, and entity capacitance 14 is connected with output Iout with the input Iin of current amplifier 15 (its current gain is M) respectively.When the port one 6 at this circuit applied current signal, this circuit port 16 was equivalent to equivalent capacity 13 and exists.The non-entity capacitance of equivalent capacity is illustrated by the broken lines, and the capacitance of equivalent capacity is:

Ceff＝C13＝(M+1)C14

Can verify that by emulation the circuit that is provided by Fig. 2 is easy to realize the electric capacity of the nF utmost point.

Equivalent electric circuit disclosed by the invention can apply to a lot of occasions, as shown in Figure 3, has provided by the typical case of circuit shown in Figure 2 as the frequency compensation electric capacity of error amplifier 17 and has used.Error amplifier 17 is the high transconductance amplifier, and port FB receives the voltage signal from system's output, and relatively exports the error signal of amplification with internal reference voltage, and the output of error amplifier can be by outer meeting resistance and external capacitor compensation.This equivalence circuit also can be used in as shown in Figure 1 the circuit, and the very big capacitance multiplier circuit of equivalent capacitance value that provides with integrated resistor and the present invention carries out frequency compensation.So the circuit that Fig. 3 provides can be fully integratible in the integrated circuit.

As the first embodiment of the present invention, typical capacitance multiple circuit structure as shown in Figure 4.Wherein, capacitance multiplier circuit can be divided into two parts, and the one, two-way has the generation of the constant-current source (I1, I2) of certain proportion relation, to the single tube total radio amplifier and be worth circuit partially and adopted similar structure, has guaranteed that circuit has fine matching.PNP 19～24 and resistance 29 are formed mirror current source, produce ratio constant-current source I1 under the effect of constant-current source 30, I2, and wherein I2 equals or is proportional to institute to add current source 30, and I1 and I2 can describe with following formula:

$I1\&times;\mathrm{<figure-callout\; id="29"\; label="R"\; filenames="A20051013707100191.png"\; state="\{\{state\}\}">R</figure-callout>}29=\mathrm{VT}\&times;\mathrm{\&lambda;n}\frac{I2/n}{I1}$

Wherein: n is the area factor of the transistor PNP21 of generation I2.It is in order to improve the output impedance of constant-current source that the ratio constant-current source adopts the purpose of cascode structure (cascode), when being used as the compensating network of error amplifier, make error amplifier have the higher voltage gain, do not need the applicable cases of high output impedance for those, can adopt simple constant-current source structure.

In the present embodiment, the image current source circuit comprises six PNP and a resistance 29, wherein, first, second, third PNP19,20,21 base stage link to each other, wherein the emitter of a PNP19 and the 3rd PNP21 connects power supply, emitter connecting resistance 29 1 ends of the 2nd PNP20, another termination power of resistance; The emitter of the 4th PNP29 connects first, second, third PNP19,20,21 base stage, the grounded collector of the 4th PNP29, the base stage of the 4th PNP22, the 5th PNP23, the 6th PNP24 links to each other with the collector electrode of a PNP19, and its tie point links to each other with current source and is used to produce first current source and second current source; The emitter of the 5th PNP23 links to each other with the collector electrode of the 2nd PNP20, and the collector electrode of the 5th PNP23 is as the output of described second current source; The emitter of the 6th PNP24 links to each other with the collector electrode of the 3rd PNP21, and the collector electrode of the 6th PNP24 is as the output of described first current source.

Another part of capacitance multiplier circuit amplifies and inclined to one side value circuit for the single tube cascode, and amplification and inclined to one side value circuit have adopted and generation ratio constant-current source similar circuit configuration, makes and amplifies with value circuit and ratio constant-current source circuit have good matching properties partially; Adopting resistance rather than adopting the purpose of the method generation ratio constant-current source of transistor area ratio is to make amplifying circuit and inclined to one side value circuit have the ratio (being the current amplifier current gain) of bigger mutual conductance.

Described inclined to one side value circuit comprises the 2nd NPN25 and the 3rd NPN26, and wherein, the 2nd NPN25 base stage links to each other with the 3rd NPN26 collector electrode, and links to each other with described second source, and link is described current amplifier input; The emitter of the 2nd NPN25 links to each other with the base stage of the 3rd NPN26, and this tie point is that the base stage of described single tube grounded emitter amplifier is worth a little partially; The 2nd NPN25 collector electrode connects power supply, and the emitter of the 3rd NPN26 links to each other with resistance, the other end ground connection of resistance 28.

Entity capacitance 14 is connected with constant-current source I2 with constant-current source I1 respectively, the charge and discharge electric current of electric capacity is added by the Iout port, the electric current that flows through entity capacitance flows through inclined to one side value circuit simultaneously, amplify back another path by amplifying circuit then as the charge and discharge electric current, its effect just is equivalent at Iout port simulated capacitance in parallel, and the ratio of its capacitance and entity capacitance value is current amplifier gain and 1 sum.

NPN 27 is the single tube grounded emitter amplifier, and I2 is its active load, and NPN 25,26 and resistance 28 are the inclined to one side value circuit of NPN27, clearly, as long as resistance 28 and resistance 29 equate that following formula is set up:

$I1\&times;\mathrm{<figure-callout\; id="28"\; label="R"\; filenames="A20051013707100191.png"\; state="\{\{state\}\}">R</figure-callout>}28=\mathrm{VT}\&times;\mathrm{\&lambda;n}\frac{I2/n}{I1}$

Wherein: n is the area factor of NPN27.If as the current input terminal mouth, port Iout is as the current output terminal mouth with port Iin, the current gain of this current amplifier is calculated as follows:

Value circuit mutual conductance partially: $\mathrm{<figure-callout\; id="1"\; label="gm"\; filenames="A20051013707100171.png"\; state="\{\{state\}\}">gm</figure-callout>}1=\frac{1}{\mathrm{<figure-callout\; id="28"\; label="R"\; filenames="A20051013707100191.png"\; state="\{\{state\}\}">R</figure-callout>}28+\frac{\mathrm{VT}}{I1}}$

The total radio amplifier mutual conductance: $\mathrm{gm}2=\frac{I2}{\mathrm{VT}}$

Current gain: $M=\frac{\mathrm{gm}2}{\mathrm{<figure-callout\; id="1"\; label="gm"\; filenames="A20051013707100171.png"\; state="\{\{state\}\}">gm</figure-callout>}1}=\frac{I2}{\mathrm{<figure-callout\; id="1"\; label="I"\; filenames="A20051013707100171.png"\; state="\{\{state\}\}">I</figure-callout>}1}+\frac{I2\&times;\mathrm{<figure-callout\; id="28"\; label="R"\; filenames="A20051013707100191.png"\; state="\{\{state\}\}">R</figure-callout>}28}{\mathrm{VT}}=\frac{I2}{I1}(1+\frac{\mathrm{<figure-callout\; id="1"\; label="I"\; filenames="A20051013707100171.png"\; state="\{\{state\}\}">I</figure-callout>}1\&times;\mathrm{<figure-callout\; id="28"\; label="R"\; filenames="A20051013707100191.png"\; state="\{\{state\}\}">R</figure-callout>}28}{\mathrm{VT}})$

As shown in Table 1, be the result of calculation of circuit shown in Figure 4 under the certain device parameter:

R28	R29	I1	I2	M	Notes
						60K	60K	1u	10u	33	n＝1
20u	66	n＝2
			120K	120K	0.6u				10u	62.8	n＝1
20u	125.6	n＝2
						240K	240K	0.36u	10u	120	n＝1
20u	240	n＝2

Table one

By above result of calculation as can be seen: adopt resistance rather than only adopt the purpose of the method generation ratio constant-current source of transistor area ratio to be, under the situation of same current ratio, adopt resistance can make amplifying circuit and inclined to one side value circuit have the ratio (being the current amplifier current gain) of bigger mutual conductance.It can also be seen that by above calculating the size of regulating resistance can change the ratio of constant-current source, thereby change the size of M.Aforementioned calculation and analysis are what to be drawn under the situation of desirable device, and integrated circuit (IC)-components and desirable device have certain difference, may have certain imbalance by circuit shown in Figure 4, can imbalance can be reduced in the tolerance interval by regulating resistance.

Being connected entity capacitance 14 at Iin with the Iout two ends, applying charge and discharge current i o at the Iout end, is ic if flow through the electric current of electric capacity 14, and then charge and discharge current i o and the current i c that flows through electric capacity 14 satisfy following relation:

$\mathrm{io}=\mathrm{ic}+\frac{\mathrm{<figure-callout\; id="1"\; label="ic\; gm"\; filenames="A20051013707100171.png"\; state="\{\{state\}\}">ic</figure-callout>}}{\mathrm{gm}}\&times;\mathrm{gm}2=(1+\frac{\mathrm{gm}2}{\mathrm{gm}1})\&times;\mathrm{ic}=(M+1)\mathrm{ic}$

Then: $\mathrm{\&Delta;Vo}=\mathrm{\&Delta;Vc}=\frac{\mathrm{ic}\&times;\mathrm{\&Delta;t}}{C}=\frac{\mathrm{io}\&times;\mathrm{\&Delta;t}}{(M+1)C}$

Output equivalent capacity: Ceff=(M+1) C

Circuit shown in Figure 4 by the table in the device parameters value result of calculation as shown in Table 2:

R28	R29	I1	I2	M	Notes
						120K	120K	0.6u	40u	251.2	n＝4

Table two

If need the electric capacity of 5nF in the integrated circuit, required chip area and electric capacity production cost as shown in Table 3:

The integrated capacitance size	Implementation method	Required chip area	The electric capacity production cost
				5nF	Entity capacitance	～5mm 2	～0.8 yuan
5nF	Simulated capacitance of the present invention	～0.03mm 2	～0.005 yuan

Table three

By table two and table three as seen, adopted multiplication capacitor implementation method and circuit thereof shown in the present after, electric capacity can be integrated in the integrated circuit and go, reduce integrated circuit chip area effectively, reduce cost simultaneously.

Fig. 5 is the optional simplification circuit structure of second kind of execution mode of the present invention, and its operation principle and Fig. 4 are identical, just in the image current source circuit the 5th PNP23, the 6th PNP24 is saved.Described image current source circuit comprises four PNP and a resistance 29, wherein, the base stage of a PNP19, the 2nd PNP20, the 3rd PNP21 links to each other, and wherein the emitter of a PNP19 and the 3rd PNP21 connects power supply, emitter connecting resistance one end of the 2nd PNP20, another termination power of resistance; The emitter of the 4th PNP22 connects the base stage of first, second, third PNP, the grounded collector of the 4th PNP22, the output that the extremely electricity collection of second and third PNP flows as described second and first power supply respectively.Described inclined to one side value circuit saves the NPn among Fig. 4 simultaneously, only comprises a NPN26, and the base stage of this NPN26 links to each other with collector electrode, and links to each other with described second source, and link is described current amplifier input; The emitter of this NPN26 links to each other with resistance, the other end ground connection of resistance.

Fig. 6 is the circuit structure of the third execution mode of the present invention, produced by the NPN pipe with the different mirror-image constant flow sources that are of Fig. 4, and amplifying circuit is realized by PNP.Operation principle and Fig. 4 of circuit are identical.

Fig. 7 and Fig. 8 are the 4th kind and the 5th kind of circuit execution modes of the present invention, and wherein NPN substitutes with NMOS, and PNP is substituted by PMOS, and its operation principle and Fig. 4 are identical.

That more than introduces only is based on several preferred embodiment of the present invention, can not limit scope of the present invention with this.Any device of the present invention is done replacement, the combination, discrete of parts well know in the art, and the invention process step is done well know in the art being equal to change or replace and all do not exceed exposure of the present invention and protection range.

Claims (23)

1, a kind of multiplication capacitor implementation method is characterized in that, doubles by the appearance value of capacitance multiplier circuit to electric capacity, and the equivalent capacity after the multiplication is integrated in the integrated circuit.

2, the method for claim 1 is characterized in that, the electric capacity after the described multiplication is integrated in the integrated circuit as the building-out capacitor of error amplifier.

3, the method for claim 1 is characterized in that, by providing additional passageway for the charging current of electric capacity and discharging current and then to the appearance value multiplication of electric capacity.

4, method as claimed in claim 3, it is characterized in that, one end of described electric capacity is connected with the current amplifier input, and the other end is connected with the current amplifier output, and the electric current of the described electric capacity of process amplifies as the charging of described electric capacity and another path of discharging current through current amplifier.

5, method as claimed in claim 4.It is characterized in that described current amplifier is operated in the linear work district, amplifier out provides additional passageway for charging current and discharging current simultaneously.

6, a kind of multiplication capacitor is realized circuit, it is characterized in that, described circuit comprises electric capacity and current amplifier, a port of described electric capacity is connected with the current amplifier input, the another port is connected with the output of current amplifier, and the output of described current amplifier can equivalently be the simulated capacitance after the capacitor's capacity multiplication.

7, circuit as claimed in claim 6 is characterized in that, described current amplifier is operated in the linear work district.

8, circuit as claimed in claim 6 is characterized in that, the capacitance that the capacitance of described simulated capacitance is proportional to entity capacitance multiply by current amplifier current gain and 1 sum.

9, circuit as claimed in claim 6, it is characterized in that, described current amplifier comprises first current source, second current source, is worth circuit and amplifying circuit partially, wherein, described electric capacity is connected with second current source with first current source respectively, the charging of electric capacity and discharging current are via described electric capacity and be worth circuit partially, amplify back another path as charging and discharging current by amplifying circuit.

10, circuit as claimed in claim 9, it is characterized in that, described amplifying circuit refers to the single tube grounded emitter amplifier, and described first current source links to each other with the collector electrode of single tube grounded emitter amplifier as the active load of single tube grounded emitter amplifier, and its tie point is as the output of current amplifier;

Described second current source links to each other with inclined to one side value circuit as the inclined to one side value current source that is worth circuit partially, and tie point is as the input of current amplifier;

The value circuit makes amplifier be operated in linear zone for the base stage of single tube grounded emitter amplifier provides inclined to one side value partially.

11, circuit as claimed in claim 10 is characterized in that, described single tube grounded emitter amplifier is a NPN, and its collector electrode links to each other with described first current source, and link is described current amplifier output, NPN emission collection ground connection.

12, circuit as claimed in claim 11 is characterized in that, described inclined to one side value circuit comprises the 2nd NPN and the 3rd NPN, wherein, the 2nd NPN base stage links to each other with the 3rd NPN collector electrode, and links to each other with described second current source, and link is described current amplifier input; The emitter of the 2nd NPN links to each other with the base stage of the 3rd NPN, and this tie point is that the base stage of described single tube grounded emitter amplifier is worth a little partially; The 2nd NPN collector electrode connects power supply, and the emitter of the 3rd NPN links to each other with resistance, the other end ground connection of resistance.

13, circuit as claimed in claim 11 is characterized in that, described inclined to one side value circuit comprises the 4th NPN, and the base stage of this NPN links to each other with collector electrode, and links to each other with described second current source, and link is described current amplifier input; The emitter of the 4th NPN links to each other with resistance, the other end ground connection of resistance.

14, circuit as claimed in claim 9 is characterized in that, described first current source and second current source are mirror current source.

15, circuit as claimed in claim 14, it is characterized in that, described image current source circuit comprises six PNP and a resistance, wherein, the base stage of first, second, third PNP links to each other, wherein the emitter of the first and the 3rd PNP connects power supply, emitter connecting resistance one end of the 2nd PNP, another termination power of resistance; The emitter of the 4th PNP connects the base stage of first, second, third PNP, the grounded collector of the 4th PNP, four, the base stage of the 5th, the 6th PNP links to each other with the collector electrode of a PNP, and its tie point links to each other with current source and is used to produce first current source and second current source; The emitter of the 5th PNP links to each other with the collector electrode of the 2nd PNP, and the collector electrode of the 5th PNP is as the output of described second current source; The emitter of the 6th PNP links to each other with the collector electrode of the 3rd PNP, and the collector electrode of the 6th PNP is as the output of described first current source.

16, circuit as claimed in claim 14, it is characterized in that, described image current source circuit comprises four PNP and a resistance, wherein, the base stage of first, second, third PNP links to each other, wherein the emitter of the first and the 3rd PNP connects power supply, emitter connecting resistance one end of the 2nd PNP, another termination power of resistance; The emitter of the 4th PNP connects the base stage of first, second, third PNP, the grounded collector of the 4th PNP, the output that the extremely electricity collection of second and third PNP flows as described second and first power supply respectively.

As the arbitrary circuit in the claim 11 to 16, it is characterized in that 17, described NPN and PNP can corresponding all or part of being replaced by NMOS and PMOS.

As claim 15 or 16 described circuit, it is characterized in that 18, described mirror current source can be produced by NPN or NMOS.

As claim 12 or 13 described circuit, it is characterized in that 19, described inclined to one side value circuit can be realized by PNP or PMOS.

20, circuit as claimed in claim 9 is characterized in that, described amplifying circuit is realized by PNP or PMOS.

21, a kind of error is amplified compensating circuit, comprise the transconductance type error amplifier that is integrated in IC interior, it is characterized in that, comprise that also one is integrated in the multiple circuit of integrated circuit, described amplifier port receives the voltage signal from system's output, and relatively drawing the error signal of amplification with internal reference voltage, the output of error amplifier links to each other with multiple circuit and carries out frequency compensation.

22, circuit as claimed in claim 21, it is characterized in that, described multiple circuit comprises electric capacity and current amplifier, a port of described electric capacity is connected with the current amplifier input, the another port is connected with the output of current amplifier, and the output of described current amplifier can equivalently be the simulated capacitance after the capacitor's capacity multiplication.

23, circuit as claimed in claim 22, it is characterized in that, described current amplifier comprises first current source, second current source, is worth circuit and amplifying circuit partially, wherein, described electric capacity is connected with second current source with first current source respectively, the charging of electric capacity and discharging current are via described electric capacity and be worth circuit partially, amplify back another path as charging and discharging current by amplifying circuit.

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