CN1988246A - Laminated filter based on MEMS technology - Google Patents
Laminated filter based on MEMS technology Download PDFInfo
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- CN1988246A CN1988246A CN 200610098168 CN200610098168A CN1988246A CN 1988246 A CN1988246 A CN 1988246A CN 200610098168 CN200610098168 CN 200610098168 CN 200610098168 A CN200610098168 A CN 200610098168A CN 1988246 A CN1988246 A CN 1988246A
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Abstract
This invention discloses an overlay filter based on the MEMS technology in a distributed coupling line structure, in which, two earth surfaces are set above a first medium layer and under a third medium layer, interstage coupling resonators and input-output ends are placed in the middle of the medium layers, signals realize filtration performance by same layer plane coupling resonance and that between layers, the input and output ends are in a tap line structure, the middle coupling line is led to the cross coupling so as to strengthen the stopband attenuation performance, and thickness control of the medium layers, the patterns on the medium layers and alignment and assembly of the layers are formed by MEMS microprocess.
Description
Technical field
The present invention relates to a kind of stacked wave-wave device, especially a kind of filter of making by High Resistivity Si or glass material, good, the easily manufactured laminated filter of specifically a kind of stopband attenuation based on the MEMS technology.
Background technology
Microwave filter designing requirement volume is little, Insertion Loss is little, band is outer suppresses to want height, impedance matching property to get well.Also requiring simultaneously can low-cost, batch process.The kind of microwave filter mainly contains lamped element (inductance, electric capacity) form, distribution transmission line formula, pottery, cavity type etc.Require in systems such as satellite, communication and Aeronautics and Astronautics that the electronic system volume is little, reliability is high and cost is low, in the today of having adopted large scale integrated circuit, the integrated bottleneck that just becomes system of passive components such as microwave filter.The ubiquitous problem of traditional filter is that volume is bigger, therefore be the miniaturization of pursuit system, the stacked microwave filter of LTCC (LTCC) has appearred at present, but the LTCC technology is especially high-end at microwave frequency band at high band, the manufacture craft precision has been difficult to competent requirement, and be difficult on the technology compatible mutually with traditional integrated circuit technology, the integrated difficulty of bringing of giving system.
Meanwhile, the technology of traditional IC (integrated circuit) is inherited and expanded to the MEMS technology, it has not only comprised conventional semiconductor technology but also has comprised the technology that can make high-aspect-ratio and complex three-dimensional device, as DRIE (deep reaction ion etching) and various bonding technologies etc.So the MEMS craft precision is far above LTCC technology, and be easy to and traditional IC (integrated circuit) technology integrated.Given full play to that semiconductor technology is integrated, mass, technology is accurate, error is little advantage.But relevant report is not seen in the design, the exploitation that at present the MEMS technology are applied to laminated filter as yet.
Summary of the invention
The objective of the invention is the problem that volume is big, fade performance can't satisfy instructions for use that exists based on the filter of traditional handicraft manufacturing at present, design a kind of can work in microwave frequency band high-end, overall structure is less, the band outside inhibitory can be good, Insertion Loss is little, craft precision is high, it is integrated to be easy to, and the laminated filter based on the MEMS technology that can produce in batches.
Technical scheme of the present invention is:
A kind of laminated filter based on the MEMS technology, which comprises at least the dielectric layer that three stacked dresses form one, it is characterized in that the lower surface of the upper surface of last layer dielectric layer and basecoat dielectric layer forms the screen of filter, the corresponding position is provided with some joints and utilizes MEMS technology coupled transmission line resonator that is processed to form and the groove that is used for bonding on two sides relative between each dielectric layer, also promptly a face is provided with the coupled transmission line resonator, the relative position place promptly is provided with to match and makes the coupled transmission line resonator be positioned at wherein groove on another face, to guarantee the complete bonding of opposite face; The tap line input of filter links to each other with first segment coupled transmission line resonator, and the tap line output links to each other with final section coupled transmission line resonator.
The dual-side of the tap line input of filter, the medium aspect at output place is provided with the step of DRIE (deep reaction ion etching) the technology processing that utilizes in the MEMS technology, and draws outside the filter by lead-out wire from described step surface.
The coupled transmission line resonator is stepped impedance formula coupled transmission line or uniform impedance formula coupled transmission line.
Arbitrary medium face between the in the end a pair of dielectric layer is provided with the interstage coupling line, its two ends respectively with the coupling of any two non-conterminous coupled transmission line resonators.
The interstage coupling line is stepped impedance formula coupled transmission line or uniform impedance formula coupled transmission line.
The coupled transmission line resonator is two ends open circuit or single-ended open circuit.
Tap line input, output end structure are microstrip line, co-planar waveguide line or belt shape line, and coupled modes are narrow line inductance coupling high or taper coupling.
Described dielectric layer or all be High Resistivity Si dielectric layer structure, or all be glass medium layer structure, or the part dielectric layer be the high resistance medium layer, all the other are the structure of glass medium layer.
Laminated filter of the present invention, basic structure adopt multilayer distributed coupled transfer line structure, and when described dielectric layer was three layers, (f1 was f6) as ground shield for its outermost layer two dielectric layer outer surfaces.Transmission line pattern with strip line in multilayer dielectricity is transmitted, resonance and coupling.Input/output terminal adopts centre tap line formula, and tap line input (t1) links to each other with first segment transmission-line efficiency (r1), is positioned at on one deck dielectric layer face (f3).The first segment transmission-line efficiency is by plane coupling or vertical coupled and second joint resonator (r2) coupling, the second joint resonator (r2) is more in the same way with the 3rd joint resonator coupling (r3), until final section microwave transmission line resonator (r7), tap line output (t2) links to each other with final section microwave transmission line resonator (r7), and interstage coupling line resonator (r8) is across between non-conterminous two resonators and carries out cross-couplings.
The dielectric layer material adopts High Resistivity Si and High Resistivity Si combination stack or High Resistivity Si and glass combination lamination, and the accurate control of thickness of dielectric layers realizes by the attenuated polishing technology.Precision architecture figure on the dielectric layer adopts photoetching, etching and metallization process to realize.Each transmission line figure can form in any one side of folded two faces of adjacent dielectric.Accurate aligning between each dielectric layer, assembling are adopted and are aimed at, bonding technology realizes.
Laminated filter input, output can adopt DRIE (deep reaction ion etching) technology to carve step by going up at its coverage rate (f2) earlier, carry out twice scribing then and draw.
Middle coupled transmission line resonator (r1, r2 ..., can be stepped impedance formula transmission line r7) with interstage coupling line (r8), also can be uniform impedance formula transmission line.
The present invention has the following advantages:
1, the present invention has carried out organic combination with microwave circuit and MEMS (microelectromechanical systems) technology, can pass through the signal of required frequency range with as far as possible little decay in microwave circuit, simultaneously the signal attenuation that does not need frequency range is fallen.Characteristics such as this filter has the characteristic of improving stopband attenuation, and has the craft precision height, and is easy of integration, as can to produce in batches.Keeping having improved craft precision under the little prerequisite of LTCC filter volume.Adopt the MEMS micro fabrication to realize stepped construction, make the chip miniaturization; For improving stopband characteristic, use cross-couplings to introduce the stopband attenuation limit; Because simple in structure, processing compatibility good, can directly realize little, the lightweight radio frequency multicore of volume sheet circuit module or monolithic subsystem.
2, utilize high-precision MEMS micro fabrication, expanded the working frequency range of laminated filter.Simultaneously, because processing technology can accurately be controlled, it is better to make that filter board design result and actual test result meet, and can shorten the design cycle, saves cost.
3, adopt the MEMS micro fabrication, compatible mutually with integrated circuit technology, be easy to realize the system integration, be easy to simultaneously realize producing in batches, raise the efficiency, reduce cost.
4, owing to adopt stacked structure, compare with traditional microwave filter, volume greatly reduces.And need not encapsulate, the reliability height has been saved packaging cost.
5, owing to adopt stacked structure, make each resonator to be coupled, and can not be coupled between the coplanar, improved coupling efficiency, compare with traditional plane coupling line mode filter and reduced the insertion loss to a certain extent on same plane.
6, in the stepped construction filter, adopt cross-linked mode to realize the stopband attenuation limit, improved the stopband characteristic of filter.Traditional coupled transfer line filter will be realized the outer joint number that suppresses to increase filter of higher band, yet the increase of joint number not only makes the volume of filter increase, and can make the insertion loss of filter become big thereupon.The method that adopts the design to provide then can overcome this shortcoming.
Description of drawings
Fig. 1 is the layering schematic perspective view of 3 layers of laminated filter of the present invention.
Fig. 2 is the layering schematic perspective view of 4 layers of laminated filter of the present invention.
Fig. 3 is the step schematic diagram of the present invention for input, output tap line institute etching.
Fig. 4 is year of the present invention laminated filter profile schematic diagram.
Fig. 5 is 3 layers of stacked performance of filter key diagram of the present invention.
Embodiment
The present invention is further illustrated for following structure drawings and Examples.
Shown in Fig. 1-5.
Among Fig. 1, d1 is the 1st a layer of dielectric layer, d2 is the 2nd a layer of dielectric layer, and d3 is the 3rd a layer of dielectric layer, and f1, f2 are two surfaces of the 1st layer of dielectric layer, f3, f4 are two surfaces of the 2nd layer of dielectric layer, f5, f6 are two surfaces of the 3rd layer of dielectric layer, and t1 is the tap line input, and t2 is the tap line output, r1, r2 ..., r7 is transmission-line efficiency, r8 is the interstage coupling level.The multilayer dielectricity layer material adopts High Resistivity Si and High Resistivity Si combination stack or High Resistivity Si and glass combination lamination, and each layer thickness is formulated as required, and (f1 is f6) as ground plane and form ground plane for both sides outmost two layer medium layer outer surface.Tap line input (t1) links to each other with first segment transmission-line efficiency (r1), is positioned on the same aspect in the centre except that ground plane (f3) of multilayer dielectricity layer.Transmission-line efficiency is the stepped impedance line of two ends open circuit, because between the two layer medium layer, so carry out resonance and coupling with the form of strip line.The second joint transmission-line efficiency (r2) is positioned on another aspect (f5), carries out interplanar vertical coupled up and down with first segment transmission-line efficiency (r1).The 3rd joint transmission-line efficiency (r3) and second saves transmission-line efficiency (r2) on same aspect (f5), and both carry out the coupling of same plane.The 4th joint transmission-line efficiency (r4) is positioned on another aspect (f3), carries out interplanar vertical coupled up and down with the 3rd joint transmission-line efficiency (r3).The 5th joint transmission-line efficiency (r5) spatially forms symmetry with the 3rd joint transmission-line efficiency (r3) about the 4th joint transmission-line efficiency (r4), and carries out interplanar vertical coupled up and down with the 4th joint transmission-line efficiency (r4).The 6th joint transmission-line efficiency (r6) spatially forms symmetry with the second joint transmission-line efficiency (r2) about the 4th joint transmission-line efficiency (r4), and carries out the coupling of same plane with the 5th joint transmission-line efficiency (r5).The 7th joint transmission-line efficiency (r7) spatially forms symmetry with first segment transmission-line efficiency (r1) about the 4th joint transmission-line efficiency (r4), and carries out interplanar vertical coupled up and down with the 6th joint transmission-line efficiency (r6).Output tap line (t2) spatially forms symmetry with input tap line (t1) about the 4th joint transmission-line efficiency (r4), and links to each other with the 7th joint transmission-line efficiency (r7), and signal is drawn.Interstage coupling line (r8) is positioned on the aspect (f5), saves transmission-line efficiency (r5) the introducing cross-couplings that is coupled with the 3rd joint transmission-line efficiency (r3) and the 5th respectively.In sum, t1, r1, r4, r7, t2 are positioned on the same plane f3, and r2, r3, r8, r5, r6 are positioned on the same plane f5.According to the actual process situation, also t1, r1, r4, r7, t2 can be made on the same plane f2, r2, r3, r8, r5, r6 are made on the same plane f4.On the f2 of plane, carve step P1, P2, carry out twice scribing at last and draw input/output terminal with DRIE (deep reaction ion etching).Each thickness of dielectric layers is accurately controlled by attenuated polishing technology.The transmission-line efficiency figure of each aspect accurately forms by photoetching, etching and metallization process.Combination between each layer realizes by accurately aiming at bonding technology with assembling.
Among Fig. 2, d1 is the 1st a layer of dielectric layer, and d2 is the 2nd a layer of dielectric layer, d3 is the 3rd a layer of dielectric layer, d4 is the 4th a layer of dielectric layer, and f1, f2 are two surfaces of the 1st layer of dielectric layer, and f3, f4 are two surfaces of the 2nd layer of dielectric layer, f5, f6 are two surfaces of the 3rd layer of dielectric layer, f7, f8 are two surfaces of the 4th layer of dielectric layer, and t1 is the tap line input, and t2 is the tap line output, r1, r2 ..., r9 is transmission-line efficiency, r10 is the interstage coupling level.The multilayer dielectricity layer material adopts High Resistivity Si and High Resistivity Si combination stack or High Resistivity Si and glass combination lamination, and each layer thickness is formulated as required, and (f1 is f8) as ground plane and form ground plane for both sides outmost two layer medium layer outer surface.Tap line input (t1) links to each other with first segment transmission-line efficiency (r1), is positioned on the same aspect in the centre except that ground plane (f3) of multilayer dielectricity layer.Transmission-line efficiency is the stepped impedance line of two ends open circuit, because between the two layer medium layer, so carry out resonance and coupling with the form of strip line.The second joint transmission-line efficiency (r2) is positioned on another aspect (f5), carries out interplanar vertical coupled up and down with first segment transmission-line efficiency (r1).The 3rd joint transmission-line efficiency (r3) is positioned on another aspect (f7), carries out interplanar vertical coupled up and down with the second joint transmission-line efficiency (r2).The 4th joint transmission-line efficiency (r4) and the 3rd saves transmission-line efficiency (r3) on same aspect (f7), and both carry out the coupling of same plane.The 5th joint transmission-line efficiency (r5) is positioned on another aspect (f5), carries out interplanar vertical coupled up and down with the 4th joint transmission-line efficiency (r4).The 6th joint transmission-line efficiency (r6) spatially forms symmetry with the 4th joint transmission-line efficiency (r4) about the 5th joint transmission-line efficiency (r5), and carries out interplanar vertical coupled up and down with the 5th joint transmission-line efficiency (r5).The 7th joint transmission-line efficiency (r7) spatially forms symmetry with the 3rd joint transmission-line efficiency (r3) about the 5th joint transmission-line efficiency (r5), and carries out the coupling of same plane with the 6th joint transmission-line efficiency (r6).The 8th joint transmission-line efficiency (r8) spatially forms symmetry with the second joint transmission-line efficiency (r2) about the 5th joint transmission-line efficiency (r5), and carries out interplanar vertical coupled up and down with the 7th joint transmission-line efficiency (r7).The 9th joint transmission-line efficiency (r9) spatially forms symmetry with first segment transmission-line efficiency (r1) about the 5th joint transmission-line efficiency (r5), and carries out interplanar vertical coupled up and down with the 8th joint transmission-line efficiency (r8).Output tap line (t2) spatially forms symmetry with input tap line (t1) about the 5th joint transmission-line efficiency (r5), and links to each other with the 9th joint transmission-line efficiency (r9), and signal is drawn.Interstage coupling line (r10) is positioned on the aspect (f7), saves transmission-line efficiency (r6) the introducing cross-couplings that is coupled with the 4th joint transmission-line efficiency (r4) and the 6th respectively.In sum, t1, r1, r9, t2 are positioned on the same plane f3, and r2, r5, r8 are positioned on the same plane f5.R3, r4, r6, r7, r10 are positioned on the same plane f7.According to the actual process situation, also t1, r1, r9, t2 can be made on the same plane f2, also r2, r5, r8 can be made on the same plane f4, also r3, r4, r6, r7, r10 can be made on the same plane f6.On the f2 of plane, carve step P1, P2, carry out twice scribing at last and draw input/output terminal with DRIE (deep reaction ion etching).Each thickness of dielectric layers is accurately controlled by attenuated polishing technology.The transmission-line efficiency figure of each aspect accurately forms by photoetching, etching and metallization process.Combination between each layer realizes by accurately aiming at bonding technology with assembling.
Among Fig. 3, d1 is first dielectric layer, and p1 and p2 are the step of etching, and step is positioned at the coverage rate of input, output, and purpose is in order to draw input, output by scribing behind bonding, and through scribing, p1 and p2 step place dielectric layer will be removed.
Fig. 4 is the 3 layer laminated filter profile schematic diagram of each medium aspect through making behind the bonding.Three layers of dielectric layer are respectively d1, d2, d3.
Select different bonding technologies according to material,, then can adopt Si-Si bonding process if silicon and silicon combination are stacked.If silicon and glass combination are stacked, then can adopt anode linkage technology, or adopt anode linkage and Si-Si bonding process.
According to the requirement of practical filter characteristic, can make stack filter more than three layers by similar approach.
According to the requirement of practical filter characteristic, can increase or reduce the number of resonator, design the coupled modes (comprising that same layer plane coupling and different layers are vertical coupled) between each resonator selectively.
According to the requirement of practical filter characteristic, can design transmission-line efficiency is stepped impedance formula two ends open ended, uniform impedance line two ends open ended, or the single-ended open ended of uniform impedance.
The interstage coupling line can be introduced cross-couplings between non-conterminous two resonators, realize the attenuation pole in the stopband, thereby improve the filter stop bend characteristic.Filter characteristic as shown in Figure 5.Non-conterminous two resonators are not limited to the 3rd joint and the 5th joint.The position of attenuation pole can be calculated as follows:
w′＝(w-1/w)
R is the strip line character impedance, M
IjBe the coupling coefficient between i level resonator and j level resonator, n is a filter order, and w is an operating frequency.
When the coupling coefficient between the non-conterminous two-stage of change, the attenuation pole position changes thereupon in the stopband.Thereby design suitable dimensions structure obtains suitable coupling coefficient and obtains required attenuation pole, can improve the filter stop bend characteristic, but not influence filter band internal characteristic.
Input, output tap line structure can adopt microstrip line, co-planar waveguide line or belt shape line, and coupled modes can adopt narrow line inductance coupling high or taper coupling.
Embodiment
(1) dielectric layer is the high resistant silicon chip, adopts 3 layers of laminated filter of Si-Si bonding process:
With a resistivity is the Φ 4 of 3000 Ω cm, and " silicon chip that 525 μ m are thick is thinned to the thick and polishing of 400 μ m by abrasive disc, guarantees certain evenness and fineness.Form shallow slot and step p1, the p2 of t1, r1, r4, r7, t2 figure in surface thereof with photoetching and etching technics.Wherein the about 5 μ m of the shallow slot of t1, r1, r4, r7, t2 figure are dark; Step p1, p2 are about, and 100 μ m are dark, and utilize photoetching and etching technics to form scribing and alignment mark figure at its another side.In resistivity is the Φ 4 of 3000 Ω cm, and " second silicon chip one surface that 525 μ m are thick utilizes photoetching and metallization process to form the metal transmission line figure of r1, t1, r4, r7, t2, and utilizes photoetching and etching technics to form the alignment mark figure at its another side.The surface of the no alignment mark of above-mentioned two silicon chips is amplexiformed, and utilize alignment mark to aim at, then Si-Si bonding is carried out on two surfaces of the no alignment mark figure of these two silicon chips.Carry out attenuated polishing on that exposed surface of second silicon chip again, two bondings are finished, and the back gross thickness is 600 μ m, and guarantees surperficial certain evenness and fineness.Utilize photoetching and etching technics to form the shallow slot of r2, r3, r8, r5, r6 figure in the side of second silicon wafer polishing.Simultaneously, being the Φ 4 of 3000 Ω cm with a resistivity, " the thick and polishing of the 3rd wafer thinning to the 400 μ m that 525 μ m are thick guarantees certain evenness and fineness.Utilize photoetching and metallization process to form the metal transmission line figure of r2, r3, r8, r5, r6 in a surface therein, and utilize photoetching and etching technics to form the alignment mark figure at another side.The surface of no alignment mark figure (the metal transmission line figure is arranged) on the exposed surface (shallow slot is arranged) of second silicon chip in above-mentioned Si-Si bonding two silicon chips together and the 3rd silicon chip is amplexiformed, and utilize alignment mark to aim at, and then carry out Si-Si bonding.On two exposed outer surfaces of three lamination silicon chips, form titanium/golden ground shield with metallization process.Place, two edges at p1, p2 carries out the scribing first time, and the scribing degree of depth is 300 μ m, thereby draws filter input, output, carries out the scribing second time again and obtains filter chip.
(2) dielectric layer is high resistant silicon chip and sheet glass, combination stack, and 4 layers of laminated filter of employing anode linkage technology and Si-Si bonding process:
With a resistivity is the Φ 4 of 3000 Ω cm, and " silicon chip that 525 μ m are thick is thinned to the thick and polishing of 400 μ m by abrasive disc, guarantees certain evenness and fineness.Form shallow slot and step p1, the p2 of t1, r1, r9, t2 figure in surface thereof with photoetching and etching technics.Wherein the about 5 μ m of the shallow slot of t1, r1, r9, t2 figure are dark; Step p1, p2 are about, and 100 μ m are dark, and utilize photoetching and etching technics to form scribing and alignment mark figure at its another side.The thick sheet glass of one 500 μ m is utilized photoetching and the metallization process metal transmission line figure of surface formation r1, a t1, r9, t2 therein.Silicon chip is not had the side (shallow slot is arranged) of alignment mark and amplexiform, and utilize alignment mark to aim at, carry out anode linkage then with the side that sheet glass has the metal transmission line figure.Attenuated polishing is carried out on another again that sheet glass is exposed surface, and two bondings are finished, and the back gross thickness is 700 μ m, and guarantees surperficial certain evenness and fineness.Utilize photoetching and metallization process to form r2, r5, r8 metal transmission line figure in the exposed also polished side of sheet glass.Simultaneously, with the second resistivity Φ 4 that is 3000 Ω cm " the thick and polishing of wafer thinning to the 400 μ m that 525 μ m are thick, and guarantee certain evenness and fineness.To form the about 5 μ m of shallow slot of r2, r5, r8 figure dark on a surface therein to utilize photoetching and etching technics, forms the alignment mark figure on its another surface.Above-mentioned sheet glass is amplexiformed through the exposed surface of polishing and formation metal transmission line figure and the side that this silicon chip does not have alignment mark figure (shallow slot is arranged), and utilize alignment mark to aim at, carry out anode linkage then.The exposed surface that second silicon chip is had the alignment mark figure carries out attenuated polishing again, three bondings are finished after gross thickness be 900 μ m, and guarantee evenness and fineness that the surface is certain.On the exposed burnishing surface of second silicon chip, utilize the about 5 μ m of shallow slot of the formation of photoetching and etching technics r3, r4, r10, r6, r7 figure dark.Being the Φ 4 of 3000 Ω cm again with a resistivity, " the 3rd silicon chip that 525 μ m are thick is thinned to the thick and polishing of 400 μ m with semiconductor technology, guarantees certain evenness and fineness.Utilize photoetching and the metallization process metal transmission line figure of surface formation r3, a r4, r10, r6, r7 therein; Utilize photoetching and etching technics to form the alignment mark figure on its another surface.Amplexiform on the surface of no alignment mark figure (the metal transmission line figure is arranged) on the surface that the shallow slot figure is arranged that second silicon chip in three slice, thin pieces that are bonded together is exposed and the 3rd silicon chip, and utilize alignment mark to aim at, and carries out Si-Si bonding then.With forming titanium/golden ground shield on semiconductor technology two outer surfaces that four laminations (three silicon chips, a sheet glass) are exposed behind bonding.The scribing first time is carried out in position at the place, two edges of p1, p2, and the scribing degree of depth is 300 μ m, thereby draws filter input, output, carries out the scribing second time and obtains filter chip.
Claims (8)
1, a kind of laminated filter based on the MEMS technology, which comprises at least the dielectric layer that three stacked dresses form one, it is characterized in that the lower surface of the upper surface of last layer dielectric layer and basecoat dielectric layer forms the screen of filter, the corresponding position is provided with some joints and utilizes MEMS technology coupled transmission line resonator that is processed to form and the groove that is used for bonding on two sides relative between each dielectric layer, also promptly a face is provided with the coupled transmission line resonator, the relative position place promptly is provided with to match and makes the coupled transmission line resonator be positioned at wherein groove on another face, to guarantee the complete bonding of opposite face; The tap line input of filter links to each other with first segment coupled transmission line resonator, and the tap line output links to each other with final section coupled transmission line resonator.
2, the laminated filter based on the MEMS technology according to claim 1, the tap line that it is characterized in that filter is imported, the dual-side of the medium aspect at output place is provided with the step of DRIE (deep reaction ion etching) the technology processing that utilizes in the MEMS technology, and draws outside the filter by lead-out wire from described step surface.
3, the laminated filter based on the MEMS technology according to claim 1 is characterized in that the coupled transmission line resonator is stepped impedance formula coupled transmission line or uniform impedance formula coupled transmission line.
4, the laminated filter based on the MEMS technology according to claim 1 is characterized in that the arbitrary medium face between the in the end a pair of dielectric layer is provided with the interstage coupling line, its two ends respectively with the coupling of any two non-conterminous coupled transmission line resonators.
5, the laminated filter based on the MEMS technology according to claim 4 is characterized in that the interstage coupling line is stepped impedance formula coupled transmission line or uniform impedance formula coupled transmission line.
6, the laminated filter based on the MEMS technology according to claim 1 is characterized in that the coupled transmission line resonator is two ends open circuit or single-ended open circuit.
7, the laminated filter based on the MEMS technology according to claim 1 is characterized in that tap line input, output end structure are microstrip line, co-planar waveguide line or belt shape line, and coupled modes are narrow line inductance coupling high or taper coupling.
8, the laminated filter based on the MEMS technology according to claim 1, it is characterized in that described dielectric layer or all be High Resistivity Si dielectric layer structure, or all be glass medium layer structure, or the part dielectric layer be the high resistance medium layer, all the other are the structure of glass medium layer.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102361113A (en) * | 2011-06-21 | 2012-02-22 | 中国电子科技集团公司第十三研究所 | Silicon-based multi-layer cavity filter |
| CN102790248A (en) * | 2012-09-04 | 2012-11-21 | 中国电子科技集团公司第二十六研究所 | Miniaturization micromechanical filter |
| CN103050748A (en) * | 2012-12-07 | 2013-04-17 | 中国电子科技集团公司第五十五研究所 | Full-closed cascading micro mechanical filter of micro shielding structure |
| CN108028634A (en) * | 2015-10-01 | 2018-05-11 | 株式会社村田制作所 | Laminated band pass filter |
| CN108063606A (en) * | 2016-11-09 | 2018-05-22 | Tdk株式会社 | Multilayer filter |
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| US6262464B1 (en) * | 2000-06-19 | 2001-07-17 | International Business Machines Corporation | Encapsulated MEMS brand-pass filter for integrated circuits |
| US20040178867A1 (en) * | 2003-02-05 | 2004-09-16 | Rahman Mohammed Mahbubur | LTCC based electronically tunable multilayer microstrip-stripline combline filter |
| US7253699B2 (en) * | 2003-05-12 | 2007-08-07 | Hrl Laboratories, Llc | RF MEMS switch with integrated impedance matching structure |
| KR100616674B1 (en) * | 2005-02-16 | 2006-08-28 | 삼성전기주식회사 | Laminated filter with improved stop band attenuation |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102361113A (en) * | 2011-06-21 | 2012-02-22 | 中国电子科技集团公司第十三研究所 | Silicon-based multi-layer cavity filter |
| CN102361113B (en) * | 2011-06-21 | 2014-08-13 | 中国电子科技集团公司第十三研究所 | Silicon-based multi-layer cavity filter |
| CN102790248A (en) * | 2012-09-04 | 2012-11-21 | 中国电子科技集团公司第二十六研究所 | Miniaturization micromechanical filter |
| CN102790248B (en) * | 2012-09-04 | 2014-10-15 | 中国电子科技集团公司第二十六研究所 | Miniaturization micromechanical filter |
| CN103050748A (en) * | 2012-12-07 | 2013-04-17 | 中国电子科技集团公司第五十五研究所 | Full-closed cascading micro mechanical filter of micro shielding structure |
| CN108028634A (en) * | 2015-10-01 | 2018-05-11 | 株式会社村田制作所 | Laminated band pass filter |
| CN108028634B (en) * | 2015-10-01 | 2019-03-12 | 株式会社村田制作所 | Laminated band pass filter |
| CN108063606A (en) * | 2016-11-09 | 2018-05-22 | Tdk株式会社 | Multilayer filter |
| CN108063606B (en) * | 2016-11-09 | 2021-10-19 | Tdk株式会社 | Laminated filter |
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| CN100435408C (en) | 2008-11-19 |
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