CN1983925A - Apparatus for realizing SMS4 enciphering and deciphering algorithm - Google Patents

Apparatus for realizing SMS4 enciphering and deciphering algorithm Download PDF

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Publication number
CN1983925A
CN1983925A CN 200610042608 CN200610042608A CN1983925A CN 1983925 A CN1983925 A CN 1983925A CN 200610042608 CN200610042608 CN 200610042608 CN 200610042608 A CN200610042608 A CN 200610042608A CN 1983925 A CN1983925 A CN 1983925A
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data
constant array
memory unit
decryption
encryption
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CN100525183C (en
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鹿甲寅
曹军
颜湘
黄振海
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China Iwncomm Co Ltd
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China Iwncomm Co Ltd
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Priority to PCT/CN2007/001017 priority patent/WO2007112672A1/en
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H04L9/0625—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation with splitting of the data block into left and right halves, e.g. Feistel based algorithms, DES, FEAL, IDEA or KASUMI
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/80—Wireless

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  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Storage Device Security (AREA)

Abstract

This invention is concerned with the equipment that achieves SMS4 encrypting and deciphering algorithm, includes: the data consignation assembly unit, which checks the external data and the previous data conversion treatment result, the inputting terminal connects with the data consignation assembly unit outputting terminal, the outputting terminal accesses the data conversion assembly unit of the data consignation assembly unit inputting terminal, the outputting terminal accesses the constant array storage part of the data conversion assembly unit inputting terminal. At least two data conversion parts that take connection in series form the data conversion assembly unit in turn, and the outputting terminal of the constant array storage part connects each data conversion assembly unit inputting terminal respectively. The invention can solve the technique problem that excessive time of cycle and low efficiency in encrypting and deciphering in data conversion treatment. The integrate circuit of the invention increases the integrity of the chip signal, and achievable, less costly. It decreases interfere in the system greatly.

Description

A kind of equipment of realizing the SMS4 enciphering and deciphering algorithm
Technical field
The present invention relates to a kind of equipment of the SMS4 of realization enciphering and deciphering algorithm.
Background technology
The critical component of realizing the SMS4 enciphering and deciphering algorithm is cipher key spreading parts and encryption and decryption parts.The encryption and decryption parts mainly are made of three parts, i.e. data registration component, constant array memory unit, data conversion component.The internal structure and the processing procedure of cipher key spreading parts and encryption and decryption parts are basic identical.
Data registration component adopts general-purpose flip-flop, is used for depositing of data.In a clock cycle, the data that these parts are deposited are immovable.General-purpose flip-flop is in the clock upper edge or the lower edge is transported to the trigger output to the data of data input pin, and the temporary device of data that does not change in the data of other time trigger device outputs.
The constant array memory unit is the memory unit of storage constant array.Constant array of the prior art generally is that ready prepd width was that 32 bits, the degree of depth are 32 data array before encryption and decryption was handled.The data of constant array memory unit are according to the height sequence arrangement of address, but called after rk0, rk1 ... rk31.
Data conversion component is the parts that carry out data processing according to the cryptographic algorithm requirement.For example, the SMS4 cryptographic algorithm according to country requires to carry out data processing, the synthetic displacement of cryptographic algorithm defined for once in the operation that data conversion component is finished.
At present, the method for handling according to SMS4 cryptographic algorithm requirement carrying out encryption and decryption data is as follows:
1) external data is imported data registration component.After external data is input to data registration component, the output dateout of data registration component.For example, the external data of 128bit is divided into the data of 4 32bit, can distinguish called after A0, A1, A2, A3.The data of output are 128bit still after data registration component, are divided into the data of 4 32bit, and difference is called after a0, a1, a2, a3 correspondingly.
2) carry out data conversion treatment.The fan-out of data registration component is carried out data conversion treatment according to the input data conversion component.The fan-out of data registration component is converted to data C0, C1, C2, the C3 of 128bit through data conversion component according to a0, a1, a2, a3.
3) carry out data conversion treatment once more.Data after the data conversion treatment are last time deposited once more to data registration component, then the data of data registration component output are imported data conversion component once more, carry out data transaction once more.
4) repeat data conversion treatment once more, obtain the final data result.To the external data of 128bit, data conversion treatment palpus circular treatment is 30 times once more.Be that data conversion treatment will be carried out 32 times altogether, just can obtain the final data result.
There is following shortcoming in the above-mentioned encryption and decryption data processing that requires to carry out according to the SMS4 cryptographic algorithm:
1. the cycle-index of data conversion treatment is many.For example, encrypt the 128bit data, need move 32 data conversion process cycles at least just can obtain the final data result.
2. encryption and decryption efficient is low.Encryption and decryption efficient is the data bulk of encryption and decryption in the unit interval.Encrypt the 128bit data and need data conversion treatment 32 times, promptly need 32 clock cycle, because the clock frequency in the practical application at present is generally all lower, make that interior ciphered data quantity of unit interval is few, efficient is low.If specify encryption and decryption efficient, then need improve clock frequency, and the clock frequency in the practical application often can't improve, so actual encryption and decryption efficient is still lower.
3. employing prior art just must improve clock frequency in order to obtain higher encryption and decryption efficient, and designed integrated circuit can cause:
(1) signal integrity of chip is bad.
(2) chip design difficulty, the product performance difficulty.
(3) chip design cost height.
4. adopt the integrated circuit of prior art to be applied in the system, the raising of clock frequency can cause:
(1) the printed circuit board (pcb) cost increases.
(2) printed circuit board (pcb) difficult design, the product performance difficulty.
(3) interference in the system is very big, can influence normal, the efficient operation of other equipment, device.
Summary of the invention
The object of the present invention is to provide a kind of equipment of the SMS4 of realization enciphering and deciphering algorithm, it is many that it has solved in the background technology cycle-index of data conversion treatment, the inefficient technical problem of encryption and decryption.
Technical solution of the present invention is:
A kind of equipment of realizing the SMS4 enciphering and deciphering algorithm comprises data registration component 1, data conversion component group 2 and constant array memory unit 3, it is characterized in that:
Described data registration component 1, data conversion component group 2 and constant array memory unit 3 constitute the circulation encryption and decryption data and handle 4;
Described data registration component 1 is the data registration component of depositing external data and last data conversion treatment result, described data conversion component group 2 is data conversion component that input is connected to the input of data registration component 1 output, output access data registration component 1, and described constant array memory unit 3 is constant array memory units that output inserts data conversion component group 2 inputs;
Described data conversion component group 2 is made of at least two data converting members of serial connection successively, the output of described constant array memory unit 3 respectively with data conversion component group 2 in the input of each data conversion component join.
Above-mentioned constant array memory unit 3 is data storage devices that the storage encryption and decryption is handled used constant array data; The constant array that this constant array memory unit 3 is stored is the data array that satisfies following condition:
1) cipher key spreading is handled resulting result data;
2) according to address height sequence arrangement;
3) arrange the width and the degree of depth of number array correspondence according to the number of data conversion component in the data conversion component group 2;
4) product of the width and the degree of depth is 1024.
Above-mentioned circulation encryption and decryption data is handled the number of data conversion component of the data conversion component group 2 in 4 being that 32 approximate number is good.
The input of above-mentioned circulation encryption and decryption data processing 4 can be connected to and replenish the additional encryption and decryption datas processing 501 that data conversion treatment is not finished in cycle of treatment encryption and decryption data processing 4; Should additional encryption and decryption data processing 501 comprise:
Be used to deposit the data registration component 101 of external data,
Input is connected to data registration component 101 outputs, output inserts the additional data converting member 21 that the circulation encryption and decryption data is handled 4 inputs,
Output inserts the constant array memory unit 301 of additional data converting member 21 inputs;
Described additional data converting member 21 is made of a data converting member, or is made of the data conversion component that two or more are connected in series successively; The output of described constant array memory unit 301 respectively with additional data converting member 21 in the input of each data conversion component join.
Above-mentioned constant array memory unit 301 is data storage devices that the storage encryption and decryption is handled used constant array data; The constant array that this constant array memory unit 301 is stored is the data array that satisfies following condition:
1) cipher key spreading is handled resulting result data;
2) according to address height sequence arrangement;
3) the circulation encryption and decryption data is handled the constant array data width of constant array memory unit 3 in 4 and the product of the degree of depth, additional encryption and decryption data is handled the constant array data width of constant array memory unit 301 in 501 and the product of the degree of depth, and both sums are 1024; The width of constant array data is that the number of data conversion component in the additional data converting member 21 multiply by 32 in the described constant array memory unit 301, and the degree of depth of constant array data is 1 in the described constant array memory unit 301.
The output of above-mentioned circulation encryption and decryption data processing 4 can be connected to and replenish the additional encryption and decryption datas processing 502 that data conversion treatment is not finished in cycle of treatment encryption and decryption data processing 4; Should additional encryption and decryption data processing 502 comprise:
Be used to deposit the data registration component 102 that the circulation encryption and decryption data is handled 4 results,
Input is connected to the additional data converting member 22 of data registration component 102 outputs,
Output inserts the constant array memory unit 302 of additional data converting member 22 inputs;
Described additional data converting member 22 is made of a data converting member, or is made of the data conversion component that two or more are connected in series successively; The output of described constant array memory unit 302 respectively with additional data converting member 22 in the input of each data conversion component join.
Above-mentioned constant array memory unit 302 is data storage devices that the storage encryption and decryption is handled used constant array data; The constant array that this constant array memory unit 302 is stored is the data array that satisfies following condition:
1) the circulation encryption and decryption data is handled 4 resulting constant array data;
2) according to address height sequence arrangement;
3) the circulation encryption and decryption data is handled the constant array data width of constant array memory unit 3 in 4 and the product of the degree of depth, additional encryption and decryption data is handled the constant array data width of constant array memory unit 302 in 502 and the product of the degree of depth, and both sums are 1024; The width of constant array data is that the number of data conversion component in the additional data converting member 22 multiply by 32 in the described constant array memory unit 302, and the degree of depth of constant array data is 1 in the described constant array memory unit 302.
Above-mentioned input is connected to additional encryption and decryption data and handles 501 circulation encryption and decryption data processing 4, and its output can connect additional encryption and decryption data and handle 502; Should additional encryption and decryption data processing 502 comprise
Be used to deposit the data registration component 102 that the circulation encryption and decryption data is handled 4 results,
Input is connected to the additional data converting member 22 of data registration component 102 outputs,
Output inserts the constant array memory unit 302 of additional data converting member 22 inputs;
Described additional data converting member 22 is made of a data converting member, or is made of the data conversion component that two or more are connected in series successively; The output of described constant array memory unit 302 respectively with additional data converting member 22 in the input of each data conversion component join.
Above-mentioned constant array memory unit 301,302 is respectively the data storage device that the storage encryption and decryption is handled used constant array data; Described constant array memory unit 301,302 constant arrays of being stored are the data arrays that satisfy following condition
1) described constant array memory unit 301 storages is that cipher key spreading is handled resulting result data; What described constant array memory unit 302 was stored is that the circulation encryption and decryption data is handled 4 resulting constant array data;
2) according to address height sequence arrangement;
3) the circulation encryption and decryption data is handled the constant array data width of constant array memory unit 3 in 4 and the product of the degree of depth, additional encryption and decryption data is handled the constant array data width of constant array memory unit 301 in 501 and the product of the degree of depth, additional encryption and decryption data is handled the constant array data width of constant array memory unit 302 in 502 and the product of the degree of depth, and three's sum is 1024; The width of constant array data is that the number of data conversion component in the additional data converting member 21 multiply by 32 in the described constant array memory unit 301, and the degree of depth of constant array data is 1 in the described constant array memory unit 301; The width of constant array data is that the number of data conversion component in the additional data converting member 22 multiply by 32 in the described constant array memory unit 302, and the degree of depth of constant array data is 1 in the described constant array memory unit 302.
Above-mentioned data registration component 1 can adopt in the clock upper edge or the lower edge constantly with fan-in reportedly to output and other constantly fan-outs according to the temporary device of the data that do not change; Data conversion component in described data conversion component group 2, additional data converting member 21 and the additional data converting member 22 is to require to carry out the data processing device of the synthetic displacement of cryptographic algorithm defined for once in data processing, the operation according to cryptographic algorithm.
The present invention has the following advantages:
1. the cycle-index of data conversion treatment is few.For example, encrypt the data of 128bit,, only need 8 cycles of circular flow just can export the final data result if adopt 4 data converting members.
2. encryption and decryption efficient height.Because the data bulk of encryption and decryption increases greatly in the unit interval, so encryption and decryption efficient height.For example,, only need 8 cycles of circular flow just can encrypt the 128bit data if adopt 4 data converting members, so, clock frequency identical situation under, can make 4 times of encryption efficiency raisings.
3. adopt designing integrated circuit of the present invention, require under the situation of encryption and decryption efficient, because clock frequency only is original 1/n, so clock frequency only needs original 1/n satisfying.For example, encrypt the data of 128bit, if adopt 4 data converting members, clock frequency only needs original 1/4.So, under the situation of same treatment efficient, realize that the chip of this method has following characteristics:
(1) integrality of chip signal is optimized greatly;
(2) design of chip, product are easy to realize;
(3) design cost of chip reduces.
4. adopt designing integrated circuit of the present invention, require under the situation of encryption and decryption efficient, because clock frequency only is original 1/n, so clock frequency only needs original 1/n satisfying.Under same treatment efficient, have following characteristics:
(1) the printed circuit board (pcb) cost reduces;
(2) printed circuit board (pcb) design, product are easy to realize;
(3) interference in the system reduces, and other equipment, device influence normal, efficient operation are reduced significantly.
Description of drawings
Fig. 1 is a theory diagram of the present invention;
Fig. 2 is the present invention's structural representation that encryption and decryption data handles that circulates;
Fig. 3 establishes the structural representation that additional encryption and decryption data is handled for the present invention's encryption and decryption data that circulates before handling;
Fig. 4 establishes the structural representation that additional encryption and decryption data is handled for the present invention's encryption and decryption data that circulates after handling;
Fig. 5 for the present invention circulate encryption and decryption data handle before, be equipped with the structural representation that additional encryption and decryption data is handled afterwards.
The drawing reference numeral explanation: the 1-data registration component, 2-data conversion component group, 3-constant array memory unit, 4-circulation encryption and decryption data is handled; 21-additional data converting member, 22-additional data converting member; The 101-data registration component, the 102-data registration component; The 200-data conversion component, 201-data conversion component, 202-data conversion component, 203-data conversion component; The 210-data conversion component, the 211-data conversion component; The 220-data conversion component, the 221-data conversion component; 301-constant array memory unit, 302-constant array memory unit; The additional encryption and decryption data of 501-is handled, and the additional encryption and decryption data of 502-is handled.
Embodiment
Referring to Fig. 1, the present invention mainly is made of data registration component 1, constant array memory unit 3 and data conversion component group 2.
Data registration component 1 is used to deposit the result of external data and last data conversion treatment, can adopt general-purpose flip-flop, as d type flip flop, JK flip-flop etc.Such general-purpose flip-flop is in the clock upper edge or the lower edge reaches the output of trigger to the data of data input pin, the temporary device of data that does not change in the data of other time trigger device outputs.In cycle, the data that data registration component 1 is deposited are immovable in same data conversion treatment.
Data conversion component group 2 is the parts that carry out data processing according to the cryptographic algorithm requirement.For example, the SMS4 cryptographic algorithm according to country requires to carry out data processing, the synthetic displacement of cryptographic algorithm defined for once in the operation that data conversion component group 2 is finished.
Constant array memory unit 3 is used to store the constant array data.The constant array that the present invention adopts is that cipher key spreading is handled resulting result data, according to address height sequence arrangement, arrange the width and the degree of depth of constant array correspondence according to the number of data conversion component in the data conversion component group 2, and the product of the width and the degree of depth is 1024.For example, adopt 4 data converting members, the width of constant array is 128bit so, and the degree of depth is 8.If adopt 8 data converting members, the width of constant array then is 256bit, and the degree of depth is 4.
When the number of data conversion component is 32 approximate number in the data conversion component group 2 of the present invention, be good with the structure that only adopts the circulation encryption and decryption data to handle.
Referring to Fig. 2, during circulation encryption and decryption data of the present invention is handled, the input of data registration component 1 links to each other with the input of external data, the output termination data conversion component group 2 of data registration component 1, the output of constant array memory unit 3 are connected with the input of each data conversion component 200-203 in the data conversion component group 2 respectively.Each data conversion component 200-203 is connected in series successively, and its output inserts the input of data registration component 1.Data conversion component group 2 is made of two data converting members that are connected in series successively at least.
Data conversion component group 2 is an example to adopt 4 data converting member 200-203, and the constant array width is 128bit, and the degree of depth is 8, and the method that adopts the circulation encryption and decryption data to handle is carried out encryption and decryption and handled.Process is as follows:
1) prepares constant array.Deposit constant array in constant array memory unit 3.If the data conversion treatment parts in the data conversion treatment are 4, then the width of constant array is that 128bit, the degree of depth are 8.With the constant array data and the degree of depth 8 corresponding 8 row that are divided into of 128bit, every row is called after rk0 respectively, rk1 ... rk7; The data that the constant array data of every capable 128bit are divided into 4 32bit.Rk0 is divided into rk0a, rk0b, rk0c, rk0d; Rk1 is divided into rk1a, rk1b, rk1c, rk1d
2) external data is transported to the input of data registration component 1.External data is the data of 128bit, is divided into the data of 4 32bit, respectively called after A0, A1, A2, A3.In clock upper edge or lower edge, the data of data registration component 1 input are sent to the output of data registration component 1, data registration component 1 output 128bit is divided into the data of 4 32bit data, respectively called after a0, a1, a2, a3.
3) carry out data conversion treatment first.In this clock cycle, the corresponding data of first row of constant array memory unit 3 constant array of storing are transported to all data conversion component 200-203 respectively.In the same clock cycle, it is that data conversion component 200 is carried out data conversion treatment that the data of data registration component 1 output are imported first data conversion component; First data conversion component is that to import next data conversion component again be that data conversion component 201 is carried out data conversion treatment to the data of data conversion component 200 output; Mode is that data conversion component 200-203 finishes data conversion treatment in proper order until all data conversion component according to this.Specific as follows:
The data rk0a of data a0, the a1 of data registration component 1 output, a2, a3 and 3 outputs of constant array memory unit transports to data conversion component 200, and the data after the conversion process remain 128bit, respectively called after B0, B1, B2, B3;
The data rk0b of data B0, the B1 of data conversion component 200 outputs, B2, B3 and 3 outputs of constant array memory unit transports to data conversion component 201, and the data after the conversion process remain 128bit, respectively called after C0, C1, C2, C3;
The data rk0c of data C0, the C1 of data conversion component 201 outputs, C2, C3 and 3 outputs of constant array memory unit transports to data conversion component 202, and the data after the conversion process remain 128bit, respectively called after D0, D1, D2, D3;
The data rk0d of data D0, the D1 of data conversion component 202 outputs, D2, D3 and 3 outputs of constant array memory unit transports to data conversion component 203, and the data after the conversion process remain 128bit, respectively called after E0, E1, E2, E3;
E0, E1, E2, E3 promptly are the result datas of data conversion treatment first.
4) carry out data conversion treatment once more.In the moment of clock, with last time data E0, E1, E2, the E3 of data conversion treatment deposited to data registration component 1 along arrival; The fan-out of data registration component 1 is imported data conversion component 200-203 successively according to e0, e1, e2, e3.Data rk1a, rk1b, rk1c, the rk1d of the next line correspondence of the constant array that constant array memory unit 3 is stored import data conversion component 200-203 respectively.
5) repeat data conversion treatment once more, obtain the encryption and decryption data result.Data conversion treatment is whenever carried out once once more, promptly finishes a data conversion process cycle.The data conversion treatment circular treatment is 6 times once more, and promptly number carries out 8 times altogether, and the data of exporting after the last data conversion treatment are the final data result.
When adopting two data converting members, the processing of circulation encryption and decryption data is carried out 16 clock cycle altogether and is finished an encryption and decryption processing.When adopting eight data converting members, the processing of circulation encryption and decryption data is carried out 4 clock cycle altogether and is finished an encryption and decryption processing.When adopting 16 data converting members, the processing of circulation encryption and decryption data is carried out 2 clock cycle altogether and is finished an encryption and decryption processing.
Additional encryption and decryption data is handled to be used for replenishing and is finished the circulation encryption and decryption data and handle 4 uncompleted data conversion treatment, especially when the number of data conversion component in the data conversion component group 2 is not 32 approximate number, can handles 4 by the circulation encryption and decryption data and handle with additional encryption and decryption data and to finish data conversion treatment jointly.
Referring to Fig. 3, the input of circulation encryption and decryption data processing 4 can be attached and add the encryption and decryption data processing, is used for replenishing the cycle of treatment encryption and decryption data and handles 4 uncompleted data conversion treatment.Additional encryption and decryption data handles 501 mainly by the data registration component 101 that is used to deposit external data, input is connected to data registration component 101 outputs, output inserts the additional data converting member 21 that the circulation encryption and decryption data is handled 4 inputs, and the constant array memory unit 301 that output inserts additional data converting member 21 inputs constitutes.Additional data converting member 21 can adopt one, two or more data conversion component that are connected in series successively formations.The output of constant array memory unit 301 respectively with additional data converting member 21 in each data conversion component 210,211 ... input join.The constant array that constant array memory unit 301 is stored is the data array that satisfies following condition:
1) cipher key spreading is handled resulting result data;
2) according to address height sequence arrangement;
3) the circulation encryption and decryption data is handled the constant array data width of constant array memory unit 3 in 4 and the product of the degree of depth, additional encryption and decryption data is handled the constant array data width of constant array memory unit 301 in 501 and the product of the degree of depth, and both sums are 1024; The width of constant array data is that the number of data conversion component in the additional data converting member 21 multiply by 32 in the described constant array memory unit 301, and the degree of depth of constant array data is 1 in the described constant array memory unit 301.
The process that data processing is carried out in additional encryption and decryption data processing 501 is as follows:
1) external data is transported to the input of data registration component 1,, the data of data registration component 1 input are sent to the output of data registration component 1 in clock upper edge or lower edge.
2) in this clock cycle, the data that constant array memory unit 301 is stored the constant array correspondence are transported to additional encryption and decryption data respectively and are handled all data conversion component 210,211 in 501 etc.
3) in the same clock cycle, the data of data registration component 1 output are input to first data conversion component 210 and carry out data conversion treatment; The data of first data conversion component 210 outputs are input to next data conversion component 211 again and carry out data conversion treatment; Mode is finished data conversion treatment until all additional data converting member 21 orders that additional encryption and decryption data is handled in 501 according to this, obtains additional encryption and decryption data and handles 501 data processed result.
4) to add the encryption and decryption data result, be used for finishing the circulation encryption and decryption data and handle as the external data in the processing of circulation encryption and decryption data.
Referring to Fig. 4, additional encryption and decryption data is handled the output that also can be connected to circulation encryption and decryption data processing 4.Replenish the cycle of treatment encryption and decryption data and handle 4 uncompleted data conversion treatment.Additional encryption and decryption data handles 502 mainly by being used to deposit the data registration component 102 that the circulation encryption and decryption data is handled 4 results, input is connected to the additional data converting member 22 of data registration component 102 outputs, and the constant array memory unit 302 that output inserts additional data converting member 22 inputs constitutes.Can adopt a data converting member to constitute according to converting member 22, or constitute by the data conversion component that two or more are connected in series successively.The output of constant array memory unit 302 respectively with additional data converting member 22 in the input of each data conversion component join 220,221 ... input join.The constant array that constant array memory unit 302 is stored is the data array that satisfies following condition:
1) the circulation encryption and decryption data is handled 4 resulting constant array data;
2) according to address height sequence arrangement;
3) the circulation encryption and decryption data is handled the constant array data width of constant array memory unit 3 in 4 and the product of the degree of depth, additional encryption and decryption data is handled the constant array data width of constant array memory unit 302 in 502 and the product of the degree of depth, and both sums are 1024; The width of constant array data is that the number of data conversion component in the additional data converting member 22 multiply by 32 in the described constant array memory unit 302, and the degree of depth of constant array data is 1 in the described constant array memory unit 302.
Additional encryption and decryption data is handled 502 processes of carrying out data processing and additional encryption and decryption data and is handled 501 similarly, and it is that the data that the circulation encryption and decryption data is handled 4 processing are carried out conversion process.The data processed result of additional encryption and decryption data processing 502 is final encryption and decryption data result.Additional encryption and decryption data handle data conversion treatment parts in 501 or 502 all can adopt be one, two or more.
Additional encryption and decryption data handle add to the circulation encryption and decryption data carry out before or after handling 4 all can, also can be before the circulation encryption and decryption data handles 4 and all additional afterwards, referring to Fig. 5.Constant array memory unit 301,302 constant arrays of being stored in this structure are the data arrays that satisfy following condition:
1) described constant array memory unit 301 storages is that cipher key spreading is handled resulting result data; What described constant array memory unit 302 was stored is that the circulation encryption and decryption data is handled 4 resulting constant array data;
2) according to address height sequence arrangement;
3) the circulation encryption and decryption data is handled the constant array data width of constant array memory unit 3 in 4 and the product of the degree of depth, additional encryption and decryption data is handled the constant array data width of constant array memory unit 301 in 501 and the product of the degree of depth, additional encryption and decryption data is handled the constant array data width of constant array memory unit 302 in 502 and the product of the degree of depth, and three's sum is 1024; The width of constant array data is that the number of data conversion component in the additional data converting member 21 multiply by 32 in the described constant array memory unit 301, and the degree of depth of constant array data is 1 in the described constant array memory unit 301; The width of constant array data is that the number of data conversion component in the additional data converting member 22 multiply by 32 in the described constant array memory unit 302, and the degree of depth of constant array data is 1 in the described constant array memory unit 302.

Claims (10)

1. an equipment of realizing the SMS4 enciphering and deciphering algorithm comprises data registration component (1), data conversion component group (2) and constant array memory unit (3), it is characterized in that:
Described data registration component (1), data conversion component group (2) and constant array memory unit (3) constitute the circulation encryption and decryption data and handle (4);
Described data registration component (1) is the data registration component of depositing external data and last data conversion treatment result, described data conversion component group (2) is the data conversion component that input is connected to the input of data registration component (1) output, output access data registration component (1), and described constant array memory unit (3) is the constant array memory unit that output inserts data conversion component group (2) input;
Described data conversion component group (2) is made of at least two data converting members of serial connection successively, the output of described constant array memory unit (3) respectively with data conversion component group (2) in the input of each data conversion component join.
2. the equipment of realization SMS4 enciphering and deciphering algorithm according to claim 1 is characterized in that: described constant array memory unit (3) is the data storage device that the storage encryption and decryption is handled used constant array data; The constant array that described constant array memory unit (3) is stored is the data array that satisfies following condition:
1) cipher key spreading is handled resulting result data;
2) according to address height sequence arrangement;
3) arrange the width and the degree of depth of number array correspondence according to the number of data conversion component in the data conversion component group (2);
4) product of the width and the degree of depth is 1024.
3. the equipment of realization SMS4 enciphering and deciphering algorithm according to claim 1 and 2 is characterized in that: the number of the data conversion component of the data conversion component group (2) in the described circulation encryption and decryption data processing (4) is 32 approximate number.
4. the equipment of realization SMS4 enciphering and deciphering algorithm according to claim 1 is characterized in that: the input that described circulation encryption and decryption data is handled (4) is connected to the additional encryption and decryption data processing (501) that data conversion treatment is not finished in additional cycle of treatment encryption and decryption data processing (4); Described additional encryption and decryption data is handled (501) and being comprised:
Be used to deposit the data registration component (101) of external data,
Input is connected to data registration component (101) output, output inserts the additional data converting member (21) that the circulation encryption and decryption data is handled (4) input,
Output inserts the constant array memory unit (301) of additional data converting member (21) input;
Described additional data converting member (21) is made of a data converting member, or is made of the data conversion component that two or more are connected in series successively; The output of described constant array memory unit (301) respectively with additional data converting member (21) in the input of each data conversion component join.
5. the equipment of realization SMS4 enciphering and deciphering algorithm according to claim 4 is characterized in that: described constant array memory unit (301) is the data storage device that the storage encryption and decryption is handled used constant array data; The constant array that described constant array memory unit (301) is stored is the data array that satisfies following condition:
1) cipher key spreading is handled resulting result data;
2) according to address height sequence arrangement;
3) the circulation encryption and decryption data is handled the constant array data width of constant array memory unit (3) in (4) and the product of the degree of depth, additional encryption and decryption data is handled the constant array data width of constant array memory unit (301) in (501) and the product of the degree of depth, and both sums are 1024; The width of constant array data is that the number of data conversion component multiply by 32 in the additional data converting member (21) in the described constant array memory unit (301), and the degree of depth of constant array data is 1 in the described constant array memory unit (301).
6. the equipment of realization SMS4 enciphering and deciphering algorithm according to claim 1 is characterized in that: the output that described circulation encryption and decryption data is handled (4) is connected to the additional encryption and decryption data processing (502) that data conversion treatment is not finished in additional cycle of treatment encryption and decryption data processing (4); Described additional encryption and decryption data is handled (502) and being comprised:
Be used to deposit the data registration component (102) that the circulation encryption and decryption data is handled (4) result,
Input is connected to the additional data converting member (22) of data registration component (102) output,
Output inserts the constant array memory unit (302) of additional data converting member (22) input;
Described additional data converting member (22) is made of a data converting member, or is made of the data conversion component that two or more are connected in series successively; The output of described constant array memory unit (302) respectively with additional data converting member (22) in the input of each data conversion component join.
7. the equipment of realization SMS4 enciphering and deciphering algorithm according to claim 6 is characterized in that: described constant array memory unit (302) is the data storage device that the storage encryption and decryption is handled used constant array data; The constant array that described constant array memory unit (302) is stored is the data array that satisfies following condition:
1) the circulation encryption and decryption data is handled (4) resulting constant array data;
2) according to address height sequence arrangement;
3) the circulation encryption and decryption data is handled the constant array data width of constant array memory unit (3) in (4) and the product of the degree of depth, additional encryption and decryption data is handled the constant array data width of constant array memory unit (302) in (502) and the product of the degree of depth, and both sums are 1024; The width of constant array data is that the number of data conversion component multiply by 32 in the additional data converting member (22) in the described constant array memory unit (302), and the degree of depth of constant array data is 1 in the described constant array memory unit (302).
8. the equipment of realization SMS4 enciphering and deciphering algorithm according to claim 4 is characterized in that: the output that described circulation encryption and decryption data is handled (4) is connected to additional encryption and decryption data processing (502); Described additional encryption and decryption data is handled (502) and being comprised:
Be used to deposit the data registration component (102) that the circulation encryption and decryption data is handled (4) result,
Input is connected to the additional data converting member (22) of data registration component (102) output,
Output inserts the constant array memory unit (302) of additional data converting member (22) input;
Described additional data converting member (22) is made of a data converting member, or is made of the data conversion component that two or more are connected in series successively; The output of described constant array memory unit (302) respectively with additional data converting member (22) in the input of each data conversion component join.
9. the equipment of realization SMS4 enciphering and deciphering algorithm according to claim 8 is characterized in that: described constant array memory unit (301) and constant array memory unit (302) are respectively the data storage devices that the storage encryption and decryption is handled used constant array data; The constant array that described constant array memory unit (301) and constant array memory unit (302) are stored is the data array that satisfies following condition:
1) described constant array memory unit (301) storage is that cipher key spreading is handled resulting result data; What described constant array memory unit (302) was stored is that the circulation encryption and decryption data is handled (4) resulting constant array data;
2) according to address height sequence arrangement;
3) the circulation encryption and decryption data is handled the constant array data width of constant array memory unit 3 in (4) and the product of the degree of depth, additional encryption and decryption data is handled the constant array data width of constant array memory unit (301) in (501) and the product of the degree of depth, additional encryption and decryption data is handled the constant array data width of constant array memory unit (302) in 502 and the product of the degree of depth, and three's sum is 1024; The width of constant array data is that the number of data conversion component multiply by 32 in the additional data converting member (21) in the described constant array memory unit (301), and the degree of depth of constant array data is 1 in the described constant array memory unit (301); The width of constant array data is that the number of data conversion component multiply by 32 in the additional data converting member (22) in the described constant array memory unit (302), and the degree of depth of constant array data is 1 in the described constant array memory unit (302).
10. according to the equipment of claim 1 or 5 or 7 described realization SMS4 enciphering and deciphering algorithms, it is characterized in that: described data registration component (1) be in the clock upper edge or the lower edge constantly with fan-in reportedly to output and other constantly fan-outs according to the temporary device of the data that do not change; Data conversion component in described data conversion component group (2), additional data converting member (21) and the additional data converting member (22) is to require to carry out the data processing device of the synthetic displacement of cryptographic algorithm defined for once in data processing, the operation according to cryptographic algorithm.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008017261A1 (en) * 2006-07-31 2008-02-14 China Iwncomm Co., Ltd. High-efficient encryption and decryption processing method for implementing sms4 algorithm
US8385540B2 (en) 2007-11-19 2013-02-26 China Iwncomm Co., Ltd. Block cipher algorithm based encryption processing method
CN103269482A (en) * 2010-09-06 2013-08-28 苏州国芯科技有限公司 Encryption method for wireless local area network

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6185304B1 (en) * 1998-02-23 2001-02-06 International Business Machines Corporation Method and apparatus for a symmetric block cipher using multiple stages
CN100369074C (en) * 2006-03-02 2008-02-13 西安西电捷通无线网络通信有限公司 Method for realizing encryption/decryption processing in SMS4 cipher algorithm

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008017261A1 (en) * 2006-07-31 2008-02-14 China Iwncomm Co., Ltd. High-efficient encryption and decryption processing method for implementing sms4 algorithm
US8204218B2 (en) 2006-07-31 2012-06-19 China Iwncomm Co., Ltd. High-efficient encryption and decryption processing method for implementing SMS4 algorithm
US8385540B2 (en) 2007-11-19 2013-02-26 China Iwncomm Co., Ltd. Block cipher algorithm based encryption processing method
CN103269482A (en) * 2010-09-06 2013-08-28 苏州国芯科技有限公司 Encryption method for wireless local area network

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