CN1969401B - Transconductance circuit including piezoelectric transducer, piezoelectric detector, and package thereof - Google Patents

Abstract

Transconductance monitoring and amplifying circuit for a piezoelectric transducer (22, 28, 34, 40), such as may be used in a motion detector system, comprising: FET (Q1), piezoelectric transducer (22, 28, 34, 40) (and, thus, signal voltage reference), which floats between the gate and source of FET (Q1), as opposed to being connected to the common ground of the circuit. This allows for the generation of a larger detector signal with the use of a relatively inexpensive FET (Q1) rather than a relatively more expensive high impedance operational amplifier as would be necessary in a conventional transconductance circuit. The FET (Q1) and transducers (22, 28, 34, 40) may be housed in a single four-pin package (54).

Description

Transconductance circuit including piezoelectric transducer, piezoelectric detector and packaging thereof

technical field

The present invention generally relates to a piezoelectric transducer system.

Background technique

Piezoelectric sensor systems are used in a wide variety of applications. As just one non-limiting example, some security systems detect movement within a surveillance zone using passive infrared (PIR) motion sensors that detect motion due to temperature differences between an object (such as a person) and its background environment. Changes in far-infrared radiation (8-14 micron wavelength). Upon detection, the motion sensor typically sends an indication to the host system, which may in turn activate an intrusion "alarm," change interior lighting, open a door, or perform some other function. Advantageously, such sensors are simple and relatively inexpensive.

Detectors of PIR sensors may include pyroelectric detectors, which measure changes in far-infrared radiation. Such detectors work by means of the "piezoelectric effect", which induces a migration of charges in the presence of mechanical strain. Pyroelectric detectors take the form of capacitors—two conducting plates separated by a dielectric. The dielectric may be piezoelectric ceramics. When far-infrared radiation causes a temperature change (and thus some mechanical strain) in the ceramic, charges migrate from one plate to the other. If no external circuitry (or very high impedance circuitry) is connected to the detector ("voltage output mode"), the measurable voltage appears as a "capacitor" charge. If a relatively low impedance external circuit is connected between the plates ("current output mode"), current flows.

The piezoelectric detector in current output mode is placed in a transconductance amplifier circuit, where, instead of allowing the voltage between the plates of the transducer to vary substantially, the charge is conducted through the feedback resistor of a high impedance operational amplifier to create The voltage used to establish the output signal of a circuit. By "high" impedance is meant an impedance of at least ¹⁰⁷ ohms.

The present invention involves providing an inexpensive version of the transconductance circuit. As understood herein, previous transconductance circuits for piezoelectric detectors required relatively expensive high-impedance operational amplifiers because the small amount of charge generated by the piezoelectric detector had to be measured. As further understood herein, the inventive concepts herein can be utilized to provide less expensive circuits.

Contents of the invention

Several versions of transconductance circuits are disclosed, such as piezoelectric far-infrared radiation detectors that can be implemented in infrared motion sensors.

Thus, a piezoelectric detector includes a piezoelectric transducer and a transconductance circuit electrically connected to the transducer. The transconductance circuit defines a common ground and a signal voltage reference that is not directly connected to the common ground.

In some embodiments, a transconductance resistor may be connected to the gate of a field effect transistor (FET), and the transconductance circuit does not have a high impedance operational amplifier. The output resistor can be connected to the source of the FET potentially through a bipolar junction transistor (BJT), the base of which can be connected to the source of the FET. If desired, a "short circuit" capacitor that provides an approximate short circuit at the operating frequency of the sensor signal can connect the drain of the FET to the source of the FET, and an alternating current (AC) coupled output feedback divider can be connected at the source of the FET and the transconductance resistor connected to the gate of the FET.

In a specific non-limiting embodiment, the transconductance resistor is connected to the gate of the FET through a standard input impedance operational amplifier. The inverting input of the op amp can be connected to the source of the FET, and the non-inverting input of the op amp can be connected to the signal voltage reference. Also, an AC-coupled output feedback divider may be connected between the output of the operational amplifier and the transconductance resistor connected to the gate of the FET.

On the other hand, in a transconductance detector circuit including a piezoelectric transducer, a field effect transistor (FET) is connected to the transducer for amplifying its signal. The circuit also has a circuit common ground and a signal voltage reference node that is at an AC potential different from ground.

In yet another aspect, a circuit includes a piezoelectric transducer and a transconductance amplifier circuit that receives a signal from the transducer along an electrical path and processes the signal to produce an output. Transconductance amplifier circuits do not include high impedance op amps.

In one circuit implementation, a piezoelectric detector includes a piezoelectric transducer and a transconductance circuit electrically connected to the transducer. As previously mentioned, the transconductance circuit includes a piezoelectric transducer connected to the gate of a field effect transistor (FET), and the transconductance circuit does not have an operational amplifier. However, the transconductance circuit includes a transconductance resistor connected to the gate of the FET and first and second transistors other than the FET. In a particular embodiment of this last circuit, the feedback circuit portion comprises a first transistor and a second transistor, and the second transistor is electrically connected to the transconductance resistor and the first transistor.

In another aspect, a piezoelectric detector package includes a housing housing three components, namely a piezoelectric transducer, a field effect transistor (FET) defining a gate, and a transconductance resistor connected to the gate. First through fourth electrical connectors are located on the housing and electrically connected within the housing to the FET source, the FET drain, the piezoelectric transducer, and the transconductance resistor, respectively. The connector is mechanically coupleable to circuit elements outside the housing.

In a particular embodiment, the feedback circuit portion may be wired to the first connector for connection to the feedback circuit portion driven by the source of the FET. Also, a power supply line may be connected to a second connector to connect the power supply to the drain of the FET. Additionally, a circuit line can be connected to a third connector to connect at least a portion of the transconductance circuit to the transducer. Additionally, a feedback line can be connected to a fourth connector to connect at least a portion of the circuit to the transconductance resistor.

In another aspect, a method for operably coupling a piezoelectric transducer coupled to a gate of a field effect transistor (FET) with a transconductance circuit comprises providing within a single housing the piezoelectric transducer, FET, and transconductance resistors. The method also includes providing four connectors on the housing and connecting the connectors to portions of the transconductance circuit.

Description of drawings

Details of the invention as to its structure and operation are best understood by reference to the accompanying drawings, in which like reference numerals indicate like parts, and in which:

Fig. 1 is the block diagram of this system architecture;

Fig. 2 is the schematic diagram of the first embodiment of this transconductance circuit;

Fig. 3 is the schematic diagram of the second embodiment of this transconductance circuit;

Fig. 4 is the schematic diagram of the third embodiment of this transconductance circuit;

Fig. 5 is the schematic diagram of the fourth embodiment of this transconductance circuit;

Figure 6 is a schematic diagram of a modified version of the first embodiment shown in Figure 2 in which the alternating current (AC) and direct current (DC) connections to the transducer are separated from each other to avoid a DC output that could saturate the circuit if high enough ;

Figure 7 is a schematic diagram of a modified version of the second embodiment shown in Figure 3, in which the AC and DC connections to the transducer are separated from each other;

Figure 8 is a schematic diagram of a modified version of the third embodiment shown in Figure 4, in which the AC and DC connections to the transducer are separated from each other;

Figure 9 is a schematic diagram of a modified version of the fourth embodiment shown in Figure 5, in which the AC and DC connections to the transducers are separated from each other;

Figure 10 is a schematic diagram of another alternative embodiment of the present transconductance circuit; and

Figure 11 is a perspective view of a transducer package.

Detailed ways

Referring initially to FIG. 1 , there is shown an example non-limiting system, generally indicated at 10 , for detecting a moving object 12 , such as a person. System 10 includes optical system 14 , which may include appropriate mirrors, lenses, and other components known in the art for focusing an image of object 12 onto passive infrared (PIR) detector system 16 . In response to moving object 12, PIR detector system 16 generates a signal that may be filtered, amplified, and digitized by signal processing circuitry 18, and processing system 20 (e.g., a computer or application specific integrated circuit) receives the signal and determines whether to activate the audible or A visible alarm 21 or other output device, such as an activation system for a door, etc.

Having described one application of the piezoelectric detector of the present invention, attention is now directed to Figures 2-5, which illustrate various embodiments of the inventive concept. As shown in FIG. 2 , a piezoelectric transducer 22 is provided in a transconductance circuit 24 with a direct current (DC) voltage source 26 . Circuitry 24 may be viewed as a monitoring circuit for piezoelectric transducer 22 . Also, circuitry 24 impedance-buffers and amplifies the signal from transducer 22 .

In accordance with the present principles, a "transconductance circuit" is a circuit in which, instead of allowing the voltage between the plates of a transducer (such as transducer 22) to vary substantially, charge is conducted through a resistor to create a The voltage of the circuit output signal.

Piezoelectric transducer 22 may be any piezoelectric transducer. In one illustrative illustration, piezoelectric transducer 22 is a pyroelectric detector that measures changes in far-infrared radiation through the "piezoelectric effect," which induces charge migration in the presence of mechanical strain, which can be determined by For example, it is induced by temperature changes caused by far-infrared radiation. The piezoelectric transducer 22 may take the form of a capacitor, ie two conductive plates separated by a dielectric, which may be a piezoelectric ceramic. When the ceramic of piezoelectric transducer 22 is subjected to mechanical strain, charge migrates from one plate to the other.

In circuit 24 as shown in FIG. 2, transducer 22 is connected between the source and gate of junction field effect transistor (FET) Q1 which, in a non-limiting embodiment, Can be realized by FET model 2N4338. A power source 26 is connected to the drain of the shown FET Q1, which may be a five volt power source established from one or more dry battery packs.

As shown in Figure 2, the source current of FET Q1 is changed to a voltage by passing it through output resistor R1. This voltage is connected via transconductance resistor R2 and causes current to flow back to the gate of FET Q1, where resistors R1, R2 are connected to ground, while transducer 22 is "floating" between the source and gate of FET Q1. ” (that is, its signal reference voltage is not connected to ground).

Using the above structure, those skilled in the art will recognize that FET Q1 controls the feedback current through transconductance resistor R2 to the gate of FET Q1 by varying the voltage across output resistor R1 via ground node while applying the same varying voltage across transconductance resistor R2. The alternating current (AC) component of the output of circuit 24 is measured across output resistor R1, which can be calculated mechanically with sufficient accuracy by multiplying the output current of transducer 22 by the resistance of transconductance resistor R2 to give Reflect the actual circuit function. The direct current (DC) component of the output is determined by the gate-source operating voltage of FET Q1.

In other words, the signal voltage reference node of circuit 24 is floating with respect to the common ground of the circuit in contrast to conventional non-transconductance circuits where the signal voltage reference node is grounded and the FETs are used to operate in voltage output mode buffer for the piezoelectric detector. Thus, this combination of transconductance circuit configurations produces a more characteristic signal voltage than conventional voltage output mode circuits, while advantageously allowing the use of a relatively inexpensive FET Q1 of the type used in conventional voltage output mode circuits. Same, to replace relatively more expensive high-impedance op amps. Viewed in another way, in contrast to conventional voltage output mode circuits, the circuit 24 shown in FIG. 2 has essentially three functional blocks, namely, the transducer 22, the FET Q1, and the transconductance resistor R2, where The latter is the feedback element.

3-5 illustrate various circuits with components added to the circuit of FIG. 2 for adding further signals generated by the circuit. As shown in FIG. 3 , the piezoelectric transducer 28 is provided in a transconductance circuit 30 with a DC voltage source 32 . In circuit 30 as shown in FIG. 3, transducer 28 is connected between the source and gate of junction field effect transistor (FET) Q1, and thus the signal voltage reference of circuit 30 is relative to circuit common ground. float. Power supply 32 is connected to the drain of FET Q1 through drain resistor R9.

In the circuit shown in FIG. 3, in addition to the additional circuit elements discussed below, not only FET Q1 but also bipolar junction transistor (BJT) Q2 are provided. If desired, an inexpensive standard input impedance op amp can be used in place of the BJT Q2. "Standard input impedance" means an impedance not exceeding 10 ⁷ ohms.

In the embodiment shown in Figure 3, the base of BJT Q2 is connected to transducer 28 and to the source of FET Q1 as shown, with the emitter of BJT Q2 connected to output resistor R1 at ground and the BJT The collector of Q2 is connected to power supply 32 and is separated from the drain of FET Q1 by drain resistor R9. Because of the extra gain provided by BJT Q2 and because its base is connected to the source of FET Q1, an output feedback voltage divider established by resistors R3, R4, and capacitor C3 can be added so that the voltage across transconductance resistor R2 The resulting basic transconductance voltage is amplified by a factor of, say, 10, and this voltage is fed back as current through transconductance resistor R2 to the gate of FET Q1. Thus, the AC component of the output of circuit 30 in Figure 3 (measured across output resistor R1) can be ten times greater than the output of circuit 24 shown in Figure 2, provided the same excitation energy is supplied to both circuit transducers .

Furthermore, in circuit 30 shown in FIG. 3, the drain of FET Q1 is essentially shorted (to an AC signal) through shorting capacitor _C5 to the source of FET Q1, which, as previously mentioned, is the signal voltage reference node. With the drain of FET Q1 essentially shorted to the signal voltage reference node, the internal capacitance of FET Q1 no longer creates an undesirable feedback element, thereby extending the high frequency response of circuit 30 .

Referring now to FIG. 4 , a piezoelectric transducer 34 is provided in a transconductance circuit 36 with a DC voltage source 38 . In circuit 36 as shown in FIG. 4, transducer 34 is connected between the source and gate of junction field effect transistor (FET) Q1, and thus the signal voltage reference of circuit 36 is relative to circuit common ground. float. As shown, power supply 38 is connected to the drain of FET Q1.

In the embodiment shown in FIG. 4, an inexpensive standard input impedance op amp U1 has its inverting input connected to the transducer 34 and the source of FET Q1, which is indirectly connected to ground (i.e., via resistor R4). The output of operational amplifier U1 is fed back to the gate of FET Q1 through transconductance resistor R3. Also, the non-inverting input of the operational amplifier U1 is connected to a voltage divider consisting of a resistor R1 connected to the power supply 38 and a resistor R2 connected to ground.

As was the case with the previous circuit, the voltage across FET source resistor R2 resulting from the source current is fed back as current to the gate of FET Q1. The feedback path extends through operational amplifier U1 in circuit 36 as shown in FIG. 4 and through transconductance resistor R3. The transconductance current summing node is at the gate of FET Q1, which buffers the inverting input of op amp U1. The non-inverting input of operational amplifier U1 is the “floating” signal voltage reference node for circuit 36 . Op-amp U1 varies its output supply to control the feedback current through transconductance resistor R3, where the output signal of the circuit is the AC component of the output voltage of op-amp U1 and the DC component is determined by the gate-source operating voltage of FET Q1.

Circuit 36 in FIG. 4 provides a substantially constant voltage to the signal voltage reference node (held by operational amplifier U1 at its inverting input). Thus, the drain-gate voltage of FET Q1 is substantially constant compared to the amplifier output and the feedback voltage fed back to the gate of FET Q1 as a current through transconductance resistor R3. Therefore, there is no high-frequency limitation due to any effect of the internal drain-gate capacitance of FET Q1, so the resistor-capacitor pair R9-C5 shown in the transistor-only circuit of Figure 3 is in the circuit of Figure 4 36 is not required.

FIG. 5 shows a piezoelectric transducer 40 in a transconductance circuit 42 with a DC voltage source 44, except that resistor R5 and capacitor C3 are provided between the non-inverting input of operational amplifier U1 and feedback resistor R3. It is substantially identical in all respects to the circuit 36 shown in FIG. 4 except that a transconductance resistance R6 is provided between the tap of the resistor R5/capacitor C3 pair and the gate of the FET Q1. With sufficient gain provided by operational amplifier U1, the output voltage divider established by resistors R3 and R5 and capacitor C3 can amplify the basic transconductance voltage by a factor of, say, ten.

Figures 6-9 correspond to Figures 2-5, respectively, with the respective circuits being substantially the same as shown, except for the changes shown in Figures 6-9, in which the AC and DC connections to the transducers are separated from each other, To avoid such a high DC output from putting the circuit into a condition known as "saturation", the circuit DC output voltage should (from an ideal calculation standpoint) be more positive than the anode terminal of the power supply or more positive than the cathode terminal of the power supply. burden. Since this is not practically possible, the circuit DC output could become "stuck" to either the anode or cathode terminals of the power supply, in which case no AC signal would be possible, otherwise rendering the circuit completely inoperable. This high DC output may result from DC amplification due to parallel leakage resistance present in some transducers. When operating correctly, the circuits shown in Figures 6-9 work just like their respective counterparts in Figures 2-5, since it is AC signals, not DC signals, that are used in the present invention.

In Figures 6 and 8 by passing the AC component of the transducer output signal through the AC-through DC-blocking capacitor C _ac , and from there to the signal processing circuit, ie FET Q1 in Figure 6 and the operation in Figure 8 The amplifier U1 shunts the DC component of the output signal of the transducer to the ground through the DC grounding resistor R _DC at the same time, so as to complete the above separation of AC from DC. On the other hand in Figures 7 and 9, it is recognized that AC-by DC-blocking capacitor C3 is already present in these circuits where the output of the corresponding transducer is connected to capacitor C3 and resistor (R4 in Figure 7 , the line between R5) in Figure 9.

Figure 10 shows a circuit similar to that shown in Figure 9, wherein like reference numerals indicate like parts, but in which operational amplifier U1 is replaced by a PNP transistor Q3 cascaded with an NPN transistor Q4 for a less expensive implementation. More specifically, in FIG. 10, transconductance resistor R6 is connected to the gate of FET Q1, its drain is connected to power supply line 46, and its source is connected through output line 48 in which PNP transistor Q3 is placed to include The voltage divider circuit of resistors R1 and R2, these resistors provide the bias signal for the operation of FET Q1 by establishing the source voltage of FET Q1. PNP transistor Q3 buffers this bias signal to establish the source bias of FET Q1. And as shown, transistor Q3 passes the FET drain-to-source output current to the base of NPN transistor Q4, where, due to the gain of transistor Q4, a commensurately larger transistor output current (collector-emitter current), which in turn is converted back to a voltage through a load resistor connected to the supply voltage.

The feedback signal from the source of FETQ1 is provided to transconductance resistor R6 via feedback line 50 as before, and as described above, in the particular circuit shown in FIG. 10, via PNP transistor Q3 and NPN transistor Q4 and Feedback resistor R3 is provided. According to the principles described above with respect to Figures 5 and 9, the piezoelectric transducer is connected via transducer line 52 to capacitor C3 (in the voltage divider part of the circuit), which provides an AC connection to the signal voltage reference node.

All of the above circuits consist of a piezoelectric transducer and a transconductance resistor connected in parallel to the gate of a FET with the drain connected to the power supply and the source connected to the feedback portion of the circuit. Figure 11 shows that for convenience the piezoelectric transducer, FET and transconductance resistor can be provided in a single package on which four connectors such as but not limited to pins are provided to connect the transducer, The FET source, FET gate, and transconductance resistors are connected to the above circuit. Other connector configurations such as sockets, pads, soldered wires, etc. may be used as long as the connectors are accessible from the outside of the housing.

Thus, Figure 11 shows a packaging structure, generally indicated at 54, comprising an empty, parallelepiped-shaped housing 55 comprising four external connectors 56, 58, 60, 62, such as but not limited to pin. Empty housing 55 houses the piezoelectric transducer, FET, and transconductance resistor in any of the circuits shown above. Thus, the first and second connectors 56 and 58 can be electrically connected to the FETs within the housing 55 . More specifically, the first connector 56 may be connected to the drain of the FET, and with the circuit shown in FIG. Thus connecting the FET drain to the supply. On the other hand, a second FET connector 58 connects the source of the FET within housing 55, and it can engage a complementary shaped connector which in turn connects to line 48 in FIG. 10, thereby connecting the source of the FET to the circuit shown. part.

The third connector 60 may be internally connected to a transconductance resistor. The third connector 60 may then be externally engaged with a complementary shaped connector to connect line 50 in FIG. 10 to transconductance resistor R6 within housing 55 . The fourth connector 62 can be connected to a piezoelectric transducer contained inside the packaging structure 54 . A fourth connector 62 may then be connected to line 52, as shown in the illustrative circuit of FIG. 10, which connects the piezoelectric transducer at the gate of the FET to another circuit structure. Preferably, the three components of the empty housing package structure 54 , namely the piezoelectric transducer, FET and transconductance resistor are packaged in pure nitrogen 64 . It will be appreciated that the physical connector arrangement shown in FIG. 10 is exemplary only, and other connector arrangements may be implemented (eg, one connector on each of the four sides of the housing 55).

With the above four-connector, three-part package, the very small currents associated with very high resistance (such as typically 125G ohm transconductance resistance) are contained inside the housing 55 . Transducers, FETs, and transconductance resistors outside the circuit use much higher current than flows inside the case. Thus, while a single housing is expensive to make to contain the entire circuit as shown in Figure 10, a simple four-pin package as shown in Figure 11 is cheap and can be made just to fit sized to accommodate the aforementioned three sections.

First to fourth on and within the housing electrically connected to drain, source, transconductance resistors (R2, R3, R6), and piezoelectric transducers (22, 28, 34, 40), respectively Electrical connectors (56, 58, 60, 62) mechanically coupleable to circuit elements external to the housing (55).

Claims (17)

1. A piezoelectric detector comprising: A transconductance circuit (24, 30, 36, 42) comprising piezoelectric transducers (22, 28, 34, 40) defining a common ground and not directly connected to a signal voltage reference to a common ground, said transconductance circuit comprising a transconductance resistor (R2, R3, R6) connected to the gate of a field effect transistor (Q1), said transconductance circuit (24, 30, 36, 42) Without an operational amplifier having an impedance greater than 10 ⁷ ohms, the field effect transistor is also connected to the piezoelectric transducer. 2. A detector according to claim 1, wherein the transconductance resistors (R3, R6) are connected to the gate via an operational amplifier (U1). 3. A detector according to claim 2, wherein the inverting input of the operational amplifier (U1) is connected to the source of the field effect transistor (Q1). 4. A detector according to claim 3, wherein the non-inverting input of the operational amplifier (U1) is connected to the signal voltage reference. 5. A detector according to claim 1, comprising an output resistor (R1) connected to the source of the field effect transistor (Q1), across which output resistor the output of said circuit is obtained. 6. A detector according to claim 5, wherein the output resistor (R1) is connected to the field effect transistor (Q1) via a bipolar junction transistor (Q2). 7. A detector according to claim 6, wherein the base of the bipolar junction transistor (Q2) is connected to the source of the field effect transistor (Q1). 8. A detector according to claim 1, comprising a short circuit capacitor ( ^C3 ) connecting the drain of the field effect transistor (Q1) to the source of the field effect transistor (Q1). 9. The detector according to claim 1, comprising an output voltage divider (R3, R4, C3 and R3, R5, C3) connected between the gate of the field effect transistor (Q1) and the source of the field effect transistor (Q1). ). 10. A transconductance detector circuit comprising a piezoelectric transducer (22, 28, 34, 40), wherein a field effect transistor (Q1) is connected to said transducer (22) for amplifying the transducer signal , 28, 34, 40), the circuit common ground and signal voltage reference node, which is at any AC potential except ground. 11. The transconductance detector circuit according to claim 10, comprising a transconductance resistor (R2, R3, R6) connected to the field effect transistor (Q1) gate, the transconductance detector circuit not having a high impedance operational amplifier, said A field effect transistor is also connected to the piezoelectric transducer, and the high impedance is an impedance of at least 10 megohms. 12. A circuit comprising: Piezoelectric transducers (22, 28, 34, 40); a transconductance circuit (24, 30, 36, 42), which receives a signal from a transducer (22, 28, 34, 40) along an electrical path and processes the signal to produce an output, the transconductance circuit (24, 30, 36, 42) do not include a high impedance operational amplifier, said high impedance being an impedance of at least 10 megohms. 13. A piezoelectric detector comprising: A transconductance circuit comprising a piezoelectric transducer connected to the gate of a field effect transistor (Q1) of the transconductance circuit, which does not have an operational amplifier, and which also includes a connection transconductance resistor (R6) to the gate of the field effect transistor (Q1), the circuit includes a first transistor (Q3) and a second transistor (Q4) in addition to the field effect transistor (Q1), the field effect transistor (Q1 ), the first transistor (Q3) and the second transistor (Q4) are electrically connected to each other. 14. A detector according to claim 13, comprising a feedback circuit part (50, R3) connected to the source of the field effect transistor (Q1). 15. A detector according to claim 14, wherein the second transistor (Q4) is electrically connected to the transconductance resistor (R6) and the first transistor (Q3). 16. The detector according to claim 13, comprising a transducer package (54) that physically only accommodates the piezoelectric transducer, the field effect transistor (Q1), and the transconductance resistor (R6), the transducer package comprising an externally accessible first connector (56) electrically connected to the drain of the field effect transistor (Q1) for connection to a power supply, a second externally accessible connector (56) electrically connected to the source of the field effect transistor (Q1) 58), an externally accessible third connector (60) electrically connected to the transconductance resistor (R6), and an externally accessible fourth connector (62) electrically connected to the piezoelectric transducer. 17. A piezoelectric detector package (54), comprising: shell (55); piezoelectric transducers (22, 28, 34, 40) in the housing; Field effect transistor (Q1) in the housing, the field effect transistor (Q1) defines the gate connected to the transducer (22, 28, 34, 40), the gate of the field effect transistor is also connected to the transconductance resistance device (R2, R3, R6), the field effect transistor (Q1) also defines the source and drain; The first to fourth connectors (56, 58, 60, 62) on the shell are electrically connected to the sockets in the shell respectively. Drain, source, transconductance resistors (R2, R3, R6), and piezoelectric transducers (22, 28, 34, 40), the four connectors are mechanically connected to the electrical circuit outside the housing (55) component coupling.

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