CN1967833A - Symmetric connect passage of programmable logic device - Google Patents
Symmetric connect passage of programmable logic device Download PDFInfo
- Publication number
- CN1967833A CN1967833A CN 200510086897 CN200510086897A CN1967833A CN 1967833 A CN1967833 A CN 1967833A CN 200510086897 CN200510086897 CN 200510086897 CN 200510086897 A CN200510086897 A CN 200510086897A CN 1967833 A CN1967833 A CN 1967833A
- Authority
- CN
- China
- Prior art keywords
- connection channels
- line segment
- line
- line unit
- unit line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
The invention relates to a programmable logic element, especially the connecting channel and channel cross switch, as compensate cross switch, wherein the connecting line in the horizontal connecting channel is equally divided into upper and lower parts which are symmetry with the central line of connecting channel; the line of vertical connecting channel is same as the line in horizontal connecting channel; the line in horizontal connecting channel is rotated 90degree anti-clockwise, then turned over based on the central line, to obtain the vertical connecting channel. The invention can reduce time delay of connecting channel, and reduce area of cross switch, to improve property.
Description
Technical field
The present invention is relevant with programmable logic device (Programmable Logic Device is called for short PLD) usually, and especially connection channels and the connection channels cross bar structure with programmable logic device is relevant.
Technical background
Owing to have programmatic, programmable logic device uses very flexible, and this makes it become a kind of integrated circuit of extensive use.Programmable logic device comprises CPLD (Complex Programmable Logic Device is called for short CPLD) and field programmable gate array (Field Programmable Gate Array is called for short FPGA) etc.From a structural point, programmable logic device comprises three parts such as logic function block, interconnection resources and input-output unit, and logic function block is realized concrete logic function; Input-output unit is realized circuit and extraneous interface; Interconnection resources realizes the connection between the circuit each several part.Usually, input-output unit be distributed in device around, logic function block be aligned to the rule the array shape, interconnection resources then is arranged between the logic function block array, as shown in Figure 1 with the form of row, column.
(ASIC) is different with application-specific integrated circuit (ASIC), and in general the interconnection resources in the programmable logic device is " too sufficient ", redundant in other words conj.or perhaps.This is because the logic function that application-specific integrated circuit (ASIC) will be realized is determined, thereby its connecting line construction and interconnection resources are also fixed; Programmable logic device can be revised the logic function of its realization according to user's needs arbitrarily, and different logical circuits has different separately interconnection resources demands, so in order to realize circuit structure as much as possible, programmable logic device needs (than application-specific integrated circuit (ASIC)) more interconnection resources usually.
The interconnection resources of programmable logic device can be divided into two parts: connection channels and connection channels cross bar switch etc., and wherein connection channels is divided into horizontal direction connection channels and vertical direction connection channels again, and each connection channels comprises many line unit line segments.Because the connection between the logic function block is to realize by the line unit line segment in the connection channels, so the time-delay characteristics of connection channels can influence the overall performance of system.The connection channels cross bar switch is the cross-connection point of horizontal direction connection channels and vertical direction connection channels, and its effect is that the line unit line segment in the different directions connection channels is coupled together to constitute an organic connection channels network.Connection between the line unit line segment need be used devices such as tristate buffer and transfer tube usually, that is to say that the connection channels cross bar switch can take some chip areas, so its structure will influence the area performance of programming device.
At the connection channels and the connection channels cross bar structure aspect of programmable logic device, forefathers have carried out some research work.In the literature, V.Betz and J.Rose have discussed the influence of the length of line unit line segment for the time-delay characteristics of field programmable gate array, and as the ratio of the tristate buffer of connection channels cross bar switch and the transfer tube problems such as influence for the area performance (integrated level) of field programmable gate array.Though transfer tube realizes that than tristate buffer area is much smaller, its defective also is clearly: driving force is weak and quiescent dissipation is big, so it can not substitute tristate buffer fully.Because the one-way that its signal transmits, the tristate buffer in the connection channels cross bar switch are generally the transmitted in both directions with the realization signal occurring, this has just further increased chip and has realized area.
Summary of the invention
The present invention is in view of this defect situation of prior art, a kind of new connection channels and connection channels cross bar structure are proposed, so that the interconnection resources of device obtains utilizing fully as far as possible, thereby reduce the required interconnection resources total amount of device, to reach the purpose that reduces programmable logic device interconnection resources redundancy.
For achieving the above object, technical solution of the present invention provides a kind of symmetric form connection channels of programmable logic device, comprise the complementary type cross bar structure, it is the interior line unit line segment of connection channels in the horizontal direction, it is divided into upper and lower two parts, and these upper and lower two parts are symmetrical with respect to the center line of horizontal direction connection channels; Line unit line segment in the connection channels of vertical direction, with the line unit line segment in the horizontal direction connection channels, has on all four structure, with the line unit line segment in the horizontal direction connection channels, counterclockwise revolve and turn 90 degrees, be that axis turns with its center line again, promptly obtained the connection channels of vertical direction;
With the width of logic function block as long measure, line unit line segment has at least two kinds of different length, the unit line segment of different length respectively accounts for certain quantity in connection channels, the line unit line segment that length is little is used for connecting neighbour's logic function block, and the line unit line segment that length is big connects the logic function block of apart from each other;
In a connection channels, the layout of line unit line segment is not from same original position:
If each connection channels comprises W bar line unit line segment, the length of line unit line segment is respectively 2s and 4s, and the two respectively accounts for the 1/2W bar, and length is the 1/2W bar line unit line segment of 2s, wherein 1/4W bar line unit line segment 0 begins to arrange from the position, and the 1/4W bar is then from the position 1 in addition; Length is in the line unit line segment of 4s, the 1/8W bar is arranged from the position 0, and the 1/8W bar is from the position 1, and the 1/8W bar is from the position 2, and the 1/8W bar is from the position 3 in addition; Consequently, for each location point in the connection channels, the formation of its interconnection resources all is identical; Wherein, W is the line unit number of each passage, and s is the width of logic function block.
The symmetric form connection channels of described programmable logic device, its coding rule is: in the horizontal direction in the connection channels, line unit line segment numbering is arranged from the bottom up, and nethermost line unit line segment is numbered 0, secondly is numbered W-1 for the uppermost line of 1... unit line segment; In the connection channels of vertical direction, line segment numbering in line unit is arranged from left to right, and leftmost line unit line segment is numbered 0, secondly is numbered W-1 for the rightmost line of 1... unit line segment; For width is the connection channels of W, and wherein arbitrary line unit line segment supposes that it is numbered I, and we claim an other line unit line segment and its complementation that is numbered (W-1-I) so, and wherein, W is the line unit number of each passage;
Line unit line segment interconnect the terminal that only occurs in line unit line segment, each line unit line segment connects maximum three in an one terminal and has identical or complementary line unit line segment numbering with itself, has the line unit line segment of identical terminal location with it simultaneously.
The symmetric form connection channels of described programmable logic device, its described complementary type cross bar structure, be that the line unit line segment in the connection channels is divided into two parts, every part line unit line segment have identical and fixing side signal transmission to: for the connection channels of horizontal direction, direction from left to right is a positive direction, is in the other direction from right to left; For the connection channels of vertical direction, direction from top to bottom is a positive direction, is in the other direction from top to bottom; Then in connection channels, connect the cross bar switch place and substitute bidirectional buffer, make the needed transistor size of connection channels cross bar switch reduce half, thereby make programmable logic device have area performance preferably with single buffer.
The symmetric form connection channels of described programmable logic device, it has W bar line unit line segment in connection channels, and from length, it is 2s that 1/2W bar line unit line segment length is wherein arranged, and 1/2W bar length is 4s in addition; From side signal transmission to, in the connection channels signal transfer direction of 1/2W bar line unit line segment being arranged is positive direction, the 1/2W bar is in the other direction in addition; In the W bar line unit line segment in the connection channels, being numbered 0 line segment to (1/4W-1) is that length is the line unit line segment of 4s in the horizontal direction, and they are one group with the 1/16W bar, increase progressively a unit coordinate original position successively; Numbering (1/4W) to (1/2W-1) is that length is the line unit line segment of 2s, and they are divided into two parts, respectively from coordinate 0 and coordinate 1 POS INT, according to symmetry, draws the concrete layout situation of 1/2W to the line unit line segment of (W-1) that be numbered.
The symmetric form connection channels of described programmable logic device, its all horizontal direction connection channels has similar line unit line segment layout structure, and its difference is the original position difference of line unit line segment; In the layout structure of the 0th horizontal direction connection channels, on the original position basis of its all W bar line unit line segments, add the layout structure that a coordinate unit promptly obtains the 1st connection channels, be equivalent to the 0th connection channels integral body to unit of right translation, the position that the left side is vacated is according to corresponding line unit line segment length polishing, and the part that overflow on the right is blocked and got final product; In like manner can obtain the layout structure of the 2nd and the 3rd connection channels; The structure of the 4th connection channels and the 0th connection channels are just the same, and the structure of the 5th connection channels and the 1st connection channels are in full accord, and promptly the connection channels layout structure is to repeat in the cycle with 4;
The connection channels of vertical direction and horizontal direction connection channels have on all four structure, promptly for the 0th connection channels of vertical direction, the 0th connection channels of the arrangement of its line unit line segment and horizontal direction is the same, and difference is the direction difference of the two extension.
The symmetric form connection channels of described programmable logic device, concrete annexation between its described each bar line unit line segment, be in the connection channels on the connection channels cross bar switch left side, it is numbered the line unit line segment of J, the numbering that is connected to the line unit line segment of connection channels cross bar switch the right, bottom and upper segment is respectively: J, J and (W-1-J), wherein, W is the line unit number of each passage.
The present invention comprises the content of following aspect:
1) the connection channels structure of strict symmetry, wherein the signal in each line unit line segment has fixing transmission direction.
2) on all four horizontal direction connection channels and vertical direction connection channels.
3) has the connection channels cross bar structure of one-way damper and specific annexation.
The present invention is by adopting the unique annexation in specific line unit line segment layout structure and connection channels crosspoint place, reduce the time-delay of programmable logic device connection channels, and the realization area of minimizing connection channels cross bar switch, thereby the time-delay characteristics and the area performance (being integrated level) of raising device.
Description of drawings
Fig. 1 represents the basic structure of programmable logic device and forms schematic diagram;
Fig. 2 is the distribution situation of the line unit line segment original position in horizontal direction connection channels of the present invention;
Fig. 3 is the line unit line segment layout structure schematic diagram of a horizontal direction connection channels of the present invention;
Fig. 4 is the annexation schematic diagram of connection channels cross bar switch of the present invention.
Embodiment
Line unit line segment is realized the connection between the logic function block, its length scale has very big influence for the time-delay characteristics of system: if connection channels is to be made of very long line unit line segment fully, connection between the then adjacent logic function block can cause the waste of interconnection resources, thereby increases the realization area of programmable logic device; If be to constitute all by very short line unit line segment, then the connection between the logic function block of apart from each other needs more line unit line segment to be formed by connecting by the connection channels cross bar switch, the time-delay characteristics of system can be worsened so on the one hand, the realization area of programmable logic device can be increased on the other hand again because of connecting increasing of buffer.So, the connection channels planted agent is when some long line unit line segment, be used for realizing the connection between the logic function block of apart from each other, simultaneously, also should some short line unit line segment be used for realizing adjacent or at a distance of the connection between the nearer logic function block.
Among the present invention agreement with the width of logic function block as long measure.We have two kinds of different length by the line unit line segment of design, and the two respectively accounts for certain quantity in connection channels.The less line unit line segment of length is used for connecting neighbour's logic function block, the line unit line segment that length is bigger is used for realizing the connection between the logic function block of apart from each other, so both can reduce the waste of interconnection resources, also help to improve simultaneously the time-delay characteristics of system.Below in order to narrate convenient and to be without loss of generality, we suppose: each connection channels comprises 32 line unit line segments, and the length of line unit line segment is respectively 2 and 4, and the two respectively accounts for half, be that length is that 2 line unit line segment is 16, length is that 4 line unit line segment has 16.
The original position of line unit line segment (in a connection channels) distributes very crucial for the placement-and-routing of programmable logic device, consider the popularity of its application, comprise the connection channels structure and should be embodied everywhere harmony in interior programmable logic device design.In order to make full use of interconnection resources, rationally arrange the original position of line unit line segment extremely important.In a connection channels, the layout of line unit line segment is not from same original position, even be like this for the line unit line segment with equal length yet.For length is 16 line unit line segments of 2, and we allow 8 line unit line segments (account for its sum half) 0 begin to arrange from the position, other 8 then from the position 1; Length is in 4 the line unit line segment, 4 (account for 16 of its sums 1/4th) are arranged from the position 0, article 4, from the position 1, article 4, from the position 2, other 4 from the position 3, (this figure is only just in order to represent that line unit line segment has different original positions, does not represent the real structure of connection channels) as shown in Figure 2.The result of Bu Zhiing is like this, and for each location point in the connection channels, the formation of its interconnection resources all is identical.
The effect of connection channels cross bar switch is to be used for realizing the signal transmssion line that the multiple connection between the line unit line segment is grown with formation, or changes the transmission direction of signal, thereby constitutes an organic connection channels network.Because before logical circuit of specific implementation, we can not determine arbitrary the data-signal direction of transfer on the line unit line segment, so (to constitute bidirectional buffer) that the buffer at connection channels cross bar switch place normally occurs in pairs, this needs to take some chip areas undoubtedly.Consider that programmable logic device is when realizing a concrete circuit, the buffer that no matter connects switch is unidirectional, and is still two-way, and it finally all is toward a direction transmission signals, that is to say that the signal flow on any line unit line segment is to all fixing; And from the statistics angle, the circuit that realize is big more, and is approaching more toward the line unit line segment number of positive and negative both direction transmission signals in the connection channels.So we can be divided into two parts with the line unit line segment in the connection channels, every part line unit line segment have identical and fixing side signal transmission to, the side signal transmission between two parts line unit line segment is to then just in time opposite.So design does not need to increase the quantity of line unit line segment, substitutes bidirectional buffer but can connect the switch place at connection channels with single buffer.Like this, just make realize the needed transistor size of connection channels cross bar switch (with the bidirectional buffer implementation by comparison) reduce half, thereby make programmable logic device have area performance preferably.
Convenience in order to narrate below, our regulation: for the connection channels of horizontal direction, direction from left to right is a positive direction, be opposite direction from right to left; For the connection channels of vertical direction, direction from top to bottom is a positive direction, is in the other direction from top to bottom.In addition, we introduce following coding rule: in the horizontal direction in the connection channels, line unit line segment numbering is arranged from the bottom up, and nethermost line unit line segment is numbered 0, secondly is numbered W-1 (the line unit number of supposing each passage is W) for the uppermost line of 1... unit line segment.In the connection channels of vertical direction, line segment numbering in line unit is arranged from left to right, and leftmost line unit line segment is numbered 0, secondly is numbered W-1 for the rightmost line of 1... unit line segment.In the discussion of back, we also can use the notion of " complementation ", it refers to following situation: be the connection channels of W for width, arbitrary line unit line segment wherein, suppose that it is numbered I, we claim an other line unit line segment and its complementation that is numbered (W-1-I) so.Complementation is the notion of an equity, if (W-1-I) be the complementation of I, I also is the complementation of (W-1-I) so, and they are complementary mutually.
Owing to adopted the line unit line segment of different length in the connection channels, when the layout of design line unit line segment, should consider the connectivity problem between the line unit line segment.In our design, the connection of line unit line segment only occurs in the terminal of line unit line segment, and each line unit line segment can connect three line unit line segment terminals with its " corresponding " in an one terminal.So-called " corresponding " refers to the line unit line segment that will connect and has identical or complementary line unit line segment numbering with itself, has identical terminal location with it simultaneously.This line unit line segment that just requires to have identical numbering in horizontal connection channels and the vertical join line passage has the original position that is complementary.Consider for symmetry, among the present invention the vertical direction connection channels is designed to the horizontal direction connection channels in full accordly, so just guaranteed to be connected well at suitable line unit, connection channels crosspoint line segment.
We at first discuss the complete layout of a line unit line segment in the horizontal direction connection channels.We have supposed the front, and 32 line unit line segments are arranged in the connection channels, and from this angle of length, it is 2 that 16 line unit line segment lengths are wherein arranged, and other 16 length are 4; To angle, in the connection channels signal transfer direction of 16 line unit line segments being arranged is positive direction from side signal transmission, and other 16 is in the other direction.In addition, according to harmonious principle, its original position also has its rule (preamble was discussed).Comprehensive above-mentioned constraints, we have obtained a horizontal direction connection channels schematic diagram as shown in Figure 3.The label on the left side is the numbering of connection channels intraconnections unit line segment among Fig. 3, and the label of bottom is represented the coordinate of connection channels cross bar switch position.For 32 line unit line segments in the horizontal direction connection channels, we are divided into two parts up and down with it, and they are symmetrical with respect to (horizontal direction) center line of horizontal direction connection channels.From Fig. 3 we as can be seen, being numbered 0 to 7 line segment is that length is 4 line unit line segment, they are one group with two, increase progressively a unit coordinate original position successively; Numbering 8 to 15 is that length is 2 line unit line segment, and they are divided into two parts, respectively from coordinate 0 and coordinate 1 POS INT.According to symmetry, we can draw the concrete layout situation that is numbered 16 to 31 line unit line segment.Obviously, this distribution form has good harmonious requirement and the constraint that also can satisfy us.
All horizontal direction connection channels have similar line unit line segment layout structure, and its difference is the original position difference of line unit line segment.Such as being the layout structure figure of the 0th horizontal direction connection channels with Fig. 3, add the layout structure that a coordinate unit promptly obtains the 1st connection channels so on the original position basis of all 32 line unit line segments at it, this is equivalent to the 0th connection channels integral body to unit of right translation, the position that the left side is vacated is according to corresponding line unit line segment length polishing, and the part that overflow on the right is blocked and got final product.In like manner can obtain the layout structure of the 2nd and the 3rd connection channels.Be understood that the structure of the 4th connection channels and the 0th connection channels are just the same, the structure of the 5th connection channels and the 1st connection channels are in full accord ..., that is to say that the connection channels layout structure is to repeat in the cycle with 4.Like this, we have just designed the layout structure of all connection channels on the horizontal direction.
The connection channels of vertical direction and horizontal direction connection channels have on all four structure, as the 0th connection channels for vertical direction, the 0th connection channels of the arrangement of its line unit line segment and horizontal direction is the same, and unique difference is the direction difference of the two extension.Specifically, for I connection channels of horizontal direction, we only need it is turn 90 degrees by counterclockwise revolving, and are that axis turns with its center line again, have promptly obtained I connection channels of vertical direction.
May there be the connection of 3 line unit line segments on other 3 directions in crosspoint therewith (on each direction each) in every line unit line segment a connection channels cross bar switch position.We wish that signal can be transferred to three different directions via these 3 line unit line segments.We mentioned when the connection channels layout structure was discussed in front, all connection channels (comprising horizontal direction and vertical direction) have similar structure, very natural, we can allow in all connection channels the line unit line segment of identical numbering have identical side signal transmission to.Again by the high symmetry of connection channels itself, our imagination is the line unit line segment aggregate that the boundary is divided into two different transmission directions with connection channels with its center line, numbering less line unit line segment aggregate can only number bigger line unit line segment aggregate and can only carry out the transmission of signal to opposite direction to the positive direction transmission signals.Specific to we for example in the middle of, being numbered 0 to 15 line unit line segment transmission direction is positive direction, is numbered 16 to 31 line unit line segment transmission direction in the other direction.Like this, when being connected with vertical direction line unit line segment in the position, crosspoint for the line unit line segment of a horizontal direction, can be from the positive direction line unit line segment aggregate of vertical direction connection channels and respectively select one the line unit line segment aggregate in the other direction.By the discussion of the symmetry of connection channels and front as can be known, the complementation of any line unit line segment must be in the opposite direction line unit line segment aggregate in the positive direction line unit line segment aggregate, otherwise still, and the line unit line segment of any two complementations all has identical layout starting point.So complementary two line unit line segments (wherein a numbering is identical with input link unit wires segment number) obviously are comparatively desirable selections.As shown in Figure 4.
Fig. 4 represents to be numbered in the horizontal direction connection channels line unit line segment (left side numeral representative) annexation of line unit line segment on other three directions in connection channels cross bar switch position and crosspoint of 10, the line segment that indicates letter " a " represents and being connected of the line unit line segment of its bearing of trend that line unit, the opposite end line segment numbering that its connects is 10 equally; The line segment that indicates letter " b " represent with the perpendicular connection channels of current line unit line segment in have being connected of line unit line segment of same signal transmission direction, the numbering of this line unit line segment also is 10; The line segment that indicates letter " c " represent with the perpendicular connection channels of current line unit line segment in have being connected of line unit line segment of opposite signal transmission direction, from figure, see, this line unit line segment be numbered 21, it just in time is complementary (the connection channels width is 32) with being numbered 10 line unit line segment.
By the layout structure rule of connection channels and the annexation characteristics of connection channels cross bar switch, we are easy to the concrete annexation between definite each bar line unit line segment.(horizontal direction) connection channels with the connection channels cross bar switch left side is an example, the line unit line segment that it is numbered J, the numbering that is connected to the line unit line segment of connection channels cross bar switch the right (being its opposite), bottom and upper segment is respectively: J, J and (31-J) etc.The annexation of its excess-three direction line unit line segment similarly.Here be not repeated.
Claims (6)
1. the symmetric form connection channels of a programmable logic device, comprise the complementary type cross bar structure, it is characterized in that, line unit line segment in the connection channels in the horizontal direction, it is divided into upper and lower two parts, and these upper and lower two parts are symmetrical with respect to the center line of horizontal direction connection channels; Line unit line segment in the connection channels of vertical direction, with the line unit line segment in the horizontal direction connection channels, has on all four structure, with the line unit line segment in the horizontal direction connection channels, counterclockwise revolve and turn 90 degrees, be that axis turns with its center line again, promptly obtained the connection channels of vertical direction;
With the width of logic function block as long measure, line unit line segment has at least two kinds of different length, the unit line segment of different length respectively accounts for certain quantity in connection channels, the line unit line segment that length is little is used for connecting neighbour's logic function block, and the line unit line segment that length is big connects the logic function block of apart from each other;
In a connection channels, the layout of line unit line segment is not from same original position:
If each connection channels comprises W bar line unit line segment, the length of line unit line segment is respectively 2s and 4s, and the two respectively accounts for the 1/2W bar, and length is the 1/2W bar line unit line segment of 2s, wherein 1/4W bar line unit line segment 0 begins to arrange from the position, and the 1/4W bar is then from the position 1 in addition; Length is in the line unit line segment of 4s, the 1/8W bar is arranged from the position 0, and the 1/8W bar is from the position 1, and the 1/8W bar is from the position 2, and the 1/8W bar is from the position 3 in addition; Consequently, for each location point in the connection channels, the formation of its interconnection resources all is identical; Wherein, W is the line unit number of each passage, and s is the width of logic function block.
2. the symmetric form connection channels of programmable logic device as claimed in claim 1, it is characterized in that, coding rule is: in the horizontal direction in the connection channels, line unit line segment numbering is arranged from the bottom up, nethermost line unit line segment is numbered 0, secondly is numbered W-1 for the uppermost line of 1... unit line segment; In the connection channels of vertical direction, line segment numbering in line unit is arranged from left to right, and leftmost line unit line segment is numbered 0, secondly is numbered W-1 for the rightmost line of 1... unit line segment; For width is the connection channels of W, and wherein arbitrary line unit line segment supposes that it is numbered I, and we claim an other line unit line segment and its complementation that is numbered (W-1-I) so, and wherein, W is the line unit number of each passage;
Line unit line segment interconnect the terminal that only occurs in line unit line segment, each line unit line segment connects maximum three in an one terminal and has identical or complementary line unit line segment numbering with itself, has the line unit line segment of identical terminal location with it simultaneously.
3. the symmetric form connection channels of programmable logic device as claimed in claim 1, it is characterized in that, described complementary type cross bar structure, be that the line unit line segment in the connection channels is divided into two parts, every part line unit line segment have identical and fixing side signal transmission to: for the connection channels of horizontal direction, direction from left to right is a positive direction, is in the other direction from right to left; For the connection channels of vertical direction, direction from top to bottom is a positive direction, is in the other direction from top to bottom; Then in connection channels, connect the cross bar switch place and substitute bidirectional buffer, make the needed transistor size of connection channels cross bar switch reduce half, thereby make programmable logic device have area performance preferably with single buffer.
4. as the symmetric form connection channels of claim 1 or 3 described programmable logic devices, it is characterized in that W bar line unit line segment is arranged in connection channels, from length, it is 2s that 1/2W bar line unit line segment length is wherein arranged, and 1/2W bar length is 4s in addition; From side signal transmission to, in the connection channels signal transfer direction of 1/2W bar line unit line segment being arranged is positive direction, the 1/2W bar is in the other direction in addition; In the W bar line unit line segment in the connection channels, being numbered 0 line segment to (1/4W-1) is that length is the line unit line segment of 4s in the horizontal direction, and they are divided into four groups, increase progressively a unit coordinate original position successively; Numbering 1/4W is that length is the line unit line segment of 2s to (1/2W-1), and they are divided into two parts, respectively from coordinate 0 and coordinate 1 POS INT, according to symmetry, draws the concrete layout situation of 1/2W to the line unit line segment of (W-1) that be numbered.
5. as the symmetric form connection channels of claim 1 or 3 described programmable logic devices, it is characterized in that all horizontal direction connection channels have similar line unit line segment layout structure, its difference is the original position difference of line unit line segment; In the layout structure of the 0th horizontal direction connection channels, on the original position basis of its all W bar line unit line segments, add the layout structure that a coordinate unit promptly obtains the 1st connection channels, be equivalent to the 0th connection channels integral body to unit of right translation, the position that the left side is vacated is according to corresponding line unit line segment length polishing, and the part that overflow on the right is blocked and got final product; In like manner can obtain the layout structure of the 2nd and the 3rd connection channels; The structure of the 4th connection channels and the 0th connection channels are just the same, and the structure of the 5th connection channels and the 1st connection channels are in full accord, and promptly the connection channels layout structure is to repeat in the cycle with 4;
The connection channels of vertical direction and horizontal direction connection channels have on all four structure, promptly for the 0th connection channels of vertical direction, the 0th connection channels of the arrangement of its line unit line segment and horizontal direction is the same, and difference is the direction difference of the two extension.
6. as the symmetric form connection channels of claim 1,2 or 3 described programmable logic devices, it is characterized in that, concrete annexation between described each bar line unit line segment, be in the connection channels on the connection channels cross bar switch left side, it is numbered the line unit line segment of J, the numbering that is connected to the line unit line segment of connection channels cross bar switch the right, bottom and upper segment is respectively: J, J and (W-1-J), wherein, W is the line unit number of each passage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100868975A CN100495696C (en) | 2005-11-17 | 2005-11-17 | Symmetric connect passage of programmable logic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100868975A CN100495696C (en) | 2005-11-17 | 2005-11-17 | Symmetric connect passage of programmable logic device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1967833A true CN1967833A (en) | 2007-05-23 |
| CN100495696C CN100495696C (en) | 2009-06-03 |
Family
ID=38076494
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005100868975A Active CN100495696C (en) | 2005-11-17 | 2005-11-17 | Symmetric connect passage of programmable logic device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100495696C (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102361450A (en) * | 2011-07-07 | 2012-02-22 | 上海华为技术有限公司 | Programmable logic device |
| CN106156402A (en) * | 2016-06-15 | 2016-11-23 | 深圳市紫光同创电子有限公司 | The laying out pattern method of fpga logic block array and laying out pattern |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5894565A (en) * | 1996-05-20 | 1999-04-13 | Atmel Corporation | Field programmable gate array with distributed RAM and increased cell utilization |
| US6469540B2 (en) * | 2000-06-15 | 2002-10-22 | Nec Corporation | Reconfigurable device having programmable interconnect network suitable for implementing data paths |
| JP3851810B2 (en) * | 2001-12-07 | 2006-11-29 | 富士通株式会社 | Programmable logic circuit and clock control method thereof |
-
2005
- 2005-11-17 CN CNB2005100868975A patent/CN100495696C/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102361450A (en) * | 2011-07-07 | 2012-02-22 | 上海华为技术有限公司 | Programmable logic device |
| CN102361450B (en) * | 2011-07-07 | 2015-01-21 | 上海华为技术有限公司 | Programmable logic device |
| CN106156402A (en) * | 2016-06-15 | 2016-11-23 | 深圳市紫光同创电子有限公司 | The laying out pattern method of fpga logic block array and laying out pattern |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100495696C (en) | 2009-06-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1124690C (en) | Floor plan for scalable multiple level interconnect architecture | |
| CN1293636C (en) | Layout structure of multiplexer cells | |
| US5376844A (en) | Programmable logic device with multiplexer-based programmable interconnections | |
| CN1048127C (en) | Architecture and interconnect scheme for programmable logic circuits | |
| US8482313B2 (en) | Universal digital block interconnection and channel routing | |
| US8291147B2 (en) | Computer motherboard with adjustable connection between central processing unit and peripheral interfaces | |
| CN1188569A (en) | Scalable multiple level interconnect architecture | |
| CN1901438A (en) | Multi-channel communication circuitry for programmable logic device integrated circuits and the like | |
| JPH04233326A (en) | Constructible interconnection structure | |
| EP0220459A2 (en) | Differential cascode voltage switch logic circuit | |
| CN1967833A (en) | Symmetric connect passage of programmable logic device | |
| US6842040B1 (en) | Differential interconnection circuits in programmable logic devices | |
| JPS63139A (en) | Master slice system gate array semiconductor integrated circuit device | |
| CN101494455A (en) | Multi-hierarchy FPGA | |
| US7705629B1 (en) | Permutable switching network with enhanced interconnectivity for multicasting signals | |
| US7777519B2 (en) | Permutable switching network with enhanced multicasting signals routing for interconnection fabric | |
| JPS5884445A (en) | Large scaled integrated circuit | |
| CN105471422B (en) | The programmed logical module of integrated auxiliary logic arithmetic element | |
| US5694058A (en) | Programmable logic array integrated circuits with improved interconnection conductor utilization | |
| US6384629B2 (en) | High-speed programmable interconnect | |
| CN111725187B (en) | Multi-die FPGA (field programmable Gate array) formed based on silicon connection layer with universal structure | |
| CN220526565U (en) | Buffer circuit, LED display module and LED display device | |
| CN1314244C (en) | Switch device including public voltage reference path | |
| CN2750476Y (en) | Circuit realizing chip pin function switching and chip | |
| JP2724052B2 (en) | Programmable logic element |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |