CN1957599B - Simplified wiring schemes for vertical color filter pixel sensors - Google Patents

Abstract

Vertical-color-filter pixel sensors having simplified wiring and reduced transistor counts are disclosed. In an embodiment, a single line is used for reference voltage, pixel reset voltage, and column-output signals in a VCF pixel sensor. In another embodiment, row-reset signals and row-enable signals are sent across a line that is shared between adjacent rows in an array of VCF pixel sensors. The present invention also provides an optimized layout for a VCF pixel sensor. With shared row-reset, row-enable, reference voltage and column-output lines as well as a VCF pixel sensor in which source-follower voltage, source-follower amplifier voltage and row-enable signals all share a common line. These combined line embodiments can be used with a single column-output line as well as two row-enable lines. The embodiments can also be implemented in a VCF pixel sensor without a row-enable transistor.

Description

The simplified wiring scheme that is used for vertical color filtered pixel transducer

Technical field

The present invention relates to element sensor.More particularly, the present invention relates to use semi-conducting material vertically light to be carried out the panchromatic pixels transducer and the array of a plurality of wavelength bands at color filtration and sensing same position place.

Background technology

In CMOS active pixel sensor, traditional method is for along the reset operation supply Voltage Reference through the photodiode in each element sensor of one group of lead of a pixel sensor array, and reads through the pixel light current value on another group lead of described array.The wiring of element sensor directly influences the fill factor and the number of required component, therefore limits the performance of array and the cost that pixel sensor array is made in influence.(for example, vertical color filters (vertical-color-filter, VCF) element sensor), and cabling scenario is even more important, and need be optimized as much as possible for the element sensor of the complexity with increase.

Summary of the invention

In one aspect, the invention provides a kind of passive vertical color filtered pixel, it is formed on the semi-conductive substrate and comprises: at least two detector layer, it is configured to collect the photo-generated carrier of one first polarity, and separate by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity, described at least two layers are arranged to each other perpendicular alignmnet substantially and are had different spectral sensitivities as its function of different depth in described Semiconductor substrate, and described pixel has a plurality of photodiodes, a plurality of colors are enabled a grid and a column output line.

On the other hand, the invention provides a kind of active vertical color filtered pixel, it is formed on the semi-conductive substrate and comprises: at least two detector layer, it is configured to collect the photo-generated carrier of one first polarity, and separate by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity, described at least two layers are arranged to each other perpendicular alignmnet substantially and are had different spectral sensitivities as its function of different depth in described Semiconductor substrate, described pixel has a plurality of photodiodes, and described pixel has pixel reset voltage and the row output of sharing a bridging line.

Aspect another, the invention provides a kind of active vertical color filtered pixel, it is formed on the semi-conductive substrate and comprises: at least two detector layer, it is configured to collect the photo-generated carrier of one first polarity, and separate by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity, described at least two layers are arranged to each other perpendicular alignmnet substantially and are had different spectral sensitivities as its function of different depth in described Semiconductor substrate, described pixel has a plurality of photodiodes, and described pixel has a source follower voltage and a resetting voltage of sharing.

Aspect another, the invention provides a kind of active vertical color filtered pixel, it is formed on the semi-conductive substrate and comprises: at least two detector layer, it is configured to collect the photo-generated carrier of one first polarity, and separate by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity, described at least two layers are arranged to each other perpendicular alignmnet substantially and are had different spectral sensitivities as its function of different depth in described Semiconductor substrate, described pixel has a plurality of photodiodes, and described pixel has the reset voltage signal of being used for, source follower voltage and row are enabled the bridging line of signal.

Aspect another, the invention provides a kind of active vertical color filtered pixel array, each pixel is formed on the semi-conductive substrate and comprises: at least two detector layer, it is configured to collect the photo-generated carrier of one first polarity, and separate by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity, described at least two layers are arranged to each other perpendicular alignmnet substantially and are had different spectral sensitivities as its function of different depth in described Semiconductor substrate, described pixel has a plurality of photodiodes, described pixel has at least one transistor and one that reads that is used to read described pixel and is used for the bridging line that horizontal reset signal and row are enabled signal, wherein with the pixel arrangement array of several rows and some row, described array is configured to make the photodiode interconnection of reading another row of transistor AND gate of delegation, described bridging line of while to share reset signal that is used for array delegation and the row that is used for array one adjacent row and enables signal.

Description of drawings

Fig. 1 is the cross-sectional view of three look VCF element sensors of prior art.

Fig. 2 A is combined semiconductor cross-sectional view and the schematic diagram according to VCF element sensor of the present invention.

Fig. 2 B is a schematic diagram of describing the same VCF element sensor as shown in Fig. 2 A, wherein photodiode is schematically shown to be semiconductor diode symbols.

Fig. 2 C is a schematic diagram of describing the transistor circuit that can use in the storage pattern of VCF element sensor of the present invention, and each of wherein red, green and blue colour photodiode is coupled to described transistor circuit.

Fig. 3 is the semiconductor cross-sectional view that the vertical color filtered pixel transducer of epitaxial semiconductor technology is adopted in explanation.

Fig. 4 A to 4E is illustrated in to finish to select the step cross-sectional view of formed structure afterwards in the manufacturing process.

Fig. 5 is the figure according to imaging array of the present invention.

Fig. 6 A and 6B are the sequential charts of the operation of pixels illustrated transducer.

Fig. 7 is the schematic diagram of passive VCF element sensor.

Fig. 8 is the schematic diagram with element sensor of the bridging line that is used for pixel reset voltage signal and row output signal as shown in previous CMOS active pixel sensor.

Fig. 9 is the schematic diagram with VCF element sensor of the bridging line that is used for pixel reset voltage signal and row output signal.

Figure 10 has one being used for the common lines of reset voltage signal and row output signal and being used for pixel reset signal and row is enabled the schematic diagram of VCF element sensor of another common lines of signal as shown in previous CMOS active pixel sensor.

Figure 11 has one to be used for pixel reset signal and the capable common lines of signal and the schematic diagram of the VCF element sensor of another common lines that is used for resetting voltage and row output signal enabled.

Figure 12 has the pixel of utilize sharing to reset and enable the schematic diagram of VCF pixel sensor array of the reinforcement layout of line with row.

Figure 13 is the figure that explanation is in the operation of the transducer in belt-type shutter (rolling shutter) and the video mode.

Figure 14 is the figure of the timeline of the integrated sequential of explanation belt-type shutter pattern.

Figure 15 has one to be used for the schematic diagram of VCF element sensor that common lines and that reset signal and row enable signal is used for the common lines of resetting voltage and source follower voltage.

Figure 16 is the element sensor of line is enabled in explanation as the shared resetting voltage of having of teaching in the prior art, source follower voltage and row a schematic diagram.

Figure 17 is that explanation has the schematic diagram that shared resetting voltage, source follower voltage and row are enabled the VCF element sensor of line.

Figure 18 be explanation have shared reset, source follower voltage and row are enabled line and the schematic diagram of the simplification VCF element sensor of shared resetting voltage and column output line.

Figure 19 be explanation have output line being used for pixel reset voltage equally and shared reset, schematic diagram that source follower voltage and row are enabled the VCF element sensor of line.

Figure 20 is the schematic diagram that explanation has the element sensor of the common lines that is used for source follower voltage and resetting voltage as shown in previous CMOS active pixel sensor.

Figure 21 is the schematic diagram that explanation has the VCF element sensor of a column output line that has the common lines that is used for resetting voltage and source follower voltage.

Figure 22 is the schematic diagram that the sequential of the operation of simplifying the VCF element sensor is described.

Embodiment

Be understood by those skilled in the art that, the following description of the present invention only is illustrative and limits never in any form.Those technical staff that have benefited from this disclosure will readily understand other embodiments of the invention.

Fig. 1 explanation can be used for putting into practice first illustrative and the limiting examples of VCF element sensor of the present invention.Cross-sectional view is showed the prior art VCF element sensor 10 of the type that discloses in No. the 5th, 965,875, the United States Patent (USP) of Merrill.Fig. 1 is illustrated in the VCF element sensor of making in triple-well (triple-well) technology, and its Smalt, green and red sensor are arranged on following different depth place, Semiconductor substrate 12 surfaces, and imager is made described Semiconductor substrate 12.By inspecting Fig. 1 as seen, red photodiode comprises the face that connects (junction) between p type substrate 12 and the n type trap 14, green photodiode comprises the face that connects between n type trap 14 and the p type trap 16, and blue colour photodiode comprises the slight doped-drain of the n type at p type trap 16 and substrate surface place and implants the face that connects between (the n-type lightly-doped-drain implant) 18.Come the sensor light electric current by galvanometer 20,22 and 24 from redness, green and blue colour photodiode respectively as what indicate with symbol.Photodiode in the VCF element sensor of Fig. 1 directly is connected in series each other, and therefore has polarity alternately.

Fig. 2 A explanation can be used for putting into practice second illustrative and the limiting examples of VCF element sensor of the present invention.VCF element sensor 30 is the six layers of structure on the p N-type semiconductor N substrate 32 of being manufactured in the displaying of cross-sectional view signal property.Such VCF element sensor has three n type zones, is isolated by the p regions perpendicular that all is connected to substrate electric potential.

Blueness, green and red photodiode transducer are formed by the face that connects between n type and the p type zone, and are arranged on the following different depth place, surface of semiconductor structure.Compare the structure that the interpolation of additional layer causes redness, green and blue light current signal all to obtain from the n type negative electrode of the photodiode of three isolation with the structure of Fig. 1.This schematic presentation is in Fig. 2 B, and it describes the VCF element sensor identical with transducer shown in Fig. 2 A.In Fig. 2 B, photodiode schematically shown be semiconductor diode symbols.

Fig. 2 A and 2B show the nonstorage pattern of VCF element sensor, and wherein each of redness, green and blue colour photodiode all is coupled to transistor circuit.Each circuit has by RESET (resetting) holding wire and drives and be coupling in reset transistor 54 between photodiode cathode and the reset potential, is coupled to the source follower amplifier transistor 56 of photodiode cathode, and drives and be coupling in the source electrode and the row selecting transistor between the line 58 of source follower amplifier transistor by ROW-SELECT (row is selected) holding wire.Tail tag " r ", " g " and " b " are used for expression and are associated with each transistorized color.As known in the art, the RESET signal is effectively with the reset of pixels transducer, and then invalid between exposure period, activates the row selection wire after this to read pixel data.

Now referring to Fig. 2 C, schematic diagram is described the transistor circuit that can use in the storage pattern of VCF element sensor of the present invention, and each of red, green and blue colour photodiode is coupled to described transistor circuit.As be appreciated by one of skill in the art that the transistor circuit of Fig. 2 C is included in non-existent extra transfering transistor 59 in the circuit of Fig. 2 A and 2B.The gate coupled of transfering transistor 59 is to the XFR line, and described XFR line is remained valid in the time in RESET pressure-wire at least a portion of invalid time effectively and when the time for exposure finishes, activates capable selection wire afterwards to read pixel data.An advantage of the circuit of Fig. 2 C is that the needs of mechanical shutter have been eliminated in the use of transfering transistor.

The those skilled in the art will understand from the disclosure of this paper, exist in the several different methods that realizes the VCF element sensor in the semiconductor structure.For instance, can use Semiconductor substrate to form the concentric trap of five alternating conductivity type as bottom and in substrate, form p type alternately and six layers of structure in n type zone.About position of the implantation in the p type that is used to form described structure and n type zone is showed in the shadow region of Fig. 3.Dotted line 76 defines the clean P (net-P) that is used for blue detector 74 and clean N (net-N) the about border between mixing.Similarly, dotted line 78 defines clean P and the about border between the N doping, the part formation of the green detector 70 and the Surface Vertical of second epitaxial loayer 72 and the contacting of green detector 70 only that is used for green detector 70.Dotted line 80 defines clean P and the about border between the N doping, the part formation of the red detector 64 and the Surface Vertical of second epitaxial loayer 72 and the contacting of red detector 64 only that is used for red detector 64.

From above-mentioned illustrative example as seen, other embodiment expection of six layers of structure that this paper discloses is in the scope of the present invention, and can realize by using from substrate, the various combinations that are arranged on one or more traps, one or more epitaxial loayers the substrate and are arranged on the layer of selecting in one or more traps in one or more epitaxial loayers.

The those skilled in the art will observe, can operate all redness, green and blue colour photodiode (indicating with reference number 64,70 and 74 respectively among Fig. 3) makes the depletion region of photodiode can not interact (promptly, it is connect face and is isolated), but but can by controlled doping level, spacing structure or operating voltage make depletion region interact and also the degree of depth exhaust alternatively and operate.

Referring to the illustrative semiconductor fabrication process that is used to make the VCF element sensor of Fig. 4 A to 4E announcement Fig. 3, the selected step that cross-sectional view is illustrated in the described technology is finished the structure that forms afterwards.

Described technology is from the 1e15p type substrate 90 shown in Fig. 4 A.Carry out and cover the degree of depth of boron implantation (blanket boronimplant) (showing) to about 0.5 μ m with reference number 92.This boron is implanted 92 and must be arrived green photodiode and prevent to make red photodiode to separate with the electrons spread that prevents to produce in the substrate 90 because it serves as weak diffusing barrier than more severe doping of substrate.This covers implantation also can be in order to offset the automatic doping during epitaxial layer deposition step subsequently.This covers to implant and all should be about 3 times to 100 times of the substrate doped level usually wherein, and is about 1e16 in one embodiment of the invention.Subsequently, then use conventional photoetching technique to apply one and implant mask layer (not shown).Subsequently, shown in Fig. 4 A, the phosphorus 1e17 that carries out mask with the energy of about 50keV implants (showing with reference number 94), is activation circulation (activation cycle) known in this technology subsequently, so that be formed for the n type layer of red detector.This implant dosage should be chosen to be enough to overcompensation and cover the implantation of p type.Be understood by those skilled in the art that, before the extension silicon layer growth, drive the abundant annealing that circulation (drive cycle) must guarantee that boron and phosphorus are implanted.The those skilled in the art also will understand, and the order that the covering of p type is implanted and n type mask is implanted that forms red photodiode n type zone can be put upside down.

Now referring to Fig. 4 B, subsequently, 1e15p type silicon epitaxial layers 96 grows to the thickness of about 2.0 μ m.Concentration of dopant in the epitaxial loayer 96 is slightly mixed under the situation that guarantees p section bar material, makes the photoelectron that wherein produces can not diffuse through p type layer top or thereunder so that it will serve as the potential well zone.Break-through from the redness to the green photodiode (punch-through) is another design limitation, thereby influence the doped level in this layer, that is, doping need be enough to prevent that the depletion region of red and green photodiode negative electrode from leaning on too closely each other, or exhausts p type zone therebetween fully.

Subsequently, then use conventional photoetching technique to apply a connector and implant mask layer (plug implant masking layer) (not shown).Then carrying out the implantation of 1e17 phosphorus connector contacts with the connector of formation with the negative electrode of red photodiode with anneal sequence.This connector implantation should be high-energy implantation (that is about 1000KeV) and maybe should comprise a plurality of implantation steps that carry out with different-energy.In one embodiment of the invention, form long, a thin connector contact plunger by two different combinations of implanting, an implantation is to be used for the bottom section high-energy of degree of depth doping connector contact to implant 98 (promptly, about 1200KeV), and another implantation is to be used to mix the more low-yield implantation 100 of the zone line of connector contact (promptly, about 600KeV), be the 3rd implantation or the diffusion of carrying out with the doping that is used for green photodiode subsequently, so that finish the shallow surf zone of connector contact.

Plug resistance is inessential, because photoelectric current is less, yet plug size should be as much as possible little, so that minimize elemental area and maximize fill factor.1 micron plug size is good target, but the degree of depth of connector contact need be about 2 microns.Many implantation connector that this paper discloses makes may realize the connector of this degree of depth greater than its width.

Now, then use conventional photoetching technique to apply one and implant mask layer (not shown) referring to Fig. 4 C.Then carry out the 1e17 phosphorus that carries out with about 50KeV energy and implant (showing) and activate order, so that be formed for the n type layer of green detector with reference number 104.In this mask layer second, less hole contact the surf zone of implanting 102 in order to form connector, are used for contacting with the negative electrode that underlies of red detector.As be understood by those skilled in the art that this implants to need to activate and drives to recover perfection of lattice before epitaxial layer deposition step subsequently.

Subsequently, the covering boron of carrying out epitaxial loayer 96 implants 106.This implants in order to offset the automatic doping during epitaxial layer deposition step subsequently.This implants also and upwards is diffused into blue detector and green photodiode is separated to prevent the charge carrier that green light produces as weak diffusing barrier.This cover to implant 106 and all should be about 3 times to 100 times of doped level of first epitaxial loayer 96 usually wherein, and is about 1e16 in one embodiment of the invention.The those skilled in the art also will understand, and the order that the covering of p type is implanted and n type mask is implanted that forms green photodiode n type zone can be put upside down, and doping content considers to be similar to the doping content consideration of above describing at red photodiode.

Now referring to Fig. 4 D, 1e15p type silicon epitaxial layers 108 grows to the thickness of about 0.7 μ m to 1.0 μ m.Then use conventional photoetching technique to apply one and implant mask layer (not shown).Operative norm CMOS n trap is implanted forming n well area 110 so that contact with the negative electrode 104 of the green detector that underlies, and forms n well area 112 and contact so that contact 102 top with the connector of the negative electrode 94 that is used for the bottom red detector. N well area 110 and 112 may need dual implantation to arrive embedding layer, and described embedding layer comprises the negative electrode 106 of green detector and the connector of the negative electrode 94 that is used for red detector contacts; For dark implantation and shallow implantation in n well area 110 and 112, typical C MOS n trap is implanted energy and is respectively about 500KeV and 100KeV.

Now, then use conventional photoetching technique to apply one and implant mask layer (not shown) referring to Fig. 4 E.Then carry out CMOSp trap implantation step to form p well area 114.Understand as the those skilled in the art, CMOS p trap implantation step may need double energy to implant to minimize the n trap to the interval between the n trap.These p well areas 114 be used between the contact of redness and green detector plugs and between the pixel (rightmost and Far Left edge p well area) isolation.In addition, this p trap is implanted and is used to form trap, wherein is formed for the nmos pass transistor of remaining circuit on the chip.

Subsequently, then use conventional photoetching technique to apply one and implant mask layer (not shown).Then carry out the slight doped-drain of showing and implant, to form the negative electrode of blue detector with reference number 116.In one embodiment of the invention, other hole in this mask layer forms the surface portion of the dark contact area of red and green detector, with allow with on the metal interconnecting layer excellent electric contact covered.Perhaps, can in the treatment step that separates, form more severe doped n type zone, the surface portion 118 and 120 of the contact area in implanting with the dark contact area that forms red and green detector and the slight doped-drain that is used for blue detector.As the optional of describing among Fig. 4 E of illustrative process substituted, the negative electrode of blue detector may form the below and have a p trap (that is the extension in zone 114).

Technology and standard CMOS process compatibility that manufacturing VCF element sensor of the present invention is adopted.Extra processing step was all carried out before the standard CMOS step, and therefore making interacts minimizes.

Two epitaxial loayers 96 that in BiCMOS, adopt when needing and 108, and two extra implantation activate circulation, and a circulation is arranged before each epitaxial growth steps.Understand as the those skilled in the art, in technology, need three extra masks to be used to implant the n type zone 94,98,100,102 and 104 that is used for red detector, red contact plunger and green detector.Five extra implantation of arts demand comprise red detector phase contra-doping (counterdoping) 92 and green detector phase contra-doping 106 (if formation is separated with 100 in zone 98, needing six extra implantation so).The above-described mask that is used for making the novel structure that this paper discloses, implant, drive in and anneal and the epitaxial growth manufacturing technology steps is that each is well-known for the technical staff in the semiconductor processing techniques field that is used to make other semiconductor equipment.For example technological parameters such as time, temperature, reactant species will change between individual processes, but are known for the use in described individual processes.This paper will no longer state these details, and will be too complicated and thereby obscure the present invention to avoid making this disclosure.

The manufacturing process that this paper discloses provides some advantages.Do not exist to be associated with the big horizontal proliferation of implanting and driving trap, thereby cause less elemental area.The required vertical connector for being connected to embedding layer can be less.

Do not need big n type or p type shading ring.Only the detector plugs contact need is isolated from each other and isolates with other detector.This has allowed little sensor groups area.

As shown, this six layer of three coloured light electric diode uses two epitaxial loayers, and it is present in the BiCMOS technology sometimes.Siliceous amount is improved along with the more epitaxial loayer of growth usually.In addition, the sensor groups that comprises pixel readout circuit of this embodiment can be made in any BiCMOS manufacturing facility according to the present invention.Can use conventional cmos technology to form the layer (that is, n+, n trap and p trap) at top.In addition, this paper layer of being called substrate itself can be and is formed at an epitaxial loayer that underlies on the substrate.

Now, show among the figure that the illustrative 2 of the VCF pixel sensor array that can use according to the present invention is taken advantage of 2 parts 120 referring to Fig. 5.It will be apparent to those skilled in the art that the array portion that discloses among Fig. 5 only is illustrative, and can use the teaching of this paper to make the array of arbitrary dimension.The illustrative array example of Fig. 5 adopts the circuit with storage feature (for example describing among Fig. 2 C) that comprises transfering transistor, and therefore comprises the overall transfer signal line of serving described array.Be understood by those skilled in the art that, adopt the array that is similar to the circuit of being described among Fig. 2 A and the 2B that does not have memory and therefore do not have transfering transistor to expect and also locate within the scope of the invention, and described array will do not comprise the transfer signal line.

All VCF element sensors that can provide shared RESET and XFR line to be used for array.As current preferred, provide the VSFD line of separation to be used for each row of array, but the embodiment of the invention with independent VSFD node is also expected.The source-coupled of row selecting transistor that is used for each color among Fig. 2 A to 2C in the row of array is to the column output line of the separation that is associated with described row, and the gate coupled of whole row selecting transistors of the whole colors that are used for each VCF element sensor in the row of array is to the ROW-SELECT line that is associated with described row.

2 of array take advantage of 2 parts 120 to comprise two row and two row VCF element sensors among Fig. 5.First row comprises VCF element sensor 122-1 and 122-2, and second row comprises VCF element sensor 122-3 and 122-4.First row comprise VCF element sensor 122-1 and 122-3, and secondary series comprises VCF element sensor 122-2 and 122-4.

The one ROW-SELECT line 124-1 is connected to the row of VCF element sensor 122-1 and 122-2 and selects input (ROW-SELECT).The 2nd ROW-SELECT line 124-2 is connected to the row of VCF element sensor 122-3 and 122-4 and selects input (ROW-SELECT).The first and second ROW-SELECT lines can be thus in the technology well-known row decoder (not shown) drive.

First group three (blue, green and red) COLUMN-OUT (row output) line 126-1 is connected to the output of VCF element sensor 122-1 and 122-3.Second group three COLUMN-OUT line 126-2 are connected to the output of VCF element sensor 122-2 and 122-4.First and second groups of COLUMN-OUTPUT lines are coupled to well-known described group of row reading circuit (not shown) in this technology.

Overall situation RESET pressure-wire 128 is connected to (R) input that resets of whole VCF element sensor 122-1 to 122-4.The one VSFD line 130-1 is connected to the VSFD input of VCF element sensor 122-1 and 122-2 in first row of array.The 2nd VSFD line 130-2 is connected to the VSFD input of VCF element sensor 122-3 and 122-4 in second row of array.Overall situation XFR line 132 is connected to the XFR input of whole VCF element sensor 122-1 to 122-4.

Overall situation PIX-VCC line 134 is connected to the PIX-VCC input of whole VCF element sensor 122-1 to 122-4.Perhaps, can provide a plurality of PIX-VCC lines (every kind color corresponding).

Now referring to Fig. 6 A, sequential chart illustrates the operation of the embodiment of the VCF element sensor shown in Fig. 2 C of the present invention.Initially the RESET signal is determined that (assert) is high.The drain electrode of reset transistor 54b, 54g and 54r is risen to voltage PIX-VCC from zero volt.This action is by placing voltage potential PIX-VCC the negative electrode of each photodiode whole VCF element sensors are resetted.A kind of method according to the operation VCF element sensor of the present invention that illustrates among Fig. 6 A, voltage PIX-VCC (for example is initially in low level, zero volt), thereby and RESET for high with in the array all the cathode voltage of photodiodes reset to than low value so that its state is equated fast.Then make voltage PIX-VCC rising (for example rising to about 2 volts) reach the scheduled time (being preferably about several milliseconds), and the RESET signal is still constant, is charged to about 2 volts to allow the photodiode in whole VCF element sensors.Therefore the black level at photodiode cathode place is set at PIX-VCC, and it is smaller for closing from the capacitive character of reset transistor the transient state (turn-off transient).

When the RESET signal relief was determined (de-assert) and the integrated beginning of photoelectricity, electric charge accumulated on the photodiode cathode.Voltage on its grid of voltage follow at the source electrode place of source follower transistor 56b, 56g and 56r.In the embodiment of the invention that adopts transfering transistor 59b, 59g and 59r, the XFR signal is determined in whole reset cycle and integrated cycle, and is removed and determine to finish the integrated cycle, as shown in Fig. 6 A.The low level of XFR signal is preferably set to zero or negative slightly partially voltage, and for example about-0.2 volt, so that thoroughly close transfering transistor 59b, 59g and 59r.

For reading element sensor, with the drain drives of source follower transistor 56b, 56g and the 56r voltage VSFD to the Pix VCC line, determine to contain the ROW-SELECT signal of row of the array of transistor 59b, 59g and 59r, thereby and output signal is driven on the COLUMN-OUTPUT line.The sequential of determining about the VSFD voltage of PixVCC signal is not crucial, except it should remain height, after the ROW-SELECT signal relief is determined, as shown in Fig. 6 A.Maybe advantageously, if VSFD at first raises on the PixVCC line, just voltage ramp is limited in the rising edge place of ROW-SELECT signal, as be disclosed in the application case the 09/492nd common co-pending of the attorney docket FOV-038 of on February 14th, 2000 application, No. 103,, now be the United States Patent (USP) of issuing on June 25th, 2002 the 6th, 410, No. 899.

Now referring to Fig. 6 B, a kind of method that the sensor groups of sequential chart description operation Fig. 2 B realizes.Reset operation is as describing with respect to Fig. 6 A and carrying out.When RESET descended, exposure can begin; Yet owing to there is not the XFR switch, so CMOS active pixel sensor do not have the electronic shutter ability, and situation may be to use mechanical shutter control exposure.Therefore, show the SHUTTER signal, its indication shutter allows light fall time on the transducer.After shutter close, equally among RESET signal and Fig. 6 A can not determine (re-assert) again, because signal demand keeps being stored on the photodiode cathode, after being read out.Use reading of ROW-SELECT and VSFD as describing with respect to Fig. 6 A and carrying out.After reading, PIX-VCC and RESET its initial condition of getting back to capable of circulation.

As well-known in this technology, exist 3 transistor CMOS active pixel sensor of operation to avoid other method to the needs of shutter.

Can use conventional sequential and control logic to produce the control signal of describing among Fig. 6 A and the 6B.The configuration of sequential and control logic circuit will be decided on specific embodiment of the present invention, but under any circumstance be custom circuit, in case selected specific embodiment of the present invention, its particular design is to have inspected the those skilled in the art's of Fig. 6 A and 6B niggling so.

Fig. 7 shows the passive VCF element sensor 200 that does not have amplifier.This cause every pixel component count minimizing and improve fill factor.The VCF element sensor has the detector layer that is configured to collect the photo-generated carrier with first polarity, and described detector layer is separated by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity.Described layer is arranged to the aligning that is perpendicular to one another substantially, and has the different spectral sensitivities as the function of its different depth in Semiconductor substrate.VCF element sensor 200 comprises that column output line 202 and a plurality of colors that are associated with different detector layer enable line (color-enable line) 204,206 and 208.Comprise also in the VCF element sensor 200 that a plurality of colors enable transistor 210,212 and 214.Each color is enabled transistors couple between different detector layer and column output line 202, and has and be coupled to the grid that different colours is enabled line.

Be stored in the photodiode electric charge directly driving can have the column output line 202 of the electric capacity higher than photodiode.Therefore, when reading the photodiode value, the voltage on the column output line 202 can not change a lot.

The operation of VCF element sensor 200 is as follows.By switch (not shown) with resetting voltage V _RefBe driven on the column output line 202, and definite three colors are enabled the signal on line 204,206 and 208.This is charged to photodiode-known voltage.If different colors needs different resetting voltages, can red resetting voltage be applied to column output line 202 also definite red colors by (for example) so and enable line 204, then green resetting voltage is driven on the column output line 202 and determines that green color enables line 206 and operate equally for blueness, set described resetting voltage in order.After the integrated cycle, proportional the reducing of photon number that the voltage on the photodiode and each photodiode are held back.Transducer 200 at first charges to column output line 202 known voltage by switch (not shown) and once reads delegation and once read a color, then determines that red color enables line 204 and read voltage difference on the column output line 202.Column output line 202 is charged to a known voltage, determine that green color enables line 206, and read the voltage difference on the column output line 202.Repeat these steps for blueness.In the array of the VCF pixel of for example VCF pixel 200, can read the next line pixel in the same manner.

Fig. 8 explanation has the element sensor 230 of the bridging line that is used for pixel reset voltage signal and row output signal, as United States Patent (USP) the 5th, 654, shown in No. 537.

Fig. 9 explanation has the resetting voltage of being used for V _RefVCF element sensor 240 with the common lines 242,244,246 of row output signal.This shares and has removed a lead from element sensor.VCF element sensor 240 also comprises reseting signal line 248, goes and enable line 250 and source follower drain voltage line 252.Reset transistor 254 is coupling between detector layer and the row output/reference voltage line 242, and has the grid that is coupled to reseting signal line 248.Reset transistor 256 is coupling between second detector layer and the row output/reference voltage line 244, and has the grid that is coupled to reseting signal line 248.Source follower transistor 258 has the grid that is coupled to first detector layer, the drain electrode of being coupled to source follower drain voltage line 252, and source electrode.Source follower transistor 260 has the grid that is coupled to second detector layer, the drain electrode of being coupled to source follower drain voltage line 252, and source electrode.Output enable transistor 262 have be coupled to the row enable line 250 grid, be coupled to source follower transistor 258 source electrode drain electrode and be coupled to row output/reference voltage line 242 source electrode.Output enable transistor 264 have be coupled to the row enable line 250 grid, be coupled to source follower transistor 260 source electrode drain electrode and be coupled to row output/reference voltage line 244 source electrode.If desired, the 3rd detector layer can be included in the VCF element sensor 240, and transistor 270 is enabled in arrangement reset transistor 266 as indicated above, source follower transistor 268 and output.

During operation, reset signal is driven to high, a switch (not shown) is connected to resetting voltage V with column output line simultaneously _RefThis is charged to a known voltage with photodiode.Then make fixing period of element sensor 240 classification durations one.After this integrated time, proportional the reducing of photon number that the voltage on each photodiode and each photodiode are held back.Before reading element sensor 240, will connect resetting voltage V _RefSwitch opens to column output line 242,244 and 246 makes pixel can drive described line.Each photodiode in the transducer 240 is connected to the input of one source pole follower amplifier.Drive to high by row being enabled line, thereby the output of pixel source follower amplifier is connected to column output line, come the row in the pickup.Another advantage of VCF element sensor 240 is not have three resetting voltage V _RefUnder the situation of line redness, green and blue colour photodiode are charged to different voltages, because there are three V _RefA/column output line rather than resetting voltage V is only arranged _RefLine.This is useful, because photodiode may have differently response to light, or its leakage current may be different.

Figure 10 explanation has from being connected to resetting voltage V _RefTwo element sensors 250 of line are enabled to row of another row by the delegation of line, as United States Patent (USP) the 5th, 083, shown in No. 016.

Figure 11 explanation is from the resetting voltage V of delegation _RefLine can be how with VCF pixel sensor array 260 center lines 270,272 on the row of a different rows enable the line combination.This embodiment reduces crowded by removing a lead that must stride across the row in VCF element sensor 262,264 arrays.This does not reduce the number that is connected that element sensor and array 260 forms, if but contiguous row is used for sharing reset signal and row are enabled signal, and this remains simplification of great use so.VCF pixel sensor array 260 comprises that reset signal/row that the reset signal/row of the row (m) that is associated with array 260 is enabled line 270 and is associated with the row (m+1) of array 260 enables line 272.VCF pixel sensor array 260 also comprises source follower drain voltage line 274, row output/reference voltage line 276,278 and 280, and each is associated with the row (n) of array 260.Reset transistor 282 is coupling between first detector layer and the row output/reference voltage line 276, and has the grid that the reset signal/row that is coupled to the row (m+1) that is associated with array 260 is enabled line 272.

Reset transistor 284 is coupling between second detector layer and the row output/reference voltage line 278, and has the grid that the reset signal/row that is coupled to the row (m+1) that is associated with array 260 is enabled line 272.

Source follower transistor 286 has the grid that is coupled to first detector layer, the drain electrode of being coupled to source follower drain voltage line 274, and source electrode.Source follower transistor 288 has the grid that is coupled to second detector layer, the drain electrode of being coupled to source follower drain voltage line 274, and source electrode.

Output is enabled transistor 290 and is had the drain electrode that the reset signal of being coupled to/row is enabled the grid of line 270, is coupled to the source electrode of source follower transistor 286, and the source electrode that is coupled to row output/reference voltage line 276.Output enable transistor 292 have the reset signal of being coupled to/row enable the grid of line 270, be coupled to source follower transistor 288 source electrode drain electrode and be coupled to the source electrode that is listed as output/reference voltage line 278.

As required, for three color pixel transducers, the 3rd reset transistor 294 can be coupling between the 3rd detector layer and the row output/reference voltage line 280.Reset transistor 294 has the grid that the reset signal/row that is coupled to the row (m+1) that is associated with array 260 is enabled line 272.Source follower transistor 296 has the grid that is coupled to the 3rd detector layer, the drain electrode of being coupled to source follower drain voltage line 274, and source electrode.Output enable transistor 298 have the reset signal of being coupled to/row enable the grid of line 270, be coupled to source follower transistor 296 source electrode drain electrode and be coupled to the source electrode that is listed as output/reference voltage line 280.

The action of reading delegation makes another horizontal reset in the array 260.Enable signal and reset signal if therefore contiguous row is shared row, so only can read array 260 in one direction, therefore reading delegation can not make another horizontal reset that also is not read out.

By change which assembly is in each element sensor, can finishes more effective layout.Figure 12 shows VCF pixel sensor array 300, and it is similar to VCF element sensor 260, difference be photodiode be cross connected to contiguous go rather than reset/go enable line.This allows to be connected to six transistorized very compact layouts that reset/go and enable line and be also connected to three column output lines.But reset/go and enable line cloth and be made as a node in the element sensor and all layings with assembling.Do not optimize if carry out this, the interconnection line in the element sensor occupies sizable area so, causes more weak fill factor.

Array 300 comprises the active VCF element sensor of a plurality of row and columns that are formed on the Semiconductor substrate, and array row (n) comprise row output/reference voltage line 302 and row output/reference voltage line 304.Row (n) have a plurality of row.Each is gone, and comprising resets/go enables line 306, source follower drain voltage line 308 and element sensor.Element sensor comprises first and second detector layer, and it is arranged to the aligning that is perpendicular to one another substantially, has the different spectral sensitivities as the function of its different depth in Semiconductor substrate, and is configured to collect the photo-generated carrier of first polarity.First and second detector layer are separated by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity.

Reset transistor 310 is coupling between first detector layer and the row output/reference voltage line 302, and has the grid that the reset signal of being coupled to/row is enabled line 306-1.Reset transistor 312 is coupling between second detector layer and the secondary series output/reference voltage line 304, and has the grid that the reset signal of being coupled to/row is enabled line 306-1.Source follower transistor 314 has grid, is coupled to the drain electrode of source follower drain voltage line 308-1, and source electrode.

Source follower transistor 316 has grid, is coupled to the drain electrode of source follower drain voltage line 308-1, and source electrode.Output enable transistor 318 have the reset signal of being coupled to/row enable the grid of line 306-1, be coupled to source follower transistor 314 source electrode drain electrode and be coupled to the source electrode that is listed as output/reference voltage line 302.

Output enable transistor 320 have the reset signal of being coupled to/row enable the grid of line 306-1, be coupled to source follower transistor 316 source electrode drain electrode and be coupled to the source electrode that is listed as output/reference voltage line 304.

The gate coupled of the source follower transistor 314 in each element sensor first detector layer of element sensor in the row (m+1) in the row (n) in each row (m) in the row (n), and the gate coupled of the source follower transistor 316 in each element sensor second detector layer of element sensor in the row (m+1) in the row (n) in each row (m) in the row (n).First row is different with footline, because there be not the previous row or the next line that will interconnect respectively.For first row of transducer, there is not the attachable object of detector layer, and do not have the detector layer that is connected to source follower in the footline.The some diverse ways that exist to connect first row and footline.A kind of possible embodiment is that detector layer is connected to source follower the footline from first row.Yet this has added two or more holding wires from the array top to the bottom of each row that is used for array.Also because these signals will be longer, so they will pick up many noises, and cross the resistance landing of array will be bigger, therefore the performance of the first row photoelectric detector will be a little less than.Another kind of possible solution is to make the photoelectric detector layer in first row keep not connecting, and certain other signal is connected to source follower in the footline.Another solution is to save photoelectric detector layer and reset transistor from first row, and saves row and enable and source follower transistor from footline.In the majority of these solutions, can not obtain useful information by reading footline, therefore should not read maybe and its value should be ignored it.

In the embodiment of the array 300 of three looks, row (n) comprise row output/reference voltage line 324.Each row further comprises the 3rd detector layer of the photo-generated carrier that is configured to collect first polarity.The 3rd detector layer is by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity and separate with first and second detector layer, and be arranged to and first and second detector layer perpendicular alignmnet substantially, and have spectral sensitivity as its function of the degree of depth in Semiconductor substrate.

Reset transistor 322 is coupling between the 3rd detector layer and the row output/reference voltage line 324, and has the grid that the reset signal of being coupled to/row is enabled line 306-1.Source follower transistor 326 has grid, is coupled to the drain electrode of source follower drain voltage line 308-1, and source electrode.Output enable transistor 328 have the reset signal of being coupled to/row enable the grid of line 306-1, be coupled to source follower transistor 326 source electrode drain electrode and be coupled to the source electrode that is listed as output/reference voltage line 324.

The gate coupled of the source follower transistor 326 in each element sensor the 3rd detector layer of element sensor in the row (m+1) in the row (n) in each row (m) in the row (n).First row is different with footline, because there be not the previous row or the next line that will interconnect respectively.For first row of transducer, there is not the attachable object of detector layer, and do not have the detector layer that is connected to source follower in the footline.The some diverse ways that exist to connect first row and footline.A kind of possible embodiment is that detector layer is connected to source follower the footline from first row.Yet this has added two or more holding wires from the array top to the bottom of each row that is used for array.Also because these signals will be longer, so they will pick up many noises, and cross the resistance landing of array will be bigger, therefore the performance of the first row photoelectric detector will be a little less than.Another kind of possible solution is to make the photoelectric detector layer in first row keep not connecting, and certain other signal is connected to source follower in the footline.Another solution is to save photoelectric detector layer and reset transistor from first row, and saves row and enable and source follower transistor from footline.In the majority of these solutions, can not obtain useful information by reading footline, therefore should not read maybe and its value should be ignored it.

The belt-type shutter pattern of implementing is simplified in still available this wiring of Figure 13 explanation, pixel sensor array wherein of the present invention can be used for video, the time for exposure photo is exceedingly fast, or long time for exposure photo, wherein the time for exposure is longer than the common required time of charge available that exhausts on the photodiode.

When the time for exposure than exhausting the usually required time of photodiode when longer, a sequence of belt-type shutter image can be added together to produce long exposure image, each is all short than the time that exhausts photodiode for described belt-type shutter image.For belt-type shutter, the row of row n is enabled and is connected to resetting of capable n-1, and wherein the row of first row is enabled the line footline that resets.In the belt-type shutter pattern, reset and the reading of other row of the photodiode voltage of each row are interlocked.For beginning this pattern, with first horizontal reset to a known voltage of array, reset subsequently second the row, the third line or the like resets.This reseting procedure continues to carry out, and up to arrival array bottom, and follows described process and restarts at the array top.This reseting procedure repeats.Consistent with resetting of row, different rows is also read in order.The integrated time interval is defined as the time of the delegation that resets and reads time difference between time of described row.The integrated time interval equals the time quantum that shutter is opened, or time interval of being counted of collected photon.Each row in the transducer has the different integrated time, because each row is reset and reads at different time.Shutter blind formula mechanism is applicable to the scene with little motion that needs the long time for exposure.

For instance, Figure 13 shows lucky reset line 900 and reads row 2, reset line 901 and read the situation of row 3 subsequently.In this example, there is roller shutter type " shutter " window (898 row are high) through transducer.

Figure 14 shows a timeline, and the wherein integrated time interval is identical for each row, and the integrated time of each row is different.The exposure of visual sensor and fixed revise integrated interval.Can by variation reset and read operation between the number of row change integrated interval.Also can by reset at each/add to postpone to increase the integrated time interval between the read operation.For growing the time for exposure photo, the belt-type shutter window can be the major part of transducer, except two row, promptly has outside the horizontal reset and the capable row of enabling of interconnection.Therefore in the belt-type shutter pattern, for the most of the time during the long exposure photograph, the photon of holding back is counted, and only be reset and can not count during utmost point short time of reading the photon of holding back at element sensor by element sensor.

As shown in figure 14, be expert at and read capable n when n-1 resets.Reset operation is acceptable, because row n-1 is in the passive sensor district.The row of row n is enabled only restriction that line is connected to the reset voltage line of capable n-1 is, only can be in an enterprising horizontal reset/read operation of direction from the top to the bottom.Exist manyly different sharedly reset and go the method for enabling line, about how resetting and pickup, every kind of method all has different constraints.

For Video Applications, when reading bottom line, catch a new frame at every turn.Reset and go the mode of enabling line by changing to share, can finish and have the staggered of integrated cycle of length and read.For staggered reading, the row of row n is enabled the resetting voltage V that line should be connected to capable n-2 rather than n-1 _RefLine.This allows to read even number or odd number field and does not influence other field.For long exposure photograph, basic mechanism is identical with the belt-type shutter pattern, in the accumulated value that when reading each frame, value is added to previous frame.So total accumulated value is represented the value of long exposure image.

The resetting voltage that is used for the configuration of this element sensor can be connected to the column output line as element sensor illustrated in fig. 13, or the V of the adapted to resetting voltage as shown in VCF element sensor illustrated in fig. 15 _SFDLine.Use the advantage of the column output line shown in Figure 13 to be, the resetting voltage that is used for each different photodiode of element sensor can be different.Coordination between this need reset and read is because column output line is used for this two kinds of operations.

Figure 15 illustrates array 350, and it comprises the active vertical color filtered pixel transducer of a plurality of row and columns that are formed on the Semiconductor substrate, and array row (n) comprise column output line 352 and column output line 354.Row (n) comprise a plurality of row, and each row has reset signal/row and enables line 356, source follower drain voltage/reference voltage line 358 and element sensor.Each element sensor comprises first and second detector layer, and it is arranged to the aligning that is perpendicular to one another substantially, has the different spectral sensitivities as the function of its different depth in Semiconductor substrate, and is configured to collect the photo-generated carrier of first polarity.First and second detector layer are separated by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity.

Reset transistor 364-1 is coupling between first detector layer and the source follower drain voltage/reference voltage line 358, and has grid.Reset transistor 366-1 is coupling between second detector layer and the source follower drain voltage/reference voltage line 358, and has grid.Source follower transistor 360-1 has the grid that is coupled to first detector layer, the drain electrode of being coupled to source follower drain voltage/reference voltage line 358, and source electrode.Source follower transistor 362-1 has the grid that is coupled to second detector layer, the drain electrode of being coupled to source follower drain voltage/reference voltage line 358, and source electrode.

Output enable transistor 368-1 have the reset signal of being coupled to/row enable the grid of line 356-1, be coupled to source follower transistor 360-1 source electrode drain electrode and be coupled to the source electrode that is listed as output/reference voltage line 352.Output enable transistor 370-1 have the reset signal of being coupled to/row enable the grid of line 356-1, be coupled to source follower transistor 362-1 source electrode drain electrode and be coupled to the source electrode that is listed as output/reference voltage line 354.

In the row (n) in each row (m) gate coupled of reset transistor 364-1, the 366-1 in each element sensor reset signal/row of the middle element sensor of row (m+1) in the row (n) enable line 356-2.There is not signal to drive reset transistor in the footline, because this signal is usually from next line.Exist some distinct methods to solve this problem.A kind of method is the reset transistor in the footline to be connected to from the row of first row enable signal 356-1.Another solution is to produce another signal, and it enables the logic equivalent of signal 356-1 for resetting/go of first row in the array, and first row is laid in the array footline afterwards and be connected to reset transistor in the footline of array in the array.Another solution is that the reset transistor in the footline is limited in a quiescent value, and does not use the value from footline, can not proper handling because reset.

For three look VCF pixel embodiment, array 350 comprises the 3rd column output line 372.Each row also comprises the 3rd detector layer of the photo-generated carrier that is configured to collect first polarity.The 3rd detector layer is separated with first and second detector layer by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity.The 3rd detector layer is arranged to and first and second detector layer perpendicular alignmnet substantially, and has the spectral sensitivity as its function of the degree of depth in Semiconductor substrate.

Reset transistor 376-1 is coupling between the 3rd detector layer and the source follower drain voltage/reference voltage line 358, and has grid.Source follower transistor 374-1 has the grid that is coupled to the 3rd detector layer, the drain electrode of being coupled to source follower drain voltage/reference voltage line 358, and source electrode.Output enable transistor 378-1 have the reset signal of being coupled to/row enable the grid of line 356-1, be coupled to source follower transistor 374-1 source electrode drain electrode and be coupled to the source electrode that is listed as output/reference voltage line 372.

In the row (n) in each row (m) gate coupled of the reset transistor 376-1 in each element sensor reset signal/row of the middle element sensor of row (m+1) in the row (n) enable line 356-2.There is not signal to drive reset transistor in the footline, because this signal is usually from next line.Exist some distinct methods to solve this problem.A kind of method is the reset transistor in the footline to be connected to from the row of first row enable signal 356-1.Another solution is to produce another signal, and it enables the logic equivalent of signal 356-1 for resetting/go of first row in the array, and first row is laid in the array footline afterwards and be connected to reset transistor in the footline of array in the array.Another solution is that the reset transistor in the footline is limited in a quiescent value, and does not use the value from footline, can not proper operation because reset.

Figure 16 explanation has and is used for that row is enabled, V _RefAnd V _SFDThe element sensor 375 of common lines, as United States Patent (USP) the 5th, 949, shown in No. 061.

Row is enabled signal, V _RefAnd V _SFDAlso can share the line in the VCF element sensor 400, as illustrating among Figure 17.This simplification is useful, because it has made lead decreased number in the pixel sensor array one, and equally also makes the linking number from element sensor to the array lead reduce one.

Figure 17 explanation is formed at the active VCF element sensor 400 on the Semiconductor substrate, and it has first and second detector layer of the photo-generated carrier that is configured to collect first polarity.First and second detector layer are separated by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity.First and second detector layer are arranged to the aligning that is perpendicular to one another substantially, and have the different spectral sensitivities as the function of its different depth in Semiconductor substrate.

Comprise also in the element sensor 400 that reseting signal line 402, source follower drain voltage/reference voltage/row enable line 404 and column output line 406 and 408.

Reset transistor 414 is coupling in first detector layer and source follower drain voltage/reference voltage/row is enabled between the line 404, and has the grid that is coupled to reseting signal line 402.Reset transistor 416 is coupling in second detector layer and source follower drain voltage/reference voltage/row is enabled between the line 404, and has the grid that is coupled to reseting signal line 402.

Source follower transistor 410 has the grid that is coupled to first detector layer, is coupled to drain electrode and source electrode that source follower drain voltage/reference voltage/row is enabled line 404.Source follower transistor 412 has the grid that is coupled to second detector layer, is coupled to drain electrode and source electrode that source follower drain voltage/reference voltage/row is enabled line 404.

Output enable transistor 418 have be coupled to source follower drain voltage/reference voltage/row enable the grid of line 404, be coupled to source follower transistor 410 source electrode drain electrode and be coupled to the source electrode of column output line 406.

Output enable transistor 420 have be coupled to source follower drain voltage/reference voltage/row enable the grid of line 404, be coupled to source follower transistor 412 source electrode drain electrode and be coupled to the source electrode of column output line 408.

For the embodiment of the array 400 of three looks, the 3rd detector layer is configured to collect the photo-generated carrier of first polarity.The 3rd detector layer is separated with first and second detector layer by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity.The 3rd detector layer is arranged to and first and second detector layer perpendicular alignmnet substantially, and has the spectral sensitivity as its function of the degree of depth in Semiconductor substrate.

Also comprise column output line 422 in the array 400, be coupling in the 3rd detector layer and source follower drain voltage/reference voltage/row and enable reset transistor 426 between the line 404.Reset transistor 426 has the grid that is coupled to reseting signal line 402.Source follower transistor 424 has the grid that is coupled to the 3rd detector layer, is coupled to the drain electrode that source follower drain voltage/reference voltage/row is enabled line 404, and source electrode.Output enable transistor 428 have be coupled to source follower drain voltage/reference voltage/row enable the grid of line 404, be coupled to source follower transistor 424 source electrode drain electrode and be coupled to the source electrode of column output line 422.

The operation of VCF element sensor 400 is as follows.At first with V _Ref/ V _SFD/ row is enabled signal and is driven into required level, so that element sensor is reset to required voltage.Also reset signal is driven to high.Then the horizontal reset signal can be driven to low, be V subsequently _Re/ V _SFD/ Row_en.After the integrated cycle, the photon number that the voltage on the photodiode and each photodiode are held back is proportional and reduce.For reading element sensor, with V _Ref/ V _SFD/ row is enabled signal and is driven to high, and this makes the running of source follower amplifier and enables row and enable transistor, makes element sensor can drive column output line.

Also three pixel wirings may be simplified and be combined in the VCF pixel sensor array 450, as shown in figure 18.As shown in figure 18, resetting voltage V _RefLine is shared by column output line 452,454 and 470.This allows different pixel reset voltage to be used for the different photodiodes of each pixel.If the response of different photodiodes is different, this can be useful equally so.VCF element sensor in the array 450 is also shared the reset line of row n and is enabled line with the row of row n+1.Another simplification in the array 450 in the VCF element sensor is source follower voltage V _SFDEnabling signal with row also shares.This signal is also shared by resetting of a different rows in the pixel sensor array just.The combination of these three simplification reduces to four with the number of lead in the pixel sensor array from seven.

Array 450 comprises the active vertical color filtered pixel transducer of a plurality of row and columns that are formed on the Semiconductor substrate, and array row (n) comprise row output/reference voltage line 452 and row output/reference voltage line 454.Row (n) comprise a plurality of row, and each row has reset signal/row and enables line/source follower drain voltage 456.Each element sensor comprises first and second detector layer, and it is arranged to the aligning that is perpendicular to one another substantially, has the different spectral sensitivities as the function of its different depth in Semiconductor substrate, and is configured to collect the photo-generated carrier of first polarity.First and second detector layer are separated by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity.

Reset transistor 458 is coupling between first detector layer and the row output/reference voltage line 452, and has grid.Reset transistor 460 is coupling between second detector layer and the row output/reference voltage line 454, and has grid.Source follower transistor 462 has the grid that is coupled to first detector layer, be coupled to reset signal/row enables/drain electrode of source follower drain voltage line 456, and source electrode.Source follower transistor 464 has the grid that is coupled to second detector layer, be coupled to reset signal/row enables/drain electrode of source follower drain voltage line 456, and source electrode.Output enable transistor 466 have the reset signal of being coupled to/row enable/grid of source follower drain voltage line 456, be coupled to source follower transistor 462 source electrode drain electrode and be coupled to the source electrode that is listed as output/reference voltage line 452.Output enable transistor 468 have the reset signal of being coupled to/row enable/grid of source follower drain voltage line 456, be coupled to source follower transistor 464 source electrode drain electrode and be coupled to the source electrode that is listed as output/reference voltage line 454.In the row (n) in each row (m) gate coupled of the reset transistor 458,460 in each element sensor reset signal/row of the middle element sensor of row (m+1) in the row (n) enable/source follower drain voltage line 456-2.There is not signal to drive reset transistor in the footline, because this signal is usually from next line.Exist some distinct methods to solve this problem.A kind of method is that the reset transistor in the footline is connected to V from first row _SFD/ reset/go and enable signal 456-1.Solution is to produce another signal preferably, and it is the V of first row in the array _SFD/ resetting/go and enable the logic equivalent of signal 456-1, first row is laid in the array after the footline and is connected to reset transistor in the footline of array in the array.Another solution is that the reset transistor in the footline is limited in a quiescent value, and does not use the value from footline, can not proper handling because reset.

Array 450 also is embodied as and holds three detector layer.In this embodiment, row (n) further comprise the 3rd row output/reference voltage line 470.Each row of array 450 further comprises the 3rd detector layer of the photo-generated carrier that is configured to collect first polarity.The 3rd detector layer is separated with first and second detector layer by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity.The 3rd detector layer is arranged to and first and second detector layer perpendicular alignmnet substantially, and has the spectral sensitivity as its function of the degree of depth in Semiconductor substrate.

Reset transistor 472 is coupling between the 3rd detector layer and the source follower drain voltage/reference voltage line 456, and has grid.Source follower transistor 474 has the grid that is coupled to the 3rd detector layer, be coupled to reset signal/row enables/drain electrode of source follower drain voltage line 456, and source electrode.Output enable transistor 476 have the reset signal of being coupled to/row enable/grid of source follower drain voltage line 456, be coupled to source follower transistor 474 source electrode drain electrode and be coupled to the 3rd source electrode that is listed as output/reference voltage line 470.In the row (n) in each row (m) gate coupled of the 3rd reset transistor 472 in each element sensor reset signal/row of the middle element sensor of row (m+1) in the row (n) enable/source follower drain voltage line 456-2.There is not signal to drive reset transistor in the footline, because this signal is usually from next line.Exist some distinct methods to solve this problem.A kind of method is that the reset transistor in the footline is connected to V from first row _SFD/ reset/go and enable signal 456-1.Another solution is to produce another signal, and it is the V of first row in the array _SFD/ resetting/go and enable the logic equivalent of signal 456-1, first row is laid in the array after the footline and is connected to reset transistor in the footline of array in the array.Another solution is that the reset transistor in the footline is limited in a quiescent value, and does not use the value from footline, can not proper handling because reset.

The first step of element sensor is that photodiode is charged to a known voltage in the operation array 450.This is by being used for the V of delegation or whole array _SFD/ reset/go and enable the signal driving for high, will be used for the V of each color simultaneously _RefDriven is finished to the column output line.Then can remove and determine V _SFD/ reset/go and enable signal.After the given integrated cycle, the voltage on each photodiode will be proportional and reduce with the photon number that each photodiode is held back.Then can be by being identified for the V of row _SFDThereby/resetting/go and read array 450 with enabling the each delegation of signal, described signal also is the V of source follower amplifier _SFDVoltage.V _SFD/ reset/go and enable signal and will also open the row that is used for delegation and enable grid.Then can read pixel value at delegation.Enable signal and use its photodiode that is used for the row of reset function to reset to a value sharing to reset/go, described be worth to become with resetting/go from use enable signal and be used for the value that the capable row of enabling reads.Capable order is read in execution, makes the row that just is being reset be read out.This acts on each row, except first row, unless element sensor be configured to make its not with the resetting voltage V of another row _RefLine is shared its row and is enabled line.In case the read operation of delegation is finished, described resetting/go can be enabled signal so and drive, and different resetting/go to enable can be driven for height, so that read described row to low.

For operation element sensor 450 in the belt-type shutter pattern, by being used for the V of each color _RefDriven to column output line and be identified for each the row V _SFD/ reset/go and enable signal, with it is read the each delegation of the identical order ground array that resets, from the top to the bottom, carry out usually.Each delegation ground resets and goes continuously.When arriving the array bottom, first row once more resets.This repeats repeatedly.After the integrated blanking time that the time begins from first row that resets, reading can be since first row, and continues to pass through described array continuously.When resetting delegation to be used for the resetting voltage V of each color _RefDrive column output line, and when reading delegation without resetting voltage V _RefDrive column output line.As carrying out reading of this journey before.After reading delegation, determine a different V _SFD/ reset/go and enable signal with the delegation that resets, and then read another row.Element sensor is reading delegation and is resetting between the delegation alternately.This must coordinate, because column output line is used to read row and resetting voltage V is provided _RefIntegratedly be spaced apart when resetting delegation and read the described time difference between when capable.Each row in the array 450 has the different integrated cycles, because each row is reset and reads at different time.

Also existing to add transistor is the advantage that cost reduces the number of the column output line that a pixel connected to each pixel.The number that reduces column output line has also reduced the number that the row that drives column output line is enabled grid.If row is enabled grid and had high-leakage, the value of all pixels on the so described column output line is influenced.This configuration has reduced in the chip row and has enabled transistorized number, and has therefore improved to have and passed the qualification rate of part that row is enabled the low leakage of grid.These are optimized for the VCF element sensor is unique, because it has three photodiodes, and common every pixel has three row and enables grid.

Figure 19 explanation is formed at the array 500 of the active VCF element sensor on the Semiconductor substrate.Array 500 comprises array row (n) and row output/reference voltage V _RefLine 502.Row (n) comprise a plurality of row, each row comprise reset signal/row enable/source follower drain voltage line 504, color are enabled line 506, color is enabled line 508, and element sensor.Each element sensor comprises first and second detector layer, and it is arranged to the aligning that is perpendicular to one another substantially, has the different spectral sensitivities as the function of its different depth in Semiconductor substrate, and is configured to collect the photo-generated carrier of first polarity.First and second detector layer are separated by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity.Also comprise optical charge output signal node 512.

Color is enabled transistor 514 and is coupling between first detector layer and the optical charge output signal node 512, and has the grid that the color of being coupled to is enabled line 506.Color is enabled transistor 516 and is coupling between second detector layer and the optical charge output signal node 512, and has the grid that the color of being coupled to is enabled line 508.

Reset transistor 518 is coupling between optical charge output signal node 512 and the row output/reference voltage line 502, and has grid.Source follower transistor 520 has the grid that is coupled to optical charge output signal node 512, be coupled to reset signal/row enables/drain electrode of source follower drain voltage line 504, and source electrode.Output enable transistor 522 have the reset signal of being coupled to/row enable/grid of source follower drain voltage line 504, be coupled to source follower transistor 520 source electrode drain electrode and be coupled to the source electrode that is listed as output/reference voltage line 502.

In the row (n) in each row (m) gate coupled of the reset transistor 518 in each element sensor reset signal/row of the middle element sensor of row (m+1) in the row (n) enable/source follower drain voltage line 504-2.There is not signal to drive reset transistor in the footline, because this signal is usually from next line.Exist some distinct methods to solve this problem.A kind of method is that the reset transistor in the footline is connected to V from first row _SFD/ reset/go and enable signal 504-1.Another solution is to produce another signal, and it is the V of first row in the array _SFD/ resetting/go and enable the logic equivalent of signal 504-1, first row is laid in the array after the footline and is connected to reset transistor in the footline of array in the array.Another solution is that the reset transistor in the footline is limited in a quiescent value, and does not use the value from footline, can not proper handling because reset.

Array 500 also is embodied as and holds three detector layer.In this embodiment, row (n) comprise that further color enables line 530.The 3rd detector layer is configured to collect the photo-generated carrier with first polarity, and described the 3rd detector layer is by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity and separate with first and second detector layer.The 3rd detector layer is arranged to and first and second detector layer perpendicular alignmnet substantially, and has the spectral sensitivity as its function of the degree of depth in Semiconductor substrate.Color is enabled transistor 532 and is coupling between the 3rd detector layer and the optical charge output signal node 512, and has the grid that the color of being coupled to is enabled line 530.

Line 506,508,530 is enabled in the control of the action need of element sensor in the array 500, needs every kind of color correspondence of control.Column output line 502 also is used for resetting voltage V _RefLine.Be reset photodiode, by V _RefValue drives column output line 502, and determine to reset/go and enable signal.If all photodiodes are charged to identical value, can determine that so three colors enable the signal on the line 506,508,530, or can enable described color successively and enable line, thereby change the resetting voltage V on the column output line 502 of being driven to be used for each color _RefVoltage.Make the given integrated time of element sensor classification duration one.After the integrated time, the voltage of photodiode will be proportional and descend with the photon number that each photodiode is held back.Before reading pixel value, the grid of source follower amplifier need be set at a known voltage.

This is to be driven on the column output line 502 by the reset signal of the row that is identified for reading and with required voltage, removes and determines to finish and keep enabling line 506,508,530 simultaneously.Then can remove definite reset signal, and column output line 502 can float.V _SFD, reset signal and row enable on all on-line 504 and to share.Therefore, for reading delegation, the VSFD/ that will be used for correct row resets/goes and enables the signal driving for high.This makes the running of source follower amplifier, and enables row and enable grid.Then enable one of photodiode with enabling line 506,508 and 530.Column output line 502 should be at V _SFD/ resetting/go to enable when signal is still determined is sampled, and does not rely on the electric charge that is stored in the column output line 502 to keep its value, because VSFD/ resets/goes and enables the uncertainty that slow whereabouts transition on the line will cause being stored in the value on the column output line 502.Before reading different photodiodes, should be as indicated above once more the grid of source follower amplifier be set at a known voltage.Then can read next photodiode.Also can in the belt-type shutter pattern, operate the element sensor in the array 500, but need in turn rather than concurrently to read photodiode, because pixel only is connected to a column output line.

For removing the fixed pattern noise that causes by changes of threshold in the source follower amplifier, for example, can carry out and additionally read, and then from the pixel value that reads, deduct this noise with the measurement fixed pattern noise.This is that the value that reads in the row output is finished by after the optical charge output signal node is reset to the same level that photodiode was reset to before the integrated beginning but before the color that resetting one in enabling.Then, determine one and the read pixel value of color in enabling.By from the optical charge output signal node reset values that reads, deducting the pixel value that reads, will remove fixed pattern noise.

Also may construction one APS transducer, wherein other type detector floor bigger (area of horizontal plane) that discloses in some detector layer the 10/103rd, No. 304 patent application case of the U.S. than people such as Merrill and [Reference Fov-122].This will finish to form a dot structure with much better fill factor.For instance, a pixel can comprise a redness and a blue detector and 4 green detector.The gross area of less detector (green) will approximate the area of big detector area (red and blue) usually greatly.This will provide higher brightness resolution, reduce the transistorized number that is used for colourity simultaneously.

This structure can with the combination of circuits that calls over of the present invention to produce especially compact pixel.In this configuration, each detector of pixel has single color and enables transistor, and the optical charge output signal node of pixel is coupled in its output.Can be included in the single source follower and capable the enabling in the transistor pixels export structure of proportional less detector with another color about a kind of some less detector of color.For instance, if take advantage of the redness of 2 sensor group arrays and blue sensor short circuit to be in the same place from 1, four red sensors are short circuit and four blue sensor short circuit each other each other, and they can be combined into single output unit with four green sensor groups so.This element will have six colors to be enabled, and one of them is used for redness, one and is used for blueness and four and is used for green.Transistor output will be enabled by single source follower and row in described unit, therefore save in the sensor groups and will enable the area that transistor occupies by more source follower and row in addition.

May be by illustrated and remove row and enable grid and make the element sensor simplification in the array 500 more in the element sensor 545 as the 5th, 949, No. 061 patent of the U.S. described in and among Figure 20.Because row is not enabled grid in the element sensor shown in Figure 20, the grid of source follower is in voltage and the V higher than threshold voltage so described operation must prevent _Ref/ V _SFDGround connection and other source follower in reading array that causes is opened in when row.By with V _Re/ V _SFDBe urged to pixel reset voltage and will reset to drive and be the height element sensor that resets with transfer signal.This can be charged to a known voltage with photodiode.With transfer gate and reset signal and V _Ref/ V _SFDDrive to low.After one sets the integrated time, the voltage on the photodiode will be proportional and reduce with the photon number that photodiode is held back.For reading pixel, the grid on whole source follower amplifiers must be reset to zero or be lower than zero slightly, to prevent that described grid is opened when reading other row.This be by transfer signal when low with V _Ref/ V _SFDDrive to low and reset drives finished for high.In case above-mentioned finishing can be low with reset drives, and then can will be used for the V of delegation line by line _Ref/ V _SFDDrive to high with transfer signal, this will be used in source follower running of described row, and with one with the proportional driven of photodiode voltage to column output line.Source follower gate must be discharged once more with before reading next line proceeding.This is by with V _Ref/ V _SFDThe reset signal of the row that is urged to ground connection and is identified for just having read is finished.Then can remove and determine to reset and can read next line.Though operate more complicatedly slightly, it has removed another transistor from element sensor.

Also may from Figure 21, remove row in the VCF element sensor shown in the VCF element sensor 550 and enable grid.VCF element sensor 550 only has five transistors and six leads, and wherein four leads (are enabled line and described resetting voltage V for three _RefLine) carrying Low ESR signal.One of them advantage is that low-impedance line is not so good as the high impedance line to some defective workmanship sensitivity, thereby has improved qualification rate.

Array 550 comprises active vertical color filtered pixel transducer, array row (n) and the column output line 552 of a plurality of row and columns that are formed on the Semiconductor substrate.Described row have a plurality of row.Each row comprises that reseting signal line 554, reference voltage/source follower drain voltage line 556, color are enabled line 558, color is enabled line 560 and element sensor.

Each element sensor comprises first and second detector layer, and it is arranged to the aligning that is perpendicular to one another substantially, has the different spectral sensitivities as the function of its different depth in Semiconductor substrate, and is configured to collect the photo-generated carrier of first polarity.First and second detector layer are separated by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity.Also comprise optical charge output signal node 562.

Color is enabled transistor 564 and is coupling between first detector layer and the optical charge output signal node 562, and has the grid that the color of being coupled to is enabled line 558.Color is enabled transistor 566 and is coupling between second detector layer and the optical charge output signal node 562, and has the grid that the color of being coupled to is enabled line 560.Reset transistor 568 is coupling between optical charge output signal node 562 and the reference voltage/source follower drain voltage line 556, and has the grid that is coupled to reseting signal line 554.Source follower transistor 570 has the grid that is coupled to optical charge output signal node 562, be coupled to the drain electrode of reference voltage/source follower drain voltage line 556 and be coupled to the source electrode of column output line 552.

Array 550 also is embodied as and holds three detector layer.In this embodiment, row (n) comprise that further the 3rd color enables line 572.The 3rd detector layer is configured to collect the photo-generated carrier with first polarity, and described the 3rd detector layer is by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity and separate with first and second detector layer.The 3rd detector layer is arranged to and first and second detector layer perpendicular alignmnet substantially, and has the spectral sensitivity as its function of the degree of depth in Semiconductor substrate.Color is enabled transistor 574 and is coupling between the 3rd detector and the optical charge output signal node 562, and has the grid that the color of being coupled to is enabled line 572.

For removing the fixed pattern noise that causes by changes of threshold in the source follower amplifier, for example, can carry out and additionally read, and then from the pixel value that reads, deduct this noise with the measurement fixed pattern noise.This is that the value that reads in the row output is finished by after the optical charge output signal node is reset to the same level that photodiode was reset to before the integrated beginning but before the color that resetting one in enabling.Then, determine one and the read pixel value of color in enabling.By from the optical charge output signal node reset values that reads, deducting the pixel value that reads, will remove fixed pattern noise.

Also may construction one APS transducer, wherein other detector layer bigger (area of horizontal plane) that discloses in some detector layer the 10/103rd, No. 304 patent application case of the U.S. than people such as Merrill and [Reference Fov-122].This will finish to form a dot structure with much better fill factor.For instance, a pixel can comprise a redness and a blue detector and 4 green detector.The gross area of less detector (green) will approximate the area of big detector area (red and blue) usually greatly.This will provide higher brightness resolution, reduce the transistorized number that is used for colourity simultaneously.

This structure can with the combination of circuits that calls over of the present invention to produce compact especially pixel.In this configuration, each detector of pixel has single color and enables transistor, and the optical charge output signal node of pixel is coupled in its output.Can be included in the single source follower and capable the enabling in the transistor pixels export structure of proportional less detector with another color about a kind of some less detector of color.For instance, if take advantage of the redness of 2 sensor group arrays and blue sensor short circuit to be in the same place from 1, four red sensors are short circuit and four blue sensor short circuit each other each other, and they can be combined into single output unit with four green sensor groups so.This element will have six colors to be enabled, and one of them is used for redness, one and is used for blueness and four and is used for green.Transistor output will be enabled by single source follower and row in described unit, therefore save in the sensor groups and will enable the area that transistor occupies by more source follower and row originally.

Figure 22 illustrates the sequential operation of VCF element sensor 550.For operation element sensor 550, at first photodiode must be charged to a known voltage.This is by with resetting voltage V _RefBe driven into V _Ref/ V _SFDFinish on the line 556.Then determine reset signal, follow and enable signal by color.Can enable and change the V that is driven to that is used for element sensor 550 each photodiode by all different colours of sequencing _Ref/ V _SFDVoltage V on the line 556 _RefFinish resetting to three photodiodes in the element sensor 550.During integrated, can be with V _Ref/ V _SFDLine 556 remains on V _RefAnd reset signal keep to determine, and that color is enabled line is disabled.This provides anti-halation overflow (anti-bloomingoverflow) path.After one set the integrated time, the voltage on each photodiode will reduce pro rata with the photon number that each photodiode is held back.Before reading any row, must pass through V _Ref/ V _SFDLine 556 is driven into ground connection and definite reset signal comes the grid on the source follower is discharged.This closes the grid on source follower amplifier discharge described grid when guaranteeing other row in reading array 550.For reading delegation, at resetting voltage V _RefWhen still determining, line determines V _Ref/ V _SFDLine 556, this will charge to the grid of source follower amplifier.Then remove the reset signal of the row that is identified for just being read, and definite color is enabled one in the line.

Then will be driven on the column output line 552 with the proportional signal of voltage at the photodiode place that selectes.Remove definite color and enable signal and determine reset signal once more, so that the voltage on the source follower is set at a given value.Then remove and determine to reset and determine that next color enables.Source follower gate is reset to a known voltage, and can read the most last photodiode.Then should be as previously mentioned the grid of source follower be reset to ground connection, make to can read other row.

Though showed and described embodiments of the invention and application, it will be understood by one of ordinary skill in the art that under the situation of the inventive concepts that does not break away from this paper, be possible than more modification of modification mentioned above.Therefore the present invention can not be subjected to other restriction in the spirit that should be in appended claims.

Claims (16)

1. active vertical color filtered pixel transducer, it is formed on the semi-conductive substrate and comprises:

A plurality of detector layer, it is configured to collect the photo-generated carrier of one first polarity, each of described a plurality of detector layer is separated by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity, and each of described a plurality of detector layer is arranged to each other perpendicular alignmnet in fact and is had different spectral sensitivities as its function of different depth in described Semiconductor substrate;

One reseting signal line;

Line is enabled by delegation;

One source pole follower drain voltage line;

A plurality of row output/reference voltage lines;

One switch, it is connected to described reseting signal line described row output/reference voltage line when closure;

A plurality of reset transistors, each is coupling between one in one in described a plurality of detector layer and the described a plurality of row output/reference voltage line, and each in described a plurality of reset transistors has a grid that is coupled to described reseting signal line;

A plurality of source electrode follower transistors, each has the drain electrode that a grid, that is coupled to one in described a plurality of detector layer is coupled to described source follower drain voltage line, and one source pole; With

Transistor is enabled in a plurality of outputs, each have one be coupled to described row enable the grid of line,

One be coupled to one in described a plurality of source electrode follower transistor described source electrode drain electrode and

One is coupled to the source electrode of one in described a plurality of row output/reference voltage line.

2. active vertical color filtered pixel transducer, it is formed on the semi-conductive substrate and with the delegation (m) and row (n) of an array and is associated, described array has the described CMOS active pixel sensor of a plurality of row and columns, and described active vertical color filtered pixel transducer comprises:

A plurality of detector layer, it is configured to collect the photo-generated carrier of one first polarity, described first a plurality ofly separates by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity with second a plurality of detector layer, and described a plurality of detector layer are arranged to each other perpendicular alignmnet in fact and are had different spectral sensitivities as its function of different depth in described Semiconductor substrate;

One reset signal/row is enabled line, and it is associated with the described row (m) of described array;

One reset signal/row is enabled line, and it is associated with the delegation (m+1) of described array;

One source pole follower drain voltage line;

A plurality of row output/reference voltage lines, each is associated with the row (n) of described array;

One switch, it is enabled line with described reset signal/row and is connected to described row output/reference voltage line when closure;

A plurality of reset transistors, each is coupling between one in one in described a plurality of detector layer and the described a plurality of row output/reference voltage line, and each of described a plurality of reset transistors has one and is coupled to the described reset signal/row that is associated with the described row (m+1) of described array and enables the grid of line;

A plurality of source electrode follower transistors, each has the drain electrode that a grid, that is coupled to one in described a plurality of detector layer is coupled to described source follower drain voltage line, and one source pole; With

Transistor is enabled in a plurality of outputs, each has one and is coupled to the described reset signal/row that is associated with the described row (m) of described array and enables the source electrode that one in described a plurality of row output/reference voltage line is coupled in drain electrode and that the grid, of line is coupled to the described source electrode of one in described a plurality of source electrode follower transistor.

3. the array in an array is listed as (n), described array comprises the active vertical color filtered pixel transducer of a plurality of row and columns that are formed on the semi-conductive substrate, described array row (n) comprise a plurality of row output/reference voltage lines, described row (n) comprise a plurality of row, and each row comprises:

One reset signal/row is enabled line;

One source pole follower drain voltage line;

One switch, it is enabled line with described reset signal/row and is connected to described row output/reference voltage line when closure;

A plurality of element sensors, each element sensor comprises:

A plurality of detector layer, it is arranged to each other perpendicular alignmnet in fact, have different spectral sensitivities as its function of different depth in described Semiconductor substrate, and be configured to collect the photo-generated carrier of one first polarity, described a plurality of detector layer are separated by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity;

A plurality of reset transistors, each is coupling between one in one in described a plurality of detector layer and the described a plurality of row output/reference voltage line, and each of described a plurality of reset transistors has one and is coupled to described reset signal/row and enables the grid of line; A plurality of source electrode follower transistors, each has a grid, and is coupled to described source electrode and follows

With the drain electrode of device drain voltage line, and one source pole;

Transistor is enabled in a plurality of outputs, each has one and is coupled to described reset signal/row and enables the grid, of line and be coupled to each the drain electrode and of described source electrode in described a plurality of source electrode follower transistor and be coupled to each source electrode in described a plurality of row output/reference voltage line; With

The described gate coupled of each of the described a plurality of source electrode follower transistors in each row (m) in the described row (n) in the wherein said array except that footline in each element sensor is one in described a plurality of detector layer of element sensor described in the row (m+1) in the described row (n).

4. the array in an array is listed as (n), described array comprises the active vertical color filtered pixel transducer of a plurality of row and columns that are formed on the semi-conductive substrate, described array row (n) comprise a plurality of row output/reference voltage lines, described row (n) comprise a plurality of row, and each row comprises:

One reset signal/row is enabled line;

One source pole follower drain voltage/reference voltage line;

A plurality of element sensors, each comprises:

A plurality of detector layer, it is arranged to each other perpendicular alignmnet in fact, have different spectral sensitivities as its function of different depth in described Semiconductor substrate, and be configured to collect the photo-generated carrier of one first polarity, described a plurality of detector layer are separated by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity;

A plurality of reset transistors, each is coupling between one in described a plurality of detector layer and the described source follower drain voltage/reference voltage line, and described a plurality of reset transistors have a grid;

A plurality of source electrode follower transistors, each has the drain electrode that a grid, that is coupled to one in described a plurality of detector layer is coupled to described source follower drain voltage/reference voltage line, and one source pole;

Transistor is enabled in a plurality of outputs, each has one and is coupled to described reset signal/row and enables the source electrode that described row output/reference voltage line is coupled in drain electrode and that the grid, of line is coupled to the described source electrode of one in described a plurality of source electrode follower transistor; With

The described gate coupled of the described a plurality of reset transistors in each row (m) in the described row (n) in the wherein said array except that footline in each element sensor described reset signal/row of element sensor described in capable (m+1) in the described row (n) is enabled line.

5. active vertical color filtered pixel transducer, it is formed on the semi-conductive substrate, and described active vertical color filtered pixel transducer comprises:

A plurality of detector layer, it is configured to collect the photo-generated carrier of one first polarity, described first and second detector layer are separated by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity, and described a plurality of detector layer are arranged to each other perpendicular alignmnet in fact and are had different spectral sensitivities as its function of different depth in described Semiconductor substrate; One reseting signal line;

One source pole follower drain voltage/reference voltage/row is enabled line;

A plurality of column output lines;

A plurality of reset transistors, each is coupling in one in described a plurality of detector layer and described source follower drain voltage/reference voltage/row is enabled between the line, and each of described a plurality of reset transistors has a grid that is coupled to described reseting signal line;

A plurality of source electrode follower transistors, each has a grid, that is coupled to one in described a plurality of detector layer and is coupled to that described source follower drain voltage/reference voltage/row is enabled the drain electrode of line, and one source pole; With

Transistor is enabled in a plurality of outputs, each has one and is coupled to described source follower drain voltage/reference voltage/row and enables the source electrode that one in described a plurality of column output line is coupled in drain electrode and that the grid, of line is coupled to the described source electrode of one in described a plurality of source electrode follower transistor.

6. the array in an array is listed as (n), described array comprises the active vertical color filtered pixel transducer of a plurality of row and columns that are formed on the semi-conductive substrate, described array row (n) comprise a plurality of row output/reference voltage lines, described row (n) comprise a plurality of row, and each row comprises:

One reset signal/row is enabled/source follower drain voltage line;

One switch, it enables described reset signal/row when closure/and source follower drain voltage line is connected to described row output/reference voltage line;

A plurality of element sensors, each element sensor comprises:

A plurality of detector layer, it is arranged to each other perpendicular alignmnet in fact, have different spectral sensitivities as its function of different depth in described Semiconductor substrate, and be configured to collect the photo-generated carrier of one first polarity, described a plurality of detector layer are separated by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity;

A plurality of reset transistors, each is coupling between one in described a plurality of detector layer and the described row output/reference voltage line, and each of described a plurality of reset transistors has a grid;

A plurality of source electrode follower transistors, each has a grid, that is coupled to one in described a plurality of detector layer and is coupled to described reset signal/row and enables/drain electrode of source follower drain voltage line, and one source pole;

Transistor is enabled in a plurality of outputs, each have one be coupled to described reset signal/row and enable/drain electrode and that the grid, of source follower drain voltage line is coupled to the described source electrode of one in described a plurality of source electrode follower transistor is coupled to the source electrode of one in described a plurality of row output/reference voltage line; With

Each of the described grid of the described a plurality of reset transistors in each row (m) in the described row (n) in the wherein said array except that footline in each element sensor is coupled in the described row (n) the described reset signal/row of element sensor described in the row (m+1) enables/source follower drain voltage line.

7. the array in an array is listed as (n), described array comprises the active vertical color filtered pixel transducer of a plurality of row and columns that are formed on the semi-conductive substrate, described array row (n) comprise a row output/reference voltage line, and described row (n) comprise a plurality of row, and each row comprises:

One reset signal/row is enabled/source follower drain voltage line;

A plurality of colors are enabled line;

One switch, when it was closed, it enabled described reset signal/row/and source follower drain voltage line is connected to described row output/reference voltage line;

A plurality of element sensors, each element sensor comprises:

A plurality of detector layer, it is arranged to each other perpendicular alignmnet in fact, have different spectral sensitivities as its function of different depth in described Semiconductor substrate, and be configured to collect the photo-generated carrier of one first polarity, described a plurality of detector layer are separated by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity;

One optical charge output signal node;

A plurality of colors are enabled transistor, each is coupling between one in described a plurality of detector layer and the described optical charge output signal node, described a plurality of colors enable transistorized each have one and be coupled to the grid that described a plurality of color is enabled one in the line;

One reset transistor, it is coupling between described optical charge output signal node and the described row output/reference voltage line, and described reset transistor has a grid;

The one source pole follower transistor, it has a grid, that is coupled to described optical charge output signal node and is coupled to described reset signal/row and enables/drain electrode of source follower drain voltage line, and one source pole;

Transistor is enabled in one output, its have one be coupled to described reset signal/row and enable/drain electrode and that the grid, of source follower drain voltage line is coupled to the described source electrode of described source follower transistor is coupled to the source electrode of described row output/reference voltage line; With

The described gate coupled of the described reset transistor in each row (m) in the described row (n) in the wherein said array except that footline in each element sensor described reset signal/row of element sensor described in capable (m+1) in the described row (n) is enabled/source follower drain voltage line.

8. the array in an array is listed as (n), described array comprises the active vertical color filtered pixel transducer of a plurality of row and columns that are formed on the semi-conductive substrate, described array row (n) comprise a column output line, and described row (n) comprise a plurality of row, and each row comprises:

One reseting signal line;

One reference voltage/source follower drain voltage line;

A plurality of colors are enabled line;

One switch, it is connected to described column output line with described reseting signal line when closure;

A plurality of element sensors, each element sensor comprises:

A plurality of detector layer, it is arranged to each other perpendicular alignmnet in fact, have different spectral sensitivities as its function of different depth in described Semiconductor substrate, and be configured to collect the photo-generated carrier of one first polarity, described a plurality of detector layer are separated by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity;

One optical charge output signal node;

A plurality of colors are enabled transistor, each is coupling between one in described a plurality of detector layer and the described optical charge output signal node, described a plurality of colors enable transistorized each have one and be coupled to the grid that described a plurality of color is enabled one in the line;

One reset transistor, it is coupling between described optical charge output signal node and the described reference voltage/source follower drain voltage line, and described reset transistor has a grid that is coupled to described reseting signal line; With

The one source pole follower transistor, it has the drain electrode and that a grid, that is coupled to described optical charge output signal node is coupled to described reference voltage/source follower drain voltage line and is coupled to the source electrode of described column output line.

9. active vertical color filtered pixel transducer, it is formed on the semi-conductive substrate and comprises:

One reseting signal line;

Line is enabled by delegation;

One source pole follower drain voltage line;

A plurality of detector layer, it is configured to collect the photo-generated carrier of one first polarity, the extra intervening layer of the photo-generated carrier of each detector layer by being configured to collect and conduct away opposite polarity and separated from one another, each detector layer is arranged to each other perpendicular alignmnet in fact and is had different spectral sensitivities as its function of different depth in described Semiconductor substrate, and each detector layer comprises:

One row output/reference voltage line;

One switch, it is connected to described reseting signal line described row output/reference voltage line when closure;

One reset transistor, it is coupling between described detector layer and the described row output/reference voltage line, and described reset transistor has a grid that is coupled to described reseting signal line;

The one source pole follower transistor, it has the drain electrode that a grid, that is coupled to described detector layer is coupled to described source follower drain voltage line, and one source pole; With

Transistor is enabled in one output, and it has one and is coupled to described row and enables the source electrode that described row output/reference voltage line is coupled in drain electrode and that the grid of line, is coupled to the described source electrode of described source follower transistor.

10. active vertical color filtered pixel transducer, it is formed on the semi-conductive substrate and with the delegation (m) and row (n) of an array and is associated, described array has the described CMOS active pixel sensor of a plurality of row and columns, and described active vertical color filtered pixel transducer comprises:

One reset signal/row is enabled line, and it is associated with the described row (m) of described array;

One reset signal/row is enabled line, and it is associated with the delegation (m+1) of described array;

One source pole follower drain voltage line;

A plurality of detector layer, it is configured to collect the photo-generated carrier of one first polarity, the extra intervening layer of the photo-generated carrier of each detector layer by being configured to collect and conduct away opposite polarity and separated from one another, each detector layer is arranged to each other perpendicular alignmnet in fact and is had different spectral sensitivities as its function of different depth in described Semiconductor substrate, and each detector layer comprises:

One row output/reference voltage line, it is associated with the row (n) of described array;

One reset transistor, it is coupling between described detector layer and the described row output/reference voltage line, and described reset transistor has one and is coupled to the described reset signal/row that is associated with the described row (m+1) of described array and enables the grid of line;

One switch, it is enabled line with described reset signal/row and is connected to described row output/reference voltage line when closure;

The one source pole follower transistor, it has the drain electrode that a grid, that is coupled to described detector layer is coupled to described source follower drain voltage line, and one source pole; With

Transistor is enabled in one output, it has one and is coupled to the described reset signal/row that is associated with the described row (m) of described array and enables the source electrode that described row output/reference voltage line is coupled in drain electrode and that the grid, of line is coupled to the described source electrode of described source follower transistor.

11. array row (n) in an array, described array comprises the active vertical color filtered pixel transducer of a plurality of row and columns that are formed on the semi-conductive substrate, described array row (n) comprise a plurality of row output/reference voltage lines, described row (n) comprise a plurality of row, and each row comprises:

One reset signal/row is enabled line;

One source pole follower drain voltage line;

One switch, it is enabled line with described reset signal/row and is connected to described row output/reference voltage line when closure;

A plurality of element sensors, each element sensor comprises:

A plurality of detector layer, it is arranged to each other perpendicular alignmnet in fact, have different spectral sensitivities as its function of different depth in described Semiconductor substrate, and be configured to collect the photo-generated carrier of one first polarity, the extra intervening layer of the photo-generated carrier of each detector layer by being configured to collect and conduct away opposite polarity is and separated from one another, and each detector layer comprises:

One reset transistor, its be coupling in described detector layer and described row output/reference voltage line one between, described reset transistor has one and is coupled to described reset signal/row and enables the grid of line;

The one source pole follower transistor, it has the drain electrode that a grid, is coupled to described source follower drain voltage line, and one source pole;

Transistor is enabled in one output, and it has one and is coupled to described reset signal/row and enables the source electrode that one in the described row output/reference voltage line is coupled in drain electrode and that the grid, of line is coupled to the described source electrode of described source follower transistor; With

The described gate coupled of the described source follower transistor in each row (m) in the described row (n) in the wherein said array except that footline in each element sensor is the described detector layer of element sensor described in the row (m+1) in the described row (n).

12. array row (n) in an array, described array comprises the active vertical color filtered pixel transducer of a plurality of row and columns that are formed on the semi-conductive substrate, described array row (n) comprise a plurality of row output/reference voltage lines, described row (n) comprise a plurality of row, and each row comprises: a reset signal/row is enabled line;

One source pole follower drain voltage/reference voltage line;

A plurality of element sensors, each comprises:

A plurality of detector layer, it is arranged to each other perpendicular alignmnet in fact, have different spectral sensitivities as its function of different depth in described Semiconductor substrate, and be configured to collect the photo-generated carrier of one first polarity, each detector layer is separated by being configured to collect with the extra intervening layer of the photo-generated carrier that conducts away opposite polarity, and each detector layer comprises:

One reset transistor, it is coupling between described detector layer and the described source follower drain voltage/reference voltage line, and described reset transistor has one and is coupled to described reset signal/row and enables the grid of line;

The one source pole follower transistor, it has the drain electrode that a grid, that is coupled to described detector layer is coupled to described source follower drain voltage/reference voltage line, and one source pole;

Transistor is enabled in one output, and it has one and is coupled to described reset signal/row and enables the source electrode that one in the described row output/reference voltage line is coupled in drain electrode and that the grid, of line is coupled to the described source electrode of described source follower transistor; With

The described gate coupled of the described reset transistor in each row (m) in the described row (n) in the wherein said array except that footline in each element sensor described reset signal/row of element sensor described in capable (m+1) in the described row (n) is enabled line.

13. an active vertical color filtered pixel transducer, it is formed on the semi-conductive substrate, and described active vertical color filtered pixel transducer comprises:

One reseting signal line;

One source pole follower drain voltage/reference voltage/row is enabled line;

A plurality of detector layer, it is configured to collect the photo-generated carrier of one first polarity, the extra intervening layer of the photo-generated carrier of each detector layer by being configured to collect and conduct away opposite polarity and separated from one another, each detector layer is arranged to each other perpendicular alignmnet in fact and is had different spectral sensitivities as its function of different depth in described Semiconductor substrate, and each detector layer comprises:

One column output line;

One reset transistor, it is coupling in described detector layer and described source follower drain voltage/reference voltage/row is enabled between the line, and described reset transistor has a grid that is coupled to described reseting signal line;

The one source pole follower transistor, it has a grid, that is coupled to described detector layer and is coupled to that described source follower drain voltage/reference voltage/row is enabled the drain electrode of line, and one source pole;

With

Transistor is enabled in one output, and it has one and is coupled to described source follower drain voltage/reference voltage/row and enables the source electrode that described first column output line is coupled in drain electrode and that the grid, of line is coupled to the described source electrode of described source follower transistor.

14. array row (n) in an array, described array comprises the active vertical color filtered pixel transducer of a plurality of row and columns that are formed on the semi-conductive substrate, described array row (n) comprise a row output/reference voltage line, and described row (n) comprise a plurality of row, and each row comprises:

One reset signal/row is enabled/source follower drain voltage line;

One switch, it enables described reset signal/row when closure/and source follower drain voltage line is connected to described row output/reference voltage line;

A plurality of element sensors, each element sensor comprises:

A plurality of detector layer, it is arranged to each other perpendicular alignmnet in fact, have different spectral sensitivities as its function of different depth in described Semiconductor substrate, and be configured to collect the photo-generated carrier of one first polarity, the extra intervening layer of the photo-generated carrier of each detector layer by being configured to collect and conduct away opposite polarity is and separated from one another, and each detector layer comprises:

One reset transistor, it is coupling between described detector layer and the described row output/reference voltage line, and described reset transistor has a grid;

The one source pole follower transistor, it has a grid, that is coupled to described detector layer and is coupled to described reset signal/row and enables/drain electrode of source follower drain voltage line, and one source pole;

Transistor is enabled in one output, its have one be coupled to described reset signal/row and enable/drain electrode and that the grid, of source follower drain voltage line is coupled to the described source electrode of described first source follower transistor is coupled to the source electrode of the described first row output/reference voltage line; With

The described gate coupled of the described reset transistor in each row (m) in the described row (n) in the wherein said array except that footline in each element sensor described reset signal/row of element sensor described in capable (m+1) in the described row (n) is enabled/source follower drain voltage line.

15. array row (n) in an array, described array comprises the active vertical color filtered pixel transducer of a plurality of row and columns that are formed on the semi-conductive substrate, described array row (n) comprise a row output/reference voltage line, and described row (n) comprise a plurality of row, and each row comprises:

One reset signal/row is enabled/source follower drain voltage line;

One switch, it enables described reset signal/row when closure/and source follower drain voltage line is connected to described row output/reference voltage line;

A plurality of element sensors, each element sensor comprises:

One optical charge output signal node;

One reset transistor, it is coupling between described optical charge output signal node and the described row output/reference voltage line, described reset transistor has a grid, and the described gate coupled of the described reset transistor in each row (m) in the described row (n) in the wherein said array except that footline in each element sensor described reset signal/row of element sensor described in capable (m+1) in the described row (n) is enabled/source follower drain voltage line;

The one source pole follower transistor, it has a grid, that is coupled to described optical charge output signal node and is coupled to described reset signal/row and enables/drain electrode of source follower drain voltage line, and one source pole;

Transistor is enabled in one output, its have one be coupled to described reset signal/row and enable/drain electrode and that the grid, of source follower drain voltage line is coupled to the described source electrode of described source follower transistor is coupled to the source electrode of described row output/reference voltage line;

A plurality of detector layer, it is arranged to each other perpendicular alignmnet in fact, have different spectral sensitivities as its function of different depth in described Semiconductor substrate, and be configured to collect the photo-generated carrier of one first polarity, the extra intervening layer of the photo-generated carrier of each detector layer by being configured to collect and conduct away opposite polarity is and separated from one another, and each detector layer comprises:

One color is enabled line; With

One color is enabled transistor, and it is coupling between described detector layer and the described optical charge output signal node, and described color is enabled transistor and had one and be coupled to the grid that described color is enabled line.

16. the array row (n) in an array, described array comprises the active vertical color filtered pixel transducer of a plurality of row and columns that are formed on the semi-conductive substrate, and described array row (n) comprise

One column output line, described row (n) comprise a plurality of row, and each row comprises:

One reseting signal line;

One reference voltage/source follower drain voltage line;

One switch, it is connected to described column output line with described reseting signal line when closure;

A plurality of element sensors, each element sensor comprises:

One optical charge output signal node;

One reset transistor, it is coupling between described optical charge output signal node and the described reference voltage/source follower drain voltage line, and described reset transistor has a grid that is coupled to described reseting signal line; With

The one source pole follower transistor, it has the drain electrode and that a grid, that is coupled to described optical charge output signal node is coupled to described reference voltage/source follower drain voltage line and is coupled to the source electrode of described column output line;

A plurality of detector layer, it is arranged to each other perpendicular alignmnet in fact, have different spectral sensitivities as its function of different depth in described Semiconductor substrate, and be configured to collect the photo-generated carrier of one first polarity, the extra intervening layer of the photo-generated carrier of each detector layer by being configured to collect and conduct away opposite polarity is and separated from one another, and each detector layer comprises:

One color is enabled line; With

One color is enabled transistor, and it is coupling between described detector layer and the described optical charge output signal node, and described color is enabled transistor and had one and be coupled to the grid that described color is enabled line.

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