CN1938924B - PWM controller of modulator with power-saving and noise reducing function - Google Patents
PWM controller of modulator with power-saving and noise reducing function Download PDFInfo
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- CN1938924B CN1938924B CN2004800427247A CN200480042724A CN1938924B CN 1938924 B CN1938924 B CN 1938924B CN 2004800427247 A CN2004800427247 A CN 2004800427247A CN 200480042724 A CN200480042724 A CN 200480042724A CN 1938924 B CN1938924 B CN 1938924B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/40—Means for preventing magnetic saturation
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0006—Arrangements for supplying an adequate voltage to the control circuit of converters
Abstract
A modulator of a PWM controller is provided for saving power and reducing acoustic noise in the light load and no load conditions. The maximum on-time is kept as a constant and a bias current of the oscillator in the PWM controller is moderated to achieve the off-time modulation. The bias current is a function of the supply voltage and the feedback voltage, which is derived from a voltage feedback loop. A threshold voltage defines the level of the light load. A limit voltage defines the low level of the supply voltage. A bias current synthesizer generates the bias current. Reducing the bias current increases the off-time of the switching period. Once the feedback voltage is decreased lower than the threshold voltage, the bias current is reduced linearly and the off-time of the switching period is increased gradually. When the supply voltage is lower than the limit voltage, the bias current increases and determines a maximum off-time of the switching period. Keeping the maximum on-time as a constant and increasing the switching period by only increasing the off-time prevents magnetic components, such as inductors and transformers, from being saturated. Furthermore, a control circuit disables the oscillator as the PWM frequency may fall into the audio band, therefore the acoustic noise can be greatly reduced in the light load and no load conditions.
Description
Technical field
The present invention relates to a kind of switching power supply, and more particularly relate to switching power supply pulse width modulation (pulse width modulation, PWM).
Background technology
The PWM controller is that the integrated circuit that switches duty cycle is controlled and regulated to a kind of switching power supply that is used for.When standing the environment adjusting, require the power system design of computer and other electric product to satisfy power management and energy conservation standard.Power management be to operating period consumed power system manage, and during non-operation mode, only consume power seldom.For the power management applications in the power supply unit, the main power of how saving under underload and the immunization with gD DNA vaccine.A target of PWM modulator is province's power consumption of optimization joint and reduces noise when frequency of oscillation falls into sonic-frequency band.
Fig. 1 illustrates and typically speeds to return (flyback) power supply unit circuit, wherein 100 controls of PWM controller and adjusting power output.When the power-on supply, PWM controls startup.Via 220 chargings of 210 pairs of capacitors of resistor, up to the supply voltage V of PWM controller 100
CCReach and start threshold value (start-threshold).PWM controller 100 begins output pwm signals subsequently, and drives whole power supply unit.After startup, the assisted bias winding of transformer 400 (auxiliary biaswinding) provide supply voltage V via rectifier 230
CC Resistor 240 is the voltage signal that is used for PWM control and power overload protection with the switch current information translation of transformer 400.In case the boost voltage of transformer 400 can't be provided for supply voltage V
CCEnough power so that supply voltage V
CCBe lower than outage threshold (stop-threshold), thereby close PWM controller 100.Feedback voltage V
FBBe taken from the output of optical coupler 250.The input of optical coupler 250 is connected to the output V of power supply via resistor 290 and Zener diode 280
O, to form feedback loop.Via the control of feedback loop, voltage V
FBT turn-on time via PWM controller 100 control pwm signals
ONDuration, and the decision power output.
The power loss of power supply unit is an important problem, and the main loss and the switching frequency F that comprise magnetic core of transformer loss, transistor handoff loss and buffer (snubber) power loss are proportional.Switching cycle T is the inverse of switching frequency F, T=1/F.Increase the loss of switching cycle T cpable of lowering power.Yet, be the size that prevents that transformer is saturated and dwindle power supply unit, necessarily require short T turn-on time
ONWork as T
ONDuration when unrestricted, magnet assembly (for example inductor and transformer) will cause saturated generation, and will cause the overstress of switching device shifter (for example transistor and rectifier) to damage (over-stress damage).Though the power consumption of power supply unit will reduce in response to reducing of switching frequency F, when switching frequency falls into sonic-frequency band (for example 200Hz to 8KHz) under underload and immunization with gD DNA vaccine, will produce audible noise.Therefore another target is to reduce noise under underload and immunization with gD DNA vaccine when switching frequency falls into sonic-frequency band.
Disclosed the certain methods that increases regulator efficiency in the prior art, for example changed switching frequency and enter " pulse-skip (pulse-skipping) " pattern according to loading condition.For example, United States Patent (USP) the 6th, 100, No. 675 " SWITCHING REGULATOR CAPABLE OF INCREASINGREGULATOR EFFICIENCY UNDER LIGHT LOAD " discloses a kind of oscillation frequency control circuit, and it can change the frequency of oscillation of pierce circuit in response to loading condition.And at United States Patent (USP) the 6th, 366, disclose another kind of method in 070B1 number " SWITCHING VOLTAGE REGULATOR WITH DUAL MODULATIONCONTROL SCHEME ", it has disclosed the adjuster that uses three kinds of operator schemes, this adjuster is operated with constant switching frequency under the heavy duty situation, under the medium load situation, use the double modulation controlling mechanism, and under light load condition, enter " pulse-skip ".The shortcoming of aforementioned prior art is: (1) changes switching frequency and does not limit and may cause the saturated of magnet assembly maximum turn-on time, and causes the overstress of switching device shifter (for example transistor and rectifier) to damage; (2) modulation of switching frequency is controlled by loading condition only, and and independent of power voltage.Because in order to save more power, so switching frequency can fall lowly excessively, so the assisted bias winding of transformer or inductor may not provide enough power to be used for the supply voltage of PWM controller under underload and immunization with gD DNA vaccine.PWM is controlled in this case and may works improperly.Therefore, frequency modulation(FM) is associated with two kinds of loading conditions and supply voltage; (3) under underload and immunization with gD DNA vaccine, switching frequency may be reduced to sonic-frequency band.If magnet assembly does not flood (impregnated) well, the sonic-frequency band switching frequency may produce noise so.
For preventing the above shortcoming of prior art, need preferably a kind of and muting device is used to improve efficient and saves power consumption under underload and immunization with gD DNA vaccine.
Summary of the invention
The invention provides a kind of Pwm controller that is used to save power and reduces the modulator of noise that has, it comprises: a bias current synthesizer, it has four input terminals and two lead-out terminals, first lead-out terminal of wherein said bias current synthesizer produces a bias current determining the turn-off time of a pulse width modulation switching cycle, and second lead-out terminal of described bias current synthesizer is exported a reference current; An oscillator, it has two input terminals, described first lead-out terminal that first input end of wherein said oscillator is connected to described bias current synthesizer is used for the pulse signal that pulse width modulation is switched with generation, the turn-on time of described pulse signal be turn-off time of constant and described pulse signal along with described bias current reduces to increase, second input terminal of described oscillator is used to enable/the described oscillator of stopping using; A control circuit, it has an input terminal and a lead-out terminal, the described input terminal of wherein said control circuit is connected to described reference current, described reference current is taken from described second lead-out terminal of described bias current synthesizer, and the described lead-out terminal of described control circuit is connected to described second input terminal of described oscillator; A rest-set flip-flop, it is used to produce on-off signal, and wherein said rest-set flip-flop is set by described pulse signal, and is reset by a FEEDBACK CONTROL; One and door, it has two input terminals, and wherein said first input end with door is connected to described pulse signal, and second input terminal described and door is connected to described on-off signal; A feedback voltage, it is connected to the first input end of described bias current synthesizer, wherein said feedback voltage is taken from the voltage feedback loop of power supply unit, in order to the described turn-on time of controlling described pulse width modulating signal and the output of regulating power supply unit; Threshold voltage, it is connected to second input of described bias current synthesizer, with the level under the decision light load condition; A deboost, it is connected to the level of the 3rd input of described bias current synthesizer with the decision low supply voltage, wherein when the pulse width modulation switching frequency reduces under described underload and immunization with gD DNA vaccine, described deboost changes in each pulse width modulation switching cycle, and this influences described bias current and produces variable pulse width modulation switching frequency; And supply voltage, it is connected to the four-input terminal of described bias current synthesizer, wherein said supply voltage is the supply voltage of described Pwm controller, wherein said bias current is described feedback voltage, described threshold voltage, the function of described supply voltage and described deboost, make when described feedback voltage is lower than described threshold voltage, described bias current begins along with reducing of described feedback voltage to reduce, if and described supply voltage is lower than described deboost, described bias current will begin along with reducing of described supply voltage to increase.
Bias current via oscillator in the modulation (PWM) controller reaches the modulation of realization turn-off time.Remain constant the maximum turn-on time of pwm signal.Reduce bias plasma and fail to be convened for lack of a quorum the turn-off time of increase switching cycle, so switching cycle is prolonged.To be used as variable to get in touch from the feedback voltage and the supply voltage of voltage feedback loop with the turn-off time chopping phase.Bias current is modulated to the function of feedback voltage and supply voltage.Threshold voltage is the constant of the underloaded level of definition.The low level of deboost definition supply voltage.Deduct threshold voltage and produce first differential signal by feedback voltage.Deduct the supply voltage of decay and produce second differential signal by deboost.First differential signal and second differential signal and through being converted into bias current.By the limiter limits bias current to set the minimum switching cycle under normal load and the full load situation.Be lower than threshold voltage in case feedback voltage is reduced to, bias current reduces so, and the turn-off time of switching cycle prolongs continuously.When supply voltage was lower than deboost, bias current increased, and the maximum turn-off time of decision switching cycle.
Control circuit provides two inlet voltages.Reference resistor will change voltage signal into from the reference current that bias current obtains and be input to the input of control circuit.The level of the first inlet voltage decision audio frequency switching frequency.When switching frequency falls into sonic-frequency band under underload and immunization with gD DNA vaccine, control circuit will export the OFF signal to cut out the oscillator of PWM controller.The level of second inlet voltage decision startup oscillator of PWM controller.In case supply voltage reduces or feedback voltage increases, and the input voltage of control circuit is greater than the second inlet voltage, and oscillator will restart work once more so.
Advantageously, the self adaptation turn-off time is modulated the power consumption of having improved efficient and save power supply under underload and immunization with gD DNA vaccine.Simultaneously, when switching frequency fell into sonic-frequency band, the control circuit of using among the present invention cut out oscillator, to have reduced noise significantly.
Should be appreciated that, aforementioned general describe and following detailed description is exemplary, and hope is the same with claims that further explanation of the present invention is provided.
Description of drawings
Comprise accompanying drawing so that further understanding of the present invention to be provided, and it incorporates and constitutes the part of this specification into.Graphic explanation embodiments of the invention, and together with describing in order to explain principle of the present invention.In graphic,
Fig. 1 illustrates the circuit of typically speeding to return of power supply unit.
Fig. 2 explanation is according to the block diagram of the preferred embodiment of self adaptation of the present invention turn-off time modulator.
Fig. 3 explicit declaration is according to the circuit diagram of the preferred embodiment of the oscillator shown in Fig. 2 of the present invention.
Fig. 4 illustrates the circuit diagram according to the preferred embodiment of the bias current synthesizer shown in Fig. 2 of the present invention.
Embodiment
Fig. 2 illustrates the block diagram of self adaptation turn-off time modulator according to an embodiment of the invention.Bias current synthesizer 10 produces the bias current I that is used for oscillator 30
MDecide the turn-off time of pwm signal.Adder 11 is with feedback voltage V
FBDeduct threshold voltage V
AThe back produces the first differential signal 11a.The output of adder 11 is connected to the input of limiter 22.Adder 12 is with deboost V
XDeduct supply voltage V
CCThrough attenuator α decay and voltage after produce the second differential signal 12a.The output of adder 12 is connected to the input of limiter 24.The output of limiter 22 and limiter 24 is connected respectively to two inputs of adder 13.The voltage 13a that voltage commentaries on classics current converter 15 will obtain from the output of adder 13 changes current signal 15a into.This current signal 15a is limited to produce modulated bias current I by limiter 26
MReduce bias current I
MThe cycle of oscillation of oscillator 30 will be prolonged.Oscillator 30 output pulse signal V
PWith driving S-R register 41, and the initial PWM cycle.As induction by current input V
SBe higher than feedback voltage V
FBThe time, via the comparator 45 S-R register 41 of resetting.Pulse signal V
PFor logic low interval scale oscillator 30 is in the turn-off time.Guarantee to close with door (AND gate) 43 in the output of the turn-off time of oscillator 30 period P WM signal.
Bias current I
MBe supply voltage V
CCAnd feedback voltage V
FBFunction.
S
A＝(V
FB-V
A)×K
A (1)
S
B＝[V
X-(α·V
CC)]×K
B (2)
I
M＝(S
A+S
B)×K
C (3)
In above equation, the scope of exporting is restricted to (0≤S
A≤ N
A), (0≤S
B≤ N
B) and (0≤I
M≤ I
MAX), K
CIt is the transfer ratio that voltage changes current converter 15.
Limiter 22 is K in proportion
AThe convergent-divergent first differential signal 11a, and with its export-restriction zero to the first maximum N
AScope in.Limiter 24 is K in proportion
BThe convergent-divergent second differential signal 12a, and with its export-restriction zero to the second maximum N
BScope in.Limiter 26 changes voltage the export-restriction of current converter 15 and arrives maximum current I zero
MAXScope in, under normal load and full load situation, to set minimum switching cycle.In case feedback voltage V
FBReduce to and be lower than threshold voltage V
A, bias current I so
MAccording to K
ASlope and N
AAnd reduce.And the turn-off time of switching cycle increases continuously.When the supply voltage (α VCC) of decaying is lower than deboost V
XThe time, bias current I
MAccording to K
BSlope and N
BAnd increasing, and the maximum turn-off time of decision switching cycle.
Fig. 3 illustrates an embodiment according to oscillator 30 of the present invention shown in Figure 2.Obtain pulse signal V from the output of NAND gate (NAND gate) 35
PIn initial condition, be applied to capacitor C
TBVoltage be zero.The output of comparator 31 outputs to logic high signal the input of NAND gate 34.The output of comparator 32 outputs to logic low signal the input of NAND gate 35.The output of NAND gate 35 keeps logic high.NAND gate 34 output logic low signals, and drive not gate (NOT gate) 33 connection switches 36.Constant current source I
CBegin capacitor C
TBCharging.Work as C
TBOn voltage greater than V
HBThe time, the high signal of NAND gate 34 outputs is with cut-off switch 36, and connection switch 37 comes capacitor C
TBDischarge.Transistor 39 is from flowing through the bias current I of transistor 38
MThe mirror discharging current.This discharging current decision V
PThe turn-off time of pulse signal.Therefore, regulate bias current I
MCan realize the turn-off time modulation of oscillator 30.Control turn-on time of switching cycle by feedback loop, thereby regulate the power output of power supply.
Transistor 40 is used to block the bias current I of oscillator 30
MWhen switching frequency falls into sonic-frequency band, will connect transistor 40, and stop bias current to flow into oscillator 30.Constant current source I
CThe maximum turn-on time of decision switching cycle.Only increase switching cycle and can prevent that magnet assembly (for example inductor and transformer) is saturated via the duration that increases the turn-off time.The maximum turn-on time of (T of switching cycle
ON (max)) and turn-off time (T
OFF), and the switching frequency of pwm signal (F) is expressed as follows:
T
ON(max)＝[(V
HB-V
L)×C
TB]/I
C (4)
T
OFF＝[(V
HB-V
L)×C
TB)]/I
M (5)
Fig. 4 illustrates the embodiment of the bias current synthesizer 10 of PWM controller, and it comprises: constant current source I
TFirst current mirror of forming by transistor 71 and transistor 73, second current mirror of forming by transistor 81 and transistor 83, the 3rd current mirror of forming by transistor 88 and transistor 89, first buffer amplifier (buffer amplifier), 77, the second buffer amplifiers, 87, the first operational amplifiers (op amp) 76, first voltage changes current transistor 75, second operational amplifier (op amp), 86, the second voltages change current transistor 85, the first resistors 72 (R72), second resistor 82 (R82), by the attenuator that the 3rd resistor 91 (R91) and the 4th resistor 92 (R92) are formed, first switch 95, comparator 93, second switch 96, reference resistor R
FWith not gate 94.
Feedback voltage V
FBBe connected to the positive input terminal of first operational amplifier 76.Threshold voltage V
ABe connected to the positive input terminal of first buffer amplifier 77.The output of first buffer amplifier 77 is connected to the negative input end of first operational amplifier 76 via first resistor 72.The source electrode of first voltage commentaries on classics current transistor 75 is connected to the negative input end of first operational amplifier 76.The output of first operational amplifier 76 is connected to the grid that first voltage changes current transistor 75, is used to form first source follower (source-follow circuit) and drives first resistor 72.The drain electrode of first voltage commentaries on classics current transistor 75 is connected to the drain electrode of mirrored transistor 71.The grid of the drain and gate of mirrored transistor 71 and mirrored transistor 73 links together.The source electrode of the source electrode of mirrored transistor 71 and mirrored transistor 73 is connected to constant current source I
T
Deboost V
XBe connected to the positive input terminal of second operational amplifier 86.Supply voltage V
CCBe connected to the positive input terminal of second buffer amplifier 87 via resistor 91.Resistor 92 is connected between the positive input terminal and ground connection of second buffer amplifier 87.The output of second buffer amplifier 87 is connected to the negative input end of second operational amplifier 86 via second resistor 82.The source electrode of second voltage commentaries on classics current transistor 85 is connected to the negative input end of second operational amplifier 86.The output of second operational amplifier 86 is connected to the grid that second voltage changes current transistor 85, drives second resistor 82 to be used to form second source follower.The drain electrode of second voltage commentaries on classics current transistor 85 is connected to the drain electrode of mirrored transistor 81.The grid of the drain and gate of mirrored transistor 81 and mirrored transistor 83 links together.The source electrode of the source electrode of mirrored transistor 81 and mirrored transistor 83 is connected to constant current source I
T
The drain electrode of mirrored transistor 73 and mirrored transistor 83 links together and the output bias electric current I
MIn first operational amplifier 76, feedback voltage V
FBDeduct threshold voltage V
AThe back produces first output, and this first is input to the grid of first voltage commentaries on classics current transistor 75 and is converted into first electric current I
1The first current mirror mirror, first electric current I
1And via the drain electrode output current I of mirrored transistor 73
FBDeboost V
XDeduct supply voltage V via the attenuator decay
CCThe back is to produce second output, and this second output is connected to second voltage to be changeed the grid of current transistor 85 and be converted into second electric current I
2The second current mirror mirror, second electric current I
2And the drain electrode output current I by mirrored transistor 83
VCCElectric current I
FBWith electric current I
VCCClose and form bias current I
MWork as feedback voltage V
FBLower and supply voltage V
CCWhen higher, bias current I
MLinearity reduces, and prolongs the turn-off time of the cycle of oscillation of the oscillator 30 shown in Fig. 2.On the contrary, work as feedback voltage V
FBHigher and/or supply voltage V
CCWhen low, I
MIncrease gradually.
I
FB＝[(V
FB-V
A)/R
72]×M
A (7)
I
VCC＝[(V
X-α·V
CC)/R
82]×M
B (8)
I
M＝I
FB+I
VCC (9)
In above equation, with I
MScope be restricted to (0≤I
M≤ I
T), M
ABe the transfer ratio of first current mirror, M
BBe the transfer ratio of second current mirror, α equals [R92/ (R91+R92)].The minimum turn-off time of pwm signal is by constant current source I
TDecision is as shown in equation (5) and (7) to (9).
The 3rd current mirror is made up of mirrored transistor 88 and mirrored transistor 89.The grid of mirrored transistor 88 is connected to the grid of mirrored transistor 71.The grid of mirrored transistor 89 is connected to the grid of mirrored transistor 81.The source electrode of the source electrode of mirrored transistor 88 and mirrored transistor 89 is connected to constant current source I
TThe drain electrode of the drain electrode of mirrored transistor 88 and mirrored transistor 89 links together with output and bias current I
MThe proportional reference current I of variation
F
Control circuit 28 shown in Fig. 4 comprises comparator 93, first switch 95, second switch 96, reference resistor R
FWith not gate 94.Reference resistor R
FBe connected to the negative input end of comparator 93.The output of comparator 93 is connected to the control terminal of second switch 96 and the input terminal of not gate 94.The lead-out terminal of not gate 94 is connected to the control terminal of first switch 95.The first inlet voltage V
T1Be connected to the input terminal of first switch 95.The second inlet voltage V
T2Be connected to the input terminal of second switch 96.The output of first switch 95 and second switch 96 is connected to the positive input terminal of comparator 93 jointly.Under normal load condition, comparator 93 is output as logic low-voltage.Not gate 94 these logic low-voltages of conversion, and produce logic high voltage to connect first switch 95, this makes the inlet voltage V that wins
T1Be connected to the positive input terminal of comparator 93.The first inlet voltage V
T1The definition switching frequency falls into the threshold value of sonic-frequency band.In case switching frequency reduces and when falling into audio frequency under underload and immunization with gD DNA vaccine, reference current I
FWill be along with bias current I
MReduce reduce pro rata.Reference resistor R
FWith reference current I
FBe converted to the reference voltage V of comparator 93 negative input end
FIn case voltage V
FBe lower than the first inlet voltage V
T1, just with high (OFF) signal that turn-offs of output logic, it disconnects first switch 95 and connects second switch 96 comparator.This OFF signal is connected to the grid of the transistor 40 shown in Fig. 3.The source electrode of transistor 40 is connected to ground connection.The drain electrode of transistor 40 is connected to the drain electrode of mirrored transistor 38.Logic high OFF signal turns on transistor 40 is also blocked the bias current of oscillator.The vibration of the oscillator 30 shown in Fig. 2 is not having bias current I
MIn time, will stop.Make feedback voltage V when the load increase
FBIncrease or supply voltage V
CCWhen reducing, reference current I
FWill with bias current I
MIncrease pro rata.The second inlet voltage V
T2The definition threshold value is to open the vibration of beginning oscillator 30 again.In case reference voltage V
FThe high level cadre second inlet voltage V
T2, comparator 93 with the output logic low-voltage to disconnect transistor 40 and second switch 96.The low logic voltage of not gate 94 counter-rotating to be connecting first switch 95, and makes the first inlet voltage V once more
T1Be connected to the positive input terminal of comparator 93.Logic low OFF signal makes bias current I
MFlow into once more in the oscillator 30.Therefore, oscillator 30 will restart vibration according to the variation of loading condition.
As previously discussed, the PWM controller that comprises the modulation of self adaptation turn-off time of the present invention can reduce the power consumption of power supply under underload and immunization with gD DNA vaccine.In addition, under underload and the immunization with gD DNA vaccine when the PWM frequency falls into sonic-frequency band, the control by control circuit will reduce noise significantly.
Be understood by those skilled in the art that, under the situation of scope of the present invention or spirit, can making various modifications and change structure of the present invention.In view of the above, wish the present invention contain fall into above claim and equivalent thereof scope in modification of the present invention and change.
Claims (4)
1. one kind has the Pwm controller that is used to save power and reduces the modulator of noise, comprising:
A bias current synthesizer, it has four input terminals and two lead-out terminals, first lead-out terminal of wherein said bias current synthesizer produces a bias current determining the turn-off time of a pulse width modulation switching cycle, and second lead-out terminal of described bias current synthesizer is exported a reference current;
An oscillator, it has two input terminals, described first lead-out terminal that first input end of wherein said oscillator is connected to described bias current synthesizer is used for the pulse signal that pulse width modulation is switched with generation, the turn-on time of described pulse signal be turn-off time of constant and described pulse signal along with described bias current reduces to increase, second input terminal of described oscillator is used to enable/the described oscillator of stopping using;
A control circuit, it has an input terminal and a lead-out terminal, the described input terminal of wherein said control circuit is connected to described reference current, described reference current is taken from described second lead-out terminal of described bias current synthesizer, and the described lead-out terminal of described control circuit is connected to described second input terminal of described oscillator;
A rest-set flip-flop, it is used to produce on-off signal, and wherein said rest-set flip-flop is set by described pulse signal, and is reset by a FEEDBACK CONTROL;
One and door, it has two input terminals, and wherein said first input end with door is connected to described pulse signal, and second input terminal described and door is connected to described on-off signal;
A feedback voltage, it is connected to the first input end of described bias current synthesizer, wherein said feedback voltage is taken from the voltage feedback loop of power supply unit, in order to the described turn-on time of controlling described pulse width modulating signal and the output of regulating power supply unit;
Threshold voltage, it is connected to second input of described bias current synthesizer, with the level under the decision light load condition;
A deboost, it is connected to the level of the 3rd input of described bias current synthesizer with the decision low supply voltage, wherein when the pulse width modulation switching frequency reduces under described underload and immunization with gD DNA vaccine, described deboost changes in each pulse width modulation switching cycle, and this influences described bias current and produces variable pulse width modulation switching frequency; And
A supply voltage, it is connected to the four-input terminal of described bias current synthesizer, wherein said supply voltage is the supply voltage of described Pwm controller, wherein said bias current is described feedback voltage, described threshold voltage, the function of described supply voltage and described deboost, make when described feedback voltage is lower than described threshold voltage, described bias current begins along with reducing of described feedback voltage to reduce, if and described supply voltage is lower than described deboost, described bias current will begin along with reducing of described supply voltage to increase.
2. Pwm controller according to claim 1, wherein said bias current synthesizer comprises:
A first adder, it operatively deducts described threshold voltage with described feedback voltage;
An attenuator, its described supply voltage that is used to decay;
A second adder, it operatively deducts described deboost the output of described attenuator;
One first limiter, it is used for an output bi-directional scaling of described first adder and is restricted to one first differential signal, to one first peaked scope, wherein said first maximum determines the slope that described bias current changes along with the variation of described feedback voltage to the amplitude of wherein said first differential signal zero;
One second limiter, it is used for an output bi-directional scaling of described second adder and is restricted to one second differential signal, to one second peaked scope, wherein said second maximum determines the slope that described bias current changes along with the variation of described supply voltage to the amplitude of wherein said second differential signal zero;
One the 3rd adder, it is with described first differential signal and the described second differential signal addition;
A voltage changes current converter, and its output with described the 3rd adder is converted to the electric current that a voltage changes electric current; And
One the 3rd limiter, it is used to limit the electric current that described voltage changes electric current, producing described reference current and described bias current, the amplitude of wherein said bias current zero to the scope of current maxima, under normal load and full load situation, to set minimum switching cycle.
3. Pwm controller according to claim 1, wherein said bias current synthesizer comprises:
One first operational amplifier, it has a positive input terminal, negative input end and a lead-out terminal, and the described positive input terminal of wherein said first operational amplifier is connected to described feedback voltage;
One first buffer amplifier, it has a positive input terminal, negative input end and a lead-out terminal, described negative input end of wherein said first buffer amplifier is connected to its described output, and the described positive input terminal of described first buffer amplifier is connected to described threshold voltage;
One first voltage changes current transistor, it has a grid, a source electrode and a drain electrode, wherein said first voltage changes the described lead-out terminal driving of the described grid of current transistor by described first operational amplifier, and the described source electrode that described first voltage changes current transistor is connected to described negative input end of described first operational amplifier, thereby forms one first source follower;
One first resistor, its described output and described first voltage that is connected described first buffer amplifier changes between the described source electrode of current transistor, wherein said feedback voltage deducts described threshold voltage via described first resistor, and produces one first electric current;
An attenuator;
One second operational amplifier, it has a positive input terminal, negative input end and a lead-out terminal, and the described positive input terminal of wherein said second operational amplifier is connected to described deboost;
One second buffer amplifier, it has a positive input terminal, negative input end and a lead-out terminal, described negative input end of wherein said second buffer amplifier is connected to its described lead-out terminal, and the described positive input terminal of described second buffer amplifier is connected to described supply voltage via described attenuator;
One second voltage changes current transistor, it has a grid, a source electrode and a drain electrode, the described grid of wherein said second voltage commentaries on classics current transistor is driven by the described output of described second operational amplifier, and the described source electrode that described second voltage changes current transistor is connected to the described negative input end of described second operational amplifier, thereby forms one second source follower;
One second resistor, its described lead-out terminal and described second voltage that is connected described second buffer amplifier changes between the described source electrode of current transistor, wherein said deboost deducts the described supply voltage of described attenuator decay via second resistor, and produces one second electric current;
One first input transistors, it has a grid, a source electrode and a drain electrode;
One first output transistor, it has a grid, a source electrode and a drain electrode, the described source electrode of wherein said first input transistors and the described source electrode of described first output transistor link together, wherein said first voltage changes the described drain electrode of current transistor, the described drain electrode of described first input transistors, the described grid of described first input transistors and the described grid of described first output transistor are joined together to form one first mirror image amplifier, and the described first mirror image amplifier of wherein said first current drives is to produce the feedback current of a mirror;
One second input transistors, it has a grid, a source electrode and a drain electrode;
One second output transistor, it has a grid, a source electrode and a drain electrode, the described source electrode of wherein said second input transistors and the described source electrode of described second output transistor link together, wherein said second voltage changes the described drain electrode of current transistor, the described drain electrode of described second input transistors, the described grid of described second input transistors and the described grid of described second output transistor are joined together to form one second mirror image amplifier, and the described second mirror image amplifier of wherein said second current drives is to produce the source current of a mirror;
One the 3rd output transistor, it has a grid, a source electrode and a drain electrode, the described grid of wherein said the 3rd output transistor is connected to the described grid of described first input transistors, and the described source electrode of described the 3rd output transistor is connected to the described source electrode of described first input transistors;
One the 4th output transistor, it has a grid, a source electrode and a drain electrode, the described grid of wherein said the 4th output transistor is connected to the described grid of described second input transistors, the described source electrode of described the 4th output transistor is connected to the described source electrode of described second input transistors, and the described drain electrode of described the 4th output transistor and the described drain electrode of described the 3rd output transistor link together to produce described reference current; And
A restriction current source, it is connected to the described source electrode of described first input transistors, the described source electrode of described first output transistor, the described source electrode of described second input transistors, the described source electrode of described second output transistor, the described source electrode of described the 3rd output transistor and the described source electrode of described the 4th output transistor, be used to limit the maximum output current of described bias current, the described drain electrode of wherein said first output transistor and the described drain electrode of described second output transistor link together, with to the source current summation of the feedback current of described mirror and described mirror and produce described bias current.
4. Pwm controller according to claim 1, wherein said control circuit comprises:
One first switch, it has an input terminal, a lead-out terminal and a control terminal;
A second switch, it has an input terminal, a lead-out terminal and a control terminal;
A reference resistor, it is used for described reference current is converted to a reference voltage;
A not gate, it has a lead-out terminal of the described control terminal that is connected to described first switch, and an input terminal; And
A comparator, it has negative input end, a positive input terminal and a lead-out terminal, described negative input end of wherein said comparator is connected to described reference resistor, the described positive input terminal of described comparator is connected to the described lead-out terminal of described first switch and described second switch, the described lead-out terminal of described comparator is connected to the described input terminal of described not gate and the described control terminal of described second switch, and described lead-out terminal is in order to enable and the vibration of the described oscillator of stopping using, the described input terminal of described first switch is connected to one first inlet voltage, and the described input terminal of described second switch is connected to one second inlet voltage.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2004/000341 WO2005101624A1 (en) | 2004-04-13 | 2004-04-13 | Pwm controller having a modulator for saving power and reducing acoustic noise |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1938924A CN1938924A (en) | 2007-03-28 |
| CN1938924B true CN1938924B (en) | 2010-04-28 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2004800427247A Expired - Fee Related CN1938924B (en) | 2004-04-13 | 2004-04-13 | PWM controller of modulator with power-saving and noise reducing function |
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| Country | Link |
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| CN (1) | CN1938924B (en) |
| WO (1) | WO2005101624A1 (en) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7535276B2 (en) * | 2007-05-16 | 2009-05-19 | Semiconductor Components Industries, L.L.C. | Method of forming a PWM controller and structure therefor |
| JP2008312335A (en) | 2007-06-14 | 2008-12-25 | Mitsumi Electric Co Ltd | Switching power supply device and primary-side control circuit |
| US7983061B2 (en) * | 2008-02-22 | 2011-07-19 | System General Corporation | Switching controller capable of reducing acoustic noise for power converters |
| KR101598071B1 (en) * | 2008-12-29 | 2016-02-26 | 주식회사 동부하이텍 | Apparatus and method for supplying power of AMOLED |
| CN101882875B (en) * | 2010-04-13 | 2013-02-27 | 矽创电子股份有限公司 | Power supply device with adjustable switching frequency |
| CN101834516A (en) * | 2010-05-27 | 2010-09-15 | 上海北京大学微电子研究院 | Multimode frequency controller and switch power supply frequency control method |
| CN101917123B (en) * | 2010-09-06 | 2013-05-29 | Bcd半导体制造有限公司 | PWM (Pulse-Width Modulation) controller with built-in linear down-conversion function and PWM control circuit |
| WO2012103941A2 (en) * | 2011-02-02 | 2012-08-09 | Telefonaktiebolaget L M Ericsson (Publ) | Digital control unit having a transient detector for controlling a switched mode power supply |
| US8723500B2 (en) * | 2011-03-11 | 2014-05-13 | Intersil Americas Inc. | System and method for preventing controller induced pulse skipping at low duty cycle operations |
| CN105490567B (en) * | 2014-09-19 | 2018-04-13 | 万国半导体(开曼)股份有限公司 | Fixed ON time suitching type conversion equipment |
| US9660632B1 (en) * | 2015-12-16 | 2017-05-23 | Cirrus Logic, Inc. | Adjustable time duration for driving pulse-width modulation (PWM) output to reduce thermal noise |
| US10158296B1 (en) * | 2018-04-18 | 2018-12-18 | Nxp B.V. | Method and system for saturation control in a flyback switched-mode power supply (SMPS) |
| US10509426B2 (en) * | 2018-05-02 | 2019-12-17 | Analog Devices Global Unlimited Company | Methods and circuits for controlling and/or reducing current leakage during a low-power or inactive mode |
| JP6886544B1 (en) * | 2020-04-20 | 2021-06-16 | ウィンボンド エレクトロニクス コーポレーション | Oscillator circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR0119883B1 (en) * | 1994-12-22 | 1997-10-30 | 김광호 | Switching source apparatus for controller |
| US5862044A (en) * | 1996-12-02 | 1999-01-19 | Yokogawa Electric Corporation | Switching power supply unit |
| JP2002300771A (en) * | 2001-03-30 | 2002-10-11 | Shindengen Electric Mfg Co Ltd | Dc-dc converter |
| US6597159B2 (en) * | 2001-08-15 | 2003-07-22 | System General Corp. | Pulse width modulation controller having frequency modulation for power converter |
-
2004
- 2004-04-13 CN CN2004800427247A patent/CN1938924B/en not_active Expired - Fee Related
- 2004-04-13 WO PCT/CN2004/000341 patent/WO2005101624A1/en active Application Filing
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| Publication number | Publication date |
|---|---|
| WO2005101624A1 (en) | 2005-10-27 |
| CN1938924A (en) | 2007-03-28 |
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