CN1936502A - Optical fiber gyro front-set amplification and modification output circuit with signal differential amplification - Google Patents

Abstract

This invention discloses a fiber peg-top pre-amplification and modulation output circuit with signal differential amplification, in which, said pre-amplification circuit receives light strength voltage information output by a photoelectric detector and amplifies and filters it to be output to a digital signal processor composed of a differential amplifier, an operation amplifier and a 12-bit parallel AD converter, said modulation output circuit receives digital modulation information output by the digital signal processor to be amplified and output to a waveguide modulator composed of a 16-bit parallel DA converter, 10-bit serial DA converter, a primary voltage source, a differential amplifier and an operational amplifier. The voltage sphere of a ladder wave output by a modulation output circuit is 0V-+-4V and is designed in terms of specific double-differential current and voltage conversion circuit.

Description

Have preposition amplification of optical fibre gyro and modification output circuit that signal differential amplifies

Technical field

The present invention relates to a kind of preposition amplification and driving circuit, more particularly say, be meant a kind of preposition amplification of optical fibre gyro and modulation drive circuit with signal differential transmission and amplifying power.

Background technology

Existing optical fibre gyro is adopted the form of single-ended amplification mostly with pre-amplification circuit, use one-level or what operational amplifier that the output signal of PIN is carried out being transferred to AD converter after the single-ended amplification, be converted into digital signal, through after the digital signal processing, by the DA converter modulation signal is converted into analogue step ripple signal, uses multi-stage operational amplifier to be converted to differential signal and export to modulator.The device that sort circuit uses is more, the circuit complexity, and power consumption is bigger, and the device of the amplification of simulating signal and transmission process is more, wherein introduces noise easily; And since more employing single-ended amplification mode, make enlargement factor double in the time of need amplifying than difference, and not have to utilize fully the performance of existing AD converter and DA converter that it is bigger to be total to the film noise.

Use this preposition amplification and modulation drive circuit to make optical fibre gyro have bigger volume and power consumption, the components and parts of use are more; Because the artificial circuit part noise is bigger, the common film noise of AD converter input end is not effectively suppressed, and needs more digital filter in the signal processing, has increased the digital signal processing difficulty.Because single ended mode has been used in the output of modulation staircase waveform, and the mimic channel amplifying power is restricted, and has increased the burden that drives amplifying circuit, make gyro output staircase waveform produce skew easily.

Summary of the invention

The purpose of this invention is to provide a kind of preposition amplification of optical fibre gyro and modulation drive circuit with signal differential transmission and amplifying power, sort circuit belongs to the optical fibre gyro signal processing circuit.The output signal of PIN in the optical fibre gyro carried out that the one-level difference is amplified and every straight filtering.Through the laggard line number word of AD converter signal Processing, by the DA converter modulation signal is converted into analogue step ripple signal, use the one-level differential amplifier to be converted to the difference step signal and export to modulator.

The present invention is a kind of preposition amplification of optical fibre gyro and modification output circuit that signal differential amplifies that have, and described pre-amplification circuit receives the light intensity information of voltage of photodetector output, and it is amplified, exports to digital signal processor after the Filtering Processing; It is made up of differential amplifier, operational amplifier and 12 bit parallel AD converter; Described modification output circuit receives the digital modulation information by digital signal processor output, and exports to waveguide modulator after it is amplified; It is made up of 16 bit parallel DA converters, 10 bit serial DA converters, reference voltage source, differential amplifier and operational amplifier.

In the pre-amplification circuit of the testing circuit of optical fibre gyro, photodetector output PIN_OUTPUT signal gives high pass every straight filtering circuit, after the direct current that stack is produced by AD converter is raised voltage, carrying out difference by differential amplifier amplifies, the difference amplified output signal is carried out transferring to AD converter after the low-pass filtering and is carried out analog to digital conversion, generates digital signal output.PIN_OUTPUT signal process low-pass filtering and stack simultaneously amplified by PIN (photodetector) output voltage detection amplifying circuit after raising level, exports to the luminous power testing circuit then.

In the modification output circuit of the testing circuit of optical fibre gyro, parallel D is carried out the DA conversion with the optical fibre gyro digital signal output that receives, become the current signal of difference output, after process difference stream voltage conversion circuit flows and presses conversion, carry out difference by differential amplifier circuit and amplify, amplifier output signal is undertaken forming the output of optical fibre gyro modulation signal after the low-pass filtering by the difference low-pass filter circuit; Provide reference voltage by reference voltage generating circuit to 16 bit parallel DA converters, comprise reference voltage source, 10 bit serial DA converters and drive amplifying circuit.10 bit serial DA converters receive the numerical reference voltage signal that the input of optical fibre gyro digital signal provides, and according to the output level generation reference voltage of reference voltage source, export to the reference voltage input of parallel D behind the amplifying circuit of overdriving.

The advantage of preposition amplification of the present invention and modulation drive circuit is: (1) PIN output signal directly is converted to differential signal input AD converter, greatly reduces common film noise, has reduced power consumption and number of devices.(2) output staircase voltage scope is from 0V to ± 4V, and the output setting range is big.(3) distinctive pair of differential type current-to-voltage converting circuit design.Directly the differential current signal of DA output is converted into the voltage signal of difference output, does not have other intermediate link, saved device, enlarged dynamic range, reduced the noise introducing.(4) have PIN output signal testing circuit, can detect, be convenient to the gyro light path devices is compensated control the gyro optical path states.

Description of drawings

Fig. 1 is the structure diagram of testing circuit in the optical fibre gyro.

Fig. 2 is the structured flowchart of pre-amplification circuit among the present invention.

Fig. 3 is the structured flowchart of modification output circuit among the present invention.

Fig. 4 A is the circuit theory diagrams of pre-amplification circuit among the present invention.

Fig. 4 B is the circuit theory diagrams of modification output circuit among the present invention.

Embodiment

The present invention is described in further detail below in conjunction with drawings and Examples.

The present invention is a kind of preposition amplification of optical fibre gyro and modification output circuit that signal differential amplifies that have, and belongs to the testing circuit part in the optical fibre gyro.Testing circuit generally comprises pre-amplification circuit, digital signal processor, luminous power testing circuit, modification output circuit (seeing also shown in Figure 1), pre-amplification circuit receives the light intensity information of voltage of photodetector output, and it is amplified, exports to digital signal processor after the Filtering Processing; Modification output circuit receives the digital modulation information by digital signal processor output, and exports to waveguide modulator after it is amplified.The luminous power testing circuit is realized the monitoring to the light path performance.

See also shown in Figure 2ly, the pre-amplification circuit among the present invention is a kind ofly to have that signal differential amplifies and the optical fibre gyro of transmittability is used pre-amplification circuit, and this circuit has the monitoring capability of PIN output signal simultaneously.Preposition amplifier section among the present invention is made up of differential amplifier, operational amplifier and 12 bit parallel AD converter.Photodetector output PIN_OUTPUT signal gives high pass every straight filtering circuit, after the direct current that stack is produced by AD converter is raised voltage, carrying out difference by differential amplifier amplifies, the difference amplified output signal is carried out transferring to AD converter after the low-pass filtering and is carried out analog to digital conversion, generates digital signal output.PIN_OUTPUT signal process low-pass filtering and stack simultaneously amplified by PIN (photodetector) output voltage detection amplifying circuit after raising level, exports to the luminous power testing circuit then.

See also shown in Figure 3, modification output circuit among the present invention is that a kind of optical fibre gyro with the pressure conversion of the whole difference stream of signal and amplifying power drives amplifying circuit with staircase waveform, is made up of 16 bit parallel DA converters, 10 bit serial DA converters, reference voltage source, differential amplifier and operational amplifier.Parallel D is carried out the DA conversion with the optical fibre gyro digital signal output that receives, become the current signal of difference output, after process difference stream voltage conversion circuit flows and presses conversion, carry out difference by differential amplifier circuit and amplify, amplifier output signal is undertaken forming the output of optical fibre gyro modulation signal after the low-pass filtering by the difference low-pass filter circuit; Provide reference voltage by reference voltage generating circuit to 16 bit parallel DA converters, comprise reference voltage source, 10 bit serial DA converters and drive amplifying circuit.10 bit serial DA converters receive the numerical reference voltage signal that the input of optical fibre gyro digital signal provides, and according to the output level generation reference voltage of reference voltage source, export to the reference voltage input of parallel D behind the amplifying circuit of overdriving.

See also shown in Fig. 4 A, each terminal of pre-amplification circuit among the present invention is connected to: the PIN output signal PIN_OUTPUT end of optical fibre gyro is connected with high-pass filtering capacitor C 1, through after the high-pass filtering, signal transfers to 8 ends of differential amplifier U1 through resistance R 2; AD converter U2 produces raises 2 ends that level XADVREF signal is connected directly to differential amplifier U1, and the XADVREF signal is connected to filter capacitor C7 through being connected to 1 end of differential amplifier U1 after the resistance R 7 between XADVREF signal and the ground; Be parallel with resistance R 3 and capacitor C 9 between 8 ends of differential amplifier U1 and 5 ends, be parallel with resistance R 10 and capacitor C 10 between 1 end of differential amplifier U1 and 4 ends; 3 terminations of differential amplifier U1+5V power supply electrical level are connected to filter capacitor C11 between+5V power supply electrical level and the ground, 6 terminations of differential amplifier U1-5V power supply electrical level are connected to filter capacitor C12 between-5V power supply electrical level and the ground; 5 ends of differential amplifier U1 and 9 ends of AD converter U2 directly are connected with resistance R 5, be connected to filter capacitor C2 between 9 ends of AD converter U2 and the ground simultaneously, 4 ends of U1 and 10 ends of AD converter directly are connected with resistance R 13, are connected to filter capacitor C14 between 10 ends of AD converter U2 and the ground simultaneously; 2 terminations of U2+3.3V, 3 end ground connection, level XADVREF signal is raised in the output of 4 ends, 5 ends are connected with ground through capacitor C 20,5 ends are connected with ground through capacitor C 19, be parallel with capacitor C 16 between 5 ends and 6 ends, C17,7 ends and 12 terminations+3.3V, 8 ends, 11 ends and 14 end ground connection, 13 termination input clock signal XAD, 23 end ground connection, 24 terminations+3.3V, 24 ends and 23 ends also are connected with capacitor C 21 and C24,15 ends of U2,16 ends, 17 ends, 18 ends, 19 ends, 20 ends, 21 ends, 22 ends, 25 ends, 26 ends, 27 ends are connected output signal XADDT0～XADDT11 respectively with 28 ends.Be in series with resistance R 4 and R8 between PIN output signal PIN_OUTPUT of optical fibre gyro and 2 ends of operational amplifier U3, between R4, R8 and ground, be connected with filter capacitor C25, be parallel with resistance R 9 and capacitor C 26 between 2 ends of U3 and 1 end, 3 ends of U3 and external raising are connected with resistance R 6 between level signal XGK, be connected with capacitor C 8 between 3 ends of U3 and the ground; 8 terminations of U3+5V power supply electrical level are connected to filter capacitor C18 between+5V power supply electrical level and the ground, 4 terminations of U3-5V power supply electrical level are connected to filter capacitor C13 between-5V power supply electrical level and the ground; 1 end of U3 meets output signal GKA_OUT by resistance R 14, meets filter capacitor C22 between output signal GKA_OUT and the ground.

See also shown in Fig. 4 B, being connected to of each terminal in the modification output circuit among the present invention: digital signal XDADT15～XDADT0 is from 27 ends of 16 bit parallel DA converter U4,28 ends and 1 end～14 ends input, clock signal XDA is from the 26 ends input of U4,25 terminations of U4+5V supply voltage, be parallel with capacitor C 33 and C40 between+5V supply voltage and the ground, the 24 end ground connection of U4,23 terminations-5V supply voltage, be parallel with capacitor C 32 and C39 between-5V supply voltage and the ground, 22 ends of U4 have capacitor C 31 to be connected with-5V supply voltage, 21 ends of U4 have capacitor C 38 to be connected with-5V supply voltage, 20 ends of U4 are connected with 8 ends of differential amplifier U5, be connected to resistance R 22 between 20 ends of U4 and ground, 19 ends of U4 are connected with 1 end of differential amplifier U5, are connected to resistance R 21 between 19 ends of U4 and ground, 18 ends of U4 and 17 end ground connection, 16 ends of U4 are connected with reference voltage signal XADVREF by resistance R 26, reference voltage XADVREF and be parallel with capacitor C 35 and C36,15 ends of U4 pass through capacitor C 37 and are connected with ground.The 2 end ground connection of differential amplifier U5 are parallel with between 8 ends and 5 ends between resistance R 41 and capacitor C 34,1 ends and 4 ends and are parallel with resistance R 42 and capacitor C 41; 3 terminations of U5+5V power supply electrical level are connected to filter capacitor C42 between+5V power supply electrical level and the ground, 6 terminations of U5-5V power supply electrical level are connected to filter capacitor C43 between-5V power supply electrical level and the ground; 5 ends of U5 link to each other with output terminal XJTB1 by resistance R 45, are connected to filter capacitor C51 between output terminal XJTB1 and the ground, and 4 ends of U5 link to each other with output terminal XJTB2 by resistance R 44, are connected to filter capacitor C52 between output terminal XJTB2 and the ground.1 end of reference voltage source JP1 and 2 terminations+5V power supply electrical level, 5 end ground connection, be connected to filter capacitor C44 between+5V power supply electrical level and the ground, 7 ends and 8 ends of 3 ends of JP1 and 4 terminated serial DA converter U6, be connected to filter capacitor C47 between 7 ends of U6 and 8 ends and the ground, the 1 termination input digit control signal XDONE of U6, the 2 termination input digit control signal XLDDA of U6,3 ends of U6 and 10 terminations+5V power supply electrical level, the 15 termination input digit control signal XLDREG of U6, the 14 termination input clock signal XLDCLK of U6, the 13 termination input digit control signal XSDI of U6,12 ends of U6 and 9 end ground connection, 4 ends of U6 link to each other with 3 ends of operational amplifier U7 by resistance R 23, be connected to filter capacitor C48 between 3 ends of U7 and the ground, be connected to resistance R 25 between 2 ends of U7 and the ground, be parallel with resistance R 24 and capacitor C 49 between 2 ends of U7 and 1 end, 8 terminations of U7+5V power supply electrical level, be connected to filter capacitor C53 between+5V power supply electrical level and the ground, 4 terminations of U7-5V power supply electrical level are connected to filter capacitor C50 between-5V power supply electrical level and the ground; The 1 end output reference voltage signal XADVREF of U7 is to resistance R 26.

Preposition amplifier section in the present invention, differential operational amplifier is as follows to the output voltage computing formula:

$\left\{\begin{array}{c}\frac{V5-V8}{\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="A20061011354300131.png"\; state="\{\{state\}\}">R</figure-callout>}3}=\frac{V8-\mathrm{VIP}}{R2}\\ \frac{V4-V1}{\mathrm{<figure-callout\; id="10"\; label="R"\; filenames="A20061011354300131.png"\; state="\{\{state\}\}">R</figure-callout>}10}=\frac{V1-\mathrm{VIN}}{R7}\\ \mathrm{<figure-callout\; id="1"\; label="V"\; filenames="A20061011354300131.png"\; state="\{\{state\}\}">V</figure-callout>}1=\mathrm{<figure-callout\; id="8"\; label="V"\; filenames="A20061011354300131.png"\; state="\{\{state\}\}">V</figure-callout>}8\\ \mathrm{VIP}=\mathrm{HPF}\left(V_{\mathrm{PIN}\_\mathrm{OUT}}\right)\\ \mathrm{VIN}=V_{\mathrm{XADVREF}}\end{array}\right.$

Wherein, V _{PIN_OUT}Represent external optical fibre gyro PIN output signal PIN_OUTPUT, HPF (V _{PIN_OUT}) represent the PIN_OUTPUT signal is carried out every straight filtering; V _XADVREFThe 1V that expression AD converter U2 produces raises level.

Preposition amplifier section in the present invention, the voltage detecting amplifying circuit is as follows to the output voltage computing formula:

$\{\underset{\mathrm{<figure-callout\; id="2"\; label="V"\; filenames="A20061011354300131.png"\; state="\{\{state\}\}">V</figure-callout>}2\_1=V_{\mathrm{XGK}}}{\overset{\mathrm{VI}=\mathrm{LPF}\left(V_{\mathrm{PIN}\_\mathrm{OUTPUT}}\right)}{\frac{\mathrm{VI}-\mathrm{<figure-callout\; id="2"\; label="V"\; filenames="A20061011354300131.png"\; state="\{\{state\}\}">V</figure-callout>}2\_1}{\mathrm{<figure-callout\; id="8"\; label="R"\; filenames="A20061011354300131.png"\; state="\{\{state\}\}">R</figure-callout>}8}=\frac{\mathrm{<figure-callout\; id="2"\; label="V"\; filenames="A20061011354300131.png"\; state="\{\{state\}\}">V</figure-callout>}2\_1-\mathrm{<figure-callout\; id="1"\; label="V"\; filenames="A20061011354300131.png"\; state="\{\{state\}\}">V</figure-callout>}1\_1}{R9}}}$

Wherein, V _{PIN_OUT}Represent external optical fibre gyro PIN output signal PIN_OUTPUT, LPF (V _{PIN_OUT}) represent the PIN_OUTPUT signal is carried out low-pass filtering; V _XGKRepresent the external level signal of raising.

It is as follows to the output voltage computing formula that the staircase waveform of modification output circuit output of the present invention drives amplifying circuit:

The output voltage range of parallel D U4 is ± V, and output current scope is 0～10mA,

When U4 input digit amount is DAC_CODE

IOUTA＝IOUTFS·(DAC_CODE/65536)

IOUTB＝IOUTFS·(65536-DAC_CODE)/65536

Wherein IOUTFS is total output current of two differential ends $\mathrm{IOUTFS}=8\frac{\mathrm{XADVREF}}{\mathrm{<figure-callout\; id="26"\; label="R"\; filenames="A20061011354300131.png"\; state="\{\{state\}\}">R</figure-callout>}26}=\mathrm{IOUTA}+\mathrm{IOUTB}$

1.1K be the U4 internal resistance.

Can get:

$\left\{\begin{array}{c}\mathrm{IOUTA}=\frac{V5a-V8a}{R41}-\frac{V8a}{R22}+\frac{V8a}{1.1K}\\ \mathrm{IOUTB}=\frac{V4a-V1a}{R42}-\frac{V1a}{R21}+\frac{V1a}{1.1K}\\ \mathrm{IOUTA}+\mathrm{IOUTB}=8\frac{\mathrm{XADVREF}}{R26}\\ V1a=V8a\\ \end{array}\right.$

When adopting staircase waveform of the present invention to drive the amplifying circuit output voltage signal,, regulate the reference voltage signal that serial D/A converter U6 provides, the magnitude of voltage such as the table 1 of output terminal JTB1 and output terminal JTB2 output by parallel D U4 output maximum numeric value:

Table 1 staircase waveform drives the amplifying circuit output voltage meter

U6 input digit value	U4 reference voltage XDAVREF (unit: V)	V8 (V1) (unit: V)	VJTB1 VJTB2 (unit: V)
				180	0.36	-0.30	±0.50
280	0.59	-0.48	±0.78
				380	0.80	-0.66	±1.08

480	1.02	-0.84	±1.40
				580	1.24	-1.02	±1.70
680	1.44	-1.22	±2.00
				780	1.66	-1.38	±2.30
880	1.86	-1.60	±2.60
				980	2.06	-1.78	±2.90
A80	2.28	-1.96	±3.20
				B80	2.50	-2.14	±3.50
C80	2.72	-2.32	±3.80
				CC0	2.90	-2.50	±4.02

Wherein, VJTB1 and VJTB2 represent the magnitude of voltage of output terminal JTB1 and JTB2 output.As seen from the above table, can reach output voltage range be 0V～± design object of 4V.

Claims (4)

1, a kind of preposition amplification of optical fibre gyro and modification output circuit with signal differential amplification is characterized in that:

Described pre-amplification circuit receives the light intensity information of voltage of photodetector output, and it is amplified, exports to digital signal processor after the Filtering Processing; It is made up of differential amplifier, operational amplifier and 12 bit parallel AD converter;

Described modification output circuit receives the digital modulation information by digital signal processor output, and exports to waveguide modulator after it is amplified; It is made up of 16 bit parallel DA converters, 10 bit serial DA converters, reference voltage source, differential amplifier and operational amplifier.

2, preposition amplification according to claim 1 and modification output circuit, it is characterized in that: each terminal of pre-amplification circuit is connected to, the PIN output signal PIN_OUTPUT end of optical fibre gyro is connected with high-pass filtering capacitor C 1, through after the high-pass filtering, signal transfers to 8 ends of differential amplifier U1 through resistance R 2; AD converter U2 produces raises 2 ends that level XADVREF signal is connected directly to differential amplifier U1, and the XADVREF signal is connected to filter capacitor C7 through being connected to 1 end of differential amplifier U1 after the resistance R 7 between XADVREF signal and the ground; Be parallel with resistance R 3 and capacitor C 9 between 8 ends of differential amplifier U1 and 5 ends, be parallel with resistance R 10 and capacitor C 10 between 1 end of differential amplifier U1 and 4 ends; 3 terminations of differential amplifier U1+5V power supply electrical level are connected to filter capacitor C11 between+5V power supply electrical level and the ground, 6 terminations of differential amplifier U1-5V power supply electrical level are connected to filter capacitor C12 between-5V power supply electrical level and the ground; 5 ends of differential amplifier U1 and 9 ends of AD converter U2 directly are connected with resistance R 5, be connected to filter capacitor C2 between 9 ends of AD converter U2 and the ground simultaneously, 4 ends of U1 and 10 ends of AD converter directly are connected with resistance R 13, are connected to filter capacitor C14 between 10 ends of AD converter U2 and the ground simultaneously; 2 terminations of U2+3.3V, 3 end ground connection, level XADVREF signal is raised in the output of 4 ends, 5 ends are connected with ground through capacitor C 20,5 ends are connected with ground through capacitor C 19, be parallel with capacitor C 16 between 5 ends and 6 ends, C17,7 ends and 12 terminations+3.3V, 8 ends, 11 ends and 14 end ground connection, 13 termination input clock signal XAD, 23 end ground connection, 24 terminations+3.3V, 24 ends and 23 ends also are connected with capacitor C 21 and C24,15 ends of U2,16 ends, 17 ends, 18 ends, 19 ends, 20 ends, 21 ends, 22 ends, 25 ends, 26 ends, 27 ends are connected output signal XADDT0～XADDT11 respectively with 28 ends.Be in series with resistance R 4 and R8 between PIN output signal PIN_OUTPUT of optical fibre gyro and 2 ends of operational amplifier U3, between R4, R8 and ground, be connected with filter capacitor C25, be parallel with resistance R 9 and capacitor C 26 between 2 ends of U3 and 1 end, 3 ends of U3 and external raising are connected with resistance R 6 between level signal XGK, be connected with capacitor C 8 between 3 ends of U3 and the ground; 8 terminations of U3+5V power supply electrical level are connected to filter capacitor C18 between+5V power supply electrical level and the ground, 4 terminations of U3-5V power supply electrical level are connected to filter capacitor C13 between-5V power supply electrical level and the ground; 1 end of U3 meets output signal GKA_OUT by resistance R 14, meets filter capacitor C22 between output signal GKA_OUT and the ground.

3, preposition amplification according to claim 1 and modification output circuit, it is characterized in that: being connected to of each terminal in the modification output circuit: digital signal XDADT15～XDADT0 is from 27 ends of 16 bit parallel DA converter U4,28 ends and 1 end～14 ends input, clock signal XDA is from the 26 ends input of U4,25 terminations of U4+5V supply voltage, be parallel with capacitor C 33 and C40 between+5V supply voltage and the ground, the 24 end ground connection of U4,23 terminations-5V supply voltage, be parallel with capacitor C 32 and C39 between-5V supply voltage and the ground, 22 ends of U4 have capacitor C 31 to be connected with-5V supply voltage, 21 ends of U4 have capacitor C 38 to be connected with-5V supply voltage, 20 ends of U4 are connected with 8 ends of differential amplifier U5, be connected to resistance R 22 between 20 ends of U4 and ground, 19 ends of U4 are connected with 1 end of differential amplifier U5, be connected to resistance R 21 between 19 ends of U4 and ground, 18 ends of U4 and 17 end ground connection, 16 ends of U4 are connected with reference voltage signal XADVREF by resistance R 26, reference voltage XADVREF is parallel with capacitor C 35 and C36 with ground, and 15 ends of U4 pass through capacitor C 37 and are connected with ground.The 2 end ground connection of differential amplifier U5 are parallel with between 8 ends and 5 ends between resistance R 41 and capacitor C 34,1 ends and 4 ends and are parallel with resistance R 42 and capacitor C 41; 3 terminations of U5+5V power supply electrical level are connected to filter capacitor C42 between+5V power supply electrical level and the ground, 6 terminations of U5-5V power supply electrical level are connected to filter capacitor C43 between-5V power supply electrical level and the ground; 5 ends of U5 link to each other with output terminal XJTB1 by resistance R 45, are connected to filter capacitor C51 between output terminal XJTB1 and the ground, and 4 ends of U5 link to each other with output terminal XJTB2 by resistance R 44, are connected to filter capacitor C52 between output terminal XJTB2 and the ground.1 end of reference voltage source JP1 and 2 terminations+5V power supply electrical level, 5 end ground connection, be connected to filter capacitor C44 between+5V power supply electrical level and the ground, 7 ends and 8 ends of 3 ends of JP1 and 4 terminated serial DA converter U6, be connected to filter capacitor C47 between 7 ends of U6 and 8 ends and the ground, the 1 termination input digit control signal XDONE of U6, the 2 termination input digit control signal XLDDA of U6,3 ends of U6 and 10 terminations+5V power supply electrical level, the 15 termination input digit control signal XLDREG of U6, the 14 termination input clock signal XLDCLK of U6, the 13 termination input digit control signal XSDI of U6,12 ends of U6 and 9 end ground connection, 4 ends of U6 link to each other with 3 ends of operational amplifier U7 by resistance R 23, be connected to filter capacitor C48 between 3 ends of U7 and the ground, be connected to resistance R 25 between 2 ends of U7 and the ground, be parallel with resistance R 24 and capacitor C 49 between 2 ends of U7 and 1 end, 8 terminations of U7+5V power supply electrical level, be connected to filter capacitor C53 between+5V power supply electrical level and the ground, 4 terminations of U7-5V power supply electrical level are connected to filter capacitor C50 between-5V power supply electrical level and the ground; The 1 end output reference voltage signal XADVREF of U7 is to resistance R 26.

4, preposition amplification according to claim 1 and modification output circuit is characterized in that: output staircase voltage scope be 0V～± 4V.

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