CN1925131B - Process for reducing surface reflection index in semiconductor Damascus copper - Google Patents
Process for reducing surface reflection index in semiconductor Damascus copper Download PDFInfo
- Publication number
- CN1925131B CN1925131B CN2005100294006A CN200510029400A CN1925131B CN 1925131 B CN1925131 B CN 1925131B CN 2005100294006 A CN2005100294006 A CN 2005100294006A CN 200510029400 A CN200510029400 A CN 200510029400A CN 1925131 B CN1925131 B CN 1925131B
- Authority
- CN
- China
- Prior art keywords
- layer
- damascus
- seconds
- packing material
- antireflection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Abstract
The invention relates to a method to lower a surface reflection rate in a Damascus copper process, which comprises the following steps: coating macromolecule organic compounds soluble in a development liquid as anti-reflection stuff materials on a through-hole medium layer after through-hole etching which penetrates an etching barrier layer, wherein the macromolecule organic compounds with a molecular weight between 30000 and 50000 include a macromolecule polymer containing carbon, hydrogen and oxygen, a volatile organic solvent, a photosensitive absorbing material, a material activating agent and a development-enhancing activating agent; together forming a multi-layer anti-reflection layer from an inorganic reflection layer and the anti-reflection layer materials through the exposure and development of the Damascus; then etching in a metal wire groove, removing the glue and cleaning to fulfill the Damascus production process.
Description
Technical field
The present invention relates to field of IC technique, particularly a kind of method that reduces surface reflectivity in the Damascus copper technology.
Background technology
Along with the continuous progress of integrated circuit fabrication process, it is more and more littler that the volume of semiconductor device is just becoming, and they be coupled together also difficult more.In in the past 30 years, semi-conductor industry circle all is with the material of aluminium as interface unit, but along with the dwindling of chip, industrial quarters needs thinner, thinner connection, and the high-ohmic of aluminium also more and more is difficult to meet demand.And under the situation of high density ultra large scale integrated circuit, high resistance causes electronics that " wire jumper " takes place easily, and near the device causing produces wrong on off state.That is to say, with aluminium as the chip of lead may produce can't with the function situation of prediction, stability is also relatively poor simultaneously.On so trickle circuit, the transmission signals speed of copper is faster and more stable than aluminium.
The metal connecting line of tradition integrated circuit is to make plain conductor in the etching mode of metal level, carries out the filling of dielectric layer, the chemico-mechanical polishing of dielectric layer then, repeats above-mentioned operation, and then successfully carries out the multiple layer metal stack.But when the material of plain conductor converts the lower copper of resistance aluminium to by aluminium since the dried quarter of copper difficulty comparatively, therefore new embedding technique is just very necessary concerning the processing procedure of copper.
Embedding technique is called Damascus technics again, and this technology is etching metallic channel on dielectric layer at first, and then fills metal, again metal is carried out metal mechanical polishing, repeats above-mentioned operation, and then successfully carries out the multiple layer metal stack.The main characteristics of embedding technique are the etching technics that does not need to carry out metal level, and these promotion and application to process for copper are very important.
Ic manufacturing technology has striden into the epoch of 130nm.Present most copper wirings are in
180 to the 130nm operation stage, and about 40% logical circuit production line can be used the copper Wiring technique.Arrived the 90nm operation stage, 90% semiconductor production line employing copper Wiring technique has then been arranged.Damascus mosaic technology that adopts Cu-CMP is present unique maturation and the copper graphical technology of successful Application in the IC manufacturing.
Multilayer interconnection CALCULATION OF CAPACITANCE formula:
Wherein, k is a dielectric constant; L is that plain conductor is long; T is the plain conductor degree of depth; W is the plain conductor width; ε
0Be permittivity of vacuum, by formula as seen, dielectric constant is low more, and electric capacity is more little.
Multilayer interconnection resistance-capacitance time delay computing formula:
Wherein, k is a dielectric constant; L is that plain conductor is long; T is the plain conductor degree of depth; W is the plain conductor width; ε
0Be permittivity of vacuum; ρ is the metallic resistance rate, and by formula as seen, dielectric constant is low more, and resistance is more little, and multilayer interconnection resistance-capacitance time delay is also short more.
The surface reflectivity computing formula:
n
b-low dielectric material surface refractive index, k
b-low dielectric material surface extinction coefficient
n
r-photoresist surface refractive index, k
r-photoresist surface dulling coefficient
For photoetching process, the control of good surface reflectivity can effectively reduce incident light and catoptrical relevant problem, promptly reduces standing wave effect, come therefrom, litho pattern understand be improved significantly.
The standing wave computing formula:
S=4 (R
TopR
Bot)
0.5E
-KD(formula 4)
R
Bot-dielectric material surface reflectivity, R
Top-photoresist surface reflectivity, k-photoresist extinction coefficient, D-photoresist thickness
The surface reflectivity that formula 4 is low as can be known can effectively reduce standing wave effect, improves image quality.
The surface reflection problem of metallic copper is very serious, in order to obtain good figure control performance and technology stability, must be low as much as possible to the control of the surface reflectivity of exposure wavelength, and dwindling along with live width, reflectivity also requires more and more lower, and is more and more stricter.And in order to realize high-resolution demand, the optical numerical value aperture of exposure sources can be increasing, and generally speaking, after numerical aperture was greater than 0.75, because the angle that light tilts is bigger, individual layer anti-reflecting layer traditionally can not satisfy the demand of use.
Summary of the invention
The object of the present invention is to provide a kind of method that reduces surface reflectivity in the Damascus copper technology, thereby reduce surface reflectivity by refractive index and the extinction coefficient of adjusting antireflecting coating.
The method of surface reflectivity comprises the steps in the described reduction semiconductor Damascus copper technology
(1) at etching barrier layer surface deposition Damascus through hole dielectric layer;
(2) the top antireflecting inorganic layer of deposition Damascus through hole dielectric layer;
(3) at antireflecting inorganic layer surface coated light sensitive material, carry out photoetching, via etch, cleaning, wherein, via etch penetrates etching barrier layer;
(4) in inorganic anti-reflective laminar surface and etching through hole the coating molecular weight between 30000 to 50000 and dissolve in developer solution, comprise carbon, hydrogen, oxygen high molecular polymer, volatile organic solvent, photosensitive absorbing material, material activity agent and develop strengthen activating agent macromolecule organic as the antireflection packing material, baking;
(5) coating individual layer light sensitive material on anti-reflecting layer packing material surface develops, dissolving bottom anti-reflective packing material, and laggard row metal metallic channel etching is finished in photoetching;
(6) the described individual layer light sensitive material of stripper surface that removes photoresist, the antireflection packing material cleans, and finishes the manufacturing process flow in Damascus.
In the technical scheme provided by the present invention, coating dissolves in the macromolecule organic of developer solution as the antireflection packing material to the through hole dielectric layer after finishing the via etch that penetrates etching barrier layer, through Damascus exposure imaging, make antireflecting inorganic layer and antireflection packing material form the multi-layer anti-reflection layer jointly, carry out then plain conductor groove etched, remove photoresist, clean, finish the manufacturing process in Damascus.
Form the dielectric material of described antireflecting inorganic layer, its raw material source is helium, neon, argon, krypton or xenon class inert gas, carbon monoxide, carbon dioxide, sulfur dioxide, silane, methane or nitrogen, its thickness is that 30nm is to 120nm, each processing time is 50 seconds to 500 seconds, air pressure be 5 hold in the palm 50 the holder, power is 100 watts to 500 watts, temperature is 150 ℃ to 400 ℃, and product can be a silicon oxynitride, carborundum, silicon nitride, silica, or low-density medium material, described inorganic anti-reflective layer thickness are that 30nm is to 120nm.
Described volatile organic solvent comprises the volatilizable organic solvent of ketone, ethers, alkanes or lipid.
During coating antireflection packing material, each coating thickness be 30nm to 120nm, baking temperature is 150 ℃ to 400 ℃, stoving time is 30 seconds to 200 seconds.
Described individual layer light sensitive material is by ketone, ethers, and alkanes organic solvent and photosensitive cross-linking resin constitute, and molecular weight is between 85000 to 150000.
Each coating dosage of described individual layer light sensitive material or packing material is that 1.5ml is to 5ml; Each baking temperature is 60 ℃ to 250 ℃, and stoving time is 10 seconds to 120 seconds.
The present invention adopts antireflecting inorganic layer to cooperate in Damascus copper technology and dissolves in the macromolecule organic of developer solution as the antireflection packing material, after Damascus exposure, developing, the common multi-layer anti-reflection layer that forms, control refractive index and extinction coefficient by optimizing the multi-layer anti-reflection layer, realization has improved the qualification rate of Damascus manufacturing process to the effect of specific wavelength zero optical reflection.
Description of drawings
Fig. 1 is a coating individual layer light sensitive material schematic diagram;
Fig. 2 is the via etch schematic diagram;
Fig. 3 is a coating packing material schematic diagram;
Fig. 4 is a coating photaesthesia reagent schematic diagram;
Fig. 5 is the light-sensitive material exposure, light-sensitive material and bottom organic antireflecting packing material development schematic diagram;
Fig. 6 is the groove etched schematic diagram of plain conductor;
Fig. 7 is the schematic diagram that removes photoresist.
Label declaration:
1: Damascus bottom through hole dielectric layer 2: antireflecting inorganic layer
3: Damascus bottom through hole dielectric layer surface coated individual layer light sensitive material
4: bottom etching barrier layer 5: bottom anti-reflective through hole packing material
Embodiment
Now in conjunction with the accompanying drawings, the specific embodiment of the present invention is described in further detail:
At first, deposition Damascus bottom through hole dielectric layer 1 and the anti-layer 2 of deposition inorganic anti, the dielectric material of the anti-layer 2 of inorganic anti, its raw material source is a helium, neon, argon, krypton or xenon class inert gas, carbon monoxide, carbon dioxide, sulfur dioxide, silane, methane, or nitrogen, these gases can be common reactions, it also can be the manufacturing of subparticipation explained hereafter, each processing time can be 50 seconds, 100 seconds, 150 seconds, 200 seconds, 250 seconds, 300 seconds, 350 seconds, 400 seconds, 450 seconds or 500 seconds, air pressure is 5 holders, 10 holders, 30 holders or 50 holders, power may be selected to be 100 watts, 150 watts or 300 watts, temperature may be selected to be 150 ℃, 175 ℃, 200 ℃, 250 ℃, 300 ℃, 350 ℃ or 400 ℃, product can be a silicon oxynitride, carborundum, silicon nitride, silica, or the low-density medium material, the thickness that forms antireflecting inorganic layer is 30 nanometers, rice in 40,50 nanometers, 60 nanometers, rice in 70, rice in 80, rice in 90,100 nanometers, 110 nanometers or 120 nanometers.Can effectively reduce inorganic anti-reflective dielectric material surface refractive index, extinction coefficient by above-mentioned technology.
Secondly, as shown in Figure 1,, carry out photoetching at these antireflecting inorganic layer 2 surface coated individual layer light sensitive materials 3.Individual layer light sensitive material 3 is by ketone, ethers, and alkanes organic solvent and photosensitive cross-linking resin constitute, and molecular weight is between 85000 to 150000.
Secondly, as shown in Figure 2, in this Damascus bottom through hole dielectric layer 1 enterprising work hole etching, cleaning.Wherein, this etching penetrates bottom etching barrier layer 4.
Secondly, as shown in Figure 3, coating antireflection packing material 5 in these antireflecting inorganic layer 2 surfaces and etching through hole, baking.Packing material 5 is the macromolecule organics that dissolve in developer solution, has the anti-reflecting layer function.Macromolecule organic comprises carbon, hydrogen, oxygen high molecular polymer, volatile organic solvent, photosensitive absorbing material, material activity agent and develops and strengthen activating agent that molecular weight is between 30000 to 50000.Wherein, the volatile organic solvent comprises the volatilizable organic solvent of ketone, ethers, alkanes or lipid.During coating antireflection packing material 5, coating dosage can be 1.5ml or 2ml, each coating thickness can be 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 110nm or 120nm, baking temperature can be 60 ℃, 80 ℃, 120 ℃, 150 ℃, 180 ℃, 200 ℃ or 240 ℃, and stoving time can be 60 seconds, 80 seconds, 100 seconds, 120 seconds or 200 seconds.
Secondly, as shown in Figure 4, at antireflection packing material 5 surface coated individual layer light sensitive materials 3, baking.Coating dosage may be selected to be 2ml, 3ml, 4ml or 5ml; In the temperature of temperature baking may be selected to be 90 ℃, 100 ℃, 120 ℃ or 140 ℃, stoving time may be selected to be 60 seconds, 80 seconds, 100 seconds or 120 seconds.Individual layer light sensitive material 3 is by ketone, ethers, and the crosslinked resin of alkanes organic solvent and silicon atoms group constitutes, and molecular weight is between 85000 to 150000.
Secondly, as shown in Figure 5, Damascus exposure imaging, dissolving bottom anti-reflective packing material 5 makes antireflecting inorganic layer 2 and antireflection packing material 5 form the multi-layer anti-reflection layers jointly.Control refractive index and extinction coefficient by optimizing the multi-layer anti-reflection layer, reach effect specific wavelength zero optical reflection.
Secondly, as shown in Figure 6, in the enterprising row metal metallic channel of this metallic channel dielectric layer etching.
At last, as shown in Figure 7, the stripper surface individual layer light sensitive material 3 that removes photoresist, antireflecting inorganic layer 2 and the packing material of staying in the through hole 5 clean, and finish the manufacturing process flow in this Damascus.
In the above-mentioned technology, under each selected different parameters condition, all obtain good result.
The present invention adopts antireflecting inorganic layer to cooperate in Damascus copper technology and dissolves in the macromolecule organic of developer solution as the antireflection packing material, after Damascus exposure, developing, the common multi-layer anti-reflection layer that forms, control refractive index and extinction coefficient by optimizing the multi-layer anti-reflection layer, realization has improved the qualification rate of Damascus manufacturing process to the effect of specific wavelength zero optical reflection.
Claims (7)
1. a method that reduces surface reflectivity in the Damascus copper technology is characterized in that comprising the steps:
(1) at etching barrier layer surface deposition Damascus through hole dielectric layer;
(2) antireflecting inorganic layer at deposition through hole dielectric layer top, Damascus;
(3) at antireflecting inorganic layer surface coated light sensitive material, carry out photoetching, via etch, cleaning, wherein, via etch penetrates etching barrier layer;
(4) in inorganic anti-reflective laminar surface and etching through hole the coating molecular weight between 30000 to 50000 and dissolve in developer solution, comprise carbon, hydrogen, oxygen high molecular polymer, volatile organic solvent, photosensitive absorbing material, material activity agent and develop strengthen activating agent macromolecule organic as the antireflection packing material, baking;
(5) at described antireflection packing material surface coated individual layer light sensitive material, develop, dissolving bottom anti-reflective packing material, laggard row metal metallic channel etching is finished in photoetching;
(6) the described individual layer light sensitive material of stripper surface that removes photoresist, the antireflection packing material cleans, and finishes the manufacturing process flow in Damascus;
In the semiconductor Damascus copper technology, coating dissolves in the macromolecule organic of developer solution as the antireflection packing material to the through hole dielectric layer after finishing the via etch that penetrates etching barrier layer, through Damascus exposure imaging, make antireflecting inorganic layer and antireflection packing material form the multi-layer anti-reflection layer jointly, carry out then plain conductor groove etched, remove photoresist, clean, finish the manufacturing process in Damascus.
2. the method for surface reflectivity in the reduction Damascus copper technology as claimed in claim 1, it is characterized in that: the dielectric material that forms described antireflecting inorganic layer, its raw material source is a helium, neon, argon, krypton or xenon, carbon monoxide, carbon dioxide, sulfur dioxide, silane, methane, or nitrogen, common reaction of described raw material source gas or subparticipation explained hereafter are made, each processing time is 50 seconds to 500 seconds, air pressure be 5 hold in the palm 50 the holder, power is 100 watts to 500 watts, temperature is 150 ℃ to 400 ℃, product is the low-density medium material, and described inorganic anti-reflective layer thickness is that 30nm is to 120nm.
3. the method for surface reflectivity in the reduction Damascus copper technology as claimed in claim 1, it is characterized in that: the dielectric material that forms described antireflecting inorganic layer, its raw material source is a helium, neon, argon, krypton or xenon, carbon monoxide, carbon dioxide, sulfur dioxide, silane, methane, or nitrogen, common reaction of described raw gas or subparticipation explained hereafter are made, each processing time is 50 seconds to 500 seconds, air pressure be 5 hold in the palm 50 the holder, power is 100 watts to 500 watts, temperature is 150 ℃ to 400 ℃, product is a silicon oxynitride, carborundum, silicon nitride or silica, described inorganic anti-reflective layer thickness are that 30nm is to 120nm.
4. the method for surface reflectivity in the reduction Damascus copper technology as claimed in claim 1 is characterized in that: described volatile organic solvent comprises the volatilizable organic solvent of ketone, ethers, alkanes or lipid.
5. the method for surface reflectivity in the reduction Damascus copper technology as claimed in claim 1, it is characterized in that: during coating antireflection packing material, each coating thickness be 30nm to 120nm, baking temperature is 150 ℃ to 400 ℃, stoving time is 30 seconds to 200 seconds.
6. the method for surface reflectivity in the reduction Damascus copper technology as claimed in claim 1 is characterized in that: described individual layer light sensitive material is by ketone, ethers, and alkanes organic solvent and photosensitive cross-linking resin constitute, and molecular weight is between 85000 to 150000.
7. the method for surface reflectivity in the reduction Damascus copper technology as claimed in claim 1 is characterized in that: each coating dosage of described individual layer light sensitive material or packing material is that 1.5ml is to 5ml; Each baking temperature is 60 ℃ to 250 ℃, and stoving time is 10 seconds to 120 seconds.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2005100294006A CN1925131B (en) | 2005-09-02 | 2005-09-02 | Process for reducing surface reflection index in semiconductor Damascus copper |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2005100294006A CN1925131B (en) | 2005-09-02 | 2005-09-02 | Process for reducing surface reflection index in semiconductor Damascus copper |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1925131A CN1925131A (en) | 2007-03-07 |
| CN1925131B true CN1925131B (en) | 2011-04-06 |
Family
ID=37817695
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2005100294006A Expired - Fee Related CN1925131B (en) | 2005-09-02 | 2005-09-02 | Process for reducing surface reflection index in semiconductor Damascus copper |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1925131B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101308330B (en) * | 2007-05-16 | 2010-12-15 | 上海华虹Nec电子有限公司 | Two time graph exposure method utilizing developing filler material |
| CN101452213B (en) * | 2007-12-06 | 2011-03-23 | 上海华虹Nec电子有限公司 | Secondary image exposure method of contact hole |
| CN102881650B (en) * | 2012-10-22 | 2017-12-15 | 上海集成电路研发中心有限公司 | A kind of preparation method of double damask structure |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5882996A (en) * | 1997-10-14 | 1999-03-16 | Industrial Technology Research Institute | Method of self-aligned dual damascene patterning using developer soluble arc interstitial layer |
| US6319821B1 (en) * | 2000-04-24 | 2001-11-20 | Taiwan Semiconductor Manufacturing Company | Dual damascene approach for small geometry dimension |
| US6455416B1 (en) * | 2000-10-24 | 2002-09-24 | Advanced Micro Devices, Inc. | Developer soluble dyed BARC for dual damascene process |
| CN1484094A (en) * | 2002-07-23 | 2004-03-24 | ���ǵ�����ʽ���� | Photoresist developer-soluble organic bottom antireflective composition and photo lothography and etching process using same |
| CN1632942A (en) * | 2004-12-23 | 2005-06-29 | 上海华虹（集团）有限公司 | Technique for porous filling damascene using light sensitive material |
| CN1649106A (en) * | 2004-12-23 | 2005-08-03 | 上海华虹（集团）有限公司 | Process for forming optic anti-reflective layer by treating low dielectric material surface |
-
2005
- 2005-09-02 CN CN2005100294006A patent/CN1925131B/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5882996A (en) * | 1997-10-14 | 1999-03-16 | Industrial Technology Research Institute | Method of self-aligned dual damascene patterning using developer soluble arc interstitial layer |
| US6319821B1 (en) * | 2000-04-24 | 2001-11-20 | Taiwan Semiconductor Manufacturing Company | Dual damascene approach for small geometry dimension |
| US6455416B1 (en) * | 2000-10-24 | 2002-09-24 | Advanced Micro Devices, Inc. | Developer soluble dyed BARC for dual damascene process |
| CN1484094A (en) * | 2002-07-23 | 2004-03-24 | ���ǵ�����ʽ���� | Photoresist developer-soluble organic bottom antireflective composition and photo lothography and etching process using same |
| CN1632942A (en) * | 2004-12-23 | 2005-06-29 | 上海华虹（集团）有限公司 | Technique for porous filling damascene using light sensitive material |
| CN1649106A (en) * | 2004-12-23 | 2005-08-03 | 上海华虹（集团）有限公司 | Process for forming optic anti-reflective layer by treating low dielectric material surface |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1925131A (en) | 2007-03-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TW434827B (en) | Silicon oxynitride cap for fluorinated silicate glass film in intermetal dielectric semiconductor fabrication | |
| US6103456A (en) | Prevention of photoresist poisoning from dielectric antireflective coating in semiconductor fabrication | |
| US6787452B2 (en) | Use of amorphous carbon as a removable ARC material for dual damascene fabrication | |
| US10504833B2 (en) | Interconnection structure and manufacturing method thereof | |
| US9046781B2 (en) | Structure and method for reflective-type mask | |
| US20060128156A1 (en) | Self-patterning of photo-active dielectric materials for interconnect isolation | |
| WO2007064499A1 (en) | Self-aligned pitch reduction | |
| US20090215272A1 (en) | Double mask self-aligned double patterning technology (sadpt) process | |
| US6410421B1 (en) | Semiconductor device with anti-reflective structure and methods of manufacture | |
| KR101562408B1 (en) | Line width roughness control with arc layer open | |
| US20060068592A1 (en) | Method for etch-stop layer etching during damascene dielectric etching with low polymerization | |
| CN1925130B (en) | Process for reducing surface reflection index in semiconductor Damascus copper | |
| CN1925131B (en) | Process for reducing surface reflection index in semiconductor Damascus copper | |
| CN100570852C (en) | Form the method for the dual-damascene structure of no-etch stop layer | |
| US6664177B1 (en) | Dielectric ARC scheme to improve photo window in dual damascene process | |
| US6080654A (en) | Simplified method of forming self-aligned vias in a semiconductor device | |
| US20060068594A1 (en) | Method for line etch roughness (LER) reduction for low-k interconnect damascene trench etching | |
| CN101567331A (en) | Developing method used in process of fabricating metal interconnected connecting hole structure | |
| CN1855418B (en) | Use of Dimashg process in production of integrated circuits | |
| TW200402840A (en) | Method and structure of interconnection with anti-reflection coating | |
| US20040180295A1 (en) | Method for fabricating a dual damascene structure using a single photoresist layer | |
| US6596623B1 (en) | Use of organic spin on materials as a stop-layer for local interconnect, contact and via layers | |
| KR100418121B1 (en) | Method For Fabricating Semiconductor Devices | |
| Li | Why CMP | |
| KR100688710B1 (en) | Method for etching anti-reflective coating |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110406 Termination date: 20170902 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |