CN1924592A - Detecting method and equipment for digital wave filter - Google Patents
Detecting method and equipment for digital wave filter Download PDFInfo
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- CN1924592A CN1924592A CN 200610062699 CN200610062699A CN1924592A CN 1924592 A CN1924592 A CN 1924592A CN 200610062699 CN200610062699 CN 200610062699 CN 200610062699 A CN200610062699 A CN 200610062699A CN 1924592 A CN1924592 A CN 1924592A
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Abstract
This invention relates to signal filter test method and device in signal process field, wherein the method comprises the following steps: a, generating one trigger signal when receiving the indication; b, when receiving trigger signal, generating one unit impulse sequence according to the matched range; c, inputting the said unit laser sequence to the digital filter; d, when receiving the trigger signal, storing the said unit sequence digital filter result; e, analyzing whether the digital filter is normal according to the said filter result.
Description
Technical field
The invention belongs to digital processing field, relate in particular to a kind of detection method and device of digital filter.
Background technology
Digital filtering is widely used in the digital processing field, cooperates the common complicated digital signal processing function that realizes with other algorithm process.Digital filter can be expressed as form:
y(n)＝b(1)*x(n)+b(2)*x(n-1)+...+b(nb+1)*x(n-nb)-a(2)*y(n-1)-...-a(na+1)*y(n-na)
Wherein, n-1 is the exponent number of digital filter, and (FiniteImpulse Response, (Infinite ImpulseResponse, IIR) filter construction all is suitable for following formula in FIR) wave filter and endless unit impulse response to limit for length's unit impulse response is arranged.
In following formula, when a (2)～a (na+1) was zero, y (n) can be expressed as
y(n)＝b(1)*x(n)+b(2)*x(n-1)+...+b(nb+1)*x(n-nb)，
Only the input signal " x (n)～x (n-nb) " with limited is relevant for output signal y this moment (n), and the wave filter with this structure is the FIR wave filter, and wherein " b (1)～b (nb+1) " is the coefficient of FIR wave filter.
Digital filter can be at digital signal processor (Digital Signal Processor, DSP), field programmable gate array (Field Programmable Gate Array, FPGA) or special IC (Application Specific Integrated Circuit, ASIC) etc. realize in the device that its needs certain storage space with the memory filter coefficient.If wish that Filtering Processing process median filter coefficient is reconfigurable, usually filter coefficient is stored in random access memory (Random-Access Memory, RAM) in, can unexpectedly do not rewritten if wish filter coefficient to fix, usually filter coefficient is solidificated in ROM (read-only memory) (Read-Only Memory, ROM) in.The RAM of storage filter factor or coefficients R AM or the coefficients R OM that ROM abbreviates wave filter usually as.
Digital filter relates to more multiply-add operation unit and coefficients R AM/ROM hardware resource as the basic processing unit of signal Processing, so system is when breaking down, and whether the work that often needs to detect digital filter is normal.Whether digital filter work generally includes normally among the coefficients R AM/ROM whether stored filter coefficients is rewritten unusually or destruction and multiply-add operation normal two aspects the most basic whether.
In order to confirm whether stored filter coefficients is rewritten unusually or destroyed among the coefficients R AM/ROM, as shown in Figure 1, can in digital filter 11, increase a coefficient and read control module 111, receive that CPU is through CPU (central processing unit) (Central Processing Unit, CPU) interface processing module 12 issue querying command the time coefficient of storage among the coefficients R AM (or ROM) 112 read out and is saved in the reservation storage unit 13 in the chip, by CPU (upper system) inquiry with analyze.In this scheme, because the memory cell structure of storage RAM/ROM is diversified in the digital filter, different digital filtering designs realize having different storage organization forms, increased the design complexities that coefficient reads control module 111, and different digital filters may need to design respectively different coefficients and read control module, to expend a large amount of resources of chip and manpower, increase design cost.
For the processing that detects digital filter whether normal, as shown in Figure 2, CPU controls selector switchs 22 by cpu i/f processing module 24 and selects the signal and the normal input signal x (n) of Gauss's white noise characteristic of detection data generating module 21 generations to be input to digital filter 23, and y (n) carries out spectrum analysis investigation filter effect by the filtering of digital filter 23 being exported as a result.
In this scheme, the detection signal that produce Gauss's white noise characteristic need expend more DSP or FPGA resource usually, and carries out the instrument that spectrum analysis will depend on special use usually, and cost is higher when detection or orientation problem.
Summary of the invention
The object of the present invention is to provide a kind of detection method of digital filter, be intended to solve prior art and when detecting digital filter, need expend a large amount of resources of chip, detect or the high problem of positioning problems realization cost.
Another object of the present invention is to provide a kind of pick-up unit of digital filter.
The present invention is achieved in that a kind of detection method of digital filter, and described method comprises the steps:
A. when receiving that detecting startup indicates, produce a trigger pip;
B. when receiving described trigger pip, according to unit impulse sequence of impulse amplitude generation of configuration;
C. with described unit impulse sequence input digit wave filter;
D. when receiving described trigger pip, store described unit impulse sequence is handled output through digital filter filtering result;
E. whether the work according to described filtering interpretation of result digital filter is normal.
Before described step D, described method further comprises:
T. according to the time delay value and the described trigger pip of configuration, produce the trigger pip after delaying time.
Described step T specifically comprises:
T1. when receiving described trigger pip, begin counting;
T2. the trigger pip after output is delayed time when count value reaches the time delay value of configuration.
Described step e specifically comprises:
If the filtering result of described unit impulse sequence is correct, and as the linear filtering result who obtains when changing the amplitude of described unit impulse sequence also linear change, then digital filter is working properly.
A kind of pick-up unit of digital filter, described device comprises:
The trigger pip generation unit is used for producing a trigger pip when receiving that detecting startup indicates;
Detect the excited data generation unit, be used for when receiving described trigger pip, producing a unit impulse sequence according to the impulse amplitude that disposes;
Selector switch is used for selecting described unit impulse sequence input digit wave filter when described unit impulse sequence produces;
Storage processing unit is used for storing described unit impulse sequence is handled output through digital filter filtering result when receiving described trigger pip; And
Detect the control analysis unit, be used for output and detect control signal, receive the filtering result that described storage processing unit reports, and whether normal according to the work of described filtering interpretation of result digital filter.
Described detection control analysis unit comprises:
Detection starts module, is used to send detect start indication, and described detection startup indication is sent to described trigger pip generation unit;
The amplitude configuration module is used to dispose the impulse amplitude of described unit impulse sequence, and the impulse amplitude of configuration is sent to described detection excited data generation unit; And
Whether failure analysis module is used for according to the work of described filtering interpretation of result digital filter normal.
Described detection control analysis unit further comprises:
The time-delay configuration module is used to dispose described storage processing unit gradation and stores described filtering result's time delay value.
Described device further comprises:
The time-delay trigger control unit is used for according to described time delay value and described trigger pip, produces the trigger pip after delaying time.
Described time-delay trigger control unit comprises:
Delay counter is used for beginning counting when receiving described trigger pip; And
The storage control signal generator, the trigger pip when being used for count value at described delay counter and reaching the time delay value of described time-delay configuration module configuration after the output time-delay.
Described device further comprises:
The cpu i/f processing unit is used for carrying out adaptive to the data transmission between described detection control analysis unit and described trigger pip generation unit, detection excited data generation unit or the storage processing unit.
Whether the present invention is normal by the work that the filtering result who detects the unit impulse sequence detects digital filter, and implementation is simple, and consumes resources is few, realizes that cost is low.Simultaneously, the mode of using time-delay to trigger reduces the requirement to storage space, has reduced design cost.Be particularly useful in the system that detectability has relatively high expectations, can detect and locate at fault in-situ.
Description of drawings
Fig. 1 is the structural drawing of the digital filter pick-up unit that provides in the prior art one;
Fig. 2 is the structural drawing of the digital filter pick-up unit that provides in the prior art two;
Fig. 3 is the realization flow figure of the digital filter detection method that provides in the first embodiment of the invention;
Fig. 4 is the realization flow figure of the digital filter detection method that provides in the second embodiment of the invention;
Fig. 5 is the structural drawing of the digital filter pick-up unit that provides in the first embodiment of the invention;
Fig. 6 is the structural drawing of the digital filter pick-up unit that provides in the second embodiment of the invention.
Embodiment
In order to make purpose of the present invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
The present invention is based on the principle that the transport function of linear system can obtain by unit impulse response, by increasing an impulse sequence, whether normal according to the output of the digital filter of the preserving work of determination number character filter as a result at the digital filter input end.
With the FIR wave filter is example, and to digital filter input unit impulse sequence δ (n), unit impulse sequence δ (n) can be represented by the formula:
δ (n)=1, (when n=0);
δ (n)=0, (when n ≠ 0).
It has represented a unit pulse sequence that only is carved with input (importing non-vanishing) when n=0 ... 0001000....Wherein " 1 " is the process normalized, in actual design because accuracy requirement, usually need represent with the binary number of many bits, the fraction part that for example can define binary number is 8, then binary one 00000000 (being metric 256) indicating impulse amplitude is " 1 ", so, metric 192 just represent the impulse amplitude of " 0.75 ", and its impulse sequence decimally is expressed as ..000192000....
When Filtering Processing, unit impulse sequence δ (n) and coefficient " b (1)～b (n-1) " process convolution algorithm can obtain following one group of output:
y(1)＝b(1)，y(2)＝b(2)，...，y(nb+1)＝b(nb+1)；
Can see that the y of output (1)～y (nb+1) is exactly the coefficient of this FIR wave filter.Can judge also simultaneously that if change the amplitude proportional of unit impulse sequence δ (n), the output result of digital filter also will correspondingly linearly change so.Can detect following two aspects thus:
If the filtering result of 1 unit impulse sequence can obtain correct filter coefficient, illustrate that the coefficients R AM/ROM of wave filter is not rewritten or destroys.
If the 2 linear amplitudes that change the unit impulse sequence, the also corresponding linear change of the wave filter result who obtains illustrates that the base conditioning function of wave filter is normal.
The testing process of the wave filter of realizing based on above-mentioned principle that provides in the first embodiment of the invention is provided Fig. 3, and details are as follows:
In step S301, when starting indication, the detection of receiving CPU produces a trigger pip;
In step S302, when receiving trigger pip, according to an impulse amplitude generation unit impulse sequence δ (n) of CPU configuration;
In step S303, with unit impulse sequence δ (n) input filter, the filtering result of output unit impulse sequence δ (n) after filter process;
In step S304, when receiving trigger pip, storage cell impulse sequence δ (n) is through the wave filter result of filter process output, and the wave filter result is reported CPU, judges according to above-mentioned principle whether wave filter breaks down by CPU.
In the said process, when the data volume of preserving when needs is bigger, resource for the storage space of saving required reservation, in second embodiment of the invention, can be by changing the time delay configuration, the mode that adopts repeatedly triggering to collect realizes the gradation storage of data, thereby saves the storage space resource of required reservation, realization flow as shown in Figure 4, details are as follows:
In step S401, when starting indication, the detection of receiving CPU produces a trigger pip;
In step S402, when receiving trigger pip, according to an impulse amplitude generation unit impulse sequence δ (n) of CPU configuration;
In step S403, with unit impulse sequence δ (n) input filter, the filtering result of output unit impulse sequence δ (n) after filter process;
In step S404, produce trigger pip after the time-delay as storage control signal according to the time delay of CPU configuration and trigger pip, can be when receiving trigger pip, to begin counting during specific implementation, output storage control signal when count value reaches the time delay value of CPU configuration;
In step S405, when receiving storage control signal, storage cell impulse sequence δ (n) is through the wave filter result of filter process output, and the wave filter result is reported CPU, judges by CPU whether wave filter breaks down.
According to above-mentioned realization flow, as long as the input end at wave filter increases a controlled flip flop equipment, be used for the unit impulse sequence δ (n) that the generation amplitude can be provided with, and just can judge in the output result that the suitable moment is preserved wave filter whether wave filter breaks down.
The structure of the filter detection device that provides in the first embodiment of the invention is provided Fig. 5, detect control analysis unit 37 and be arranged at CPU, whether output detects control signal, receives the filtering result that storage processing unit 36 reports, and normal according to the work of filtering interpretation of result digital filter.When needs detect, detect startup module 371 and send detection startup indication, trigger pip generation unit 31 receives detection and starts trigger pip of detection startup indication back generation that module 371 issues, and control detection excited data generation unit 33 produces the detection excited datas.Detect excited data generation unit 33 and produce a unit impulse sequence δ (n) as detecting excited data in the moment of receiving the trigger pip that trigger pip generation unit 31 produces (i.e. the moment " n "), the impulse amplitude of unit impulse sequence δ (n) is by 372 configurations of amplitude configuration module, and all the other are exported perseverance constantly and are changed to zero.The selector switch 34 impulse sequence δ of selection unit (n) are input to digital filter 35.The filtering result of the unit impulse sequence δ (n) that storage processing unit 36 is exported digital filter 35 when receiving the trigger pip that trigger pip generation unit 31 produces stores in the storage space of reservation successively, the startup of its storage is controlled by trigger pip constantly, after starting storage operation the output of digital filter 35 is stored successively, stop after storage space is write completely, each triggering storage will cover the memory contents of last time.
When the data volume of preserving at needs is bigger, for the resource of the storage space of saving required reservation, in second embodiment of the invention, can be by changing the time delay configuration, adopt and repeatedly trigger the gradation storage that the mode of collecting realizes data, thus the resource of saving the storage space of required reservation.As shown in Figure 6, when trigger the filtering result of the unit impulse sequence δ (n) of storage digital filter 35 outputs by 38 controls of time-delay trigger control unit.Time-delay trigger control unit 38 inside adopted one can be by the delay counter 381 of CPU flexible configuration, when producing, trigger pip starts delay counter 381, when the count value of time delay counter 381 reaches the time delay value of time-delay configuration module 374 configurations, storage control signal generator 382 output storage control signals, the output result that indication storage processing unit 36 begins to store digital filter 35.
The exponent number of for example detected FIR wave filter is 100 rank, and storage resources is limited, can only store 50 rank, time delay value that then can be by CPU configuration triggers one-time detection during for M, storage processing unit 36 reads the 1st～50 data, the time delay value of CPU configuration triggers one-time detection when being M+50 again, and storage processing unit 36 reads the 51st～100 data, can reduce the demand to storage space like this by the mode that repeatedly triggers collection.
When detecting, storage processing unit 36 reports to failure analysis module 373 by cpu i/f processing module 32 with the filtering result of the unit impulse sequence δ (n) of digital filter 35 output, if failure analysis module 373 judges that impulse response can obtain correct filter coefficient, illustrate that the coefficients R AM/ROM of digital filter 35 is not rewritten or destroys.If the failure analysis module 373 linear amplitudes that change the unit impulse sequence, the also corresponding linear change of the output of the digital filter 35 that obtains illustrates that the base conditioning function of digital filter 35 is normal.
32 pairs of cpu i/f processing units detect control analysis unit 37 and trigger pip generation unit 31, detect excited data generation unit 33, data transmission between time-delay trigger control unit 38 or the storage processing unit 36 is carried out adaptive, the detection that detects 37 generations of control analysis unit is started indication send to trigger pip generation unit 31, the impulse amplitude of control analysis unit 37 configurations will be detected, time delay value sends to respectively and detects excited data generation unit 33 and time-delay trigger control unit 38, and the filtering result of storage processing unit 36 storages is sent to detection control analysis unit 37.
The invention is not restricted to adopt the fpga logic device to realize that possible realization device can also be devices such as any ASIC or DSP.Clearly, the present invention is applicable to also that other can respond by unit impulse and judges whether other digital signal processing appts of breaking down.
The above only is preferred embodiment of the present invention, not in order to restriction the present invention, all any modifications of being done within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1, a kind of detection method of digital filter is characterized in that, described method comprises the steps:
A. when receiving that detecting startup indicates, produce a trigger pip;
B. when receiving described trigger pip, according to unit impulse sequence of impulse amplitude generation of configuration;
C. with described unit impulse sequence input digit wave filter;
D. when receiving described trigger pip, store described unit impulse sequence is handled output through digital filter filtering result;
E. whether the work according to described filtering interpretation of result digital filter is normal.
2, the detection method of digital filter as claimed in claim 1 is characterized in that, before described step D, described method further comprises:
T. according to the time delay value and the described trigger pip of configuration, produce the trigger pip after delaying time.
3, the detection method of digital filter as claimed in claim 2 is characterized in that, described step T specifically comprises:
T1. when receiving described trigger pip, begin counting;
T2. the trigger pip after output is delayed time when count value reaches the time delay value of configuration.
4, the detection method of digital filter as claimed in claim 1 is characterized in that, described step e specifically comprises:
If the filtering result of described unit impulse sequence is correct, and as the linear filtering result who obtains when changing the amplitude of described unit impulse sequence also linear change, then digital filter is working properly.
5, a kind of pick-up unit of digital filter is characterized in that, described device comprises:
The trigger pip generation unit is used for producing a trigger pip when receiving that detecting startup indicates;
Detect the excited data generation unit, be used for when receiving described trigger pip, producing a unit impulse sequence according to the impulse amplitude that disposes;
Selector switch is used for selecting described unit impulse sequence input digit wave filter when described unit impulse sequence produces;
Storage processing unit is used for storing described unit impulse sequence is handled output through digital filter filtering result when receiving described trigger pip; And
Detect the control analysis unit, be used for output and detect control signal, receive the filtering result that described storage processing unit reports, and whether normal according to the work of described filtering interpretation of result digital filter.
6, the pick-up unit of digital filter as claimed in claim 5 is characterized in that, described detection control analysis unit comprises:
Detection starts module, is used to send detect start indication, and described detection startup indication is sent to described trigger pip generation unit;
The amplitude configuration module is used to dispose the impulse amplitude of described unit impulse sequence, and the impulse amplitude of configuration is sent to described detection excited data generation unit; And
Whether failure analysis module is used for according to the work of described filtering interpretation of result digital filter normal.
7, the pick-up unit of digital filter as claimed in claim 6 is characterized in that, described detection control analysis unit further comprises:
The time-delay configuration module is used to dispose described storage processing unit gradation and stores described filtering result's time delay value.
8, the pick-up unit of digital filter as claimed in claim 7 is characterized in that, described device further comprises:
The time-delay trigger control unit is used for according to described time delay value and described trigger pip, produces the trigger pip after delaying time.
9, the pick-up unit of digital filter as claimed in claim 8 is characterized in that, described time-delay trigger control unit comprises:
Delay counter is used for beginning counting when receiving described trigger pip; And
The storage control signal generator, the trigger pip when being used for count value at described delay counter and reaching the time delay value of described time-delay configuration module configuration after the output time-delay.
As the pick-up unit of the described digital filter of the arbitrary claim of claim 5 to 9, it is characterized in that 10, described device further comprises:
The cpu i/f processing unit is used for carrying out adaptive to the data transmission between described detection control analysis unit and described trigger pip generation unit, detection excited data generation unit or the storage processing unit.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104730363A (en) * | 2013-12-20 | 2015-06-24 | 艾默生网络能源有限公司 | Filter detection method and equipment |
| CN111404542A (en) * | 2020-03-31 | 2020-07-10 | 四川新先达测控技术有限公司 | Double-exponential nuclear signal counting method and device |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19934296C2 (en) * | 1999-07-21 | 2002-01-24 | Infineon Technologies Ag | Test arrangement and method for testing a digital electronic filter |
| CN100365587C (en) * | 2004-01-05 | 2008-01-30 | 华为技术有限公司 | Adaptive wave filter logic verifying system and method |
| JP4206930B2 (en) * | 2004-01-21 | 2009-01-14 | 株式会社デンソー | Digital filter test apparatus and digital filter test method |
| CN100340865C (en) * | 2004-02-21 | 2007-10-03 | 华为技术有限公司 | Automatic testing method of filter |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104730363A (en) * | 2013-12-20 | 2015-06-24 | 艾默生网络能源有限公司 | Filter detection method and equipment |
| CN104730363B (en) * | 2013-12-20 | 2018-01-12 | 维谛技术有限公司 | A kind of filter detection method and apparatus |
| CN111404542A (en) * | 2020-03-31 | 2020-07-10 | 四川新先达测控技术有限公司 | Double-exponential nuclear signal counting method and device |
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Effective date of registration: 20201207 Address after: 276800 41 / F, building 1, China Resources Land Plaza, No. 1000, Shandong Road, Qinlou street, Donggang District, Rizhao City, Shandong Province Patentee after: New Donggang Holding Group Co.,Ltd. Address before: Unit 2414-2416, main building, no.371, Wushan Road, Tianhe District, Guangzhou City, Guangdong Province Patentee before: GUANGDONG GAOHANG INTELLECTUAL PROPERTY OPERATION Co.,Ltd. Effective date of registration: 20201207 Address after: Unit 2414-2416, main building, no.371, Wushan Road, Tianhe District, Guangzhou City, Guangdong Province Patentee after: GUANGDONG GAOHANG INTELLECTUAL PROPERTY OPERATION Co.,Ltd. Address before: 518129 Bantian HUAWEI headquarters office building, Longgang District, Guangdong, Shenzhen Patentee before: HUAWEI TECHNOLOGIES Co.,Ltd. |