CN106443115B - Depth-based oscilloscope with storage function - Google Patents
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Abstract
The application discloses an oscilloscope based on deep storage, wherein the oscilloscope obtains original waveform data through parallel storage and sampling of a deep memory module, so that the storage capacity is increased, and the storage rate is also increased; and based on the entire raw waveform data the parameter measurement module performs a parameter measurement, so that the waveform searching module searches the measurement parameters, thereby improving the accuracy of waveform searching; the data operation is carried out by each module in a parallel processing mode, so that the data processing capacity is improved, the oscilloscope is ensured to respond to the operation of a user in real time, and the value of deep storage is fully mined.
Description
Technical Field
The present invention relates to the field of digital oscilloscopes, and more particularly to an oscilloscope based on depth storage.
Background
Digital oscilloscopes are important instruments for electronic measurements. The storage depth represents a measure of how many sampling points can be stored in the digital oscilloscope, and is one of important indexes of modern digital oscilloscopes. In order to ensure a high sampling rate while capturing a complete signal of one or more frames, there must be a sufficient depth of storage when analyzing the electronic signal. The high sampling rate can be maintained when the large storage depth oscilloscope captures long-time waveforms, and the waveforms are ensured not to be distorted.
However, the memory depth is increased only for waveform undistorted, so the meaning of the memory depth is not fully embodied, because the value of the massive data brought by deep storage is not fully exploited.
Therefore, how to process mass data stored deeply is a technical problem that needs to be solved at present.
Disclosure of Invention
In view of the above, the invention discloses an oscilloscope based on deep storage, which not only can rapidly store mass data of deep storage, but also improves the data processing capability, further ensures that the oscilloscope responds to the operation of a user in real time, and fully mines the value of the deep storage.
The invention discloses an oscilloscope based on depth storage, which comprises the following components:
the device comprises a deep memory module, a parameter measurement module, a waveform search module and a waveform display module;
the deep memory module comprises a plurality of sub-memory modules and is used for storing original waveform data obtained by sampling in parallel;
the parameter measurement module is connected with the deep memory module and comprises a plurality of measurement units which are processed in parallel based on various parameters, and the parameter measurement module is used for processing all sampling data stored in the deep memory module in parallel so as to obtain various parameter measurement results at the same time;
the waveform searching module is connected with the parameter measuring module and comprises a plurality of parallel type searching units which are used for searching various types of parameters for the measured parameters obtained by the parameter measuring module; wherein the type search unit performs a search based on a search type;
the waveform display module is respectively connected with the deep memory module, the parameter measurement module and the waveform search module, the device is used for displaying the original waveform data stored by the deep memory module, the waveform data searched by the waveform searching module and the parameter data measured by the parameter measuring module.
Preferably, the sub memory module includes:
the device comprises a storage unit and a first field programmable logic array (FPGA) unit;
the storage unit consists of a plurality of dynamic memories in parallel, and performs data transmission with the first FPGA unit through a bus; and the first FPGA unit transmits the input original sampling data to the storage unit for storage.
Preferably, the deep memory module includes:
the first sub memory module, the second sub memory module, the third sub memory module, the fourth sub memory module and the second FPGA unit;
the input end of the first sub-memory module and the input end of the third sub-memory module receive original sampling data;
the first sub-memory module and the second sub-memory module are connected in cascade, and the original waveform data is output to the second sub-memory module by the first sub-memory module; the third sub-memory module and the fourth sub-memory module are connected in cascade, and the original waveform data is output to the fourth sub-memory module by the third sub-memory module; the output ends of the second sub-storage module and the fourth storage sub-module are connected with the second FPGA unit, and the second FPGA unit is used for controlling data output stored by each sub-storage module.
Preferably, the parameter measurement module includes:
the data loading unit and the measurement result output unit;
the data loading unit is respectively connected with the deep memory module and each measuring unit and is used for reading the original waveform data of the deep memory module and transmitting the read original waveform data to each measuring unit for parallel measurement;
the measurement result output unit is respectively connected with each measurement unit and is used for outputting various measurement parameters obtained by each measurement unit at the same time.
Preferably, the waveform searching module includes:
a search result selecting unit and a search result caching unit;
the search result selection unit is respectively connected with the plurality of parallel type search units and is used for selecting corresponding search type data from the acquired search results of the type search units according to the set search type;
the search result caching unit selecting the search results and carrying out ring cache on the search type data obtained by the unit.
Preferably, the oscilloscope further comprises:
an operation module III;
the operation module is respectively connected with the deep memory module, the parameter measurement module and the waveform display module and is used for carrying out mathematical operation on the original sampling data stored in the deep memory module, outputting an operation result to the parameter measurement module for parameter measurement or conveying the operation result to the waveform display module for display.
Preferably, the operation module includes:
an input interconnection matrix unit, a plurality of sub-operation units and an output interconnection matrix unit;
the input interconnection matrix unit outputs the original sampling data stored in the deep memory module and the intermediate operation result output by the sub operation unit to the sub operation unit for mathematical operation;
each sub-operation unit is connected with the input interconnection matrix unit and is used for carrying out mathematical operation on the received input quantity;
the output interconnection matrix unit is interconnected with each sub-operation unit and is used for outputting the final operation result of the sub-operation unit and inputting the intermediate operation result of the sub-operation unit into the input interconnection matrix unit to serve as the input quantity of the sub-operation unit.
Preferably, the parameter measurement module, the waveform search module and the operation module all adopt a pipeline mode to process data.
Compared with the prior art, the invention has the beneficial effects that: according to the invention, the original waveform data is obtained through parallel storage and sampling of the deep memory module, so that the storage capacity is increased and the storage rate is increased; the parameter measurement is carried out through the parameter measurement module based on all the original waveform data, so that the waveform search module searches the measured parameters, and the accuracy of waveform search is improved; each module adopts a parallel processing mode to carry out data operation, so that the data processing capacity is improved, the oscilloscopes are ensured to respond to the operation of a user in real time, and the value of deep storage is fully mined.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present invention, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
FIG. 1 is a block diagram of an oscilloscope based on deep storage according to an embodiment of the present invention;
FIG. 2 is a block diagram of an oscilloscope based on deep storage according to another embodiment of the present invention;
FIG. 3 is a block diagram of an oscilloscope based on deep storage according to another embodiment of the present invention;
fig. 4 is a block diagram of an oscilloscope based on deep storage according to another embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The invention discloses an oscilloscope based on depth storage, which not only can rapidly store mass data of the depth storage, but also improves the data processing capacity, further ensures that the oscilloscope responds to the operation of a user in real time, and fully mines the value of the depth storage.
Referring to fig. 1, the invention discloses an oscilloscope based on depth storage, comprising:
a deep memory module 101, a parameter measurement module 102, a waveform search module 103, and a waveform display module 104;
the deep memory module 101 includes a plurality of sub-memory modules, and stores the sampled original waveform data in parallel, so that the storage capacity of the memory can be improved, and the sub-memory modules are independent; the storage depth of the oscilloscope is 512Mpts, namely the maximum storage of the oscilloscope is 512 million sampling points, namely 512 million original waveform data are required to be stored;
the parameter measurement module 102 is connected with the deep memory module, the parameter measurement module 102 comprises a plurality of parallel measurement units, and performs parallel processing on 512 million sampling data stored in the deep memory module 101 to obtain a plurality of parameter measurement results at the same time, wherein the measurement units perform measurement based on one parameter, so that the plurality of measurement units in the parameter measurement module can perform measurement of a plurality of parameters at the same time, that is, for measurement of N parameters, time T is required, and the time for measuring N parameters is shortened to N/T by using a parallel measurement mode, thereby improving the data processing speed; and the parameter measurement module 102 performs parameter measurement on the original waveform data of 512Mpts, so that the accuracy of parameter measurement is ensured. The parameters to be measured may be voltage parameters/amplitude parameters: amplitude, peak-to-peak value, maximum value, minimum value, overshoot, effective value, etc.; time parameters: rise time/fall time, period/frequency, pulse width, duty cycle, time difference, setup time/hold time, etc.; counting parameters: the number of the statistical samples is 51 parameter types such as rising/falling edge count, trigger frequency and the number of the statistical samples.
The waveform searching module 103 is connected with the parameter measuring module 102, the waveform searching module 103 comprises a plurality of parallel type searching units, and searches for various types of parameters on the measured parameters obtained by the parameter measuring module 102 at the same time; wherein the type search unit performs a search based on a search type; the waveform search may be a search of conditions such as edge, pulse width (positive and negative), rise time, fall time, period, frequency, and undershoot. In this embodiment, each type search unit in the model search module 103 performs measurement parameter search processing according to a search type selected by a user, and multiple type search units perform parallel processing at a high speed, so as to improve the waveform search efficiency.
The waveform display module 104 is respectively connected with the deep memory module 101, the parameter measurement module 102 and the waveform search module 103, and can display an original sampling waveform, a searched abnormal waveform and measured parameter data. The waveform display module can display the original sampling waveform, the waveform display can sequentially scroll and display 512Mpts mass waveforms from left to right (or from right to left), and all waveforms can be sequentially played without manual intervention. Since 512Mpts data is very dense when displayed on a screen at the same time, the locally amplified waveforms can be checked through the waveform scaling function, the abnormal waveforms are also analyzed through the scaling function for the display of the searched abnormal waveforms, the coordinate positions of the searched abnormal waveforms can be marked by the waveform searching module 103, and the waveform display module 104 can automatically jump to the marked positions of the abnormal waveforms, so that the display of the searched abnormal waveforms is realized. In addition, the measured parameter data is displayed in the form of a list so that the user can view the measured parameter.
It should be noted that, the oscilloscope disclosed in this embodiment adopts multiple pieces of large-scale FPGA full hardware to perform parallel data processing, so as to ensure the real-time processing capability of mass data. The FPGA is a field programmable device, and the internal circuit structure is changed in a software programming mode to realize different functions.
In this embodiment, the deep memory module 101 stores and samples the original waveform data in parallel, so that not only is the memory capacity increased, but also the memory rate is increased; and the parameter measurement is carried out by the parameter measurement module 102 based on all the sampled data, so that the waveform search module 103 analyzes the measured parameters, and the accuracy of waveform search is improved; and each module adopts a parallel processing mode, so that the oscilloscope is ensured to respond to the operation of a user in real time, and the value of deep storage is fully mined.
Preferably, in another embodiment, the first and second embodiments, with reference to figure 2 of the drawings, the deep memory module 101 includes:
a first sub-memory module 105, a second sub-memory module 106, a third sub-memory module 107, a fourth sub-memory module 108, and a second FPGA unit 109;
the storage unit is formed by a plurality of dynamic memories DDR3 in parallel, and data transmission is carried out with the FPGA unit through a bus. And the FPGA unit transmits the input original sampling data to the storage unit for storage. The number of the dynamic memories DDR3 in the storage unit can be increased according to the enhancement of the processing capacity of the FPGA hardware.
The input of the first sub-memory module 105 and the input of the third sub-memory module 107 receive raw waveform sample data; the first sub-memory module 105 and the second sub-memory module 106 are connected in cascade, and the original waveform sampling data is output to the second sub-memory module 106 by the first sub-memory module 105; because the first sub-memory module 105 and the second sub-memory module 106 are connected in cascade, when processing data of the same unit, the data can be divided into two FPGA units to be processed simultaneously, so that the total time for processing the data is reduced and the access rate is increased; the third sub-memory module 107 and the fourth sub-memory module 108 are connected in cascade, and the original waveform sampling data is output to the fourth sub-memory module 108 by the third sub-memory module 107; the output ends of the second sub-memory module 106 and the fourth memory sub-module 108 are respectively connected with another FPGA unit, and the FPGA unit is used as a second FPGA unit 109, the second FPGA unit 109 is used for controlling the output of the data stored in each sub-memory module, and the first FPGA unit is used for controlling the data transmission of the memory unit connected with the first FPGA unit. Each sub-memory module is independent and is capable of processing data input therein independently.
For convenience of understanding, assuming that the storage capacity of one storage unit is D, and the number of sub-memory modules of the deep memory module 101 provided in this embodiment is 4, the total storage capacity d= 4*d of the deep memory provided in this embodiment, it can be seen that increasing the number of storage units can increase the total storage capacity of the deep memory. By cascading two sub-memory modules, when processing data of the same unit, the data can be divided into two FPGA units to be processed simultaneously, so that the total time for processing the data is reduced, the data processing speed is further improved, and the processing performance of the deep memory module 101 is further improved.
In this embodiment, the number of sub-memory modules is not limited, and is specifically determined according to the storage capacity requirement of the deep memory module 101. Preferably, the FPGA unit adopts an XC7K160T type FPGA device, the logic resource can reach 16 ten thousand, the processing speed can be further accelerated, and the data processing architecture is changed relative to the FPGA in the prior art, so that the processing performance is improved.
Data processing architecture of traditional FPGA: the usual data flow is: the data is read from the memory unit under the control of the memory unit controller, is subjected to deceleration processing by the bit width conversion module, is processed by the data sampling module, and is sent to the functional modules. Let the bus bit width of "data sample" be L1 (typically small, e.g., 32), and the output bus bit width of the memory cell controller be L2 (typically much larger than L1, e.g., 512). Conventional schemes are often limited by resource or design difficulties, with the usual sampling module and bit width conversion module being separate. At lower bus bit widths (L1), processing resources are small (typically 32 or 64 bits), which is easy to implement, but processing times are long.
Assuming that the total amount of data to be processed is M (bits), the time required for processing in the conventional data processing architecture is:
compared with the traditional data processing architecture of the FPGA, the data processing architecture provided by the embodiment utilizes the advantage of large-scale FPGA resources to perform parallel acceleration processing, and combines a 'bit width conversion' module and a 'data sampling' module to form a 'fast sampling module' on a physical structure. The time required for processing by the data processing architecture of the large-scale FPGA provided in this embodiment is:
by comparing the formula (1) with the formula (2), the processing performance of the high-performance data processing architecture of the invention can be obtained to be L2/L1 times that of the traditional data processing architecture. In practical application, L2 is 512, L1 is 64, and compared with the traditional scheme, the performance is improved by 8 times. In the conventional scheme, because the resources of the FPGA are fewer, in general, L1 is 32, and compared with the case where L1 is 32, the data processing performance in this embodiment is improved by 16 times. In all systems, there will be essentially data sampling processing operations, including peak sampling, equidistant sampling, etc., with the sampling rate typically being any integer. Therefore, the L2 and L1 data in the present embodiment are not limited to this, and will not be described here again.
It can be seen that, in the deep memory module 101 provided in this embodiment, the number of memory units is increased due to the increased number of sub-memory modules, so that the total memory capacity and the total bandwidth of the deep memory are improved. Because the cascade connection between the added sub-memory and the existing sub-memory increases the speed of data processing, and further increases the processing performance of the deep memory module 101. In addition, in terms of device selection, the FPGA unit preferably has logic resources capable of up to 16 ten thousand FPGA hardware, further improving the processing performance of the deep memory module 101, since the FPGA unit is a large-scale FPGA, the number of DDR3 particles in the memory cells can be increased, further increasing the total memory capacity and total bandwidth of the deep memory module 101, thereby solving the problems of small capacity, low bandwidth and poor processing performance in the existing oscilloscope storage.
In another embodiment, referring to fig. 3, an oscilloscope based on depth storage is disclosed, comprising: a deep memory module 101, a parameter measurement module 102, a waveform search module 103, and a waveform display module 104;
wherein the parameter measurement module 102 includes: a data loading unit 110, a plurality of parallel measurement units 111, and a measurement result output unit 112;
the waveform search module 103 includes: a plurality of parallel type search units 113, a search result selection unit 114, and a search result buffer unit 115;
the data loading unit 110 is respectively connected to the deep memory module 101 and each measuring unit, and is configured to read the raw waveform data of the deep memory module 101, and transmit the read raw waveform data to each measuring unit for parallel measurement, where it is noted that an input end of the data loading unit 110 is connected to an output end of the second FPGA unit 109 of the deep memory module 101, and the second FPGA unit 109 controls the data loading unit 110 that outputs the data in each sub-memory module to the parameter measuring module 102, so that parallel parameter measurement is performed on the received raw waveform data in each measuring unit.
The measuring units may include a first measuring unit, a second measuring unit, and a third measuring unit, but are not limited to the measuring units in this embodiment, and the number of measuring units is set according to actual requirements, and this embodiment only exemplifies the functions of the measuring units. Wherein the first measuring unit, the second measuring unit and the third measuring unit respectively measure one parameter type. The type of parameter to be measured may be a voltage parameter/amplitude parameter: amplitude, peak-to-peak value, maximum value, minimum value, overshoot, effective value, etc.; time parameters: rise time/fall time, period/frequency, pulse width, duty cycle, time difference, setup time/hold time, etc.; counting parameters: the rising/falling edge count, the trigger frequency, the number of statistical samples, etc. 51. The functions of the first measuring unit, the second measuring unit and the third measuring unit can be used for selecting parameter types according to requirements, and the internal circuit structure of the FPGA is changed in a software programming mode to realize the measuring functions of different parameters; and then, according to the original waveform data obtained by the data loading unit 110 and the preset parameter types to be measured, measuring the parameter measurement values of the parameter types to be measured in parallel. For example, the first measuring unit measures the peak-to-peak value, the second measuring unit measures the maximum value, the third measuring unit measures the rise time, by the parallel processing characteristics of the first measuring unit, the second measuring unit and the third measuring unit, the measured values of the peak-to-peak value, the maximum value and the rising time can be obtained simultaneously. It should be noted that the measurement unit includes a plurality of calculation units, where the calculation units can implement functions such as addition, subtraction, division, multiplication, evolution, exponent, logarithm, trigonometric function, squaring, differentiation, integration, and the like, and the calculation units perform parallel calculation in a pipeline manner, that is, the mth operation does not need to wait for the completion of the mth-1 operation and then can perform simultaneous operation, which is an advantage of parallel processing of data by the FPGA, so as to further improve the mathematical operation speed. Due to the parallel characteristic of the hardware FPGA, other operations of the system are not affected during operation, and further the situation of system blocking is avoided.
Finally, the measurement result output unit 112 connected to each measurement unit outputs a plurality of measurement parameters obtained by each measurement unit at the same time, so that the waveform search module 103 performs waveform search according to the measurement parameters output by the measurement result output unit 112.
The plurality of parallel type search units 113 are connected to the measurement result output unit 112, one type search unit performs a search based on one type of search, and the number of type search units is set according to the need. The plurality of type search units 113 search the measurement parameters outputted from the measurement result output unit 112 in parallel, wherein the search type may be a search of an abnormal waveform type such as an edge, a pulse width (positive pulse width and negative pulse width), a rising time, a falling time, a period, a frequency, and an undershoot. By the parallel search by the plurality of type search units 113, the searches of all the set search types can be completed at the same time. The search result selection unit 114 selects a corresponding search type number from among the search results acquired from the respective type search units according to the selected search type. Finally, the search result buffer unit 115 performs ring buffer on the search type data obtained by the search result selection unit 114, where, in order to indicate the position of the abnormal signal in the waveform of the whole screen, the search result should return the coordinate values of the object satisfying the condition in the waveform library, so the coordinate values of the searched abnormal data of the selected type are buffered by the ring buffer. When the waveform display module 104 displays the searched abnormal waveform, only the coordinate value stored in the ring buffer is required to be called and marked at the position of the coordinate value, and when a user selects to display a certain type of abnormal waveform, the waveform displayed in the oscilloscope screen can quickly jump to the marked position.
In this embodiment, the parameter measurement module 102 can perform parameter measurement on all original waveform data, so that the parameter measurement is calculated based on the original sampling rate under the storage depth of 512 mps, the accuracy of the parameter measurement is ensured, and up to 51 parameter measurement items can be supported, so that the parameter measurement in the true sense is realized. Through parallel processing of a plurality of measuring units, rapid measurement and statistics of parameters are realized, and real-time response to operation of a user is ensured. The waveform searching module 103 can search a plurality of abnormal type data in parallel, so that the speed of waveform searching is improved, and the accuracy of waveform searching is ensured based on the parameter measurement of the parameter measuring module 102 on the original waveform data.
In another preferred embodiment, referring to fig. 4, an oscilloscope based on depth storage is disclosed, further comprising:
the operation module 116 is respectively connected with the deep memory module 101 and the parameter measurement module 102, and can perform mathematical operation on the original waveform data in the deep memory module 101 so that the parameter measurement module 102 can perform parameter measurement; it can be understood that when the parameter measurement module 102 performs some parameter measurement, the parameter measurement cannot be performed directly on the original waveform data, and the operation module 116 is required to process the original waveform data before performing the measurement of the relevant parameter.
Wherein, the operation module 116 includes: an input interconnection matrix unit 117, a plurality of parallel sub-operation units 118, and an output interconnection matrix unit 119;
the input amount of the input interconnection matrix unit 118 is the original sampled data stored in the deep memory module 101 and the intermediate operation result output by the sub operation unit, the input interconnection matrix unit 118 outputs the original sampling data stored in the deep memory module 101 and the intermediate operation result output by the sub operation unit to the sub operation unit for mathematical operation;
the respective sub-operation units 118 are connected to the input interconnect matrix unit 117, for performing a mathematical operation on the received input quantity;
the output interconnection matrix unit 119 is interconnected with each of the sub-operation units 118, and is configured to output a final operation result of the sub-operation unit, and input an intermediate operation result of the sub-operation unit to the input interconnection matrix unit 117 as an input amount of the sub-operation unit.
It should be noted that, the arithmetic modules 116 perform mathematical operations in parallel, and the sub-arithmetic units 118 implement multi-stage arbitrary interconnection, so that the number of splitting times of the mathematical operations is reduced, and the mathematical operation speed is further improved. And due to the parallel characteristic of the FPGA, other operations of the system are not affected during operation, and further the system is not blocked.
The input interconnection matrix unit 117 reads the original waveform data of the deep memory module 101, takes the obtained original waveform data as an input amount of a sub-operation unit, obtains an operation result output by a first sub-operation unit, and takes the operation result output by the first operation unit as an input amount of a second operation unit. When the operation result output by one of the sub-operation units is used as the input of the other sub-operation unit, we define the former as the first sub-operation unit and the latter as the second sub-operation unit, that is, the first sub-operation unit and the second sub-operation unit are the names of the operation result output by one sub-operation unit as the input of the other sub-operation unit, and the same sub-operation unit can be the first sub-operation unit or the second sub-operation unit in different operation processes.
The output interconnection matrix unit 119 uses the operation result output by the first sub-operation unit as the input of the second sub-operation unit, and uses the operation result output by the third sub-operation unit as the final operation output (y), and we define the operation unit that outputs the operation result as the final operation output as the third sub-operation unit. The sub-operation units include, but are not limited to, an addition unit, a subtraction unit, a division unit, a multiplication unit, an evolution unit, an exponent unit, a logarithm unit, a trigonometric function unit, a square unit, a differentiation unit, an integration unit, and the like.
In addition, the sub-operation unit adopts a pipeline processing mode to carry out mathematical operation. For easy understanding, assume that the FPGA operation structure requires L system clock cycles T to complete one mathematical operation, M mathematical operations are performed. When the non-pipeline processing method is adopted for operation, the required time is M x L x T. When the pipeline processing mode is adopted for operation, the M-th operation does not need to wait for the completion of the M-1 th operation and then can be operated simultaneously, and the time required for completing the M-times of the mathematical operation is (M+L-1) T. It can be seen that the speed of mathematical operations can be increased by adopting a pipeline processing mode.
In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (5)
1. An oscilloscope based on depth storage, comprising:
the device comprises a deep memory module, a parameter measurement module, a waveform search module and a waveform display module;
the deep memory module comprises a plurality of sub-memory modules and is used for storing original waveform data obtained by sampling in parallel;
the parameter measurement module is connected with the deep memory module, and comprises a plurality of measurement units based on parallel processing of various parameters, and the measurement units are used for parallel processing all sampling data stored in the deep memory module so as to obtain various parameter measurement results at the same time, wherein the measured parameters comprise: a voltage amplitude parameter including an amplitude, a peak-to-peak value, a maximum value, a minimum value, an overshoot, and an effective value, a time parameter including a rise time, a fall time, a period, a frequency, a pulse width, a duty cycle, a time difference, a setup time, and a hold time, and a count parameter including a rising edge count, a falling edge count, a trigger frequency, and a statistical sample number;
the waveform searching module is connected with the parameter measuring module and comprises a plurality of parallel type searching units which are used for searching various types of parameters for the measured parameters obtained by the parameter measuring module; wherein the type search unit performs a search based on a search type;
the waveform display module is respectively connected with the deep memory module, the parameter measurement module and the waveform search module and is used for displaying the original waveform data stored in the deep memory module, the waveform data searched by the waveform search module and the parameter data measured by the parameter measurement module;
wherein the sub-memory module comprises:
a first FPGA unit and a memory unit adjacent to the first FPGA unit;
the storage unit consists of a plurality of dynamic memories in parallel, and performs data transmission with the first FPGA unit through a bus; the first FPGA unit is used for transmitting the input original sampling data to the storage unit for storage, and controlling the data transmission of the storage unit connected with the first FPGA unit;
the deep memory module includes:
the first sub memory module, the second sub memory module, the third sub memory module, the fourth sub memory module and the second FPGA unit;
the input end of the first sub-memory module and the input end of the third sub-memory module receive original sampling data;
the first sub-memory module and the second sub-memory module are connected in cascade, and the original waveform data is output to the second sub-memory module by the first sub-memory module; the third sub-memory module and the fourth sub-memory module are connected in cascade, and the original waveform data is output to the fourth sub-memory module by the third sub-memory module; the output ends of the second sub-memory module and the fourth sub-memory module are connected with the second FPGA unit, and the second FPGA unit is used for controlling the data output stored by each sub-memory module;
the waveform search module comprises:
a search result selecting unit and a search result caching unit;
the search result selection unit is respectively connected with the plurality of parallel type search units and is used for selecting corresponding search type data from the acquired search results of the type search units according to the set search type;
and the search result caching unit performs annular caching on the search type data obtained by the search result selecting unit.
2. The oscilloscope of claim 1, wherein the parameter measurement module comprises:
the data loading unit and the measurement result output unit;
the data loading unit is respectively connected with the deep memory module and each measuring unit and is used for reading the original waveform data of the deep memory module and transmitting the read original waveform data to each measuring unit for parallel measurement;
the measurement result output unit is respectively connected with each measurement unit and is used for outputting various measurement parameters obtained by each measurement unit at the same time.
3. The oscilloscope of claim 1, further comprising:
an operation module;
the operation module is respectively connected with the deep memory module, the parameter measurement module and the waveform display module and is used for carrying out mathematical operation on the original sampling data stored in the deep memory module, outputting an operation result to the parameter measurement module for parameter measurement or conveying the operation result to the waveform display module for display.
4. The oscilloscope of claim 3, wherein the operation module comprises:
an input interconnection matrix unit, a plurality of sub-operation units and an output interconnection matrix unit;
the input interconnection matrix unit outputs the original sampling data stored in the deep memory module and the intermediate operation result output by the sub operation unit to the sub operation unit for mathematical operation;
each sub-operation unit is connected with the input interconnection matrix unit and is used for carrying out mathematical operation on the received input quantity;
the output interconnection matrix unit is interconnected with each sub-operation unit and is used for outputting the final operation result of the sub-operation unit and inputting the intermediate operation result of the sub-operation unit into the input interconnection matrix unit to serve as the input quantity of the sub-operation unit.
5. The oscilloscope of claim 3 wherein said oscilloscope comprises a display screen,
and the parameter measurement module, the waveform search module and the operation module all adopt a pipeline mode to process data.
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| CN108107250B (en) * | 2018-01-05 | 2020-10-09 | 深圳市道通科技股份有限公司 | Oscilloscope data processing method and device and oscilloscope |
| CN112199010B (en) * | 2020-12-03 | 2021-03-30 | 深圳市鼎阳科技股份有限公司 | Full storage depth measuring method, digital oscilloscope and storage medium |
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