CN1917285A - Antenna structure on IC and manufacturing method - Google Patents
Antenna structure on IC and manufacturing method Download PDFInfo
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- CN1917285A CN1917285A CNA2006100308569A CN200610030856A CN1917285A CN 1917285 A CN1917285 A CN 1917285A CN A2006100308569 A CNA2006100308569 A CN A2006100308569A CN 200610030856 A CN200610030856 A CN 200610030856A CN 1917285 A CN1917285 A CN 1917285A
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Abstract
Under precondition without changing size of external diameter, the invention discloses integrated antenna on chip. The helix structural antenna possesses gradual changed widths of metal coils and spans of metal coils in order to reduce serial equivalent resistance of helix coils so as to reduce energy loss. Comparing with traditional antenna on chip, the disclosed antenna on chip possesses features of lowering influence of eddy current effect and approach effect in high frequency so as to reduce the said equivalent resistance Rs, and energy loss. The preparing technique is compatible to conventional CMOS technique.
Description
Technical field
The invention belongs to the ic manufacturing technology field, be specifically related to structure antenna integrated on a kind of sheet of integrated circuit (IC) chip and its implementation, this patent is applicable to deep-submicron/micron integrated circuit processing technique.
Background technology
Antenna is as the indispensable part of radio communication, and its basic function is radiation and receives radio wave.During emission, be high frequency current transitions electromagnetic wave; During reception, electromagnetic wave is converted to high-frequency current.Antenna is as the key element in the radio circuit, is the element of the most difficult design and grasp in the circuit, and its performance parameter directly affects the performance of radio circuit.
In CMOS radio frequency integrated circuit (RFIC) development, the most urgent and the most difficult is to develop high performance new unit and new element circuit, and they are the bases of realizing single chip CMOS integrated RF front end.Therefore, the integrated problem of antenna has become the bottleneck of radio frequency integrated circuit development.And the antenna integrated integrated problem that can realize antenna in the radio frequency integrated circuit on the sheet, thereby help the SOC (system on a chip) of radio frequency integrated circuit to realize.Antenna integratedly on the sheet form by metallic film coiling on silicon substrate mostly, with respect to traditional wire-wound antenna, on the sheet antenna integrated have cost low, be easy to the advantage integrated, that size is little and low in energy consumption, the more important thing is can with CMOS process compatible now.
Along with mobile communication develops to microminiaturized, low power consumption, also more and more in recent years to making with high-quality research of going up passive device of CMOS process compatible.Yet, prior art still has many weak points, ghost effect on the sheet in antenna integrated, as the parasitic capacitance of the parasitic capacitance of substrate, dead resistance, metallic conductor, dead resistance and since the dead resistance that effects such as eddy current loss form etc. all will the performance of antenna be exerted an influence.At substrate loss, proposed the main solution of two big classes: on the one hand, people use methods such as ion injection or making porous silicon layer to realize that selectivity forms semi-insulating silicon substrate; On the other hand, people insert the diagram form ground shield between aerial coil and silicon substrate, or adopt zanjon to isolate, implanted dopant forms PN junction isolates, or low-k (low-K) material is spun on the silicon substrate, can make coil and substrate isolation, to reduce substrate loss.
If ignore substrate loss, antenna integratedly on the sheet should mainly consider the metallic conductor loss, at this moment the eddy current in the helical coil is with its metallic conductor loss of appreciable impact.It is antenna integrated that prior art uses the constant metallic conductor of live width to make on the sheet, and in this antenna, the magnetic flux density by inner ring metallic conductor be maximum, and then to produce the influence that magnetic induction loses also be maximum.According to this point, the technical staff has proposed the laying out pattern of maximum hollow structure, but this also is not the optimal case that improves inductance performance.The method that had proposed optimization helical coil domain afterwards again improves performance.Report as IEEE, people such as JoseM Lopez-Villegas in 2000 adopt a kind of structure of variable metallic conductor live width, with the performance of raising helical coil, but variation has also taken place in the external diameter of this structure, and does not consider that two metallic conductor spacings change the helical coil Effect on Performance.This is because the magnetic field between the two adjacent metallic conductors will change the CURRENT DISTRIBUTION of metallic conductor, when two adjacent metallic conductor spacings not simultaneously, the action of a magnetic field suffered between them is also different.Spacing more hour, magnetic field interaction is strong more, this will cause the current density in the metallic conductor more inhomogeneous, make metallic conductor series resistance Rs become big, thereby influence the increase of antenna integrated energy loss on the sheet; In addition, under the situation of other parameter constant of helical coil, big if the spacing of two metallic conductors becomes, it is big that the total length of metallic conductor will become, and internal diameter diminishes, and this also will make metallic conductor series resistance Rs further increase, thus the also increase of antenna integrated energy loss on the sheet.
Summary of the invention
The objective of the invention is to propose on-chip antenna structure and manufacture method thereof in a kind of integrated circuit, integrated antenna structure on this sheet, at live widths such as tradition, equidistant antenna structure, and only consider improving on the antenna structure of metallic conductor change width, under the prerequisite that does not change the external diameter size, antenna integrated on the sheet by the gradual change simultaneously of metal live width and metal wire separation, reducing the series equivalent resistance of coil, thereby reduce energy loss.
The present invention is achieved by the following technical solutions: the on-chip antenna structure in a kind of integrated circuit; after integrated circuit (IC) chip 2 is finished in manufacturing; be deposited with first insulation material layer 3 and second insulation material layer 4 successively at chip surface; in second insulation material layer 4, make on-chip antenna 1; this antenna 1 is realized connecting by chip join domain 10 and bottom chip; around the antenna 1 and bottom is surrounded by second insulation material layer 4, and the deposited on top of antenna 1 has insulating material protective layer 11.
Wherein, antenna structure 1 of the present invention can be made in the front of integrated circuit (IC) chip, also can make or make simultaneously at the positive and negative of integrated circuit (IC) chip at the back side of integrated circuit (IC) chip; Antenna structure 1 can be square, regular hexagon, octagon, dodecagon, positive ten hexagons, positive three dodecagons or circle.
The antenna number of turns 5 of the present invention can be that 1 circle is to 10000 circles.
Antenna metal material of the present invention is the alloy of copper, aluminium, gold, nickel, chromium, cobalt, titanium, tantalum or above-mentioned metal, and its thickness range is 1 nanometer to 10000 nanometer.
The numerical values recited of the antenna degree of depth of the present invention can be by 1 nanometer to 10000 nanometer.
According to the direction of aerial coil ecto-entad, wire coil width 8, its numerical values recited can be by 0.065 micron to 20 millimeters; Spacing 9 between wire coil, and its numerical values recited can be by 0.065 micron to 20 millimeters.
According to the direction of aerial coil ecto-entad, wire coil width 8 can be changed to narrow successively by wide, and every circle reduces to be worth in 0.065 micron to 10 millimeters scope.
Or according to the direction of aerial coil ecto-entad, wire coil width 8 can change from narrow to wide successively, and every circle added value is in 0.065 micron to 10 millimeters scope.
Or according to the direction of aerial coil ecto-entad, wire coil width 8 can be consistent, and live width is in 0.065 micron to 10 millimeters scope.
Simultaneously, according to the direction of aerial coil ecto-entad, spacing 9 can be changed to narrow successively by wide between wire coil, and every circle reduces to be worth in 0.065 micron to 10 millimeters scope.
Or according to the direction of aerial coil ecto-entad, spacing 9 can change from narrow to wide successively between wire coil, and every circle is increased in 0.065 micron to 10 millimeters the scope.
Or according to the direction of aerial coil ecto-entad, spacing 9 can be consistent between wire coil, and spacing is in 0.065 micron to 10 millimeters scope.
First insulation material layer 3 of surface deposition is made of a kind of material or 2 kinds, 3 kinds materials are compound constitutes among the present invention, and its thickness range is 1 nanometer to 10000 nanometer.
Wherein, first insulation material layer, 3 employed insulating material can be any one or multiple advanced low-k materials in fluorine silex glass, porous silicon, charcoal oxygen silicon materials, the silicon hydroxide material, or any one or multiple medium dielectric constant microwave medium material in the silicon dioxide, silicon nitride, silicon oxynitride, carborundum, or any one or multiple high dielectric constant material in the hafnium oxide, aluminium oxide.
Or first insulation material layer 3 is by 2 kinds of insulating material composite constructions, and material sequences from the bottom to top can be silicon dioxide, silicon nitride; Or silicon dioxide, silicon oxynitride; Or silicon dioxide, carborundum; Or silicon dioxide, hafnium oxide; Or silicon dioxide, aluminium oxide; Or hafnium oxide, carborundum; Or hafnium oxide, silicon oxynitride; Or hafnium oxide, silicon nitride; Or hafnium oxide, silicon dioxide; Or aluminium oxide, silicon dioxide; Or aluminium oxide, silicon nitride; Or aluminium oxide, carborundum.
Or first insulation material layer 3 is by 3 kinds of insulating material composite constructions, and material sequences from the bottom to top can be silicon dioxide, silicon nitride, silicon dioxide; Or silicon dioxide, silicon oxynitride, silicon dioxide; Or silicon dioxide, carborundum, silicon dioxide; Or silicon dioxide, hafnium oxide, silicon dioxide; Or silicon dioxide, aluminium oxide, silicon dioxide; Or hafnium oxide, carborundum, silicon dioxide; Or hafnium oxide, silicon oxynitride, silicon dioxide; Or hafnium oxide, silicon nitride, silicon dioxide; Or hafnium oxide, silicon dioxide, carborundum; Or aluminium oxide, silicon dioxide, carborundum; Or aluminium oxide, silicon nitride, silicon dioxide; Or aluminium oxide, carborundum, silicon dioxide.
Second insulation material layer, 4 employed insulating material of the present invention can be any one or multiple advanced low-k materials in fluorine silicon glass, porous silicon, charcoal oxygen silicon materials, the silicon hydroxide material, or any one or multiple medium dielectric constant microwave medium material in the silicon dioxide, silicon nitride, silicon oxynitride, carborundum, or any one or multiple high dielectric constant material in the hafnium oxide, aluminium oxide, its thickness range is 1 nanometer to 10000 nanometer.
In addition, the invention also discloses a kind of technical scheme: a kind of technological process of making on-chip antenna in the integrated circuit comprises the steps:
(a), finish the manufacturing of integrated circuit (IC) chip 2;
(b), at its surface deposition first insulation material layer 3;
(c), second insulation material layer 4 of deposit subsequently;
(d), photoetching, etching chip join domain 10 and antenna 1, and the cleaning of removing photoresist;
(e), depositing metal diffusion impervious layer, plated metal copper;
(f), chemical mechanical polishing of metals, clean;
(g), deposition insulating material protective layer 11, finish the manufacturing of on-chip antenna 1.
Antenna integrated on the sheet that the present invention proposes, be at live widths such as tradition, equidistant antenna structure, and only consider the improvement on the antenna structure of metallic conductor change width.Under the prerequisite that does not change the external diameter size, propose on the sheet of the helical structure of spacing gradual change simultaneously between wire coil width and wire coil antenna integratedly, reducing the series equivalent resistance of helical coil, thereby reduce energy loss.Integrated on-chip antenna of the present invention is compared with traditional on-chip antenna, and the influence of eddy current effect and approach effect reduces during high frequency, causes series equivalent resistance Rs to descend, thereby makes its energy loss littler; Preparation technology and conventional CMOS process compatible.
Description of drawings
Fig. 1 is a vertical view antenna integrated on the sheet;
Fig. 2 is a cutaway view antenna integrated on the sheet;
Fig. 3 is a structure chart antenna integrated on the sheet.
Label declaration:
1, first insulation material layer of integrated antenna structure 2, integrated circuit (IC) chip 3, deposit on the sheet; 4, the wire coil number of turns of integrated antenna structure on second insulation material layer 5 of deposit, the sheet; 6, the internal diameter of integrated antenna structure on the external diameter 7 of integrated antenna structure, the sheet on the sheet; 8, the intermetallic spacing of the metal live width 9 of integrated antenna structure, integrated antenna structure on the sheet; 10, chip join domain 11, insulating material protective layer
Embodiment
See also Fig. 1, Fig. 2 and Fig. 3; on-chip antenna structure in a kind of integrated circuit of the present invention; after integrated circuit (IC) chip 2 is finished in manufacturing; be deposited with first insulation material layer 3 and second insulation material layer 4 successively at chip surface; in second insulation material layer 4, make on-chip antenna 1; this antenna 1 is realized connecting by chip join domain 10 and bottom chip, and around the antenna 1 and bottom is surrounded by second insulation material layer 4, and the deposited on top of antenna 1 has insulating material protective layer 11.
Wherein, make that the integrated circuit (IC) chip 2 finish comprises that all are active, the making of passive device and line.
The antenna number of turns 5 of the present invention can be that 1 circle is to 10000 circles.The antenna metal material is the alloy of copper, aluminium, gold, nickel, chromium, cobalt, titanium, tantalum or above-mentioned metal, and its thickness range is 1 nanometer to 10000 nanometer.The numerical values recited of the antenna degree of depth can be by 1 nanometer to 10000 nanometer.
According to on-chip antenna structure of the present invention, its manufacture method comprises the steps:
(a), finish the manufacturing of integrated circuit (IC) chip 2;
(b), at its surface deposition first insulation material layer 3;
First insulation material layer 3 of surface deposition is made of a kind of material or 2 kinds, 3 kinds materials are compound constitutes among the present invention, and its thickness range is 1 nanometer to 10000 nanometer.
Wherein, first insulation material layer, 3 employed insulating material can be any one or multiple advanced low-k materials in fluorine silex glass, porous silicon, charcoal oxygen silicon materials, the silicon hydroxide material, or any one or multiple medium dielectric constant microwave medium material in the silicon dioxide, silicon nitride, silicon oxynitride, carborundum, or any one or multiple high dielectric constant material in the hafnium oxide, aluminium oxide.
Or first insulation material layer 3 is by 2 kinds of insulating material composite constructions, and material sequences from the bottom to top can be silicon dioxide, silicon nitride; Or silicon dioxide, silicon oxynitride; Or silicon dioxide, carborundum; Or silicon dioxide, hafnium oxide; Or silicon dioxide, aluminium oxide; Or hafnium oxide, carborundum; Or hafnium oxide, silicon oxynitride; Or hafnium oxide, silicon nitride; Or hafnium oxide, silicon dioxide; Or aluminium oxide, silicon dioxide; Or aluminium oxide, silicon nitride; Or aluminium oxide, carborundum.
Or first insulation material layer 3 is by 3 kinds of insulating material composite constructions, and material sequences from the bottom to top can be silicon dioxide, silicon nitride, silicon dioxide; Or silicon dioxide, silicon oxynitride, silicon dioxide; Or silicon dioxide, carborundum, silicon dioxide; Or silicon dioxide, hafnium oxide, silicon dioxide; Or silicon dioxide, aluminium oxide, silicon dioxide; Or hafnium oxide, carborundum, silicon dioxide; Or hafnium oxide, silicon oxynitride, silicon dioxide; Or hafnium oxide, silicon nitride, silicon dioxide; Or hafnium oxide, silicon dioxide, carborundum; Or aluminium oxide, silicon dioxide, carborundum; Or aluminium oxide, silicon nitride, silicon dioxide; Or aluminium oxide, carborundum, silicon dioxide.
In the present embodiment, the insulating material that first insulation material layer 3 is selected for use is a silicon dioxide, and the thickness of silicon dioxide is 5000 nanometers.
(c), deposit second insulation material layer 4;
Second insulation material layer, 4 employed insulating material of the present invention can be any one or multiple advanced low-k materials in fluorine silicon glass, porous silicon, charcoal oxygen silicon materials, the silicon hydroxide material, or any one or multiple medium dielectric constant microwave medium material in the silicon dioxide, silicon nitride, silicon oxynitride, carborundum, or any one or multiple high dielectric constant material in the hafnium oxide, aluminium oxide, its thickness range is 1 nanometer to 10000 nanometer.
In the present embodiment, the insulating material that second insulation material layer 4 is selected for use is a porous silicon, and the thickness of porous silicon is 2000 nanometers.
(d), photoetching, etching chip join domain 10 and antenna structure 1, and the cleaning of removing photoresist;
The major parameter of on-chip antenna structure 1 comprises: spacing 9 between the wire coil width 8 of the external diameter 6 of the wire coil number of turns 5, antenna structure, the internal diameter 7 of antenna structure, antenna structure and wire coil.And the present invention mainly is the improvement of being done at spacing 9 between wire coil width 8 or wire coil, thereby produces on the sheet of helical structure of 9 gradual changes simultaneously of spacing between wire coil width 8 and wire coil antenna integrated.
According to the direction of aerial coil ecto-entad, wire coil width 8, its numerical values recited can be by 0.065 micron to 20 millimeters; Spacing 9 between wire coil, and its numerical values recited can be by 0.065 micron to 20 millimeters.
Wherein, wire coil width 8 can have following three kinds of modes:
(1), according to the direction of aerial coil ecto-entad, wire coil width 8 can be changed to narrow successively by wide, every circle reduces to be worth in 0.065 micron to 10 millimeters scope.
(2), according to the direction of aerial coil ecto-entad, wire coil width 8 can change from narrow to wide successively, every circle added value is in 0.065 micron to 10 millimeters scope.
(3), according to the direction of aerial coil ecto-entad, wire coil width 8 can be consistent, live width is in 0.065 micron to 10 millimeters scope.
(1), according to the direction of aerial coil ecto-entad, spacing 9 can be changed to narrow successively by wide between wire coil, every circle reduces to be worth in 0.065 micron to 10 millimeters scope.
(2), according to the direction of aerial coil ecto-entad, spacing 9 can change from narrow to wide successively between wire coil, every circle is increased in 0.065 micron to 10 millimeters the scope.
(3), according to the direction of aerial coil ecto-entad, spacing 9 can be consistent between wire coil, spacing is in 0.065 micron to 10 millimeters scope.
In the present embodiment, the degree of depth of etching antenna 1 is 1500 nanometers; The external diameter 6 of antenna is 20 millimeters; The number of turns 5 of antenna is 3 circles; Antenna metal live width 8 ecto-entads successively decrease, and width is followed successively by 0.5 micron, 0.35 micron, 0.13 micron; The antenna intermetallic successively decreases apart from 9 ecto-entads, and spacing is followed successively by 0.5 micron, 0.35 micron.
(e), depositing metal diffusion impervious layer, plated metal copper;
(f), chemical mechanical polishing of metals, clean;
(g), deposition insulating material protective layer (11), finish the manufacturing of on-chip antenna (1).
The employed insulating material of top layer (11) can be any one or a multiple advanced low-k materials in fluorine silicon glass, porous silicon, charcoal oxygen silicon materials, the silicon hydroxide material, or any one or multiple medium dielectric constant microwave medium material in the silicon dioxide, silicon nitride, silicon oxynitride, carborundum, or any one or multiple high dielectric constant material in the hafnium oxide, aluminium oxide, its thickness range is 1 nanometer to 10000 nanometer.
In the present embodiment, use silicon nitride as the insulation protection material, its thickness is 2000 nanometers.
Though disclose the preferred embodiments of the present invention, those skilled in the art will appreciate that any various modifications, interpolation and replacement all belong to protection scope of the present invention under the situation of open scope in not deviating from claims of the present invention.
Claims (19)
1, the on-chip antenna structure in a kind of integrated circuit; it is characterized in that: after integrated circuit (IC) chip (2) is finished in manufacturing; be deposited with first insulation material layer (3) and second insulation material layer (4) successively at chip surface; in second insulation material layer (4), make on-chip antenna (1); this antenna (1) is realized connecting by chip join domain (10) and bottom chip; around the antenna (1) and bottom is surrounded by second insulation material layer (4), and the deposited on top of antenna (1) has insulating material protective layer (11).
2, on-chip antenna structure as claimed in claim 1 is characterized in that: antenna structure (1) can be made in the front of integrated circuit (IC) chip, also can make or make simultaneously at the positive and negative of integrated circuit (IC) chip at the back side of integrated circuit (IC) chip; Antenna structure (1) can be square, regular hexagon, octagon, dodecagon, positive ten hexagons, positive three dodecagons or circle.
3, on-chip antenna structure as claimed in claim 1 is characterized in that: the antenna number of turns (5) can be that 1 circle is to 10000 circles.
4, on-chip antenna structure as claimed in claim 1 is characterized in that: the antenna metal material is the alloy of copper, aluminium, gold, nickel, chromium, cobalt, titanium, tantalum or above-mentioned metal, and its thickness range is 1 nanometer to 10000 nanometer.
5, on-chip antenna structure as claimed in claim 1 is characterized in that: the numerical values recited of the antenna degree of depth can be by 1 nanometer to 10000 nanometer.
6, on-chip antenna structure as claimed in claim 1 is characterized in that: according to the direction of aerial coil ecto-entad, and wire coil width (8), its numerical values recited can be by 0.065 micron to 20 millimeters; Spacing between wire coil (9), its numerical values recited can be by 0.065 micron to 20 millimeters.
7, on-chip antenna structure as claimed in claim 1 is characterized in that: according to the direction of aerial coil ecto-entad, wire coil width (8) can be changed to narrow successively by wide, and every circle reduces to be worth in 0.065 micron to 10 millimeters scope.
8, on-chip antenna structure as claimed in claim 1 is characterized in that: according to the direction of aerial coil ecto-entad, wire coil width (8) can change from narrow to wide successively, and every circle added value is in 0.065 micron to 10 millimeters scope.
9, on-chip antenna structure as claimed in claim 1 is characterized in that: according to the direction of aerial coil ecto-entad, wire coil width (8) can be consistent, and live width is in 0.065 micron to 10 millimeters scope.
10, on-chip antenna structure as claimed in claim 1 is characterized in that: according to the direction of aerial coil ecto-entad, spacing between wire coil (9) can be changed to narrow successively by wide, and every circle reduces to be worth in 0.065 micron to 10 millimeters scope.
11, on-chip antenna structure as claimed in claim 1 is characterized in that: according to the direction of aerial coil ecto-entad, spacing between wire coil (9) can change from narrow to wide successively, and every circle is increased in 0.065 micron to 10 millimeters the scope.
12, on-chip antenna structure as claimed in claim 1 is characterized in that: according to the direction of aerial coil ecto-entad, spacing between wire coil (9) can be consistent, and spacing is in 0.065 micron to 10 millimeters scope.
13, on-chip antenna structure as claimed in claim 1 is characterized in that: first insulation material layer (3) of surface deposition is made of a kind of material or 2 kinds, 3 kinds materials are compound constitutes, and its thickness range is 1 nanometer to 10000 nanometer.
14, on-chip antenna structure as claimed in claim 13, it is characterized in that: the employed insulating material of first insulation material layer (3) can be any one or a multiple advanced low-k materials in fluorine silex glass, porous silicon, charcoal oxygen silicon materials, the silicon hydroxide material, or any one or multiple medium dielectric constant microwave medium material in the silicon dioxide, silicon nitride, silicon oxynitride, carborundum, or any one or multiple high dielectric constant material in the hafnium oxide, aluminium oxide.
15, on-chip antenna structure as claimed in claim 13 is characterized in that: first insulation material layer (3) is by 2 kinds of insulating material composite constructions, and material sequences from the bottom to top can be silicon dioxide, silicon nitride; Or silicon dioxide, silicon oxynitride; Or silicon dioxide, carborundum; Or silicon dioxide, hafnium oxide; Or silicon dioxide, aluminium oxide; Or hafnium oxide, carborundum; Or hafnium oxide, silicon oxynitride; Or hafnium oxide, silicon nitride; Or hafnium oxide, silicon dioxide; Or aluminium oxide, silicon dioxide; Or aluminium oxide, silicon nitride; Or aluminium oxide, carborundum.
16, on-chip antenna structure as claimed in claim 13 is characterized in that: first insulation material layer (3) is by 3 kinds of insulating material composite constructions, and material sequences from the bottom to top can be silicon dioxide, silicon nitride, silicon dioxide; Or silicon dioxide, silicon oxynitride, silicon dioxide; Or silicon dioxide, carborundum, silicon dioxide; Or silicon dioxide, hafnium oxide, silicon dioxide; Or silicon dioxide, aluminium oxide, silicon dioxide; Or hafnium oxide, carborundum, silicon dioxide; Or hafnium oxide, silicon oxynitride, silicon dioxide; Or hafnium oxide, silicon nitride, silicon dioxide; Or hafnium oxide, silicon dioxide, carborundum; Or aluminium oxide, silicon dioxide, carborundum; Or aluminium oxide, silicon nitride, silicon dioxide; Or aluminium oxide, carborundum, silicon dioxide.
17, on-chip antenna structure as claimed in claim 1, it is characterized in that: the employed insulating material of second insulation material layer (4) can be any one or a multiple advanced low-k materials in fluorine silicon glass, porous silicon, charcoal oxygen silicon materials, the silicon hydroxide material, or any one or multiple medium dielectric constant microwave medium material in the silicon dioxide, silicon nitride, silicon oxynitride, carborundum, or any one or multiple high dielectric constant material in the hafnium oxide, aluminium oxide, its thickness range is 1 nanometer to 10000 nanometer.
18, on-chip antenna structure as claimed in claim 1, it is characterized in that: the employed insulating material of top layer (11) can be any one or a multiple advanced low-k materials in fluorine silicon glass, porous silicon, charcoal oxygen silicon materials, the silicon hydroxide material, or any one or multiple medium dielectric constant microwave medium material in the silicon dioxide, silicon nitride, silicon oxynitride, carborundum, or any one or multiple high dielectric constant material in the hafnium oxide, aluminium oxide, its thickness range is 1 nanometer to 10000 nanometer.
19, a kind of technological process of making on-chip antenna in the integrated circuit comprises the steps:
(a), finish the manufacturing of integrated circuit (IC) chip (2);
(b), at its surface deposition first insulation material layer (3);
(c), second insulation material layer of deposit subsequently (4);
(d), photoetching, etching chip join domain (10) and antenna (1), and the cleaning of removing photoresist;
(e), depositing metal diffusion impervious layer, plated metal copper;
(f), chemical mechanical polishing of metals, clean;
(g), deposition insulating material protective layer (11), finish the manufacturing of on-chip antenna (1).
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