CN1905346A - Controlling method of eliminating device overvoltage when three-level current transformer locking - Google Patents
Controlling method of eliminating device overvoltage when three-level current transformer locking Download PDFInfo
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- CN1905346A CN1905346A CN 200610109295 CN200610109295A CN1905346A CN 1905346 A CN1905346 A CN 1905346A CN 200610109295 CN200610109295 CN 200610109295 CN 200610109295 A CN200610109295 A CN 200610109295A CN 1905346 A CN1905346 A CN 1905346A
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Abstract
The invention is a control method for eliminating overvoltage as a three-level converter (IGBT) latches, where the three-level converter has added buffer absorbing circuit, and the control method comprises: after latching a current OFF time, firstly blanking pulses of outside IGBTs (S11, S14, S21 and S24) and keeping pulses of inside IGBTs (S12, S13, S22, and S23) invariable; after a dead-zone time, switching off some inside IGBT according to pulse states as and before latching; after a current sustaining time, real-timely detecting whether the current of the inverter bridge exceeds some threshold value: once it exceeds the threshold value, immediately latching all the IGBTs; otherwise continuing keeping the front state for a preset time and then latching all the IGBTs.
Description
Technical field
The invention belongs to the flexible power transmission and distribution of electric power system, power electronics and custom power technology field.
Background technology
Neutral point clamp formula (NPC) three-level current transformer is because the advantage of himself structure is widely used in field of power electronics.In the middle of practical engineering application, because there is significant overvoltage problem in the existence of main circuit stray inductance in the three-level current transformer IGBT normal turn-off process, the common employing of this problem added the method solution that buffering absorbs circuit on main circuit.When device broke down, current transformer often adopted the method for blocking trigger impulse, and locking IGBT element to be protecting it, and device can be resumed operation after fault is got rid of as soon as possible.Yet because the special construction of three-level current transformer and buffering circuit, after the pulse locking, the uneven phenomenon of pressing often appears in interior external component, and inner member can bear very high overvoltage, can cause IGBT to damage when serious, and whole device can't move.
Summary of the invention
The present invention proposes in a kind of practical engineering application, the buffering absorption circuit of overvoltage problem in the time of can practically eliminating the IGBT shutoff, and a kind of blocking method of eliminating locking IGBT overvoltage problem is proposed simultaneously.
The control method of abatement device overvoltage when the invention discloses a kind of three-level current transformer (IGBT) locking, described three-level current transformer has additional buffering and absorbs circuit, according to the present invention, when device broke down current transformer employing blockade trigger impulse, the concrete steps of locking IGBT were as follows:
Implement electric current of locking after the turn-off time, block the pulse of outside IGBT (S11, S14, S21, S24) earlier, inboard IGBT (S12, S13, S22, S23) pulse remains unchanged;
Behind a Dead Time, the previous pulse condition of pulse state and locking is turned off inside IGBT during according to locking;
After continuing a time of afterflow, detect the inverter bridge electric current in real time and whether surpass certain threshold value, surpassed threshold value in case detect electric current, then at once with the whole lockings of all IGBT;
If electric current does not surpass above-mentioned threshold value, surface state is after a period of time, with the whole lockings of all IGBT before then continuing to keep.
Description of drawings
Fig. 1 is the main circuit schematic diagram of single-phase bridge three-level inverter.
Fig. 2 has added the three-level inverter main circuit schematic diagram that typical buffering absorbs circuit.
Embodiment
Fig. 1 has shown the former line of reasoning of main circuit of conventional single-phase bridge three-level inverter.Among Fig. 1, comprise left brachium pontis [S11 S12 S13 S14] and right brachium pontis [S21 S22 S23 S24].Wherein, Vdc represents between the three-level current transformer positive and negative busbar total direct voltage ,+Vdc/2 ,-Vdc/2 represents direct current positive and negative busbar voltage respectively, Vo represents three-level current transformer AC side voltage.
Fig. 2 has added the three-level inverter main circuit schematic diagram that buffering of the present invention absorbs circuit.The main effect of buffer circuit is: at the switching device shutdown moment, electric current reduces rapidly, and di/dt is very big, owing to have stray inductance on the circuit, produce a sizable voltage so can respond to, this overvoltage can reduce unit efficiency, influences device safety (overvoltage) when serious; Add buffering and absorb circuit, purpose is that the overvoltage energy absorption that produces when electric current is turn-offed is fallen, and improves device security, improves unit efficiency.
Present ubiquitous problem is, after having added buffering absorption circuit, though absorbed " the shutoff overvoltage " of device, can be when current transformer pulse blocking and after blocking, multiple over-voltage condition (as inside and outside device unbalanced-voltage-division, stable state rectification overvoltage etc.) occurs, harmfulness is very big.
According to the present invention, propose a kind of buffering and absorbed circuit structure, be shown in Fig. 2 dotted portion, can play the effect of good absorption " shutoff overvoltage ", simultaneously can also be by a kind of " locking strategy ", make device when the pulse locking and after the pulse locking, produce without any the device overpressure problems.
The dotted portion of Fig. 2 is that the present invention uses " buffering absorbs circuit " structure chart; Directly be connected with the current transformer main circuit.
According to the present invention, when device broke down current transformer employing blockade trigger impulse, the concrete steps of locking IGBT were as follows:
1) after an enforcement electric current turn-off time of locking (about 6 μ s), the pulse of blocking outside IGBT (S11, S14, S21, S24) earlier, inboard IGBT (S12, S13, S22, S23) pulse remains unchanged;
2) again through behind the Dead Time (about 9 μ s), the previous pulse condition of pulse state and locking is turned off inside IGBT during according to locking; Turn-off according to following (for single brachium pontis, as [S11 S12 S13S14], conducting is represented with 1, turn-offs and represents with 0):
During as locking, the IGBT state is [1100], and then back IGBT state should be [0100] subsequently;
During as locking, the IGBT state is [0011], and then the IGBT state should be [0010] subsequently;
During as locking, the IGBT state is [0110], investigates the previous control cycle of locking again, the state of IGBT, if [1100], then the IGBT state should be [0100] subsequently; If [0011], then the IGBT state should be [0010] subsequently;
3) behind time of afterflow of continuity (time span estimation can with reference to formula (1), as 100 μ s), detect the current transformer electric current in real time and whether surpass certain threshold value, surpassed threshold value in case detect electric current, then at once with the whole lockings of all IGBT; Wherein, this threshold value is commonly defined as the threshold value of current transformer overcurrent protection, and " threshold value " mainly determined by protection setting value of application apparatus, such as the lowest high-current value of switching device etc.
Wherein, L is the continuous current circuit reactance value, and i (t) is locking moment current transformer current instantaneous value, and Vo (t) is locking moment current transformer alternating voltage instantaneous value, and Vdc is the current transformer dc voltage.
4) if electric current does not surpass above-mentioned threshold value, surface state is after a period of time, with the whole lockings of all IGBT before then continuing to keep; The estimation of this time span minimum value can be with reference to formula (1), and wherein i (t) should be maximum operating current (or bigger), and to guarantee that electric current ends really, the order of magnitude is about Millisecond.
As mentioned above, binding buffer absorbs circuit, according to the strategy step of pulse blocking of the present invention, progressively with all switching device lockings, and does not produce any overvoltage.
Advantage and effect
The principle of the invention is simple, effective, do not need DSTATCOM is carried out modification on the main circuit structure, can solve IGBT on the three-level current transformer main circuit structure and turn-off overvoltage and absorb problem, avoid this structural circuit when locking and the overvoltage danger that produces after the locking simultaneously.
The actual DSTATCOM application apparatus that is obtained by this principle through the actual motion test, does not occur that shutoff, afterflow, voltage heavily distribute, four kinds of typical IGBT device over-voltage condition of stable state rectification, and effect is remarkable.
Claims (7)
1, the control method of abatement device overvoltage during a kind of three-level current transformer (IGBT) locking, described three-level current transformer has additional buffering and absorbs circuit, and this method comprises:
1) implement electric current of locking after the turn-off time, block the pulse of outside IGBT (S11, S14, S21, S24) earlier, inboard IGBT (S12, S13, S22, S23) pulse remains unchanged;
2) through behind the Dead Time, the previous pulse condition of pulse state and locking is turned off inside IGBT during according to locking;
3) behind time of afterflow of continuity, detect the inverter bridge electric current in real time and whether surpass certain threshold value, surpassed threshold value in case detect electric current, then at once with the whole lockings of all IGBT;
4) if electric current does not surpass above-mentioned threshold value, surface state is after the scheduled time, with the whole lockings of all IGBT before then continuing to keep.
2, control method as claimed in claim 1, wherein step 2) further comprise:
For single brachium pontis [S11 S12 S13 S14], conducting represents with 1, turn-off with 0 and represent, then:
When locking, the IGBT state is [1100], and then the IGBT state should be [0100] subsequently;
When locking, the IGBT state is [0011], and then the IGBT state should be [0010] subsequently;
When locking, the IGBT state is [0110], investigates the previous control cycle of locking again, the shape of IGBT
If [1100], then the IGBT state should be [0100] subsequently; If [0011], then the IGBT state should be [0010] subsequently.
3, control method as claimed in claim 1, wherein the length of the time of afterflow of step 3) is determined by the freewheel current rate of change of circuit structure decision;
Described threshold value is defined as the threshold value of current transformer overcurrent protection.
4, control method as claimed in claim 1, wherein the length of the described scheduled time of step 4) is by the rated current size of the normal operation of device, and the freewheel current rate of change of main circuit influence determines that jointly time span is a Millisecond.
5, as the control method of claim 1-4, the described turn-off time is 6 μ s.
6, as the control method of claim 1-4, described Dead Time is 9 μ s.
7, as the control method of claim 1-4, described time of afterflow is 100 μ s.
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CNB2006101092951A CN100444509C (en) | 2006-08-09 | 2006-08-09 | Controlling method of eliminating device overvoltage when three-level current transformer locking |
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CNB2006101092951A CN100444509C (en) | 2006-08-09 | 2006-08-09 | Controlling method of eliminating device overvoltage when three-level current transformer locking |
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Cited By (9)
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CN101355295B (en) * | 2008-09-09 | 2011-06-15 | 浙江大学 | Variable buffering network for synchronization commutation |
CN102201783A (en) * | 2011-03-30 | 2011-09-28 | 洛阳理工学院 | Soft switching of three-phase inverter circuit and method thereof |
CN102237672A (en) * | 2010-04-30 | 2011-11-09 | 通用电气公司 | System and method for protection of a multilevel converter |
CN102386754A (en) * | 2010-09-28 | 2012-03-21 | 深圳市英威腾电源有限公司 | Current limiting protection method of diode clamping type multi-electrical level convertor and realization circuit thereof |
CN101414816B (en) * | 2007-09-05 | 2012-03-28 | 株式会社电装 | IGBT devices with built-in diodes and DMOS devices with built-in diodes |
CN101728935B (en) * | 2008-10-16 | 2013-01-09 | 株式会社日立制作所 | Power switch device |
CN104300819A (en) * | 2014-09-17 | 2015-01-21 | 思源清能电气电子有限公司 | Three-level three-phase bridge circuit and modular structure thereof |
CN110417248A (en) * | 2019-08-08 | 2019-11-05 | 成都运达科技股份有限公司 | A kind of diode clamping tri-level RCD absorbing circuit |
CN113325288A (en) * | 2021-05-18 | 2021-08-31 | 长安大学 | NPC three-level inverter fault power-on self-detection method based on current injection method |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07194131A (en) * | 1993-12-28 | 1995-07-28 | Mitsubishi Electric Corp | Three-level inverter device |
JPH07312878A (en) * | 1994-05-17 | 1995-11-28 | Fuji Electric Co Ltd | Snubber circuit of 3-level inverter |
JP3249380B2 (en) * | 1995-06-13 | 2002-01-21 | 株式会社東芝 | Power converter |
JP4491718B2 (en) * | 2004-07-23 | 2010-06-30 | 富士電機ホールディングス株式会社 | 3-level converter |
-
2006
- 2006-08-09 CN CNB2006101092951A patent/CN100444509C/en not_active Expired - Fee Related
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
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CN101414816B (en) * | 2007-09-05 | 2012-03-28 | 株式会社电装 | IGBT devices with built-in diodes and DMOS devices with built-in diodes |
CN101355295B (en) * | 2008-09-09 | 2011-06-15 | 浙江大学 | Variable buffering network for synchronization commutation |
CN101728935B (en) * | 2008-10-16 | 2013-01-09 | 株式会社日立制作所 | Power switch device |
CN102237672A (en) * | 2010-04-30 | 2011-11-09 | 通用电气公司 | System and method for protection of a multilevel converter |
CN102237672B (en) * | 2010-04-30 | 2014-11-12 | 通用电气公司 | System and method for protection of a multilevel converter |
CN102386754A (en) * | 2010-09-28 | 2012-03-21 | 深圳市英威腾电源有限公司 | Current limiting protection method of diode clamping type multi-electrical level convertor and realization circuit thereof |
CN102386754B (en) * | 2010-09-28 | 2013-08-28 | 深圳市英威腾电源有限公司 | Current limiting protection method of diode clamping type multi-electrical level convertor and realization circuit thereof |
CN102201783A (en) * | 2011-03-30 | 2011-09-28 | 洛阳理工学院 | Soft switching of three-phase inverter circuit and method thereof |
CN104300819A (en) * | 2014-09-17 | 2015-01-21 | 思源清能电气电子有限公司 | Three-level three-phase bridge circuit and modular structure thereof |
CN110417248A (en) * | 2019-08-08 | 2019-11-05 | 成都运达科技股份有限公司 | A kind of diode clamping tri-level RCD absorbing circuit |
CN113325288A (en) * | 2021-05-18 | 2021-08-31 | 长安大学 | NPC three-level inverter fault power-on self-detection method based on current injection method |
CN113325288B (en) * | 2021-05-18 | 2023-08-29 | 长安大学 | NPC three-level inverter fault power-on self-checking method based on current injection method |
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