CN1905049A - Data phase-lock circuit and reference signal frequency generating method - Google Patents
Data phase-lock circuit and reference signal frequency generating method Download PDFInfo
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- CN1905049A CN1905049A CN 200610115714 CN200610115714A CN1905049A CN 1905049 A CN1905049 A CN 1905049A CN 200610115714 CN200610115714 CN 200610115714 CN 200610115714 A CN200610115714 A CN 200610115714A CN 1905049 A CN1905049 A CN 1905049A
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Abstract
The invention relates to data phase lock circuitry. It includes a phase lock loop circuit, a judgment circuit, a sensing circuit, and a control circuit. The phase lock loop circuit outputs one reference signal according to the data signal produced by reading the compact disc. When the judgment circuit judges that one dither signal is not exceeded the critical value, the control circuit will records the frequency of the reference signal. When the sensing circuit finds one area of the compact disc is scratched, the phase lock loop circuit will fix the frequency of the reference signal as the newest recorded.
Description
Technical field
The present invention is about a kind of data phase-lock circuit, especially is applied to the data phase-lock circuit in the CD-ROM drive and the frequency generating method of reference signal thereof.
Background technology
Prosperity along with information processing and electronics technology, the various electronic circuits of processing signals that are used for are constantly by invention and improvement, for example wave filter, phase-locked loop (phase locked loop, PLL) circuit etc., wherein phase-locked loop circuit is powerful, can be applicable to synchronously, on the signal Processing such as frequency division or frequency multiplication.In addition, the integrated circuit of phase-locked loop circuit utilization cheapness just can be realized easily.Therefore, phase-locked loop circuit is widely used on the Signal Processing, for example is applied on the signal Processing of CD-ROM drive.
As shown in Figure 1, it is the data phase-lock circuit 10 of known technology.Known data phase-lock circuit 10 comprises phase-locked loop circuit 11, a holding circuit 12 and a circuit for detecting 13.The optical read/write head 101 of CD-ROM drive reads a data-signal S from discs 100
DInput to phase-locked loop circuit 11, phase-locked loop circuit 11 is according to data-signal S immediately
DProduce reference signal S
RTo export CD-ROM drive signal processing circuit 102 to, reference signal S wherein
RCan be used as reference basis in the signal Processing of CD-ROM drive signal processing circuit 102.Phase-locked loop circuit 11 is trace data signal S constantly
D, in the hope of making reference signal S
RFrequency and data-signal S
DFrequency equate.Circuit for detecting 13 is according to the radiofrequency signal (radio frequency, RF) R that are obtained by optical read/write head 101
F,, export a control signal S immediately with the situation of detecting optical read/write head 101 writable disc sheets 100
CTo holding circuit 12, then 12 of holding circuits are according to control signal S
CWhether export one with decision and keep signal S
STo phase-locked loop circuit 11.
Yet, when optical read/write head 101 reads the scratch zone of discs 100, will make data-signal S
DAmplitude acutely change or read less than, and then allow reference signal S
RThe excessive or unpredictable reference signal S of frequency
RFrequency, so cause CD-ROM drive signal processing circuit 102 normally to move.In order to overcome the problems referred to above,, then export the control signal S of a high levels when circuit for detecting 13 detects optical read/write head 101 when reading the scratch zone
C, detect control signal S and work as holding circuit 12
CDuring for high levels, then export one and keep signal S
SSo when phase-locked loop circuit 11 is received and kept signal S
SThe time, reference signal S then
RFrequency can fixedly maintain this moment an abnormal frequency.Detect optical read/write head 101 when reading non-scratch zone up to circuit for detecting 13, then export the control signal S of a low level
C, keep signal S so that holding circuit 12 stops output
STherefore the reference signal S that produced of phase-locked loop circuit 11
RFrequency, can be from the gradual frequency that tracks data-signal of abnormal frequency.Because this abnormal frequency is unpredictable or excessive, therefore need via one period long time delay, just can make reference signal S
RTrack the frequency of data-signal by abnormal frequency, so in time delay, CD-ROM drive signal processing circuit 102 can't normally be moved at this section.
Therefore, how to provide one to be applied to the data phase-lock circuit of CD-ROM drive and the frequency generating method of reference signal thereof, in the hope of can be when finish in scratch that CD-ROM drive read zone, reduce reference signal is tracked the frequency of data-signal by abnormal frequency time delay, make CD-ROM drive signal processing circuit 102 can recover regular event apace, real one of the current important topic that belongs to.
Summary of the invention
Because above-mentioned problem, the present invention discloses one and is applied to the data phase-lock circuit of CD-ROM drive and the frequency generating method of reference signal thereof, when it can finish in the scratch zone that CD-ROM drive read, reduce reference signal and track time delay of the frequency of data-signal, make the CD-ROM drive signal processing circuit can recover regular event apace by abnormal frequency.
The present invention discloses a data phase-lock circuit, and it is applied to a CD-ROM drive.Data phase-lock circuit comprises a phase-locked loop circuit and a control circuit.Phase-locked loop circuit is when receiving a fixed frequency, and then the fixed-frequency with a reference signal is a fixed frequency.When a dither signal did not surpass a critical value, then control circuit write down the frequency of reference signal.And read a zone in its discs of carrying when scratch is arranged when CD-ROM drive, and control circuit output fixed frequency then, wherein fixed frequency is the frequency of the reference signal of state-of-the-art record.
The present invention also discloses the frequency generating method of the reference signal of a data phase-lock circuit, and it is applied to a CD-ROM drive.The frequency generating method of the reference signal of data phase-lock circuit comprises the following step: to produce a reference signal, wherein data-signal is to read a discs by CD-ROM drive to be produced according to a data-signal.Then, according to data-signal and reference signal to produce a dither signal.When dither signal does not surpass a critical value, then write down the frequency of reference signal.When there was scratch in the zone in the discs that reads when detecting, then the fixed-frequency with reference signal was a fixed frequency, and wherein fixed frequency is the frequency of the reference signal of state-of-the-art record.
From the above, because of being applied to the data phase-lock circuit of CD-ROM drive and the frequency generating method of reference signal thereof according to of the present invention one, according to the frequency of dither signal with the record reference signal, so when there was scratch in the zone in the discs that reads when detecting, then the fixed-frequency with reference signal was the frequency of the reference signal of state-of-the-art record.Therefore work as when the scratch of being read is regional to be finished, the frequency of reference signal can be tracked the frequency of data-signal fast by the frequency of the reference signal of state-of-the-art record, track time delay of the frequency of data-signal and reduce reference signal by abnormal frequency, follow-up signal is handled to be recovered regular event apace.
Description of drawings
Fig. 1 is a synoptic diagram, shows the data phase-lock circuit of known technology.
Fig. 2 is a synoptic diagram, shows the data phase-lock circuit according to the embodiment of the invention.
Fig. 3 is a process flow diagram, and demonstration is according to the frequency generating method of the reference signal of the data phase-lock circuit of the embodiment of the invention.
The element numbers explanation:
10 data phase-lock circuits
11 phase-locked loop circuits
12 holding circuits
13 circuit for detecting
100 discs
101 optical read/write heads
102 CD-ROM drive signal processing circuits
20 data phase-lock circuits
21 phase-locked loop circuits
22 decision circuitry
23 control circuits
24 circuit for detecting
231 writing circuits
232 buffering circuits
233 loaded circuits
F
LSTThe frequency of the reference signal of state-of-the-art record
F
REFThe frequency of reference signal immediately
R
FRadiofrequency signal
S
CControl signal
S
DData-signal
S
JDither signal
S
RReference signal
S
SKeep signal
S
SVTracer signal
S
LALoad signal
The step of the frequency generating method of the reference signal of S31～S34 data phase-lock circuit
Embodiment
Below please refer to correlative type, the data phase-lock circuit of the embodiment of the invention and the frequency generating method of reference signal thereof are described, wherein identical assembly will be illustrated with identical reference marks.
Please refer to shown in Figure 2ly, it is the data phase-lock circuit 20 according to the embodiment of the invention.Data phase-lock circuit 20 can utilize DLC (digital logic circuit) to realize.Data phase-lock circuit 20 comprises a phase-locked loop circuit 21, a decision circuitry 22, a control circuit 23 and a circuit for detecting 24.Control circuit 23 comprises a writing circuit 231, a buffering circuit 232 and a loaded circuit 233.The optical read/write head 101 of CD-ROM drive reads a data-signal S from discs 100
DInput to phase-locked loop circuit 21, phase-locked loop circuit 21 is according to data-signal S immediately
DProduce reference signal S
RTo export CD-ROM drive signal processing circuit 102 to, reference signal S wherein
RCan be used as reference basis in the signal Processing of CD-ROM drive signal processing circuit 102.Phase-locked loop circuit 21 is trace data signal S constantly
D, in the hope of making reference signal S
RFrequency and data-signal S
DFrequency equate.Phase-locked loop circuit 21 is according to reference signal S
RWith data-signal S
DBetween phase differential, to export shake (jitter) signal S
JTo decision circuitry 22, decision circuitry 22 is according to dither signal S then
JExport a tracer signal S
SVWriting circuit 231 in the control circuit 23.When decision circuitry 22 is judged dither signal S
JWhen not surpassing a critical value, decision circuitry 22 setting recording signal S then
SVBe one first standard, detect tracer signal S and work as writing circuit 231
SVBe first punctual, then write down the frequency F of reference signal
REFTo buffering circuit 232.Otherwise, when decision circuitry 22 is judged dither signal S
JWhen surpassing a critical value, decision circuitry 22 setting recording signal S then
SVBe one second standard, detect tracer signal S and work as writing circuit 231
SVBe second punctual, then stop to write down the frequency F of reference signal
REFTo buffering circuit 232.
Circuit for detecting 24 is according to a radiofrequency signal R
FCome the zone in the discs that detecting optical driven reads 100 whether scratch is arranged.Circuit for detecting 24 is according to radiofrequency signal R
FExport a load signal S
LALoaded circuit 233 in the control circuit 23, wherein radiofrequency signal R
FBe that read in this zone of optical read/write head 101 from discs 100.As radiofrequency signal R
FBe one first punctual, then circuit for detecting 24 judges that there is scratch in this zone in the discs 100.As radiofrequency signal R
FBe one second punctual, then circuit for detecting 24 judges that this zone in the discs 100 does not have scratch.Therefore, when circuit for detecting 24 detects this zone in the discs 100 when scratch is arranged, then circuit for detecting 24 is set load signal S
LABe one first standard to loaded circuit 233, and loaded circuit 233 detects load signal S
LABe first punctual, then loaded circuit 233 is by taking out the frequency F of the reference signal of (latest) record recently in the buffering circuit 232
LST, with the frequency F of the reference signal that loads state-of-the-art record
LSTIn phase-locked loop circuit 21.Otherwise when circuit for detecting 24 detects zone in the discs 100 when not having scratch, then circuit for detecting 24 is set load signal S
LABe one second standard to loaded circuit 233, and loaded circuit 233 detects load signal S
LABe second punctual, then stop by the frequency F that takes out the reference signal of state-of-the-art record in the buffering circuit 232
LSTSo, stop to load the frequency F of the reference signal of state-of-the-art record
LSTIn phase-locked loop circuit 21.
Therefore, when circuit for detecting 24 detects scratch when zone in the discs 100, then phase-locked loop circuit 21 is with the reference signal S that is exported
RFixed-frequency be the frequency F of the reference signal of state-of-the-art record
LST, the frequency F of reference signal immediately
REFJust can equal the frequency F of the reference signal of state-of-the-art record
LSTIn case read to one not during scratch regional when circuit for detecting 24 detects CD-ROM drive by the scratch zone in the discs 100, then phase-locked loop circuit 21 fixed reference signal S no longer
RFrequency, and direct trace data signal S
DProduce reference signal S
RFrequency, in the hope of making reference signal S
RFrequency and data-signal S
DFrequency equate.Because the frequency F of the reference signal of state-of-the-art record
LSTQuite near data-signal S
DFrequency, so phase-locked loop circuit 21 can be in of short duration time delay, with reference signal S
RFrequency by the frequency F of the reference signal of state-of-the-art record
LSTTrack data-signal S
DFrequency so that reference signal S
RFrequency equal data-signal S
DFrequency.Therefore can reduce the frequency F of reference signal in known technology
REFTrack the time delay of the frequency of data-signal by abnormal frequency, and then can make CD-ROM drive signal processing circuit 102 recover regular event apace.
Comprehensively above-mentioned, will be applied to a CD-ROM drive, as shown in Figure 3 according to the frequency generating method of the reference signal of a data phase-lock circuit of the embodiment of the invention.The frequency generating method of the reference signal of data phase-lock circuit comprises that step S31 is to step S34.The frequency generating method of the reference signal of data phase-lock circuit is at first in step S31, and to produce a reference signal, wherein data-signal reads a discs by CD-ROM drive and produced according to a data-signal.Then in step S32, to produce a dither signal, wherein dither signal produces according to the phase differential between data-signal and the reference signal according to data-signal and reference signal.In step S33, when dither signal does not surpass a critical value, then write down the frequency of reference signal then.Yet when dither signal surpasses critical value, stop to write down the frequency of reference signal.In step S34, when there was scratch in the zone in the discs that reads when detecting, then the fixed-frequency with reference signal was a fixed frequency at last, and wherein fixed frequency is the frequency of the reference signal of state-of-the-art record.When yet this zone in the discs that reads when detecting did not have scratch, the trace data signal was to produce the frequency of reference signal.
The above only is an illustrative, but not is restrictive.Anyly do not break away from spirit of the present invention and category, and, all should be contained in the accompanying Claim its equivalent modifications of carrying out or change.
Claims (10)
1, a data phase-lock circuit, it is applied to a CD-ROM drive, and this data phase-lock circuit comprises:
One control circuit, when a dither signal does not surpass a critical value, then write down the frequency of a reference signal, when there is scratch in the zone of this CD-ROM drive in reading its discs of carrying, then this control circuit is exported a fixed frequency, and wherein this fixed frequency is the frequency of this reference signal of state-of-the-art record; And
One phase-locked loop circuit, when receiving this fixed frequency, then the fixed-frequency with this reference signal is this fixed frequency.
2, data phase-lock circuit as claimed in claim 1, scratch when zone of this CD-ROM drive in reading this discs wherein, this phase-locked loop circuit is followed the trail of a data-signal, and to produce the frequency of this reference signal, wherein this data-signal reads this discs by this CD-ROM drive and produced.
3, data phase-lock circuit as claimed in claim 2, wherein this dither signal is produced according to the phase differential between this reference signal and this data-signal by this phase-locked loop circuit.
4, data phase-lock circuit as claimed in claim 1, wherein this control circuit comprises:
One buffering circuit is in order to store the frequency of this reference signal;
One writing circuit, it judges whether to write down the frequency of this reference signal to this buffering circuit; And
One loaded circuit, it judges whether to load this fixed frequency to this phase-locked loop circuit.
5, data phase-lock circuit as claimed in claim 1 more comprises:
One decision circuitry, when judging this dither signal above this critical value, order about this control circuit and write down the frequency of this reference signal, this decision circuitry is ordered about the frequency that this control circuit stops to write down this reference signal when judging this dither signal and surpass this critical value.
6, data phase-lock circuit as claimed in claim 1 more comprises:
One circuit for detecting, when there is scratch in this zone in detecting this discs that reads, order about this control circuit and export this fixed frequency, when this circuit for detecting this zone in detecting this discs that reads does not have scratch, order about this control circuit and stop to export this fixed frequency.
7, a kind of frequency generating method of reference signal of data phase-lock circuit, it is applied to a CD-ROM drive, comprises:
To produce a reference signal, wherein this data-signal reads a discs by this CD-ROM drive and is produced according to a data-signal;
According to this data-signal and this reference signal to produce a dither signal;
When this dither signal does not surpass a critical value, then write down the frequency of this reference signal; And
When there was scratch in the zone in this discs that reads when detecting, then the fixed-frequency with this reference signal was a fixed frequency, and wherein this fixed frequency is the frequency of this reference signal of state-of-the-art record.
8, the frequency generating method of the reference signal of data phase-lock circuit as claimed in claim 7 more comprises:
When this zone in this discs that reads when detecting does not have scratch, then follow the trail of this data-signal to produce the frequency of this reference signal.
9, the frequency generating method of the reference signal of data phase-lock circuit as claimed in claim 7, wherein this dither signal is to produce according to the phase differential between this data-signal and this reference signal.
10, the frequency generating method of the reference signal of data phase-lock circuit as claimed in claim 7 wherein when this dither signal surpasses this critical value, then stops to write down the frequency of this reference signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006101157142A CN100452222C (en) | 2006-08-11 | 2006-08-11 | Data phase-lock circuit and reference signal frequency generating method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006101157142A CN100452222C (en) | 2006-08-11 | 2006-08-11 | Data phase-lock circuit and reference signal frequency generating method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1905049A true CN1905049A (en) | 2007-01-31 |
| CN100452222C CN100452222C (en) | 2009-01-14 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2006101157142A Active CN100452222C (en) | 2006-08-11 | 2006-08-11 | Data phase-lock circuit and reference signal frequency generating method |
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| CN (1) | CN100452222C (en) |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1166758A (en) * | 1997-08-22 | 1999-03-09 | Samsung Electron Co Ltd | Pll circuit and reproducing device of recording carrier |
| JP2000090590A (en) * | 1998-09-11 | 2000-03-31 | Alps Electric Co Ltd | Optical disk device |
| KR100505634B1 (en) * | 2002-02-23 | 2005-08-03 | 삼성전자주식회사 | Apparatus and method for detecting phase difference between phase reference and wobble signal |
| TWI258137B (en) * | 2003-04-10 | 2006-07-11 | Via Optical Solution Inc | Method and related optical disk accessing apparatus for calibrating optical disk tilt servo system according to non-constant relation between locations and tilt angles of optical disk |
| TWI280564B (en) * | 2003-06-20 | 2007-05-01 | Matsushita Electric Ind Co Ltd | Regenerated signal processor and optical disk player |
| CN100517972C (en) * | 2004-11-29 | 2009-07-22 | 威盛电子股份有限公司 | Phase lock loop circuit and controlling method thereof |
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| CN100452222C (en) | 2009-01-14 |
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