CN1889387A - Correlated detection synchronous module of time division synchronous code division multiple access covering system - Google Patents
Correlated detection synchronous module of time division synchronous code division multiple access covering system Download PDFInfo
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Abstract
This invented coherent detection synchronous module of TD-SCDMA includes a RF detection module and a synchronous process module, in which, said RF detection module detects the RF signals of the TD-SCDMA to get the envelope signals, the synchronous process module carries out digital process to the envelope signals input by the RF detection module to get frame synchronous information and outputs control signals to the TD-SCDMA cover system based on the information to control the on-off state of the up and down links of the cover system, in which, when the signal of the base station is the down time slot, then the up-link of the cover system is controlled off and the down-link is on, otherwise, the down link is controlled off and the up-link is on.
Description
[technical field]
The present invention relates to moving communicating field, relate in particular to a kind of correlation detection synchronization module that is applied to time division synchronous code division multiple access covering system.
[technical background]
Fast development along with China's mobile communication cause, the 2nd present generation or 2.5 third-generation mobile communication systems are at the great demand that all can not satisfy society aspect capacity and the professional ability, and therefore the 2nd generation or 2.5 third-generation mobile communication systems will be replaced by the third generation (3G) mobile communication system.In order progressively to be evolved into third generation network neatly on the basis of second generation network, 3G has three communication standard: WCDMA, cdma2000, TD-SCDMA.TD-SCDMA (Time Division-Synchronous CodeDivision Multiple Access, TD SDMA, abbreviation TD-SCDMA) technology is proposed by China and formally became the 3G (Third Generation) Moblie international standard in 2000, and the system that follows this standard development has the very high availability of frequency spectrum and lower cost.
TD-SCDMA is called as low spreading rate (1.28MCps, 1.28 million chips/sec) time division multiplexing counting scheme in the ITU standard.
The Elementary Time Unit of TD-SCDMA is a radio frames, and frame length is 10ms, and each radio frames is divided into two 5ms standard subframes, and the structure of two standard subframes is identical.Single subframe is made up of 7 conventional time slots of identical time span and three kinds of special time slots (DWPTS, GP and UPPTS), and each subframe has two transfer points, and up-downgoing can be asymmetric.
TS0 is down direction always, and TS1 is up direction always, and TS2, TS3......TS6 will can be appointed as up direction or down direction dynamically according to actual business requirement.DwPTS is a down direction, and UpPTS is a up direction, and the centre by first switching point GP separately.
As the key player who is played the part of in second generation mobile communication covers, covering systems such as repeater will play important effect in 3-G (Generation Three mobile communication system).Because TD-SCDMA has special physical channel structure, can be according to the needs of business, change the time slot switching point neatly, satisfy the needs of up-downgoing non-symmetrical service, therefore, time synchronized plays a very important role to the TD-SCDMA tool, especially needs to realize the accurate switching of uplink and downlink timeslot as the TD-SCDMA covering system of trunking, amplifies and forwarding capability so that finish seamless signal.
Traditional detection method for synchronous obtains the envelope of TD-SCDMA signal by the radio frequency detecting circuit, utilize the feature of descending synchronous code time slot signal envelope then, find the frame synchronization of TD-SCDMA signal by the envelope position of searching for this specific width for the special time width.The method because simple, that cost is lower etc. is former because the TD-SCDMA covering system provides TD-SCDMA signal frame synchronizing function preferably, makes the TD-SCDMA covering system can realize the switching of uplink and downlink timeslot, finish seamless signal and amplify forwarding capability.
But traditional detection method for synchronous exists some shortcomings, and when the TD-SCDMA Signal-to-Noise of input hanged down, performance was bad, and detection this moment synchronized result is inaccurate, can't keep accurately synchronously with the TD-SCDMA signal.
[summary of the invention]
Purpose of the present invention just is the defective at traditional detection method for synchronous existence, by adopting novel related operation method, a kind of correlation detection synchronization module of time division synchronous code division multiple access covering system is provided, under the lower-cost prerequisite of maintenance, provide than the more superior net synchronization capability of traditional detection method for synchronous performance, make it can be applied to the TD-SCDMA covering system, can realize the switching of uplink and downlink timeslot accurately and stably, finish seamless signal and amplify and forwarding capability.
The objective of the invention is to be achieved through the following technical solutions:
The correlation detection synchronization module of this time division synchronous code division multiple access covering system comprises radio frequency detection module and synchronous processing module;
Time division synchronous code division multiple access covering system connects the input of described radio frequency detection module by the output of coupling circuit, the output of radio frequency detection module then connects the input of described synchronous processing module, and the output of synchronous processing module then connects the uplink and downlink link of time division synchronous code division multiple access covering system respectively;
Described synchronous processing module comprises AD sample circuit, AD control module, related operation module, synchronized result authentication module, control signal generating module, control signal driver module, MCU minimum system, MCU communication module and standard envelope generation module;
The AD sample circuit is finished the analog-to-digital conversion of envelope signal, and its input is connected with the output of radio frequency detection module, and its output is connected with the input of AD control module; The AD sample circuit can use comparator circuit to substitute, and when using comparator circuit to substitute, comparator circuit can be placed on radio frequency detection module;
The sampled data that the AD control module is controlled the AD sample circuit and the AD sample circuit is imported passes to the related operation module according to specific form, its output is connected with the input of related operation module, when the AD sample circuit substituted with comparator circuit, the envelope signal that the AD control module is responsible for importing was through to the related operation module;
The related operation module is carried out related operation respectively with the actual envelope signal of AD control module input and two standard envelopes of standard envelope generation module input, further determine the subframe original position of downstream signal then, the output frame synchronous indicating signal is to the synchronized result authentication module, and its output is connected with the input of synchronized result authentication module;
The synchronized result authentication module is verified the synchronous indicating signal of related operation module input, if checking is correct, then output checking accurate indication and synchronous control signal are given control signal generating module, and its output is connected with the input of control signal generating module;
Control signal generating module produces switch-over control signal according to the synchronous control signal of synchronized result authentication module input and the uplink and downlink switching point information of MCU minimum system input, and its output is connected with the input of control signal driver module;
The MCU minimum system communicates by the Monitor And Control Subsystem of bus and covering system, obtains uplink and downlink time slot switching point information and to the various quantity of states of monitoring host computer reporting system, the MCU minimum system is connected with the MCU communication module;
The MCU communication module transfers to from MCU minimum system acquisition uplink and downlink switching point information and with the uplink and downlink switching point information and is attached thereto the standard envelope generation module that connects;
Standard envelope generation module produces two standard envelope signals and transfers to according to uplink and downlink time slot switching point information and is attached thereto the related operation module that connects;
The control signal driver module is converted to the needed level signal of system with the switch-over control signal of control signal generating module input, and its output connects the uplink and downlink link of TD-SCDMA covering system respectively to control its on off operating mode respectively.
Two standard envelope signals that described standard envelope generation module is produced are the lasting duration of a standard subframe, and one of them only comprises TS0 and DwPTS time slot signal; Another then is conventional TD-SCDMA subframe, comprises all downstream signal envelopes.
Described related operation module determines that the detailed process of the subframe original position of downstream signal is:
(1) will carry out related operation by the actual envelope signal of AD control module input and two envelope signals importing by standard envelope generation module, obtain two correlation curves;
(2) determine the peak value number and the corresponding peaks ratio of two correlation curves, and use relevant decision algorithm to determine the original position of subframe.
The level signal that described control signal driver module is produced can be differential signal or CMOS level signal.
Described AD control module, related operation module, synchronized result authentication module, control signal generating module, MCU communication module and standard envelope generation module all are integrated in the fpga chip, also can be integrated in CPLD or EPLD chip.
Compared with prior art, the present invention possesses following advantage: owing to adopted the correlation detection method for synchronous, by using the related operation method, be beneficial to chips such as FPGA and realize, can keep providing the net synchronization capability more superior under the lower-cost prerequisite than traditional method for synchronous performance, make the TD-SCDMA covering system can realize the switching of uplink and downlink time slot accurately and stably, finish seamless signal and amplify and forwarding capability.
[description of drawings]
Fig. 1 is applied to the theory diagram of TD-SCDMA covering system for the present invention;
Fig. 2 is the theory diagram of synchronous processing module of the present invention;
Fig. 3 is the schematic diagram of two standard envelopes that standard envelope generation module is produced among the present invention;
Fig. 4 a, 4b are respectively the application schematic diagram of second embodiment of the invention;
Fig. 5 is the application schematic diagram of third embodiment of the invention;
The schematic diagram of the switch-over control signal of the uplink and downlink timeslot that Fig. 6 is provided for correlation detection synchronization module of the present invention.
[embodiment]
The present invention is further illustrated below in conjunction with drawings and Examples:
The invention discloses the correlation detection synchronization module of a kind of TD SDMA (TD-SCDMA) covering system.This module is utilized the corresponding signal process technology, realizes the frame synchronization to the TD-SCDMA signal.Switch at the corresponding mains switch of corresponding switching point control covering system, thereby between uplink and downlink, switch.
The application block diagram of the present invention in the TD-SCDMA covering system as shown in Figure 1.Described covering system (is made up of LNA, frequency-selecting, power amplifier coupling circuit 101, near-end built-up circuit 102, descending amplifying circuit, also can form by a part wherein) 103, far-end built-up circuit 104, up amplifying circuit (be made up of LNA, frequency-selecting, power amplifier, also can form by a part wherein) 105, radio frequency detection module 106, synchronous processing module 107 and Monitor And Control Subsystem 108 constitute, wherein radio frequency detection module 106 and synchronous processing module 107 are the component part of correlation detection synchronization module of the present invention.Described near-end built-up circuit 102, coupling circuit 101, descending amplifying circuit 103, far-end built-up circuit 104 electrically connect successively and constitute down link; Described far-end built-up circuit 104, up amplifying circuit 105,102 of near-end built-up circuits electrically connect successively and constitute up link.
Covering system is exported to radio frequency detection module 106 with the TD-SCDMA downstream signal of base station after coupling circuit 101 is handled; The TD-SCDMA radiofrequency signal of 106 pairs of inputs of radio frequency detection module carries out obtaining envelope signal after the detection, and with the envelope signal input synchronous processing module 107 that obtains; 107 pairs of TD-SCDMA envelope signals of synchronous processing module carry out digital signal corresponding to be handled the frame synchronization of back acquisition TD-SCDMA signal and controls near-end built-up circuit 102, descending amplifying circuit 103, far-end built-up circuit 104 and up amplifying circuit 105 simultaneously; When synchronous processing module 107 judges that base station signals are descending time slot, control then that up link is closed, down link is opened; Otherwise, then control down link and close and make up link be out state.
See also Fig. 2, described synchronous processing module is by AD sample circuit 201 and FPGA treatment circuit 202, and control signal drive circuit 203 and MCU minimum system 204 constitute.
From the envelope detection signal input AD sample circuit 201 of radio frequency detection module, AD sample circuit 201 can substitute with comparator circuit, can place it in the radio frequency detection module when substituting with comparator circuit; Thereby the signal of AD sample circuit 201 output is sent into described FPGA circuit 202 and is carried out the related synchronization operation and obtain frame synchronization to the TD-SCDMA signal, and the uplink and downlink switch-over control signal of sending the TD-SCDMA covering system is given control signal drive circuit 203; According to the needs of system, control signal drive circuit 203 is with the level type signal of uplink and downlink switch-over control signal driving for needing of input, as CMOS level signal or various differential signal; MCU minimum system 204 communicates by the Monitor And Control Subsystem of 485 buses and covering system, obtains uplink and downlink time slot switching point information and reports various quantity of states.
The core processing module of synchronous processing module is a FPGA circuit 202, and FPGA circuit 202 has been finished the core algorithm of related synchronization, and its inner functional block diagram as shown in Figure 2.Please in conjunction with Fig. 1 and Fig. 2, FPGA circuit 202 each functional module realize among the present invention function and respective handling flow process are as follows:
1) input port of AD control module 213 is connected with the output port of AD sample circuit 201, is responsible for the sampled data that AD sample circuit 201 is controlled and AD sample circuit 201 is imported is passed to related operation module 214 according to specific form; When AD sample circuit 201 usefulness comparator circuits substitute, AD control module 213 be responsible for will input envelope signals through to related operation module 214, perhaps directly do not adopt this AD control module and directly comparator output signal directly exported to described related operation module 214;
2) MCU communication module 211 obtains uplink and downlink time slot switching point information by data/address bus from MCU minimum system 204, and corresponding information is imported standard envelope generation module 212 and control signal generating module 216;
3) standard envelope generation module 212 produces two standard envelope signals according to the uplink and downlink time slot switching point information of input, as Fig. 3, it is the lasting duration of a TD-SCDMA standard subframe that the standard envelope signal that produces continues duration, wherein 1 of standard envelope comprises TS0 and DwPTS time slot signal envelope as shown in Figure 3,2 of standard envelopes comprise all downstream signal envelopes, and the standard envelope 2 among Fig. 3 is standard envelope signals that second uplink and downlink time slot point produced for time between TS3 and the TS4; The standard envelope signal of standard envelope generation module 212 outputs is input to related operation module 214;
4) related operation module 214 is carried out related operation respectively with the actual envelope signal of AD control module 213 inputs and two standard envelope signals of standard envelope generation module 212 inputs, will obtain two correlation curves, because the initial frame head position of actual envelope signal and standard envelope are on time, peak value will appear, difference according to the signal of reality input, article two, the peak value number of correlation curve appearance and corresponding peaks are more different than meeting, peak value number and corresponding peaks ratio according to two correlation curves, use relevant decision algorithm, can find out the subframe original position of TD-SCDMA signal; After related operation module 214 was finished relevant synchronous computing, the output frame synchronous indicating signal was given the synchronized result authentication module 215 that is attached thereto;
5) actual signal is because a variety of causes such as noise jamming, multipaths, the down-going synchronous index signal of related operation module 214 outputs, may be wrong, needing could be in order to produce control signal through 215 checkings of synchronized result authentication module, because wireless sub-frame of the every 5ms transmission of TD-SCDMA signal, if the frame synchronization result of all subframes is correct, per two adjacent index signals are at a distance of 5ms in the frame synchronization index signal that then provides.Around this principle, 215 pairs of related operation modules of synchronized result authentication module, 214 input down-going synchronous index signals are verified, after checking was correct, output was verified accurate indication and is exported correct synchronous control signal and produce control signal for control signal generating module 216;
6) control signal generating module 216 produces the uplink and downlink switch-over control signal of covering system according to the synchronous control signal of input and the uplink and downlink time slot switching point information of MCU communication module input, and the switch-over control signal that produces is given the control signal of the level type of control signal drive circuit 203 needing to obtain.
Please consult Fig. 1 again, the Monitor And Control Subsystem of covering system is by the switching point of 485 interface configuration correlation detection synchronization module uplink and downlink time slots, and configuration scope time slot 1,6 disposes (acquiescence is between time slot 3,4) arbitrarily; If desired at other time slot, the upper strata supervisory control system can realize the software remote update by the new switching point of 485 serial ports notice MCU configuration so.
Among the present invention, described FPGA circuit 202 can use fpga chip to realize, also can use CPLD or EPLD chip to realize, be that described AD control module 213, related operation module 214, synchronized result authentication module 215, control signal generating module 216, MCU communication module 211 and standard envelope generation module 212 all can be integrated in fpga chip, also can be integrated in CPLD or the EPLD chip.
Be applied among second embodiment of optical fiber repeater covering system in the present invention, the optical fiber repeater covering system is made up of relay and capped end two parts, and Fig. 4 a and Fig. 4 b represent the theory diagram of its relay and capped end respectively.Comparison diagram 1 and Fig. 4 a and Fig. 4 b are as can be seen, in the present embodiment, the covering system among first embodiment is separated into the subsystem of two symmetries, the relay is corresponding substantially with the structure of capped end, adopt optical fiber to connect just, to reach the purpose that prolongs communication line.
In conjunction with Fig. 4 a and Fig. 4 b, adopt base station signal that the relay donor antenna receives through DT port access arrangement after coupling circuit to 409 pairs of radio frequency signal demodulators of radio frequency detection module obtain envelope signal, envelope signal enters synchronous processing module 408 again, through after the respective handling of this module, realize synchronously with base station signal exactly, if synchronous processing module 408 judges that base station signal is a descending time slot, then controlling up link closes, down link is opened, the repeater is handled downstream signal and is amplified, again by optical transceiver by Optical Fiber Transmission to capped end.The capped end optical transceiver receives that the next signal of Optical Fiber Transmission is after opto-electronic conversion, couple a signal to radio frequency detection module 418, then enter synchronous processing module 419, after the corresponding signal processing through this module, if synchronous processing module 419 judges that signal is a descending time slot, then to control up link and close, down link is opened, the repeater is handled downstream signal and is amplified, and is emitted to user mobile phone by user antenna.When system detected to ascending time slot, down link was closed, and the up link of capped end and relay all is in out state, so that upward signal is carried out long-distance transmissions to the base station through optical fiber.
Please consult Fig. 4 a and Fig. 4 b again, the Monitor And Control Subsystem of covering system is by the switching point of 485 interface configuration correlation detection synchronization module uplink and downlink time slots, and configuration scope time slot 1,6 disposes (acquiescence is between time slot 3,4) arbitrarily; If desired at other time slot, the upper strata supervisory control system can realize the software remote update by the new switching point of 485 serial ports notice MCU configuration so.
See also Fig. 5, it is applied to the 3rd embodiment of TD-SCDMA covering system for the present invention.Please consult Fig. 1 again, described coupling circuit 101, radio frequency detection module 106 and synchronous processing module 107 can carry out proper transformation according to application in the position of system and be coupling circuit 501 as shown in Figure 4, radio frequency detection module 507 and synchronous processing module 506, this conversion are applicable to wireless discharging-directly station, optical fiber repeater, electric light mixing repeater and supporting with it tower amplifier and trunk amplifier.In this embodiment, covering system is when initialization, synchronous processing module 506 does not provide before the uplink and downlink timeslot judged result, provide control signal control down link and be in normally open, the TD-SCDMA signal of base station via downlink transmission to coupling circuit 501, through radio frequency detection module 507 and synchronous processing module 506, provide difference or cmos signal control near-end built-up circuit 502, descending amplifying circuit 503, far-end built-up circuit 504 and up amplifying circuit 505 by synchronous processing module 506 then, thereby between uplink downlink, switch.
Consult shown in Figure 6ly, be the schematic diagram of the switch-over control signal of the uplink and downlink time slot of correlation detection synchronization module of the present invention.Open descending/up link again after closing in running order Uplink/Downlink among the present invention earlier, the time-delay of service time increases the isolation of uplink and downlink circuit, to avoid the self-excitation of repeater; As an example of using, control that to open up amplifying circuit control line after effective 6 chip of control line that descending amplifying circuit cuts out effective; Control after effective 4 chip of control line that up amplifying circuit cuts out, it is effective to control the control line that descending amplifying circuit opens.In addition, can change effective chip number of the control line that descending amplifying circuit and up amplifying circuit close by corresponding software.
The present invention can be applicable to wireless discharging-directly station, optical fiber repeater, in the covering systems such as electric light mixing repeater, tower amplifier and trunk amplifier, can be the TD-SCDMA covering system and provide a kind of simple and the preferable frame synchronization solution route of performance makes the TD-SCDMA system can realize normal uplink and downlink switching controls.
The present invention is described in narrative mode all the time, and wherein employed term is intended to describe and unrestricted.According to above description, can make many further modifications to the present invention, also can do many variations according to actual needs.Therefore, in additional claim scope, the present invention can adopt various implementation to specifically described embodiment.
Claims (6)
1, a kind of correlation detection synchronization module of time division synchronous code division multiple access covering system is characterized in that:
Comprise radio frequency detection module and synchronous processing module;
The input of radio frequency detection module is connected with the output of the coupling circuit of time division synchronous code division multiple access covering system, the output of radio frequency detection module then connects the input of synchronous processing module, and the output of synchronous processing module then connects the uplink and downlink link of time division synchronous code division multiple access covering system respectively.
Radio frequency detection module will be carried out the envelope signal that envelope detection obtains the TD-SCDMA signal by the downlink radio-frequency signal of coupling circuit input, and export this envelope signal to synchronous processing module;
Described synchronous processing module will by radio frequency detection module input envelope signal carry out obtaining frame synchronization information after the digitized processing, the uplink and downlink link that outputs control signals to time division synchronous code division multiple access covering system according to this frame synchronization information is to control its on off operating mode respectively, when base station signal is descending time slot, control then that upward signal is closed, down link is opened; Otherwise, control then that down link is closed, up link is opened.
2, the correlation detection synchronization module of time division synchronous code division multiple access covering system according to claim 1 is characterized in that: described synchronous processing module comprises AD sample circuit, AD control module, related operation module, synchronized result authentication module, control signal generating module, control signal driver module, MCU minimum system, MCU communication module and standard envelope generation module;
The AD sample circuit is finished the analog-to-digital conversion of envelope signal, and its input is connected with the output of radio frequency detection module, and its output is connected with the input of AD control module; The AD sample circuit can use comparator circuit to substitute, and when using comparator circuit to substitute, comparator circuit can be placed on radio frequency detection module;
The sampled data that the AD control module is controlled the AD sample circuit and the AD sample circuit is imported passes to the related operation module according to specific form, its output is connected with the input of related operation module, when the AD sample circuit substituted with comparator circuit, the envelope signal that the AD control module is responsible for importing was through to the related operation module;
The related operation module is carried out related operation respectively with the actual envelope signal of AD control module input and two standard envelopes of standard envelope generation module input, further determine the subframe original position of downstream signal then, the output frame synchronous indicating signal is to the synchronized result authentication module, and its output is connected with the input of synchronized result authentication module;
The synchronized result authentication module is verified the synchronous indicating signal of related operation module input, if checking is correct, then output checking accurate indication and synchronous control signal are given control signal generating module, and its output is connected with the input of control signal generating module;
Control signal generating module produces switch-over control signal according to the synchronous control signal of synchronized result authentication module input and the uplink and downlink switching point information of MCU minimum system input, and its output is connected with the input of control signal driver module;
The MCU minimum system communicates by the Monitor And Control Subsystem of bus and covering system, obtains uplink and downlink time slot switching point information and to the various quantity of states of monitoring host computer reporting system, the MCU minimum system is connected with the MCU communication module;
The MCU communication module transfers to from MCU minimum system acquisition uplink and downlink switching point information and with the uplink and downlink switching point information and is attached thereto the standard envelope generation module that connects;
Standard envelope generation module produces two standard envelope signals and transfers to according to uplink and downlink time slot switching point information and is attached thereto the related operation module that connects;
The control signal driver module is converted to the needed level signal of system with the switch-over control signal of control signal generating module input, and its output connects the uplink and downlink link of TD-SCDMA covering system respectively to control its on off operating mode respectively.
3, the correlation detection synchronization module of time division synchronous code division multiple access covering system according to claim 2, it is characterized in that: described AD control module, related operation module, synchronized result authentication module, control signal generating module, MCU communication module and standard envelope generation module all are integrated in the fpga chip, also can be integrated in CPLD or EPLD chip.
4, the correlation detection synchronization module of time division synchronous code division multiple access covering system according to claim 2, it is characterized in that: two standard envelopes that described standard envelope generation module is produced are the lasting duration of a standard subframe, and one of them only comprises TS0 and DwPTS time slot signal; Another then is conventional TD-SCDMA subframe, comprises all downstream signal envelopes.
5,, it is characterized in that described related operation module determines that the detailed process of the subframe original position of downstream signal is according to the correlation detection synchronization module of any described time division synchronous code division multiple access covering system of claim 1 to 4:
(1) will carry out related operation by the actual envelope signal of AD control module input and two envelope signals importing by standard envelope generation module, obtain two correlation curves;
(2) determine the peak value number and the corresponding peaks ratio of two correlation curves, and use relevant decision algorithm to determine the original position of subframe.
6, the correlation detection synchronization module of time division synchronous code division multiple access covering system according to claim 5 is characterized in that: the level signal that described control signal driver module is produced can be differential signal or CMOS level signal.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101150339B (en) * | 2007-10-16 | 2012-07-04 | 福建三元达通讯股份有限公司 | A TD-SCDMA trunk amplifier using network modulation synchronization mode |
| CN107231182A (en) * | 2016-03-24 | 2017-10-03 | 上海大唐移动通信设备有限公司 | TD-SCDMA trunk amplifiers and signal synchronisation control means |
| CN111615187A (en) * | 2020-05-20 | 2020-09-01 | 普联技术有限公司 | Wireless signal synchronization method |
| CN113301640A (en) * | 2021-05-17 | 2021-08-24 | 深圳凡维泰科技服务有限公司 | TDD synchronizer for 4G/5G |
-
2006
- 2006-07-14 CN CNB2006100364906A patent/CN100566208C/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101150339B (en) * | 2007-10-16 | 2012-07-04 | 福建三元达通讯股份有限公司 | A TD-SCDMA trunk amplifier using network modulation synchronization mode |
| CN107231182A (en) * | 2016-03-24 | 2017-10-03 | 上海大唐移动通信设备有限公司 | TD-SCDMA trunk amplifiers and signal synchronisation control means |
| CN111615187A (en) * | 2020-05-20 | 2020-09-01 | 普联技术有限公司 | Wireless signal synchronization method |
| CN113301640A (en) * | 2021-05-17 | 2021-08-24 | 深圳凡维泰科技服务有限公司 | TDD synchronizer for 4G/5G |
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| Publication number | Publication date |
|---|---|
| CN100566208C (en) | 2009-12-02 |
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