CN1866482B - Thin film transistor and making method thereof - Google Patents
Thin film transistor and making method thereof Download PDFInfo
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- CN1866482B CN1866482B CN2006100926000A CN200610092600A CN1866482B CN 1866482 B CN1866482 B CN 1866482B CN 2006100926000 A CN2006100926000 A CN 2006100926000A CN 200610092600 A CN200610092600 A CN 200610092600A CN 1866482 B CN1866482 B CN 1866482B
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- 238000000034 method Methods 0.000 title claims abstract description 87
- 239000010409 thin film Substances 0.000 title claims description 43
- 239000004065 semiconductor Substances 0.000 claims abstract description 58
- 238000000608 laser ablation Methods 0.000 claims abstract description 21
- 238000000059 patterning Methods 0.000 claims abstract description 5
- 239000010410 layer Substances 0.000 claims description 126
- 230000008569 process Effects 0.000 claims description 61
- 229920002120 photoresistant polymer Polymers 0.000 claims description 25
- 239000000758 substrate Substances 0.000 claims description 18
- 239000011241 protective layer Substances 0.000 claims description 17
- 230000004888 barrier function Effects 0.000 claims description 16
- 239000004020 conductor Substances 0.000 claims description 13
- 238000004519 manufacturing process Methods 0.000 claims description 4
- -1 insulating barrier Substances 0.000 claims 1
- 238000001259 photo etching Methods 0.000 abstract description 7
- 238000005530 etching Methods 0.000 description 9
- 239000012212 insulator Substances 0.000 description 6
- 239000000463 material Substances 0.000 description 4
- 238000002360 preparation method Methods 0.000 description 4
- 238000000151 deposition Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 2
- 238000012940 design transfer Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
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Abstract
The invention discloses a preparing method of film transistor, which comprises the following steps: forming four film layers with first conductive layer, insulating layer, semiconductor layer and second conductive layer; proceeding the first photo-etching technology; patterning four film layers; making semiconductor layer and the first conductive layer form semiconductor island and grid electrode; proceeding laser ablation technology; defining a channel pattern in the four film layer; removing partial second conductive layer; making the second conductive layer form non-touching source electrode and drain electrode.
Description
Technical field
The present invention relates to a kind of thin-film transistor structure and preparation method thereof, particularly relate to a kind of thin-film transistor that utilizes the making of laser ablation (laser ablation) technology and preparation method thereof.
Background technology
Along with development in science and technology, flat-panel screens has been widely used in the various information products.Common flat-panel screens kind comprises LCD, OLED and plasma scope at present; Wherein because the LCD Technology development is the most ripe; And have that external form is frivolous, power consumption is few and characteristic such as radiationless pollution, therefore be widely used on the portable type information products such as mobile computer, personal digital assistant, mobile phone.Traditionally; LCD mainly is to utilize into the thin-film transistor that array-like is arranged; Cooperate electronic components such as suitable electric capacity, connection gasket to drive liquid crystal pixel, enrich beautiful image with generation, so thin-film transistor is one of key element of LCD.
Thin-film transistor comprises a gate electrode, one source pole electrode, a drain electrode and the semiconductor layer that is used for forming transistor channels.The technology of general existing thin film transistor (TFT) array need be carried out five times photoetching process altogether, that is uses five road photomasks to define the pattern of element such as thin-film transistor.Yet; Because photomask cost impact display floater technology cost is very huge; Therefore in order to reduce the technology cost, display floater technology has been studied to use and has been comprised that four road photomasks of half tone photomask (half-tone mask) accomplish the making of thin film transistor (TFT) array at present.
Please refer to Fig. 1 to Fig. 4, Fig. 1 to Fig. 4 is the existing process schematic representation that uses four road photomasks to make thin-film transistor.As shown in Figure 1; At first on transparency carrier 10 surfaces, form one first conductive layer and a photoresist layer in regular turn; Carry out first photoetching-etching (photolithography-etching process) technology then, to form a gate electrode 12 and a wire pattern 14.Remove the photoresist layer then.Then, as shown in Figure 2, form an insulating barrier 16, semi-conductor layer 18, an ohmic contact layer (ohmic contact) 20,1 second conductive layer 22 and a photoresist layer 24 in regular turn in transparency carrier 10 surfaces.
Then, please refer to Fig. 3, use a halftoning photomask 26, carry out second photoetching-etch process.Wherein, half tone photomask 26 partly distinguish 26a thoroughly corresponding to the predetermined channel pattern place on the gate electrode 12, with patterning photoresist layer 24, and form an etch shield in predetermined semiconductor island top photoresist layer 24.Then as shown in Figure 4, utilize this etch shield to carry out etching, remove part semiconductor layer 18, ohmic contact layer 20 and second conductive layer 22, to form semiconductor island 32, source electrode 28 and drain electrode 30.Carry out several depositing operation and the 3rd and the 4th photoetching and several etch process at last again; And the pixel electrode that on transparency carrier 10, forms a protective layer and be electrically connected on drain electrode is made with thin-film transistor and the pixel electrode accomplished in each pixel or each time pixel.
From the above; Existing thin-film transistor technology is used half tone photomask in second photoetching-etch process; And utilize half of half tone photomask to pass through the channel pattern that area definition goes out thin-film transistor because the size of channel pattern is very accurate, therefore with half pass through area definition go out the half tone photomask of channel pattern also must be very fine; Its manufacturing cost is very high, is about about the twice of general photomask cost.In addition, in case when utilizing half tone photomask to carry out second photoetching-etch process, if the design transfer flaw of channel pattern takes place, then can have a strong impact on thin-film transistor electrically and be difficult to repair.Moreover; The source electrode and the drain electrode pattern lower floor of the thin-film transistor that existing technology is produced all are coated with semiconductor layer; Again because mostly semiconductor layer is that the amorphous silicon material of photaesthesia character is made; So bring out light leakage current (photo current) easily, and then have influence on the electrical performance of thin-film transistor.
From the above, how to produce the thin-film transistor that effectively to avoid light leakage current and to have good quality at lower cost, the problem of still demanding urgently studying for industry.
Summary of the invention
Main purpose of the present invention is to provide a kind of thin-film transistor structure that utilizes the laser ablation process made and preparation method thereof, to solve the problem that above-mentioned existing thin-film transistor technology cost is high and light leakage current takes place easily.
According to claim of the present invention, disclose a kind of method of making thin-film transistor.Form four thin layers at first continuously in a substrate, wherein four thin layers are one first conductive layer, an insulating barrier, semi-conductor layer and one second conductive layer from the bottom to top in regular turn.Then carry out first photoetching-etch process, with while patterning four thin layers, and make semiconductor layer form the semiconductor island, and first conductive layer forms a gate electrode.Carry out a laser ablation (laser ablation) technology then, defining a channel pattern, and remove part second conductive layer, and make second conductive layer form not contacted one source pole electrode and a drain electrode in four thin layers.
According to claim of the present invention; Other discloses a kind of structure of thin-film transistor; On the both sides that it comprises that a gate electrode is located in the substrate, a gate insulator is covered on the gate electrode, the semiconductor island is located on the gate insulator, one source pole electrode and a drain electrode are located at semiconductor island and do not contact with each other, a protective layer is covered in gate electrode, gate insulator, semiconductor island, source electrode, drain electrode and the substrate and a pixel electrode is covered on partial protection layer and the drain electrode, and pixel electrode is electrically connected on drain electrode.Wherein, Gate insulator is rough identical with the size of gate electrode; And greater than the size of semiconductor island, so that gate insulator and gate insulator protrude from the both sides of semiconductor island and form a ladder structure respectively, and the protective layer ladder is covered in the surface of hierarchic structure.
Because the present invention makes method etching simultaneously first conductive layer, first insulating barrier, semiconductor layer and second conductive layer of thin-film transistor; Therefore there is not the existence of semiconductor layer in most of data wire lower floor; Can effectively avoid photo leakage current, and then improve the quality of thin-film transistor.Moreover; The present invention utilizes a laser ablation process to define the channel pattern of semiconductor island; Therefore can omit at least one photoetching process, that is can reduce the use of photomask, can effectively reduce the technology cost and produce thin-film transistor with good quality.
Description of drawings
Fig. 1 to Fig. 4 is the existing process schematic representation that uses four road photomasks to make thin-film transistor;
Fig. 5 to Figure 11 makes the process schematic representation of first embodiment of thin-film transistor for the present invention;
Figure 12 to Figure 13 makes the process schematic representation of second embodiment of thin-film transistor for the present invention.
The simple symbol explanation
10 transparency carriers, 12 gate electrodes
14 wire patterns, 16 insulating barriers
18 semiconductor layers, 20 ohmic contact layers
22 second conductive layers, 24 photoresist layers
26 half tone photomask 26a half pass through the district
30 drain electrodes of 28 source electrodes
32 semiconductor islands, 50 transparent substrates
52 first conductive layers, 54 insulating barriers
56 semiconductor layers, 58 ohmic contact layers
60 second conductive layers, 62 4 thin layers
64 photoresist layer 64a gate patterns
64b semiconductor island pattern 64c wire pattern
66 half tone photomask 66a the first half pass through the district
66b the second half distinguishes the light tight district of 66c thoroughly
68 gate electrodes, 70 semiconductor islands
72 conductor structures, 74 hierarchic structures
76 channel patterns, 78 drain electrodes
80 source electrodes, 82 protective layers
84 contact holes, 86 pixel electrodes
88 conductor structures, 90 half tone photomask
The light tight district of 90a 90b half passes through the district
Embodiment
Fig. 5 to Figure 11 makes the process schematic representation of first embodiment of thin-film transistor for the present invention.Please refer to Fig. 5, a transparent substrate 50 at first is provided, substrate 50 can be glass substrate, quartz base plate or plastic base.Form four thin layers 62 continuously in substrate 50 surface then, wherein four thin layers 62 comprise one first conductive layer 52, an insulating barrier 54, semi-conductor layer 56 and one second conductive layer 60 from the bottom to top in regular turn.Yet; When making four thin layers 62; In order to reduce the impedance of 56 of second conductive layer 60 and semiconductor layers; Usually an ohmic contact layer 58 (for example for N+ doped layer) be can form betwixt, that is first conductive layer 52, insulating barrier 54, semiconductor layer 56, ohmic contact layer 58 and second conductive layer 60 formed in substrate 50 surfaces continuously, as shown in Figure 5.Then, on four thin layers 62, form a photoresist layer 64 again.
As shown in Figure 6 then, carry out first photoetching-etch process, it utilizes a halftoning photomask 66 and in photoresist layer 64, defines a gate pattern 64a, semiconductor island pattern 64b and a wire pattern 64c.Outer boundaries that it should be noted that gate pattern 64a is utilized the first half of half tone photomask 66 to distinguish 66a thoroughly and is defined out, defines and wire pattern 64c utilizes the second half of half tone photomask 66 to distinguish 66b thoroughly.Yet; The first half of half tone photomask 66 is distinguished thoroughly and is accompanied a light tight district 66c in the 66a; Define semiconductor island pattern 64b with the mid portion in gate pattern 64a, the photoresist layer thickness T1 of the semiconductor island pattern 64b that wherein light tight district 66c defines is greater than partly distinguish 66a, gate pattern 64a that 66b defines or the photoresist layer thickness T2 of wire pattern 64c thoroughly with first, second.Afterwards, utilize the photoresist layer 64 of patterning to be used as etch shield again, four thin layers 62 are carried out etching, and form a gate electrode 68, semiconductor island 70 and a conductor structure 72.As shown in Figure 7, the area of gate electrode after the etching 68 and insulating barrier 54 provided thereon is greater than the area of semiconductor island 70, and makes the both sides of four thin layers 62 respectively form a ladder structure 74.In a preferred embodiment, the insulating barrier 54 of each hierarchic structure 74 and the gate electrode 68 width H that protrudes from the projection of semiconductor island 70 is about the width of 2 to 4 microns (micrometer).In addition, behind first photoetching-etch process, still have part photoresist layer 64 to residue in second conductive layer, 60 surfaces.
Then, please refer to Fig. 8, semiconductor island 66 is carried out one first laser ablation process, directly removing the residual photoresist layer 64 of part, and in the channel pattern that wherein defines thin-film transistor 76.As shown in Figure 9 then; Photoresist layer 64 to have channel pattern 76 is used as etch shield; Second conductive layer 60 is carried out one first etch process with ohmic contact layer 58; So that channel pattern 76 is transferred on the semiconductor island 70, in second conductive layer 60, form not contacted source electrode 78 and drain electrode 80 simultaneously.And then photoresist layer 64 removed.
Shown in figure 10, then in substrate 50 surface depositions one protective layer 82, be covered in semiconductor island 70 and conductor structure 68 surfaces.It should be noted that; Because the both sides of semiconductor island 70 have the hierarchic structure 74 of about 2 to 4 microns projections; Therefore when deposition forms protective layer 82, protective layer 82 ladder equably is covered in the surface and the sidewall surfaces of gate electrode 68, insulating barrier 54, semiconductor layer 56, ohmic contact layer 58, source electrode 80 and drain electrode 78.Then, carry out one second laser ablation process, remove part and be positioned at the protective layer 82 of source electrode 80, drain electrode 78 tops, and form a contact hole 84 respectively in source electrode 80, drain electrode 78 tops.In other embodiments; Second laser ablation process can also replace by second photoetching-etch process, and its method is after protective layer 82 forms, and forms a photoresist layer (figure does not show) in substrate 50 surfaces in addition; And carry out the pattern that a photoetching process defines contact hole 84; As etch shield protective layer 82 is carried out etching with the photoresist layer again, in protective layer 82, form after the contact hole 84, remove the photoresist layer again.
Please refer to Figure 11; Then form one the 3rd conductive layer and one the 4th conductive layer in regular turn in substrate 50 surfaces; And carry out the 3rd photoetching-etch process, be covered on partial protection layer 82 and the source electrode 80 and make the 3rd conductive layer form a pixel electrode 86, and make the 4th conductive layer form a conductor structure 88; For example a holding wire is connected in drain electrode 78.In the 3rd photoetching-etch process; Can be prior to forming a photoresist layer (figure does not show) on the 4th conductive layer; Utilize a halftoning photomask 90 to carry out photoetching process then; Wherein the light tight district 90a of half tone photomask 90 is corresponding to predetermined conductor structure 88, and partly distinguishes 90b thoroughly corresponding to pixel electrode 86.Yet in other embodiments, pixel electrode 86 also can form respectively through different photoetching-etch process institute with conductor structure 88.
Please refer to Figure 12 to Figure 13, Figure 12 to Figure 13 makes the process schematic representation of second embodiment of thin-film transistor for the present invention.Wherein, Figure 12 continues the processing step of Fig. 6, behind first photoetching-etch process, forms semiconductor island 70, gate electrode 68 and conductor structure 72 in substrate 50 surfaces; And the area of gate electrode 68 and insulating barrier 54 is greater than the area of semiconductor island 70; And make four thin layers, 62 both sides respectively form a ladder structure 74, follow-up when semiconductor island 70 surfaces form protective layer to help, ladder is covered in whole semiconductor island 70 and gate electrode 68 surfaces equably.After accomplishing first photoetching-etch process, just remove photoresist layer 64.
Shown in figure 13 then, semiconductor island 70 is carried out a laser ablation process, define the channel pattern 76 of thin-film transistor directly to remove part second conductive layer 60.Utilize second conductive layer 60 to be used as etch shield then; To ohmic contact layer 58 etchings; To remove part ohmic contact layer 58, the surface of more alternative etching part semiconductor layer 56 is to form not contacted source electrode 80 and drain electrode 78 on semiconductor layer 56.Subsequent technique; Promptly extremely shown in Figure 11 like above-mentioned first embodiment and Figure 10; Proceed second, third photoetching-etch process or another laser ablation process; Form protective layer 82, pixel electrode 86 in regular turn and as the conductor structure 88 of holding wire, to accomplish the making of thin-film transistor and pixel electrode.
Because laser ablation process can be applicable in the bigger stack materials of quilting material and subsurface material otherness; Just can directly define meticulous pattern with simple process in quilting material; Therefore the present invention's method of making thin-film transistor utilizes laser ablation process directly to define the semiconductor channel pattern, so can exempt photoetching-etch process one.In addition, after forming protective layer, the inventive method can also laser ablation process and on source electrode, grid, produce contact hole, also can save one photoetching-etch process.Therefore, compared to prior art, the present invention makes the method for thin-film transistor only need carry out two to three road photoetching-etch processs, can reduce the use of photomask and effectively reduces the technology cost.Moreover, can produce most of data wire lower floor according to the inventive method and not have the thin-film transistor structure that semiconductor layer exists, can avoid producing light leakage current, and thin-film transistor is had than stabilized quality.In addition; Because the inventive method is passed through the district in half of the employed half tone photomask of first road photoetching-etch process and is used for defining the projection that wire pattern and gate electrode both sides protrude from semiconductor island; Therefore it is so accurate when employed half tone photomask does not need to pass through the area definition channel pattern as prior art with half; Can significantly reduce the cost of half tone photomask, even and the design transfer flaw takes place when passing through the area definition wire pattern with half, also less to the influence of integral panels; So can further improve the thin-film transistor quality, and then the display panels of preferred mass is provided.
Since the inventive method can less number of times photoetching process produce thin-film transistor; Therefore thin-film transistor of the present invention and process are not limit and are applied to display panels, and every display floater or device (machine display panel is for example arranged) with thin-film transistor all can be used the present invention's spirit and make the thin film transistor (TFT) array with good quality and lower cost.
The above is merely the preferred embodiments of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (15)
1. method of making thin-film transistor, it comprises:
Form four thin layers continuously in substrate, this four thin layer is first conductive layer, insulating barrier, semiconductor layer and second conductive layer from the bottom to top in regular turn;
Carry out first photoetching-etch process, with this four thin layer of while patterning, and make this semiconductor layer form semiconductor island, and this first conductive layer forms gate electrode; And
Carry out laser ablation process, defining channel pattern, and remove this second conductive layer of part, and make this second conductive layer form not contacted source electrode and drain electrode in this four thin layer.
2. the method for claim 1 also is included in and forms the photoresist layer on this four thin layer, to carry out this first photoetching-etch process.
3. method as claimed in claim 2; Wherein this laser ablation process directly removes this photoresist layer of part; To define this channel pattern; And after this laser ablation process, utilize this photoresist layer to be used as etch shield and this second conductive layer is carried out first etch process, to form this source electrode and this drain electrode.
4. method as claimed in claim 2; Also be included in and carry out after this first photoetching-etch process; Remove this photoresist layer earlier, carry out this laser ablation process again, form this source electrode and this drain electrode to utilize this laser ablation process directly to remove this second conductive layer of part.
5. the method for claim 1 also is included in and forms ohmic contact layer earlier before forming this second conductive layer, be located between this semiconductor layer and this second conductive layer, and this ohmic contact layer and this four thin layer is formed in this substrate continuously.
6. method as claimed in claim 5, also comprise utilize this channel pattern to carry out second etch process and remove the part this ohmic contact layer.
7. the method for claim 1, wherein this first photoetching-etch process makes the area of the area of this insulating barrier and this gate electrode greater than this semiconductor island, and makes the both sides of this four thin layer respectively form hierarchic structure.
8. method as claimed in claim 7, wherein respectively this insulating barrier in this hierarchic structure and this gate electrode than 2 to 4 microns of this semiconductor island protrusions.
9. method as claimed in claim 7, wherein this first photoetching-etch process utilizes half tone photomask to define this semiconductor island and this gate electrode, and this half tone photomask half pass through the projection of district corresponding to said hierarchic structure.
10. method as claimed in claim 9, wherein this first photoetching-etch process forms conductor structure in addition in this substrate, and this conductor structure comprises this first conductive layer and this insulating barrier, and partly passing through of this half tone photomask distinguished in addition corresponding to this conductor structure.
11. the method for claim 1 also comprises:
In this substrate, form protective layer comprehensively, be covered in this source electrode, this drain electrode, this semiconductor layer, this insulating barrier and this gate electrode surface;
Remove this protective layer of part on this source electrode and this drain electrode surface, to form source electrode contact hole and drain electrode contact hole respectively;
In this substrate, form the 3rd conductive layer; And
Carry out the 3rd photoetching-etch process, form pixel electrode to remove part the 3rd conductive layer.
12. method as claimed in claim 11, wherein this method is utilized second photoetching-etch process, to form this source electrode contact hole and this drain electrode contact hole.
13. method as claimed in claim 11, wherein this method is carried out laser ablation process to this protective layer, to form this source electrode contact hole and this drain electrode contact hole.
14. method as claimed in claim 11 also is included in and forms the 4th conductive layer on the 3rd conductive layer, and the 3rd photoetching-etch process removes part the 4th conductive layer simultaneously, so that the 4th conductive layer forms conductor structure.
15. method as claimed in claim 14, wherein the 3rd photoetching-etch process utilizes half tone photomask to accomplish, and partly passing through of this half tone photomask distinguished corresponding to this pixel electrode.
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CN1866482B true CN1866482B (en) | 2012-06-27 |
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