CN1858888A - Plasma display panel - Google Patents
Plasma display panel Download PDFInfo
- Publication number
- CN1858888A CN1858888A CNA2006100797033A CN200610079703A CN1858888A CN 1858888 A CN1858888 A CN 1858888A CN A2006100797033 A CNA2006100797033 A CN A2006100797033A CN 200610079703 A CN200610079703 A CN 200610079703A CN 1858888 A CN1858888 A CN 1858888A
- Authority
- CN
- China
- Prior art keywords
- electrode
- keeping
- plasmia indicating
- indicating panel
- electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J11/00—Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
- H01J11/20—Constructional details
- H01J11/22—Electrodes, e.g. special shape, material or configuration
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J11/00—Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
- H01J11/10—AC-PDPs with at least one main electrode being out of contact with the plasma
- H01J11/12—AC-PDPs with at least one main electrode being out of contact with the plasma with main electrodes provided on both sides of the discharge space
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J11/00—Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
- H01J11/20—Constructional details
- H01J11/34—Vessels, containers or parts thereof, e.g. substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J11/00—Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
- H01J11/20—Constructional details
- H01J11/46—Connecting or feeding means, e.g. leading-in conductors
Abstract
The invention discloses a plasma display panel, which contains plural address-searching electrodes of front panel, wherein the plural scanning electrodes cascade plural maintaining electrodes, which connect grid and ground. The invention reduces FPC quantity, which saves cost effectively.
Description
One, technical field
The invention relates to Plasmia indicating panel, more detail is about improving the structure of keeping electrode in the electrode of Plasmia indicating panel.
Two, background technology
Plasmia indicating panel was that a unit cell is formed in the next door that forms between header board and the back plate in the past, and the mist (Ne+He) of neon in each unit (Ne), helium (He) or neon and helium or similar main discharge gas are filled with the inert gas that contains small amount of xenon.During the high frequency voltage discharge, inert gas radiates vacuum ultraviolet (Vacuum Ultra Violet rays), excites the light-emitting phosphor that forms between the next door, thereby forms image.This not only thin but also light Plasmia indicating panel, as the developing direction of display unit of new generation, more and more noticeable.
Fig. 1 is the schematic diagram of Plasmia indicating panel structure before the expression.
With reference to Fig. 1 as can be seen, Plasmia indicating panel is at 101 li scan electrodes of front substrate 102 of show image and keep the paired a plurality of electrode pairs of keeping of formation of electrode 103, and paired be arranged in front panel 100 and form on the back substrate 111 at the back side, aforementionedly a plurality ofly keep electrode pair and carry out parallel combination at a certain distance with rear board 110 that its a plurality of addressing electrodes that intersect 113 are arranged.
Front panel 100 comprises: keep the luminous scan electrode in unit 102 and keep electrode 103 thereby make to discharge mutually in the discharge cell, promptly have a pair of scan electrode 102 of transparency electrode (a) that is made of transparent ITO material and the bus electrode of being made by metal material (b) and keep electrode 103.Scan electrode 102 and keep electrode 103 restriction discharging currents is coated with on them and makes the dielectric layer 104 that insulate between electrode pair more than one.On upper dielectric layer 104, be more prone to the protective layer 105 of magnesium oxide (MgO) that has been formed with plated film for making discharging condition.
Rear board 110 is arranged with a plurality of discharge spaces, the strip of the formation discharge cell that promptly is arranged in parallel (perhaps well word shape) spaced walls 112.And carrying out address discharge, to send vacuum ultraviolet a plurality of addressing electrode 113 are corresponding spaced walls 112 parallel installations.To scribble when address discharge be the R that visible rays is sent in display frame on the upper strata of plate 110 in the back, G, B fluorophor 114.Form protection addressing electrode 113 bottom dielectrics 115 between addressing electrode 113 and the fluorophor 114.
If the electrode structure in the former Plasmia indicating panel of checking such formation that will be detailed please refer to Fig. 2.
Fig. 2 is the figure of the electrode structure of Plasmia indicating panel before the expression.
With reference to Fig. 2 as can be seen, the electrode of Plasmia indicating panel is the scan electrode 102 that constitutes at transparency electrode (a) and bus electrode (b) and keeps the stripe-arrangement that forms in electrode 103 front panels, and addressing electrode 113 is at scan electrode 102 and keeps that 103 li at electrode is crisscross to be formed on (not shown) on the rear board.Here addressing electrode 113 is parallel distribution with respect to next door 112.
Scan electrode 102 is the clarity films made from the ITO material with the transparency electrode (a) of keeping electrode 103, and the transparency and conductivity are all fine, but the high defective of resistance is arranged.Therefore scan electrode 102 and keep electrode 103 and can reach the effect that reduces transparency electrode voltage can make luminous ray see through transparency electrode (a) better.
At this moment bus electrode (b) than transparency electrode (a) to design more thinner.Reason is, the Xian Fu Di that bus electrode (b) is held is big, and the visible light of emitting from discharge cell (not shown) can not see through and can only reflect, after therefore cutting off with transparency electrode, and the size decreases of performance picture element, and efficient also can significantly reduce.
In addition, scan electrode and the bus electrode (b) of keeping electrode are when covering is filmed, and the formation time of film can be elongated, can produce and be exposed to outer part or oxidation or dielectric diffusion, produce the problem that the performance of the element of Plasmia indicating panel reduces.
On the contrary, keep before electrode structure improves of the present invention, the structure that will be connected the retaining plate in the former framework of keeping the electrode and the back side describes earlier.
Fig. 3 is the figure that Plasmia indicating panel is kept electrode structure before the expression.
Find out with reference to Fig. 3, form on the plate in front a plurality of keep electrode (Z1～Zn) press piece 500,510,520 classify, by conductivity path 560a, 560b, 560c is in 550 li structures that are connected with the retaining plate of both having deposited 520 of frame.
This moment, better conductivity flexible printing loop (Flexible PrintedCircuit should be used in the conductivity path; FPC) film.
Here, a plurality ofly keep electrode (Z1～Zn) presses piece 500,510, and 520 classification backs are connected with the FPC lithographic film.These FPC lithographic films are kept electrode from Z1 and are begun to keep the distance till the electrode or keep in the quantity of electrode to Zn to cause that according to voltage difference the electric injury possibility is bigger, so will use a plurality of FPC lithographic films.
But because of being connected with a plurality of FPC, so Master Cost greatly increases, this also is the problem that needs consideration.
Three, summary of the invention
The present invention is in order to solve above-mentioned prior art problems, the purpose of this invention is to provide a kind of Plasmia indicating panel, it is when improving the structure of keeping electrode, the stabilization of electrode structure and the simplification that the loop constitutes are kept in assurance, simultaneously, also to reduce the Master Cost of Plasmia indicating panel.
The objective of the invention is to be achieved through the following technical solutions:
A kind of Plasmia indicating panel comprises a plurality of scan electrodes of front panel, above-mentioned a plurality of scan electrodes and a plurality of electrodes of keeping that form side by side, and it is characterized in that: above-mentioned a plurality of electrodes of keeping are connected by common grid, and pass through common grid and be connected with ground.
In addition, a plurality of electrodes of keeping only consist of its feature by transparency electrode.
Also having the ground connection means is its feature for using conductivity adhesive tape or conductivity film.
Also have in addition, the ground connection means for base plate or loop and be connected to its feature.
As mentioned above, before the present invention is described in detail, be embodied in the scanning board in conjunction with scanning board and data-driven plate at the retaining plate that applies voltage on the electrode of keeping of the present invention.
Electrode in the past is 3 electrode structures, uses scan electrode (Y) and keeps electrode (Z), applies the voltage rear drive on addressing electrode (X) drive plate separately.But the present invention is first keeping electrode groundingization, therefore keeps the voltage that applies in the electrode and has the device that retaining plate is removed.
Be configured to ground connection with this, have the driving operation of the Plasmia indicating panel of the scanning board of combination and data-driven plate in Fig. 4 explanation.
The present invention keeps voltage ground connection, so retaining plate and bus electrode are removed, can reach the loop and constitute simply the effect that Master Cost reduces.
In addition, when keeping electrode and do not produce voltage, can use a FPC just can reach the reduction Master Cost, increase the structure stability, improve the effect of aperture opening ratio.
Four, description of drawings
Fig. 1 is the schematic diagram of Plasmia indicating panel structure before the expression.
Fig. 2 is the figure of the electrode structure of Plasmia indicating panel before the expression.
Fig. 3 is the figure that keeps electrode structure of Plasmia indicating panel before the expression.
Fig. 4 is the driving running figure that the Plasmia indicating panel of voltage ground connection is kept in expression.
Fig. 5 is the figure of the electrode structure of expression Plasmia indicating panel of the present invention.
Fig. 6 be Plasmia indicating panel of the present invention keep electrode structure figure.
The description of symbols at main position in the accompanying drawing
803: keep electrode 830: common grid
840: base plate, loop 850: framework
860: the ground connection means
Five, embodiment
Fig. 4 is the figure of the driving operation of the expression Plasmia indicating panel of keeping electrode grounding.
With reference to Fig. 4 as can be seen, Fig. 4 is that each son of forming discharge cell is divided into, and for the initialized reseting period of discharge cell (RP), also has for the address period (AP) of selecting discharge cell and in order to keep (SP) during the keeping of the discharge cell selected.
At reseting period (RP), rise (set up) during the cycle, in scan electrode, apply the set up waveform of positive polarity (+) voltage.Apply positive polarity (+) bias voltage of addressing electrode simultaneously.Setup waveform with positive polarity (+) voltage produces faint discharge (set up discharge) in the cell cube of full frame, thereby produces the wall electric charge in the cell cube.During the whereabouts cycle (SD), the set up waveform of voltage begins to descend till scanning voltage from crest voltage, and the decline ramp waveform applies all scan electrodes simultaneously.This decline ramp waveform produces faint erasure discharge in cell cube, so wipes unnecessary electric charge in the wall electric charge of set up discharge generation and the space charge.Thereby necessary wall electric charge can carry out residual uniformly in the inner address discharge of the cell cube of full frame.
The scanning impulse of address period (AP) negative polarity (-) is applied to scan electrode in order, applies the data pulse of positive polarity (+) simultaneously in the addressing electrode.Scanning impulse and data pulse voltage difference, the wall voltage that (SD) lining produces during the whereabouts, data pulse applies in the cell cube of back address discharge takes place.Such address discharge is at the inner wall electric charge that produces of cell cube.
In addition, (SD) lining is kept and is applied ground connection in the electrode and keep voltage during the whereabouts.
(SP) uses positive polarity (+) between the scan electrode and negative polarity (-) to apply simultaneously and keeps pulse during keeping.Like that, address discharge and wall voltage and keep impulse summation in the unit selected and the unit whenever applies when keeping pulse simultaneously, scan electrode and keep between the electrode to produce and keep discharge with the surface discharge form.Keeping pulse here has and keeps the same magnitude of voltage of voltage.
Like this scanning board of combination with the driving pulse of keeping in the electrode supply stability of scan electrode ground connectionization after, keeping discharge and being able to evenly, and address discharge also can become by force at the most weak position scanning voltage, can make discharges regulates more smooth and easyly.
As mentioned above, by being removed that the scanning board of combination embodies to keeping the retaining plate that applies voltage in the electrode because keep electrode grounding, thus transparency electrode and general line electrode constitute keep electrode and can remove bus electrode.Here any one can be removed in transparency electrode and the bus electrode, is that bus electrode is removed in the present invention.
In view of the above, we see that the following bus electrode of keeping electrode is the removal state.
Fig. 5 is the figure of the electrode structure of expression Plasmia indicating panel of the present invention.
As shown in Figure 5, we can see that scan electrode 602 is made of transparency electrode 602a and bus electrode 602b, keep electrode 603 and are made of transparency electrode 603a, the state that discharge cell 614 and it form.Form next door 612 between the discharge cell 614.
Because of keeping electrode 603 ground connection, thus retaining plate (not shown) be removed, because of resistance does not take place, so can remove bus electrode.Because resistance does not take place, thus the aperture opening ratio raising, and efficient also improves.In addition, bus electrode is removed the bus electrode that can solve trickle wire spoke and also will be designed, and covers in the bus electrode then when filming, and the oxidation of generation and the problem of diffusion can make the loop simplification like this and can reduce Master Cost.
Keep like this after the electrode grounding,, reach and improve the structure of keeping electrode, strengthen the purpose of stability by keeping the removal of bus electrode in the electrode.
Fig. 6 is the figure that keeps electrode structure ground connection process of expression Plasmia indicating panel of the present invention.
With reference to Fig. 6 as can be seen, a plurality of electrode (structures that Z1～Zn) 803 only has transparency electrode after bus electrode is removed with the same being meant shown in Figure 5 of keeping.Resistance does not take place in a plurality of electrodes 803 of keeping, and a plurality of electrode of keeping (does not produce the voltage difference of distance or number, after therefore common grid (bar) 830 are connected by ground connection means 860, forms ground connection between the Z1～Zn).
At this moment ground connection means 860 can be used the conductivity path, comprise conductivity adhesive tape or conductivity film.That is, the conductivity film is FPC (Flexible Printed Circuit) lithographic film.At this moment the common grid 803 ground connection means 860 that possess are carried out ground connection processing after 840 li connections of base plate or loop at the framework back side.
Shown in former Fig. 3, use most conductive paths, a plurality ofly to keep electrode (Z) in order connecting, to keep the resistance that electrode 803 ground connection cause here and can not take place, all can use any conductivity adhesive tape or conductivity film though use most FPC lithographic films.
No matter use a conductivity adhesive tape or conductivity film all can reduce Master Cost.
Those skilled in the art in the invention are under the prerequisite that does not change technical solution of the present invention, and how other implements and can go operation according to the understanding of oneself concrete form.So it only is illustrative in all respects that above technical examples is interpreted as, rather than unalterable.The present invention and all be included within the scope of the present invention by all changes or form that close notion draws.
Claims (4)
1, a kind of Plasmia indicating panel comprises a plurality of scan electrodes of front panel, above-mentioned a plurality of scan electrodes and a plurality of electrodes of keeping that form side by side, and it is characterized in that: above-mentioned a plurality of electrodes of keeping are connected by common grid, and pass through common grid and be connected with ground.
2, Plasmia indicating panel according to claim 1 is characterized in that: above-mentioned a plurality of electrodes of keeping are only constructed by transparency electrode.
3, Plasmia indicating panel according to claim 1 is characterized in that: above-mentioned ground connection is adopted conductivity adhesive tape or conductivity film.
4, Plasmia indicating panel according to claim 1 is characterized in that: above-mentioned ground connection adopts base plate to be connected with ground or the loop is connected with ground.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020050077021A KR100692057B1 (en) | 2005-08-23 | 2005-08-23 | Plasma Display Panel |
| KR1020050077021 | 2005-08-23 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1858888A true CN1858888A (en) | 2006-11-08 |
| CN100452282C CN100452282C (en) | 2009-01-14 |
Family
ID=37297778
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2006100797033A Expired - Fee Related CN100452282C (en) | 2005-08-23 | 2006-05-09 | Plasma display panel |
Country Status (2)
| Country | Link |
|---|---|
| KR (1) | KR100692057B1 (en) |
| CN (1) | CN100452282C (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2794151B2 (en) * | 1992-08-25 | 1998-09-03 | テクトロニクス・インコーポレイテッド | Plasma addressing structure |
| JP2001195036A (en) * | 1999-10-28 | 2001-07-19 | Sony Corp | Plasma address display device and its driving method |
| KR100705290B1 (en) * | 2004-05-19 | 2007-04-10 | 엘지전자 주식회사 | Device for Driving Plasma Display Panel |
-
2005
- 2005-08-23 KR KR1020050077021A patent/KR100692057B1/en not_active IP Right Cessation
-
2006
- 2006-05-09 CN CNB2006100797033A patent/CN100452282C/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| KR20070022957A (en) | 2007-02-28 |
| CN100452282C (en) | 2009-01-14 |
| KR100692057B1 (en) | 2007-03-12 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090114 |