CN1855183A - Multiplexing data circuit and its control - Google Patents
Multiplexing data circuit and its control Download PDFInfo
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- CN1855183A CN1855183A CNA2005100679390A CN200510067939A CN1855183A CN 1855183 A CN1855183 A CN 1855183A CN A2005100679390 A CNA2005100679390 A CN A2005100679390A CN 200510067939 A CN200510067939 A CN 200510067939A CN 1855183 A CN1855183 A CN 1855183A
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Abstract
The invention is about a data multiplex electric circuit and its controlling method. The image data pressure sign outputs in proper sequence to the sub-pixel data line of the single pixel for every image data pressure sign outputs to the single pixel from the image data driving element on the display board; a sub-transmit circuit sets on every data line which is some switch path by a group of multiplex controlling sign control. The way is: every image data pressure sign which outputs to the single pixel from the image data driving element passes in proper sequence by the sub-transmitting circuit, in order to outputting the image data pressure sign in proper sequence to the data line of the sub-pixel.
Description
Technical field
The present invention relates to a kind of method of control data signal,, utilize the control of multiplexing signal, make data-signal form the guiding path of leggy at the data-signal of display pixel.
Background technology
In recent years, amorphous silicon film transistor (a-Si TFT) panel technology is constantly progressive, comprising the design that can be integrated in driving circuit on the panel, for example utilize scanning shift circuit (Shift Register) or the multiplexing data circuit (Data De-multiplexer) of amorphous silicon film transistor for element.But because the amorphous silicon film transistor element easily has the wild effect of critical voltage displacement (Vth Shift) when being subjected to applying bias (bias stress), along with the increase of service time, the degree of critical voltage displacement can have a strong impact on the normal operation of scanning shift circuit or multiplexing data circuit.
The multiplexing data circuit that is built in the tradition on the panel is a kind of low-temperature polysilicon film transistor (LTPS TFT) technology of utilizing, as shown in Figure 1.This multiplexing data circuit is characterised in that, the signal of video signal that each image data end is sent can be via the timesharing conducting in proper order of three thin film transistor switch, and export the timesharing of image data voltage signal to adjacent three data lines in proper order, red (R), green (G), blue (B) three sub-pixels of single pixel on this adjacent three data lines control display panel.And the thin film transistor switch of this multiplexing data circuit mostly is the low-temperature polysilicon film transistor of p type.
In order to make those thin film transistor switch can timesharing conducting in proper order, three multiplex's control signals then must be arranged, and the frequency of this control signal is identical with the sweep frequency of display panel, also be to be equal to a scanning pulse bandwidth (1-H its cycle, the cycle of a horizontal signal), and the active duty cycle of each multiplex's control signal (Duty) is 1/3, and the conduction period of this multiplex's control signal staggers mutually.
This multiplexing data circuit is if change into when using amorphous silicon film transistor (a-Si TFT) as switch, as shown in Figure 2.Because amorphous silicon film transistor mostly is the n type, and multiplex's control signal of employed three correspondences then as shown in Figure 3, because the frequency of thin film transistor (TFT) conducting is identical with the sweep frequency of display panel, and active duty cycle (Duty) is 1/3.Under this condition of work, the change of the easy producing component characteristic of amorphous silicon film transistor, particularly therefore the critical voltage value of transistor unit (Vth) can drift about increases, cause the conduction impedance increase of multiplexing data circuit, slow down the reaction that the image data voltage signal writes, severe patient can influence the correctness that image data shows, causes the life-span thereby the shortening of display panel.
To this problem, U.S. Pat 6,690,347 " Shift register and liquidcrystal display using the same " (Feb.10,2004) disclosed a kind of control method that data line is divided into 8 blocks, if the data line of panel adds up to 528, then have 66 data lines in each block.Transistor switch by being built in the control in each block makes these 8 blocks can share the input of 66 signal of video signal, reaches the effect of saving incoming line and image data driving element cost.
This control method is subjected to 1 multiplexing signal control respectively for all on-off elements that utilize amorphous silicon film transistor (a-SiTFT) to form in each block, utilize 8 independently multiplex's control signals, transistor switch in each block of sequential start, and finish the input of each block signal of video signal in regular turn.The frequency of these 8 independent multiplex's control signals is identical with the sweep frequency of display panel, also be to be equal to a scanning pulse bandwidth cycle, the active duty cycle of each multiplex's control signal (Duty) is 1/8, and the conduction period of these 8 multiplex's control signals staggers mutually.
This patent US 6,690,347 compared to aforesaid classic method, owing to used 8 multiplex's control signals, the active duty cycle (Duty) 1/3 of transistor switch can be reduced to 1/8, improve or elimination so that amorphous silicon film transistor element critical voltage displacement (Vth Shift) phenomenon can be slowed down, thereby the stability of raising multiplexing data circuit extends working time.Following two shortcomings but therefore this patent US 6,690,347 derives also
1, the ON time of the transistor switch of multiplexing data circuit can reduce, and therefore, can provide the time of image data voltage input to shorten.For example, when driving resolution was the panel of 176 * RGB * 192, the ON time of this transistor switch was about 28 μ sec in the aforementioned conventional method, and the ON time of the transistor switch of this U.S. Pat 6,690,347 can be reduced to 10 μ sec.So in order in shorter time, to finish the input of image data voltage, this factor causes the user must be noted that: (a) the promotion ability of the image data driving element of display panel need be strengthened, and the cost of the stronger image data driving element of this type of promotion ability will be than general height.(b) resistance of the transistor switch of multiplexing data circuit need be lower, promptly need larger sized multiplex's transistor switch, and amorphous silicon film transistor element critical voltage offset phenomena must be controlled in the lower mobility scale.(c) resistance of the transistor switch in each sub-pixel also needs lowlyer, needs larger sized transistor, is unfavorable for keeping of sub-pixel aperture opening ratio like this.
2, the frequency of operation of transistor switch still is same as the sweep frequency of display panel, though with the active duty cycle reduction of transistor switch, frequency is too high not good on the contrary to the effect that suppresses amorphous silicon film transistor element critical voltage offset phenomena.
Summary of the invention
Fundamental purpose of the present invention is to provide a kind of multiplexing data circuit and control method thereof, the transistor switch that makes multiplexing data circuit is when active duty cycle reduces, the ON time of transistor switch can not reduce, thereby the time of image data voltage input can not shorten.
Secondary objective of the present invention is that the transistor switch of multiplexing data circuit is when active duty cycle reduces, frequency of operation also reduces, elongate length effective time of the negative bias condition of transistor switch when ending, the negative bias condition is increased the effect that suppresses amorphous silicon film transistor element critical voltage offset phenomena, improve the stability of multiplexing data circuit, extend working time.
Multiplexing data circuit that another object of the present invention is to provide and control method thereof, the promotion ability that makes the image data driving element is not needed to strengthen, the size of the transistor switch in each sub-pixel does not need to increase, and can keep the aperture opening ratio of sub-pixel like this.
The present invention is a kind of multiplexing data circuit, the data line that is connected to the sub-pixel of single pixel for each output of image data driving element on the display panel respectively is provided with a sub-transmission circuit on those data lines, and each sub-transmission circuit is controlled by multiplex's control signal.
And the image data voltage signal timesharing of this image data driving element output exports the data line of the sub-pixel of this single pixel of control in proper order to, by the sub-transmission circuit on this data line, when the image data driving element each export the image data voltage signal of single pixel to will be via the timesharing conducting in proper order of this a little transmission circuit, thereby the image data voltage signal is exported to the data line of this sub-pixel.
Wherein this sub-transmission circuit is made up of a plurality of transistor switches institute that is connected in parallel, and a plurality of multiplexing signal that these transistor switches are cooperated control, and making the sub-transmission circuit of the affiliated data line of single pixel of same time only have the one-transistor switch is conducting.
Description of drawings
Fig. 1 is one of synoptic diagram of traditional multiplexing data circuit.
Fig. 2 be traditional multiplexing data circuit synoptic diagram two.
Fig. 3 is the synoptic diagram of multiplex's control signal of Fig. 2.
Fig. 4 is a multiplexing data circuit synoptic diagram of the present invention.
Fig. 5 is the internal circuit synoptic diagram of sub-transmission circuit RX, GX, BX.
Fig. 6 is the synoptic diagram one of multiplex's control signal of the present invention.
Fig. 7 is the synoptic diagram two of multiplex's control signal of the present invention.
Embodiment
Relevant detailed content of the present invention and technical descriptioon, existing accompanying drawings is as follows:
The present invention is connected to the data line of the sub-pixel of single pixel for each output of image data driving element on the display panel, this multiplexing data circuit comprises a sub-transmission circuit that is separately positioned on this data line, and the image data voltage signal timesharing of this image data driving element output exports the adjacent data line of the sub-pixel of this single pixel of control in proper order to, and this sub-transmission circuit respectively is subjected to a plurality of switches path of one group of multiplex's control signal control.By this, the image data driving element each export the image data voltage signal of single pixel to will be via the timesharing conducting in proper order of this sub-transmission circuit, and the image data voltage signal is exported to the data line of this sub-pixel.
Wherein this sub-transmission circuit is made up of a plurality of transistor switches institute that is connected in parallel, and the multiplexing signal that this transistor switch is cooperated controls, and making the same time only have the one-transistor switch is conducting.
Please consult shown in Figure 4 earlier, each output of one image data voltage driven element 10 all can be via the timesharing conducting in proper order (present embodiment is three sub-pixels of single pixel tool red (R), green (G), blue (B)) of three sub-transmission circuit RX, GX, BX, thereby the timesharing of image data voltage signal is exported in proper order to adjacent three data lines of the sub-pixel of single pixel on the display panel, red (R), green (G) of single pixel, blue (B) three sub-pixels on these adjacent three data line may command display panels.For example: this image data voltage driven element 10 is by the image data voltage signal of output terminal S1 (and S2) output, understand timesharing conducting in proper order, and the timesharing of image data voltage signal is exported in proper order to adjacent three data line DR1, DG1, the DB1 (reaching DR2, DG2, DB2) of single pixel via sub-transmission circuit RX1, GX1, BX1 (reaching RX2, GX2, BX2).
Please consult shown in Figure 5 again, the internal circuit of its each sub-transmission circuit RX, GX, BX (being RX1, GX1, BX1 and RX2, GX2, BX2) all by a plurality of transistor switches (amorphous silicon film transistor) be connected in parallel the institute form, also promptly between input with export between, have a plurality of amorphous silicon film transistor switch in parallel to join.Respectively there are three transistor switches to be connected in parallel in (single pixel has three sub-pixels red (R), green (G), blue (B)) each sub-transmission circuit RX, GX, the BX in the present embodiment.And three transistor switch T1, T2, the T3 of sub-transmission circuit RX inside are controlled by multiplex's control signal R1, R2, R3 respectively; Three transistor switch T4, T5, the T6 of sub-transmission circuit GX inside controlled by multiplex's control signal G1, G2, G3 respectively; Three transistor switch T7, T8, the T9 of sub-transmission circuit BX inside controlled by multiplex's control signal B1, B2, B3 respectively.
Again, the frequency ratio of this multiplexing signal and display panel scanning equals the inverse of transistor switch number in the sub-transmission circuit; In addition, the active duty cycle of this each multiplex's control signal (Duty) equals the inverse of transistor switch total number in all sub-transmission circuits that this single pixel comprises, and effective duration of work of this multiplex's control signal is for staggering mutually.For example be made up of three sub-pixels when this single pixel, that just has three sub-transmission circuits, and then the active duty cycle of each multiplex's control signal (Duty) equals the inverse of the interior all transistor switch number of three sub-transmission circuits.
With present embodiment, the relation of these 9 multiplex's control signals (R1, R2, R3, G1, G2, G3, B1, B2, B3) as shown in Figure 6.The frequency of this multiplex's control signal is the sweep frequency 1/3 (because each sub-transmission circuit comprises three transistor switches) of display panel, also be to be equal to three scanning pulse bandwidth (3-H the cycle, the cycle of three horizontal signals), the active duty cycle of each multiplex's control signal (Duty) is 1/9, and the conduction period of these 9 multiplex's control signals staggers mutually, be R1 in regular turn, G1, B1, R2, G2, B2, R3, G3, B3, as shown in Figure 7, form the control method of a plurality of paths of a kind of leggy (Multi-Phase and Multi-Path), the image data voltage signal that makes this output terminal S1 (and S2) output is input data line DR1 in regular turn, DG1, DB1 (and DR2, DG2, DB2) red (R) on, green (G), blue (B) three sub-pixels.
Each of this image data voltage driven element 10 is exported the timesharing conducting in proper order via three sub-transmission circuit RX, GX, BX, and the timesharing of image data voltage signal is exported in proper order to the data line of the sub-pixel of single pixel.The internal circuit of each sub-transmission circuit RX, GX, BX by a plurality of amorphous silicon film transistor switch in parallel join the institute form, cooperate the control of a plurality of multiplexing signal, form a kind of a plurality of guiding paths of leggy.The conduction mode that staggers mutually of phase place by this, the present invention will be more suitable in the application of using amorphous silicon film transistor as the element of multiplexing data circuit.
The multiplexing data circuit (seeing Fig. 1 and Fig. 2) that is built on the panel in the tradition with the multiplexing data circuit of present embodiment and control method has following characteristics:
One, owing to used 9 multiplex's control signals, the active duty cycle (Duty) 1/3 of transistor switch can be reduced to 1/9, so that can slow down improvement or elimination as the amorphous silicon film transistor element critical voltage offset phenomena of transistor switch, improve the stability of multiplexing data circuit, extend working time.
Two, the present invention can avoid U.S. Pat 6,690, two shortcomings of 347.
(1) when the transistor switch in this multiplexing data circuit when active duty cycle reduces, the ON time of this transistor switch can not reduce, and can provide the time of image data voltage input can not shorten.For example, when driving resolution was the panel of 176 * RGB * 192, U.S. Pat 6,690,347 ON time were about 10 μ sec, and ON time of the present invention can maintain about 28 μ sec (aforesaid embodiment).
(2) frequency of operation of the transistor switch in this multiplexing data circuit can be reduced to 1/3 (aforesaid embodiment) of display panel sweep frequency.Therefore, compared to U.S. Pat 6,690,347, the present invention has the following advantages:
The promotion ability of a, image data driving element does not need to strengthen, and can avoid increasing the cost of image data driving element.
The resistance of b, the transistor switch in each sub-pixel does not need to reduce, and does not need larger sized transistor, can keep the aperture opening ratio of sub-pixel.
C, transistor switch are when active duty cycle reduces, frequency of operation also is reduced to 1/3 of display panel sweep frequency, also can elongate length effective time of the negative bias condition of transistor switch when ending, the negative bias condition is increased the effect that suppresses amorphous silicon film transistor element critical voltage offset phenomena, improve the stability of multiplexing data circuit, extend working time.
Comprehensive speech, multiplexing data circuit of the present invention, and the control method of utilizing a plurality of paths of leggy (Multi-Phase and Multi-Path) are more suitable in the application of using amorphous silicon film transistor as the element of multiplexing data circuit.This multiplexing data circuit and control method can make the amorphous silicon film transistor element critical voltage offset phenomena of multiplex's switch slow down or to eliminate, and improve the stability (Stability) of multiplexing data circuit, the service time of relative prolongation panel.
The above is the preferred embodiments of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc. and all should be included within protection scope of the present invention.
Claims (9)
1. multiplexing data circuit is connected to the data line of the sub-pixel of single pixel for each output of image data driving element on the display panel, it is characterized in that:
One sub-transmission circuit respectively is set on described data line; And
Each sub-transmission circuit is controlled by one group of multiplex's control signal.
2. multiplexing data circuit according to claim 1, it is characterized in that described sub-transmission circuit by a plurality of transistor switches be connected in parallel the institute form.
3. multiplexing data circuit according to claim 2 is characterized in that described transistor switch is the amorphous silicon membrane transistor.
4. the control method of a multiplexing data circuit, each exports the image data voltage signal of the sub-pixel of single pixel to for image data driving element on the display panel, it is characterized in that:
Respectively be provided with a sub-transmission circuit on the data line of described sub-pixel; And
A plurality of switches path that each sub-transmission circuit is controlled by one group of multiplex's control signal;
By timesharing a plurality of switches path of the described sub-transmission circuit of conducting in proper order, and the image data voltage signal is exported to the data line of the sub-pixel of single pixel.
5. control method according to claim 4, it is characterized in that described sub-transmission circuit by a plurality of transistor switches be connected in parallel the institute form.
6. control method according to claim 5 is characterized in that described transistor switch is the amorphous silicon membrane transistor.
7. control method according to claim 4, the effective duration of work that it is characterized in that described multiplex's control signal is for staggering mutually.
8. control method according to claim 4 is characterized in that the frequency of described each multiplexing signal and the frequency ratio that display panel scans equal the inverse of sub-transmission circuit internal transistor number of switches.
9. control method according to claim 4, the active duty cycle that it is characterized in that described each multiplex's control signal equal the inverse of transistor switch total number in all sub-transmission circuits that described single pixel comprises.
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| Application Number | Priority Date | Filing Date | Title |
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| CNA2005100679390A CN1855183A (en) | 2005-04-28 | 2005-04-28 | Multiplexing data circuit and its control |
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| CNA2005100679390A CN1855183A (en) | 2005-04-28 | 2005-04-28 | Multiplexing data circuit and its control |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102456387A (en) * | 2010-10-15 | 2012-05-16 | 台湾积体电路制造股份有限公司 | Multiplexing circuit and method for outputing data using multiplexer |
| CN102542973A (en) * | 2011-11-18 | 2012-07-04 | 友达光电股份有限公司 | Display panel, multiplexer circuit therein and signal transmission method |
| CN104952420A (en) * | 2015-07-29 | 2015-09-30 | 武汉华星光电技术有限公司 | Multiplexer, as well as data driving circuit and liquid crystal display panel applying multiplexer |
| CN110910775A (en) * | 2019-11-26 | 2020-03-24 | 深圳市华星光电半导体显示技术有限公司 | Display device |
-
2005
- 2005-04-28 CN CNA2005100679390A patent/CN1855183A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102456387A (en) * | 2010-10-15 | 2012-05-16 | 台湾积体电路制造股份有限公司 | Multiplexing circuit and method for outputing data using multiplexer |
| US8576642B2 (en) | 2010-10-15 | 2013-11-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of using multiplexing circuit for high speed, low leakage, column-multiplexing memory devices |
| CN102456387B (en) * | 2010-10-15 | 2015-03-11 | 台湾积体电路制造股份有限公司 | Multiplexing circuit and method for outputing data using multiplexer |
| CN102542973A (en) * | 2011-11-18 | 2012-07-04 | 友达光电股份有限公司 | Display panel, multiplexer circuit therein and signal transmission method |
| CN102542973B (en) * | 2011-11-18 | 2014-10-15 | 友达光电股份有限公司 | Display panel, multiplexer circuit therein and signal transmission method |
| CN104952420A (en) * | 2015-07-29 | 2015-09-30 | 武汉华星光电技术有限公司 | Multiplexer, as well as data driving circuit and liquid crystal display panel applying multiplexer |
| CN110910775A (en) * | 2019-11-26 | 2020-03-24 | 深圳市华星光电半导体显示技术有限公司 | Display device |
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