CN1844854A - Apparatus for improving closed loop band width of optical fiber gyro by employing frequency tripling modulation - Google Patents

Apparatus for improving closed loop band width of optical fiber gyro by employing frequency tripling modulation Download PDF

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CN1844854A
CN1844854A CN 200610080858 CN200610080858A CN1844854A CN 1844854 A CN1844854 A CN 1844854A CN 200610080858 CN200610080858 CN 200610080858 CN 200610080858 A CN200610080858 A CN 200610080858A CN 1844854 A CN1844854 A CN 1844854A
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fpga
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CN100454059C (en
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张晞
张春熹
邬战军
杨远洪
金靖
王夏霄
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Beihang University
Beijing University of Aeronautics and Astronautics
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Abstract

The invention relates to a device for using trebling frequency to modulate the closed-loop bandwidth optical fiber gyro. Wherein, said optical fiber gyro comprises a light source (1), a coupler (2), a Y wave guide (3), a optical fiber ring (4), a detector (5), and a signal processing circuit (6), while the signal processing circuit (6) is formed by a advanced amplify circuit, a FPGA processor, a DSP processor, a square-wave modulate circuit, a step-wave generate circuit and a signal source circuit; the power circuit outputs +-15V and +-5V voltages; the advanced amplify circuit receives the voltage signals output by the optical electric detector (5) and processes said signal with direct-current separation, filtration, amplifying, and A/D conversion to output to the FPGA processor, which will demodulate the signal to output to the DSP processor; the DSP processor will process digital filtration to output to the step-wave generate circuit to form step-wave; the square-wave modulate circuit will receive the control signal output by FPGA processor to generate square-wave signal; said square-wave signal and the digital step-wave height signal will be layered to drive the Y wave guide (3).

Description

A kind of device that adopts the frequency tripling modulation to improve the optical fibre gyro closed-loop bandwidth
Technical field
The present invention relates to a kind of method that reduces vibration error of fiber optic gyro, specifically, in optical fibre gyro, use a kind of new modulation system, being characterized as of modulation signal (frequency tripling signal): modulation signal is 1: 1 a square wave of dutycycle, the frequency of this square wave is three times of optical fiber gyroscope eigenfrequency, the pi/2 voltage of amplitude corresponding modulating device.By using the modulation signal of frequency tripling, can reduce the loop time-delay of gyro, accelerate the closed-loop speed of gyro, reduce to vibrate value to the error term in the gyro control loop.
Background technology
The vibration performance of optical fibre gyro is that an important engineering is used index, and the quality of vibration performance directly influences the applicable situation of optical fibre gyro.Optical fibre gyro is a kind of all solid state inertia device, analyzes from principle, and anti-mechanical vibration are one of its key characters, yet the bandwidth of closed loop detection system has directly influenced optical fibre gyro moral vibration performance.The dutycycle of traditional optical fibre gyro modulation signal is 1: 1 a square wave, and the frequency of this square wave is the eigenfrequency of fiber optic loop, amplitude corresponding modulating device pi/2 voltage.This modulation system has following limitation: (1) system delay time is long, and the control bandwidth of (2) system is narrow.
Improve bandwidth and can improve optical fibre gyro mechanism vibrations performance, enlarged the usable range of optical fibre gyro.
Summary of the invention
The purpose of this invention is to provide a kind of optical fibre gyro signal modulation technique, reduce the closed loop loop time-delay of optical fibre gyro, improve the closed-loop precision of optical fibre gyro, the employing frequency tripling modulation that reduces the vibration error of optical fibre gyro simultaneously improves the device of optical fibre gyro closed-loop bandwidth.
The present invention adopts the frequency tripling modulation to improve the device of optical fibre gyro closed-loop bandwidth, optical fibre gyro generally comprises light source, coupling mechanism, Y waveguide, fiber optic loop, detector and signal processing circuit, signal processing circuit is by preceding discharge road, the FPGA processor, dsp processor, square wave modulation circuit, ladder wave generation circuit and power circuit are formed, power circuit output ± 15V, ± 5V voltage, preceding discharge road receives the voltage signal by described photodetector output, and it is carried out every directly, filtering, amplify, after the A/D conversion, export to the FPGA processor, the FPGA processor carries out the signal that collects to export to dsp processor after the demodulation, after dsp processor carries out numerical filter, export to the ladder wave generation circuit and form staircase waveform, square wave modulation circuit receives the control signal of FPGA processor output and produces square-wave signal, and the digital staircase waveform altitude signal of the square-wave signal of square wave modulation circuit output and the output of ladder wave generation circuit is through stack rear drive Y waveguide.
Described employing frequency tripling modulation improves the device of optical fibre gyro closed-loop bandwidth, and its square wave modulation circuit output signal is the cycle square wave, and its frequency is three times of optical fibre gyro characteristic frequency, and amplitude is the pi/2 voltage of Y waveguide (3).
Described employing frequency tripling modulation improves the device of optical fibre gyro closed-loop bandwidth, and its light source is a SLD wide range super-radiance light emitting diode, and tail optical fiber is a polarization maintaining optical fibre; Coupling mechanism is a polarization-maintaining coupler, is formed by the polarization maintaining optical fibre fusion; Y waveguide is LiNbO 3Y type phase-modulator, tail optical fiber are polarization maintaining optical fibre; Fiber optic loop is formed by the polarization maintaining optical fibre coiling, and detector is made up of PIN pipe and FET, and tail optical fiber is a single-mode fiber.
Described employing frequency tripling modulation improves the device of optical fibre gyro closed-loop bandwidth, its DSP chooses the TMS320F206 chip, FPGA chooses the EPF10K10TC144 chip, two amplifier OPA627 of preceding discharge route chip adds A/D conversion TLV1571 chip and forms, square wave modulation circuit is made up of constant voltage circuit and 4/8 simulation multiplexer ADG509FBRN chip, and the ladder wave generation circuit is made up of D/A conversion DAC7545 chip and amplifier OPA627 chip.
In the present invention frequency tripling modulation and fundamental frequency modulation phase ratio, it accelerates closed loop, improves the vibration performance of optical fibre gyro.The bench height of the staircase waveform that applies can produce the phase place that equates with the sagnac phase shift, the duration of each step is the transit time τ of fiber optic loop, such waveform is applied on the modulator, phase differential between the light of forward and reverse transmission just equals the value of bench height correspondence, compensated the phase shift that rotating speed produces, made gyro always work in zero point.
Description of drawings
Fig. 1 is the structural representation of general optical fibre gyro.
Fig. 2 is the signal flow block diagram of signal processing circuit of the present invention.
Fig. 3 is phase differential and the interference output waveform figure that the frequency tripling square wave produces.
Fig. 4 A is testing circuit and A/D change-over circuit schematic diagram.
Fig. 4 B is a FPGA processor circuit schematic diagram.
Fig. 4 C is the dsp processor circuit theory diagrams.
Fig. 4 D is the D/A conversion and amplifies the modulate circuit schematic diagram.
Embodiment
In the present invention, adopt the optical fibre gyro of frequency tripling modulation structurally to comprise light source 1, coupling mechanism 2, Y waveguide 3, fiber optic loop 4, detector 5 and signal processing circuit 6 (referring to shown in Figure 1), light source 1 is a SLD wide range super-radiance light emitting diode, and tail optical fiber is a polarization maintaining optical fibre; Coupling mechanism 2 is a polarization-maintaining coupler, is formed by the polarization maintaining optical fibre fusion; Y waveguide 3 is LiNbO 3Y type phase-modulator, tail optical fiber are polarization maintaining optical fibre; Fiber optic loop 4 is formed by the polarization maintaining optical fibre coiling, and detector 5 is made up of PIN pipe and FET, and tail optical fiber is a single-mode fiber.Referring to shown in Figure 1, the tail optical fiber of light source 1 links to each other with the A port of coupling mechanism 2, going into fine linking to each other of the B port of coupling mechanism 2 and Y waveguide 3, two tail optical fibers of Y waveguide 3 link to each other with fiber optic loop 4, the C port of coupling mechanism 2 is connected with the tail optical fiber of detector 5, and the connection of above-mentioned light path devices adopts fusion techniques to realize the connection of optical fiber.Detector 5 becomes voltage signal to export to signal processing circuit 6 the luminous power information translation that receives, and signal processing circuit 6 is exported to Y waveguide 3 with the feedback signal that forms.
See also shown in Figure 2, signal processing circuit 6 is by preceding discharge road, the FPGA processor, dsp processor, square wave modulation circuit, ladder wave generation circuit and power circuit are formed, power circuit output ± 15V, ± 5V voltage, generation Sagnac phase place was converted to optical power signals and exports to detector 5 when gyro rotated after interfering, preceding discharge road receives the voltage signal by described detector 5 outputs, and it is carried out every directly, filtering, amplify, after the A/D conversion, export to the FPGA processor, the FPGA processor carries out the signal that collects to export to dsp processor after the demodulation, after dsp processor carries out numerical filter, export to the ladder wave generation circuit and form staircase waveform, square wave modulation circuit receives the control signal of FPGA processor output and produces square-wave signal, and the digital staircase waveform altitude signal of the square-wave signal of square wave modulation circuit output and the output of ladder wave generation circuit is through stack rear drive Y waveguide 3.
Among the present invention, optical fibre gyro detects the rotation of gyro by the amplitude that detects output, and makes gyro always work in sensitivity the highest zero point by closed loop.Wherein, the digital demodulation link can equivalence be a proportional component, a demodulation link and a delay link, and demodulation link and modulation link are cancelled out each other; Data accumulation is an integral element, other links all can be regarded proportional component as, through simplified system can equivalence be forward path and feedback channel, and forward path comprises proportional component and a delay link and an integral element, and feedback channel is a proportional component.For a such system, its transport function is H ( s ) = K e sT - 1 + K f K , In the formula, K represents the coefficient of forward path proportional component, K fThe coefficient of expression feedback channel proportional component, T represents the acquisition interval time, e represents natural constant.
By transport function, the bandwidth that can derive system is: BW = ln ( 17 7 K f K - 1 ) · 1 T , In the formula, T represents the sampling period, by the expression formula of bandwidth as can be seen, and the bandwidth of system and the relation that is inversely proportional to the time delay of delay link.Reduce the time delay of delay link, can improve the bandwidth of gyro.
In the optical fibre gyro detection system, mainly be the demodulation cycle of demodulation link the time delay of delay link, and in digital closed-loop optic fiber gyroscope, the demodulation cycle is at least a modulation period.When adopting the fundamental frequency modulation, be the twice of fiber optic loop transit time a modulation period, and at this moment, the bandwidth of system is ln ( 17 7 K f K - 1 ) · 1 2 τ , τ represents the transit time of fiber optic loop in the optical fibre gyro.When adopting the frequency tripling modulation, be 2/3rds of the fiber optic loop transit time modulation period, and at this moment, the bandwidth of system is ln ( 17 7 K f K - 1 ) · 3 2 τ . Therefore, adopt the frequency tripling modulation bandwidth of optical fibre gyro control loop can be risen to three times that fundamental frequency is modulated.
It is as follows that the present invention adopts frequency tripling modulation to improve the annexation of signal processing circuit of optical fibre gyro closed-loop bandwidth:
Preceding discharge road
Preceding discharge road comprises every straight filtering, two-stage amplifying circuit and A/D change-over circuit.Because the output signal of optical fibre gyro is extremely faint, and there is a direct current biasing amount about the hundreds of millivolt in detector 5 output signals, therefore adopt the method for R-C coupling in the present invention, make the DC component in the prime output signal be unlikely to be coupled to next stage.The connection of each terminal is shown in Fig. 4 A, the optical intensity voltage signal end of fiber-optical probe 5 outputs is connected with 2 ends of the operational amplifier NO1 on preceding discharge road, the output terminal of operational amplifier NO1 is connected with the input end of operational amplifier NO2,6 ends of operational amplifier NO2 are connected with bleeder circuit, the output terminal of bleeder circuit is connected with 23 ends of A/D change-over circuit D0, A/D change-over circuit D0 read the end, write end, clock end, the carry end respectively with FPGA read the end, write end, clock end, the carry end connects, and the 10 bit address output terminals of A/D change-over circuit D0 are connected with the 10 bit address input ends of FPGA treatment circuit D2.
The FPGA treatment circuit
Optical fibre gyro of the present invention adopts closed loop to detect control, and its sequential control that requires square-wave frequency modulation, A/D to gather demodulation numeral staircase waveform feedback has strict synchronized relation, takes all factors into consideration the time delay of the passage of each control signal experience when the design sequential control circuit.With the A/D trigger pulse is benchmark, and frequency division produces the trigger pip of modulated square wave signal and the generation of digit phase staircase waveform step, controls the carrying out of demodulating process simultaneously.Sequential adopts the phaselocked loop of crystal oscillator control to produce the AD sample frequency, produce timing control signal by frequency division and give the FPGA processor the AD sample frequency, FPGA produces modulated square wave sequential reconciliation timing preface respectively for simultaneously modulated square wave reconciliation circuit demodulation circuit timing control signal, makes square wave and staircase waveform strict synchronism by modulated square wave sequential control feedback staircase waveform sequential.
Because trigger pulse and modulated square wave that A/D trigger pulse, phase place step produce are to realize by the frequency division of strictness, so in case its sequential of first has accomplished that synchronously then other point also is a strict synchronism.
The connection of each terminal is shown in Fig. 4 B, 16 bi-directional data ends of FPGA treatment circuit D2 are connected with 16 bi-directional data ends of DSP treatment circuit D1, the 16 bit address input ends of FPGA treatment circuit D2 are connected with the 16 bit address output terminals of DSP treatment circuit D1, the control input end of FPGA treatment circuit D2 is connected with the control output end of DSP treatment circuit D1, the 12 bit data output terminals of FPGA treatment circuit D2 are connected with the 12 bit data input ends of digital ladder wave generation circuit D7, the sheet choosing end of FPGA treatment circuit D2, write the sheet choosing end of input end and digital ladder wave generation circuit D7, write input end and connect, the digital signal output end of FPGA treatment circuit D2 is connected with the digital input end of the D/A change-over circuit D6 of analog output circuit.
The DSP treatment circuit
Because input of the present invention belongs to the category of Detection of Weak Signals, according to the Detection of Weak Signals theory, the present invention adopts the sync correlation detection technique, the signal of optical fiber current mutual inductor output can be extracted from very noisy.Basic implementation method is: 1, at first make the main circuit of detection system signal avoid the big place of Carrier To Noise Power Density by modulation, thereby make output noise less.At low frequency range, flicker noise can exceed several times, tens of times even hundreds of times than white noise.The present invention can make that signal is distortionless to be shifted out from low frequency range; 2, contrast as can be seen from signal and characteristics of noise, signal has frequency different with phase place two aspects with most noises.Filtering has utilized the identification of frequecy characteristic among the present invention, utilizes the identification of phase characteristic just can get rid of the noise of same frequency out of phase in a large number again.After demodulation module is finished demodulation, the data that demodulate are kept in the register, and send out interrupt request singal to DSP simultaneously, DSP enters the value that interrupt service routine reads register after receiving interrupt request singal.The connection of each terminal is shown in Fig. 4 C, 16 bi-directional data ends of DSP treatment circuit D1 are connected with 16 bi-directional data ends of FPGA treatment circuit D2, the 16 bit address input ends of FPGA treatment circuit D2 are connected with the 16 bit address output terminals of DSP treatment circuit D1, and the control input end of FPGA treatment circuit D2 is connected with the control output end of DSP treatment circuit D1.DSP treatment circuit and FPGA treatment circuit and the transmission that is connected realization data, address.
Square wave modulation circuit
Constant voltage circuit in the square wave modulation circuit produces a constant voltage signal, and described constant voltage signal distributed the two-way voltage division signal, wherein reference voltage signal of voltage division signal output is given digital ladder wave generation circuit, another voltage division signal is exported to frequency dividing circuit, and frequency dividing circuit receives the pulse signal of FPGA treatment circuit and produces output one square-wave signal.In complete-digital closed-loop scheme of the present invention, realize phase modulation (PM) with square wave.The waveform of square wave output as shown in Figure 3.In order to differentiate rotation direction and to improve detection sensitivity, applying square wave on Y waveguide 3 modulates light signal, the semiperiod of square wave equals 1/3rd (waveform as shown in Figure 3A) of the transit time of fiber optic loop 4 loops, and the cycle of its square wave is 2 τ, highly is
Figure A20061008085800081
The connection of each terminal is shown in Fig. 4 D, the reference voltage signal output terminal of square wave modulation circuit D3 after dividing potential drop is connected with the reference voltage signal input end of digital ladder wave generation circuit D7,6 ends of constant voltage circuit D3 are connected with 4 ends of frequency dividing circuit D4, the pulse input end of frequency dividing circuit D4 is connected with the pulse output end of FPGA treatment circuit D2, and the square-wave signal output terminal that frequency dividing circuit D4 produces is connected with the square wave input end of digital ladder wave generation circuit.
Numeral ladder wave generation circuit:
Numeral ladder wave generation circuit controlling and driving phase-modulator.The input signal of numeral ladder wave generation circuit is a digital signal D In, output signal is voltage signal V Out, this input/output relation becomes integral relation, V Out=K R∫ D InDt, K RBe the integration scale factor, the light wave that the effect of phase-modulator interferes two bundles produces an additional feedback phase φ F, as Δ φ-φ F=0, then realized the closed loop detection.Feedback phase shift φ FTherefore equal the responsive phase place of optical fiber current mutual inductor, can only detect, thereby removed the influence of the luminous power fluctuation that optical device causes phase place.
In the present invention, the square wave modulation circuit output waveform is shown in Fig. 3 C, among the figure, the horizontal ordinate express time, ordinate is represented phase differential, the square wave modulation circuit output waveform is the cycle square wave, its frequency is three times of optical fibre gyro characteristic frequency, and amplitude is the pi/2 voltage of Y waveguide 3; Interfere the signal of exporting to detector shown in Fig. 3 B, among the figure, horizontal ordinate is the time, and ordinate is a luminous power, and interfering output signal is the cycle impulse signal, and the cycle is τ/3, and direct current biasing equals the  of input optical power.Fig. 3 A is interference P=P 0The diagrammatic representation of (1+cos Δ φ), the Output optical power after P represents to interfere, P 0The luminous power of two-beam before expression is interfered, Δ φ represents phase differential.Horizontal ordinate is the time, and ordinate is a luminous power.The modulation waveform that Fig. 3 C is described is updated among Fig. 3 A and can obtains the waveform shown in Fig. 3 B.Square wave is produced by the reference signal control analog switch that logic produces, and staircase waveform is produced by digital-to-analog conversion by the digital feedback amount, and altitude signal is produced by totalizer; The simulation overlaying scheme is adopted in the stack of square wave and staircase waveform.The connection of each terminal is shown in Fig. 4 D, the 12 bit data output terminals of FPGA treatment circuit D2 are connected with the 12 bit data input ends of digital ladder wave generation circuit D7, the sheet choosing end of FPGA treatment circuit D2, write the sheet choosing end of input end and digital ladder wave generation circuit D7, writing input end connects, the reference voltage signal output terminal of square wave modulation circuit D3 after dividing potential drop is connected with the reference voltage signal input end of digital ladder wave generation circuit D7, the digital staircase waveform altitude signal output terminal of the discharge circuit NO3 of numeral ladder wave generation circuit and the square-wave signal that square wave modulation circuit produces superpose, and the signal after the described stack is exported to phase-modulator.
Each module is chosen chip and is in the signal processing unit of the present invention: DSP chooses the TMS320F206 chip, FPGA chooses the EPF10K10TC144 chip, two amplifier OPA627 of preceding discharge route chip adds A/D conversion TLV1571 chip and forms, square wave modulation circuit is made up of constant voltage circuit and 4/8 simulation multiplexer ADG509FBRN chip, and the ladder wave generation circuit is made up of D/A conversion DAC7545 chip and amplifier OPA627 chip.
Optical fibre gyro of the present invention is adopted the closed loop detection scheme in control and in handling, and has enlarged the measurement range 0~3600A of electric current effectively, has improved the system sensitivity of signal processing circuit 6 integral body, and can eliminate the intensity noise that the variation of part light intensity causes.

Claims (5)

1, a kind of device that adopts the frequency tripling modulation to improve the optical fibre gyro closed-loop bandwidth, optical fibre gyro generally comprises light source (1), coupling mechanism (2), Y waveguide (3), fiber optic loop (4), detector (5) and signal processing circuit (6), it is characterized in that: described signal processing circuit (6) is by preceding discharge road, the FPGA processor, dsp processor, square wave modulation circuit, ladder wave generation circuit and power circuit are formed, power circuit output ± 15V, ± 5V voltage, preceding discharge road receives the voltage signal by described photodetector (5) output, and it is carried out every directly, filtering, amplify, after the A/D conversion, export to the FPGA processor, the FPGA processor carries out the signal that collects to export to dsp processor after the demodulation, after dsp processor carries out numerical filter, export to the ladder wave generation circuit and form staircase waveform, square wave modulation circuit receives the control signal of FPGA processor output and produces square-wave signal, and the digital staircase waveform altitude signal of the square-wave signal of square wave modulation circuit output and the output of ladder wave generation circuit is through stack rear drive Y waveguide (3).
2, employing frequency tripling according to claim 1 modulation improves the device of optical fibre gyro closed-loop bandwidth, and it is characterized in that: described square wave modulation circuit output signal is the cycle square wave, its frequency is three times of optical fibre gyro characteristic frequency, and amplitude is a Y waveguide (3)
Figure A2006100808580002C1
Voltage.
3, employing frequency tripling modulation according to claim 1 improves the device of optical fibre gyro closed-loop bandwidth, and it is characterized in that: light source (1) is a SLD wide range super-radiance light emitting diode, and tail optical fiber is a polarization maintaining optical fibre; Coupling mechanism (2) is a polarization-maintaining coupler, is formed by the polarization maintaining optical fibre fusion; Y waveguide (3) is LiNbO 3Y type phase-modulator, tail optical fiber are polarization maintaining optical fibre; Fiber optic loop (4) is formed by the polarization maintaining optical fibre coiling, and detector (5) is made up of PIN pipe and FET, and tail optical fiber is a single-mode fiber.
4, employing frequency tripling modulation according to claim 1 improves the device of optical fibre gyro closed-loop bandwidth, it is characterized in that: DSP chooses the TMS320F206 chip, FPGA chooses the EPF10K10TC144 chip, two amplifier OPA627 of preceding discharge route chip adds A/D conversion TLV1571 chip and forms, square wave modulation circuit is made up of constant voltage circuit and 4/8 simulation multiplexer ADG509FBRN chip, and the ladder wave generation circuit is made up of D/A conversion DAC7545 chip and amplifier OPA627 chip.
5, employing frequency tripling modulation according to claim 1 improves the device of optical fibre gyro closed-loop bandwidth, it is characterized in that: the optical intensity voltage signal end of detector (5) output is connected with 2 ends of the operational amplifier NO1 on preceding discharge road, the output terminal of operational amplifier NO1 is connected with the input end of operational amplifier NO2,6 ends of operational amplifier NO2 are connected with bleeder circuit, the output terminal of bleeder circuit is connected with 23 ends of A/D change-over circuit D0, A/D change-over circuit D0 read the end, write end, clock end, the carry end respectively with FPGA processor (91) read the end, write end, clock end, the carry end connects, and the 10 bit address output terminals of A/D change-over circuit D0 are connected with the 10 bit address input ends of FPGA treatment circuit D2; 16 bi-directional data ends of FPGA treatment circuit D2 are connected with 16 bi-directional data ends of DSP treatment circuit D1, the 16 bit address input ends of FPGA treatment circuit D2 are connected with the 16 bit address output terminals of DSP treatment circuit D1, the control input end of FPGA treatment circuit D2 is connected with the control output end of DSP treatment circuit D1, the 12 bit data output terminals of FPGA treatment circuit D2 are connected with 12 bit data input ends of digital ladder wave generation circuit 7, the sheet choosing end of FPGA treatment circuit D2, write the sheet choosing end of input end and digital ladder wave generation circuit D7, write input end and connect, the digital signal output end of FPGA treatment circuit D2 is connected with the digital input end of the D/A change-over circuit D6 of analog output circuit; 16 bi-directional data ends of DSP treatment circuit D1 are connected with 16 bi-directional data ends of FPGA treatment circuit D2, the 16 bit address input ends of FPGA treatment circuit D2 are connected with the 16 bit address output terminals of DSP treatment circuit D1, the control input end of FPGA treatment circuit D2 is connected with the control output end of DSP treatment circuit D1, DSP treatment circuit and FPGA treatment circuit be connected the transmission that realizes data, address; The reference voltage signal output terminal of square wave modulation circuit D3 after dividing potential drop is connected with the reference voltage signal input end of digital ladder wave generation circuit D7,6 ends of constant voltage circuit D3 are connected with 4 ends of frequency dividing circuit D4, the pulse input end of frequency dividing circuit D4 is connected with the pulse output end of FPGA treatment circuit D2, and the square-wave signal output terminal that frequency dividing circuit D4 produces is connected with the square wave input end of digital ladder wave generation circuit; The 12 bit data output terminals of FPGA treatment circuit D2 are connected with the 12 bit data input ends of digital ladder wave generation circuit D7, the sheet choosing end of FPGA treatment circuit D2, write the sheet choosing end of input end and digital ladder wave generation circuit D7, writing input end connects, the reference voltage signal output terminal of square wave modulation circuit D3 after dividing potential drop is connected with the reference voltage signal input end of digital ladder wave generation circuit D7, the digital staircase waveform altitude signal output terminal of the discharge circuit NO3 of numeral ladder wave generation circuit and the square-wave signal that square wave modulation circuit produces superpose, and the signal after the described stack is exported to phase-modulator; The digital signal output end of FPGA treatment circuit D2 is connected with the digital input end of the D/A change-over circuit D6 of analog output circuit, and the input end of analog signal 3 of the amplifying circuit NO6 in the analog signal output 1 of D/A change-over circuit D6 and the two-stage amplifying circuit is connected.
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