CN1837849A - Digital signal processing method for multi-channel high-frequency radar receiver - Google Patents

Digital signal processing method for multi-channel high-frequency radar receiver Download PDF

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CN1837849A
CN1837849A CN 200610018448 CN200610018448A CN1837849A CN 1837849 A CN1837849 A CN 1837849A CN 200610018448 CN200610018448 CN 200610018448 CN 200610018448 A CN200610018448 A CN 200610018448A CN 1837849 A CN1837849 A CN 1837849A
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fft
data
component
signal processing
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CN100543492C (en
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文必洋
沈伟
白立云
周浩
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Wuhan University WHU
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Wuhan University WHU
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Abstract

This invention relates to a digital signal processing method for multi-channel high-frequency radar receiver. Sampling the MF signal by band-pass sample for orthogonal decomposition; obtaining the in-phase component I and orthogonal component Q by digital orthogonal transformation based on multi-phase filter for extract respectively; taking the I and Q in one group as the real and imaginary part of a complex signal respectively for complex FFT; multiplying a phase-shift factor e-j*w(k) to every FFT result for accumulation, and then obtaining the distance information. Instead of prior art, This invention saves almost complete echo information, reduces operation amount, and improves system efficiency.

Description

The digital signal processing method of multi-channel high-frequency radar receiver
Technical field
The present invention relates to a kind of Digital Signal Processing and multi-channel data acquisition and treatment technology of hyperchannel radar receiver.
Background technology
High-frequency ground wave radar (HFSWR) has been brought into play enormous function in hydrospace detection, thereby in the digital receiver of higher-frequency radar, influence the speed that follow-up data is handled in order to solve the big data quantity that causes because of higher analog to digital conversion speed, as signal Processing fast Fourier transform (FFT) commonly used, bigger input data volume can cause lower operation efficiency, therefore often adopt the method for Digital Down Convert to reduce data transfer rate, in the scheme that traditional high-frequency radar receiver digital signal processing often adopts be: after the data after the sampling are carried out the quadrature decomposition, adopted the method for the Digital Down Convert of " anti-aliasing filter extraction ", and then the data after extracting have been carried out FFT handle; In data handling procedure, when the extraction factor of n was bigger, the exponent number N of frequency overlapped-resistable filter was higher, thereby has reduced the efficient of the operation of system; And, caused extracting the information dropout of rear section frequency content owing to before extracting signal has been carried out anti-aliasing filter, influenced follow-up signal processing analysis.And this radar is the hyperchannel radar receiver, and receiver needs to handle in real time multichannel radar return data, therefore more be necessary to propose efficiently a kind of, signal processing algorithm fast.Therefore, the present invention proposes the performance that a kind of improved digital signal processing method improves receiver, and this signal processing method can be finished the data processing of three radar receiving cables in the digital signal processor (ADSP-21060) of monolithic.
Summary of the invention
In order to improve the serviceability of multi-channel high-frequency radar receiver, the objective of the invention is to propose a kind of digital signal processing method of multi-channel high-frequency radar receiver, the main thought of this signal processing method is: the thought that adopts grouping to extract to add FFT phase compensation to add up realizes that the Digital Down Convert of radar receiver and distance handle the efficient of raising system operation.
Technical solution of the present invention: a kind of digital signal processing method of multi-channel high-frequency radar receiver, adopt the mode of bandpass sampling that intermediate-freuqncy signal is sampled, the data that sampling obtains are carried out the quadrature decomposition, employing obtains in-phase component I and quadrature component Q based on the method for the The digital quadrature transformation of multiphase filtering, it is characterized in that: I road and Q road signal data after quadrature is decomposed divide into groups respectively to extract, and with every group in-phase component I and quadrature component Q respectively as the real component and the imaginary number component of the complex signal of this group, carry out the plural FFT computing of this group, the operation result of every group FFT is multiplied by a phase shift factor adds up, thereby obtain range information.
Digital signal processing at the big data quantity of hyperchannel radar receiver, the real-time that data are handled has proposed higher requirement, this programme has adopted a kind of new Digital down coversion and apart from disposal route, thereby has improved the real-time of system and the efficient of system's operation.It is characterized in that: adopted the thought that grouping is extracted and FFT phase compensation adds up, in finishing the process of Digital Down Convert, do not carry out anti-aliasing filter, thereby but directly the data after the grouping are carried out the FFT computing and the result of the FFT of each group is multiplied by the phase shift factor distance that obtains target that adds up handling.
Method realization of the present invention is mainly finished by monolithic floating-point signal processor (ADSP21060), it has the 40MHz dominant frequency, the on-chip SRAM of 4Mbit, the data bus of 48bit, finish 512 floating-point fast Fourier transform (FFT)s and only need characteristics (being operated in dominant frequency 40MHz) such as 0.244ms, wherein bigger on-chip memory provides possibility for realizing multichannel data processing.
The invention has the beneficial effects as follows: adopted the method that grouping is extracted and FFT phase compensation adds up to realize the Digital Down Convert and the distance processing of radar mean frequency receiver, compare with traditional Digital Down Convert and to have reduced operand, this signal processing method can be realized in the digital signal processor (ADSP-21060) of monolithic, strengthened the multichannel data-handling capacity of system, improved the real-time of system, simultaneously avoided anti-aliasing filter to cause losing of part echo information again, guaranteed comparatively complete marine echo information, for follow-up signal Processing provides convenience.
Description of drawings
Fig. 1 is the hardware components block diagram of multi-channel high-frequency radar receiver.
Fig. 2 is based on the orthogonal transformation block diagram of multiphase filtering.
Fig. 3 is that the grouping of the embodiment of the invention is extracted and to be added the block diagram that down coversion that FFT phase compensation adds up and distance are handled.
Embodiment
The signal processing method that Digital Down Convert of the present invention and distance are handled be in the multi-channel high-frequency radar digital receiver at a kind of signal processing method efficiently that proposes under the bigger prerequisite of traditional digital down converter method operand, thereby improve the serviceability of receiver.
The hardware components of multi-channel high-frequency radar receiver is as shown in fig. 1: the intermediate-freuqncy signal of this triple channel radar receiver is 21.405MHz, produce AD change over clock signal and synchronous control signal by FPGA, the conversion figure place of modulus switching device is 14, two the highest operations of carrying out zero padding to changing in practice, the digital signal of three passages D0-D15 by ADSP21060 respectively then, D16-D31, D32-D48 is sent to data in the dsp processor.The sampling clock that is produced 60KHz by FPGA carries out bandpass sampling to intermediate-freuqncy signal, adopts the method for multiphase filtering that intermediate-freuqncy signal is carried out quadrature demodulation then, thereby obtains in-phase component and quadrature component (as shown in Figure 2).Owing to before digital signal supplied with digital signal processor, do not carry out down coversion, a work period in this radar receiver is 0.256s, then the sampling number of a passage in work period is 15360 points, handle and guarantee its real-time simultaneously if will satisfy three passages, then often needing to carry out the reduction of speed rate handles, selecting counting of Floating FFT computing according to designing requirement in native system is 512 points, and it is that 15 extraction is handled that the signal after needing quadrature decomposed extract factor N.When adopting traditional high-frequency radar receiver digital signal processing scheme, then comparatively harsh because it is bigger to extract factor N value to the requirement of low-pass filter, thus make that the exponent number of wave filter is very high, caused bigger operand, reduced the real-time of system.
In method of the present invention realizes, the quadrature decomposed data is divided into groups to extract, because the orthogonal transformation method that is based on multiphase filtering that adopts, make the data transfer rate of in-phase signal (I road signal) and orthogonal signal (Q road signal) be respectively half of original data rate, then counting of the I on each road and Q signal is 7680 points, I and Q signal to this road divides into groups to extract then, and the method for concrete grouping sees for details shown in Figure 3; This rood was to I and each 15 groups of data of Q after the process grouping was extracted, each counting of data of group is 512 points, in-phase component I and quadrature component Q are respectively as the real component and the imaginary number component of complex signal, then one of the correspondence of I and Q group of data is formed one group of 512 plural number, carry out plural FFT computing, and the result of computing is kept in one group of register; Same next group I road and Q circuit-switched data are also formed 512 plural numbers and are carried out the FFT computing, because every group of data differ a time factor with last group of data when extracting, then need be multiplied by a phase shift factor on the operation result of every group FFT.
Referring to Fig. 3, so-called grouping is extracted and is meant one group of sequence is divided into groups to extract according to extracting factor N, and establishing sequence length is L, the subsequence that then can to obtain N length be M (M=L/N), be the 1st and N+1 point of fetch squence, 2N+1 ... (M-1) * N+1 point as first group of sequence, is got the 2nd point, the N+2 point, the 2N+2 point ... (M-1) * N+2 point obtains second group of sequence, by that analogy, can obtain the sequence set that the N group length is M.
For example: when 7680 sequences are extracted the grouping extraction of factor N=15, every group of data length is 512 points, takes out the 1st point in this sequence, the 16th point, the 31st point ... obtain first group 512 sequence, get the 2nd point of this sequence, the 17th point, the 32nd point ... obtain the 2nd group ..., by that analogy, thereby obtain 15 groups of sequences.
The every group of sequence that obtains done after the Fourier transform, because their first position in original series of every group of subsequence is different, then need phase shift factor of compensation on the result of FFT, the FFT result after will compensating again adds up, and deriving is in detail provided by following formula:
If x i(n) be the I road signal of passage 1, the number of data points that the data in work period after the AD sampling are carried out the I road that obtains after quadrature decomposes is the N=7680 point, then need be divided into 15 groups according to designing requirement, and every group count is 512 points.
According to x i(n) Fourier transform is X i ( k ) = Σ n = 0 N - 1 x i ( n ) g e - j · 2 πnk N .
By x i(n) Fourier transform formula
X ( K ) = x ( 0 ) × e - j × 2 πk × 0 N + x ( 1 ) × e - j × 2 πk × 1 N + · · · + x ( 14 ) × e - j × 2 πk × 14 N
+ x ( 15 ) × e - j × 2 πk × ( 15 + 0 ) N + x ( 15 + 1 ) × e - j × 2 πk × ( 15 + 1 ) N + · · · + x ( 15 + 14 ) × e - j × 2 πk × ( 15 + 14 ) N
+ · · · +
+ x ( 511 × 15 ) × e - j × 2 πk × ( 511 × 15 + 0 ) N + x ( 511 × 15 + 1 ) × e - j × 2 πk × ( 511 × 15 + 1 ) N + · · · + x ( 511 × 15 + 14 ) × e - j × 2 πk × ( 511 × 15 + 14 ) N
According to above calculating formula, with the value addition of each row, establish M=512, q=15, then:
X ( K ) = Σ m = 0 M - 1 x i ( m × q ) g e - j 2 πk ( m × q + 0 ) N + Σ m = 0 M - 1 x i ( m × q + 1 ) g e - j 2 πk ( m × q + 1 ) N
+ · · · + Σ m = 0 M - 1 x i ( m × q + q - 1 ) g e - j 2 πk ( m × q + q - 1 ) N
= FFT [ x i ( m * q ) ] + FFT [ x i ( m × q + 1 ) ] × e - j 2 πk × 1 N + · · · + FFT [ x i ( m × q + q - 1 ) ] × e - j 2 πk × ( q - 1 ) N
7680 data in above-mentioned giving an example, it is the data length on I road or Q road, the grouping of N=1/15 is carried out on I road and Q circuit-switched data respectively, obtain the subsequence on 15 groups of I roads and the subsequence on 15 groups of Q roads respectively, corresponding I road and Q road sequence are combined into plural number, finish the FFT conversion of plural number, thereby can obtain 15 groups of FFT results, because first time corresponding position difference of the data of every group extraction, then the result of every group FFT need be multiplied by a phase compensating factor exp ( - j 2 πk × p N ) ( p = 0 , · · · , q - 1 ) (seeing accompanying drawing 3) makes and finished down coversion and FFT processing under the condition that needn't finish anti-aliasing filter.The needed time of FFT computing of finishing 512 floating-points in digital signal processing chip is 0.244ms (40MHz dominant frequency), then 45 groups of FFT computings have been finished altogether a work period, the time that taken altogether is 10.98ms, add that it is 31.20ms that grouping waits computing expense total operation time, then the time of expense is 71.40ms to adopt the anti-aliasing filter extraction to remake FFT, this shows that the method that adopts grouping FFT phase compensation to add up realizes that the Digital Down Convert of high-frequency radar receiver and distance processing are a kind of efficient feasible schemes; The complete information that has kept the preceding positive distance element of marine echo and negative distance element at 256 at 256 among the result for the DSP computing simultaneously, the convenience that provides for the extraction and the anti-interference process of follow-up echoed signal.
Core of the present invention is on the basis based on variable Rate signal Processing and software radio thought, the radar sampled data is carried out the IQ quadrature decomposes, then respectively to I, the Q two paths of signals divides into groups, to the corresponding I after the grouping, (the I road is a real part to the complex operator sequence that the subsequence on Q road is formed, the Q road is an imaginary part) carry out Fourier analysis, obtain the range information of radar return, it is little to have an operand with respect to traditional method, execution efficient height can more intactly keep echo information again simultaneously, is a kind of digital signal processing algorithm of radar receiver efficiently.

Claims (1)

1. the digital signal processing method of a multi-channel high-frequency radar receiver, adopt the mode of bandpass sampling that intermediate-freuqncy signal is sampled, the data that sampling obtains are carried out the quadrature decomposition, employing obtains in-phase component I and quadrature component Q based on the method for the The digital quadrature transformation of multiphase filtering, it is characterized in that: I road and Q road signal data after quadrature is decomposed divide into groups respectively to extract, and with every group in-phase component I and quadrature component Q respectively as the real component and the imaginary number component of the complex signal of this group, carry out the plural FFT computing of this group, the operation result of every group FFT is multiplied by a phase shift factor adds up, thereby obtain range information.
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CN102331571A (en) * 2011-09-09 2012-01-25 武汉德威斯电子技术有限公司 Device for automatically switching working mode of ground wave radar
CN101566684B (en) * 2009-06-08 2012-03-07 武汉大学 Radar digital signal processing method and device thereof
CN102749616A (en) * 2012-06-29 2012-10-24 北京市遥感信息研究所 Fuzzy-clustering-based Aegis system signal sorting method
CN105827381A (en) * 2015-01-26 2016-08-03 苹果公司 Receiver Architecture with Analog Complex Filter for OFDMA Reception
CN105959020A (en) * 2016-06-29 2016-09-21 成都金本华电子有限公司 High-speed broadband signal down-conversion algorithm
CN110873552A (en) * 2018-08-31 2020-03-10 上海微电子装备(集团)股份有限公司 Laser interferometer receiver

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CN101566684B (en) * 2009-06-08 2012-03-07 武汉大学 Radar digital signal processing method and device thereof
CN102331571A (en) * 2011-09-09 2012-01-25 武汉德威斯电子技术有限公司 Device for automatically switching working mode of ground wave radar
CN102331571B (en) * 2011-09-09 2014-01-29 武汉德威斯电子技术有限公司 Device for automatically switching working mode of ground wave radar
CN102749616A (en) * 2012-06-29 2012-10-24 北京市遥感信息研究所 Fuzzy-clustering-based Aegis system signal sorting method
CN102749616B (en) * 2012-06-29 2014-04-16 北京市遥感信息研究所 Fuzzy-clustering-based Aegis system signal sorting method
CN105827381A (en) * 2015-01-26 2016-08-03 苹果公司 Receiver Architecture with Analog Complex Filter for OFDMA Reception
CN105827381B (en) * 2015-01-26 2019-04-02 苹果公司 For the received receiver architecture with simulation complex filter of OFDMA
CN105959020A (en) * 2016-06-29 2016-09-21 成都金本华电子有限公司 High-speed broadband signal down-conversion algorithm
CN110873552A (en) * 2018-08-31 2020-03-10 上海微电子装备(集团)股份有限公司 Laser interferometer receiver

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