CN1832629A - Signal dispatching method and system in optical transmission network - Google Patents

Abstract

This invention discloses a signal dispacth method in an optical transmission network including: converting received signals to electric signals to be de-imaged and adapted to a unified particle grade to be processed with asynchronous cross dispatch in an asynchronous cross matrix. This invention also discloses a system including: a photoelectric conversion unit, a de-image unit, an adaptive device, in which, the asynchronous cross matrix receives optical signals to be converted into electric signals by the photoelectric conversion unit to be input into the de-image unit then enters into the adaptive device to be processed and output in a unified particle grade, then enters into the asynchronous cross matrix to be dispatched.

Description

Signal dispatching method in the optical transfer network and system

Technical field

The present invention relates to the signal dispatching technology in the optical transport network (OTN), be meant a kind of method and system of in OTN, realizing signal dispatching especially.

Background technology

Optical transport hierarchy (OTH) technology is to transmit system in SDH (Synchronous Digital Hierarchy) (SDH)/Synchronous Optical Network (Sonet) a new generation afterwards.The OTN network advantages is to satisfy the explosive demand for development of data bandwidth, and it is to develop a kind of transparent tranmission techniques of formation at the coarse grained dispatching requirement of the big capacity of backbone network level, and has adopted digital wrapper technology.

In order to realize the transfer of data among the OTH, G.709 ITU-T (ITU-T) advises having defined light data cell (ODUk), k=1 wherein, and 2,3, other connects signal as three kinds of levels, and speed is respectively:

ODU1：239/238×2.48832Gbps＝2.498775126Gbps；

ODU2：239/237×9.95328Gbps＝10.037273924Gbps；

ODU3：239/236×39.81312Gbps＝40.319218983Gbps。

That is, the speed of ODUk (k=1,2,3) satisfies: 239/ (239-k) * " STM-N ".

And, optical transport unit (OTUk), k=1 wherein, 2,3, other transmits signal as three kinds of levels, and speed is respectively:

OTU1：255/238×2.48832Gbps＝2.66605714285714Gbps；

OTU2：255/237×9.95328Gbps＝10.7092253164557Gbps；

OTU3：255/236×39.81312Gbps＝43.018413559322Gbps。

That is, the speed of OTUk (k=1,2,3) satisfies: 255/ (239-k) * " STM-N ".

In addition, also defined optical payload unit (OPUk), tributary unit group signals such as (ODTUGk), k=1 wherein, 2,3, in order to realize different functions.

And G.709 ITU-T has also defined mapping and time-division multiplexing (TDM) method of changing mutually between the above-mentioned various signal, and transduction pathway is referring to shown in Figure 1.

As can be seen from Figure 1, mapping that provides and time-division, multiplexing path mainly contained:

1、STM16-＞OPU1-＞ODU1-＞OTU1

2、STM64-＞OPU2-＞ODU2-＞OTU2

3、STM256-＞OPU3-＞ODU3-＞OTU3

4、4×STM16-＞4×OPU1-＞4×ODU1-＞ODTUG2-＞OPU2-＞ODU2-＞OTU2

5、16×STM16-＞16×OPU1-＞16×ODU1-＞ODTUG3-＞OPU3-＞ODU3-＞OTU3

6、4×STM64-＞4×OPU2-＞4×ODU2-＞ODTUG3-＞OPU3-＞ODU3-＞OTU3

In order to guarantee of the transparent transmission of OTN network to customer data and synchronization timing thereof, when carrying out the signal cross scheduling, the OTN network is based on the ODUk (k=1 of variable grain, 2,3) signal is dispatched respectively, cross scheduling unit separate processes, thus finish ODUk (k=1,2,3) the connection scheduling feature of signal.

At present, the scheduling that connects based on ODUk (k=1,2,3) adopts high-speed asynchronous crossing net sheet to realize.But the asynchronous electric crossing net sheet port speed of the high-speed high capacity of current industry maturation generally can reach 3.6Gbps, only can finish scheduling feature to the ODU1 serial signal.

Like this, for the ODU2/ODU3 serial signal, the i.e. ODU2/ODU3 signal that obtains by the multiplexing path 2,3 of above-mentioned mapping, because its internal customer's data are the bulky grain form, for example STM64, STM256, therefore should directly realize scheduling feature to ODU2/ODU3, but can't realize the scheduling feature of bit rate like this on the existing asynchronous cross chips technical merit, must adopt the method decomposition of demultiplexing to obtain the low bit speed rate signal so earlier, referred to herein as equivalent ODU1 signal, dispatch again.Wherein, the equivalent ODU1 signal here is identical with normal ODU1 frame structure, but than ODU1 speed height.

Signal dispatching scheme in the OTN network that proposes mainly contains following two kinds at present:

First kind of technical scheme is that the patent No. is the United States Patent (USP) of US 2002/0080442.Referring to shown in Figure 2, realize that the system of signal dispatching comprises: three independently asynchronous cross matrix S3, S2, S1 respectively based on 43G, 10.7G, 2.7G particle, are used for the signal of respective rate is intersected; Be coupled by time division multiplexing demultiplexing unit MUX2 and MUX1 between three asynchronous cross matrixes.

Concrete working method is: speed is that the OTU3 signal of 43G enters input/output end port IO3, be converted to the ODU3 signal after, enter asynchronous cross matrix S3 based on the 43G particle, dispatch back output; Entering the MUX2 demultiplexing is the ODU2 signal of 4 road 10.7G, enters the asynchronous cross matrix S2 based on the 10.7G particle, dispatches back output; Enter MUX1, the ODU2 signal of every road 10.7G is the ODU1 signal of 4 road 2.7G by demultiplexing, enters the asynchronous cross matrix S1 based on the 2.7G particle, dispatches.

For speed is that the input signal OTU2 of 10.7G then directly enters IO2, be converted to the ODU2 signal after, enter asynchronous cross matrix S2 based on the 10.7G particle, dispatch back output; Enter MUX1, the ODU2 signal of 10.7G is the ODU1 signal of 4 road 2.7G by demultiplexing, enters the asynchronous cross matrix S1 based on the 2.7G particle, dispatches.

For speed is that the input signal OTU1 of 2.7G then directly enters IO1, be converted to the ODU1 signal after, enter asynchronous cross matrix S1 based on the 2.7G particle, dispatch.

But since present asynchronous cross chips technology that is that all right is ripe, can't provide this jumbo 43Gbps and 10.7Gbps particle level other asynchronous electric crossing net sheet, therefore can't realize the scheduling of equivalent ODU2 and ODU3 serial signal.In addition, owing between the matrixes at different levels coupled relation is arranged, make scheduling path complexity; Whole system makes the cross-over design also very complicated for the asynchronous cross matrix that has used 3 ranks based on the 43G/10.7G/2.7G particle.

Existing second kind of technical scheme comes from the United States Patent (USP) that the patent No. is US 2003/001616416.Referring to shown in Figure 3, this system mainly by crystal oscillator unit, map unit (Map), separate map unit (Demap), serial/parallel unit, parallel/serial unit and synchronously the crossing net sheet form.

In the signal cross scheduling process, the OTU3/OTU2/OTU1 signal of input enters the Map unit 21,24,27 of corresponding speed respectively, the filling mapping back of carrying out some bytes arrives a higher rate, finish the transparent mapped of signal, this moment, the speed of each road signal just was the integral multiple of SDH basic rate cell S TM-1 (155.52Mbps), be OTU3-＞288 * 155.52Mbps=44.78976Gbps, OTU2-＞72 * 155.52Mbps=11.19744Gbps, OTU1-＞18 * 155.52Mbps=2.79936Gbps.Effects of these filling byte mapping process are to finish OTUk signal level and smooth to SDH container frequency difference, are-kind of asynchronous mapping process, to guarantee the synchronous of all OTUk signals.

Then, these serial high speed signals of 21,24,27 outputs convert 64/16/4 road parallel signal respectively to through S/ P unit 22,25,28 from the Map unit, its single line speed is 699.84Mbps, be that S/ P unit 22,25,28 is finished 44.78976Gbps-＞64 * 669.84Mbps respectively, 11.19744Gbps-＞16 * 669.84Mbps, 2.79936Gbps-the conversion of＞4 * 669.84Mbps, so that dispatching patcher is carried out isochronous schedules on the 669.84MHz reference frequency, thus the scheduling feature of realization OTU3/2/1 signal.

Parallel signal enters synchronous crossing net sheet 10 based on the 699.84Mbps particle carry out cross scheduling after, enter P/ S unit 32,35,38 and convert the serial high speed signal respectively to, its single line speed is 699.84Mbps, be that P/ S unit 32,35,38 is finished 64 * 669.84Mbps-＞44.78976Gbps respectively, 16 * 669.84Mbps-＞11.19744Gbps, the conversion of 4 * 669.84Mbps-＞2.79936Gbps.

At last, the serial high speed signal enters Demap unit 31,34,37, carries out the go filling opposite with the Map process and separates mapping process, recovers inner OTU3/2/1 business datum output from high-speed serial signals.

Wherein, the clock signal fo of crystal oscillator unit 15 output 44.78976GHz, and this clock signal fo also further enters 1/4 frequency unit, 16,1/16 frequency unit 17 and 1/N frequency unit 18; The frequency division of logical 1/4 frequency unit 16 of clock signal fo and 1/16 frequency unit 17 is handled clock signal fo/4 and the fo/16 that obtains 11.19744GHz and 2.79936GHz.The clock signal of these outputs can be given corresponding Map/Demap unit respectively and is used for asynchronous mapping/separate mapping between OTU3/2/1 professional and 44.78976Gbps, 11.19744Gbps, the 2.79936Gbps serial high speed signal.The frequency dividing ratio N of 1/N frequency unit 18 is 16 times of the parallel bit wides in serial/parallel (S/P) unit 28, i.e. 4 * 16=64 is used to produce the reference frequency 699.84MHz of each S/P unit, backboard dispatching patcher, P/S unit.

The shortcoming of prior art two is: this technology is based on the scheduling of OTU1/OTU2/OTU3 signal transmission unit, the hierarchical link function of ODU1/ODU2/ODU3 is unrealized, can't realize for the connection monitor management of OTN network like this, it is not a complete OTN unit, has just finished the scheduling feature of OTU1/OTU2/OTU3.The filling method of the asynchronous mapping of OTU1/OTU2/OTU3 is not quite similar, so can't intercommunication between the delivery unit, can only constitute the OTN network of independent O TU1 or OTU2 or OTU3, and the OTN network organizing is restricted.

Summary of the invention

In view of this, main purpose of the present invention is to provide the method that realizes signal dispatching in a kind of optical transfer network, realize the cross scheduling of the various speed level signal of height, reduce the complexity of system design, realize add drop multiplex and cross connect function between each speed level signal, to improve the networking flexibility of OTN network.

Signal dispatching method based in above-mentioned purpose a kind of optical transport network provided by the invention comprises:

The light signal that is received is treated as the signal of telecommunication through opto-electronic conversion, separates again after mapping handles, signal rate is fitted to a unified speed rank, in based on other asynchronous cross matrix of this particle level, carry out asynchronous cross scheduling and handle.

The described signal rate adaptation procedure of this method comprises:

After separating the mapping processing, be described other signal of particle level if the speed of current demand signal greater than described particle rank, then resolves into current demand signal multichannel speed;

If the speed of current demand signal equals described particle rank, then current demand signal is directly sent into described asynchronous cross matrix and carried out asynchronous cross scheduling;

If the speed of current demand signal is less than described particle rank, then the signal of multichannel and current demand signal same kind being merged into one tunnel speed is described other signal of particle level.

This method further comprises greater than described other situation of particle level for the speed of current demand signal:

If received signal is multiplexing the forming of other low speed signal mapping of described particle level by multichannel speed, then the demultiplexing process of described signal is for to demultiplex into the described low speed signal of multichannel with the current demand signal time-division;

If received signal is formed greater than other high speed signal mapping of described particle level by one tunnel speed, then the demultiplexing process of described signal is described other parallel signal of particle level for current demand signal is split into multichannel speed;

If received signal shines upon multiplexing forming by speed more than one tunnel greater than other high speed signal of described particle level, then the demultiplexing process of described signal is for to demultiplex into the described high speed signal of multichannel with the current demand signal time-division, and it is described other parallel signal of particle level that the every road high speed signal that obtains is split into multichannel speed.

The light signal of the described reception of this method is the G.709 light signal under the agreement of ITU-T.

The described unified particle rank of this method is an ODU1 speed rank;

If the OTU1 of the light signal that is received for being formed by 1 road ODU1 mapping, then described signal adaptation process is carried out after ODU framing, scrambler handle for the ODU1 that will separate the mapping back and form, and sending into described asynchronous cross matrix carries out asynchronous cross scheduling;

If the light signal that is received is for by the multiplexing OTU2 that forms of 4 road ODU1 mapping, then described signal adaptation process is carried out after ODU framing, scrambler handle for the ODU2 that will separate the mapping back and form, the time decomposition multiplex be 4 road ODU1;

If the light signal that is received is for by the multiplexing OTU3 that forms of 16 road ODU1 mapping, then described signal adaptation process is carried out after ODU framing, scrambler handle for the ODU3 that will separate the mapping back and form, the time decomposition multiplex be 16 road ODU1;

If the OTU2 of the light signal that is received for forming by 1 road ODU2 mapping, then described signal adaptation process is carried out after ODU framing, scrambler handle for the ODU2 that will separate mapping back and form, and uses the method for channelizing framing to be split as 4 tunnel speed and is other parallel signal of ODUi speed level;

If the OTU3 of the light signal that is received for forming by 1 road ODU3 mapping, then described signal adaptation process is carried out after ODU framing, scrambler handle for the ODU3 that will separate mapping back and form, and uses the method for channelizing framing to be split as 16 tunnel speed and is other parallel signal of ODU1 speed level;

If the light signal that is received is for shining upon the multiplexing OTU3 that forms by 4 road ODU2, then described signal adaptation process is carried out after ODU framing, scrambler handle for the ODU3 that will separate mapping back and form, the time decomposition multiplex be 4 road ODU2, use the method for channelizing framing to be split as 4 tunnel speed respectively the every road ODU2 that obtains and be other parallel signal of ODU1 speed level.

This method is described separates the mapping processing procedure and comprise, and: OTU decide that frame, descrambling, fec decoder, OTU expense terminate, ODU separates mapping.

The described split process of this method is: after signal was carried out deciding frame and handles, order was frame by frame carried out buffer memory, after being filled with the n frame, the data parallel of this n frame being sent, and repeat said process; Wherein n is the way that current demand signal is desired to split into.

This method is described separates the mapping processing procedure and further comprises after ODU separates mapping executing: ODU mapping, OTU framing, FEC coding increase FEC zone, scrambler; Described unified particle rank is an OTU1 speed rank;

If the OTU1 of the light signal that is received for forming by 1 road ODU1 mapping, then described signal adaptation process is for after the ODU1 signal that will separate mapping and form after the processing procedure carries out ODU1 mapping, OTU1 framing, FEC coding, scrambler processing, form OTU1, send into described asynchronous cross matrix and carry out asynchronous cross scheduling;

If the light signal that is received is for shining upon the multiplexing OTU2 that forms by 4 road ODU1, decomposition multiplex was 4 * ODU1 signal when then described signal adaptation process was shone upon the ODU2 that forms after the processing procedure for separating, after carrying out ODU1 mapping, OTU1 framing, FEC coding, scrambler processing, form 4 road OTU1, enter asynchronous cross scheduling;

If the light signal that is received is for shining upon the multiplexing OTU3 that forms by 16 road ODU1, decomposition multiplex was 16 * ODU1 signal when then described signal adaptation process was shone upon the ODU3 that forms after the processing procedure for separating, after carrying out ODU1 mapping, OTU1 framing, FEC coding, scrambler processing, form 16 road OTU1, enter asynchronous cross scheduling;

If the OTU2 of the light signal that is received for forming by 1 road ODU2 mapping, then described signal adaptation process is for after the ODU2 that will separate mapping and form after the processing procedure carries out ODU2 mapping, OTU2 framing, FEC coding, scrambler processing, form OTU2, use the method for channelizing framing to be split as 4 tunnel speed, enter asynchronous cross scheduling as other parallel signal of OTU1 speed level;

If the OTU3 of the light signal that is received for forming by 1 road ODU3 mapping, then described signal adaptation process is for after the ODU3 that will separate mapping and form after the processing procedure carries out ODU3 mapping, OTU3 framing, FEC coding, scrambler processing, form OTU3, use the method for channelizing framing to be split as 16 tunnel speed, enter asynchronous cross scheduling as other parallel signal of OTU1 speed level;

If the light signal that is received is for shining upon the multiplexing OTU3 that forms by 4 road ODU2, decomposition multiplex was 4 * ODU2 signal when then described signal adaptation process was shone upon the ODU3 that forms after the processing procedure for separating, after carrying out ODU2 mapping, OTU2 framing, FEC coding, scrambler processing, form 4 road OTU2, use the method for channelizing framing to be split as 4 tunnel speed respectively the every road OTU2 that obtains, enter asynchronous cross scheduling as other parallel signal of OTU1 speed level.

The described split process of this method is: signal order is frame by frame carried out buffer memory, after being filled with the n frame, the data parallel of this n frame being sent, and repeat said process; Wherein n is the way of desiring to split into of current demand signal.

This method is characterized in that, after described asynchronous cross scheduling is handled, further comprises: carry out the inverse process of described adaptation procedure, separate and export after mapping processing and electric light are converted into light signal.

Another main purpose of the present invention is to realize the system of signal dispatching in a kind of optical transfer network, can support the cross scheduling of the various speed level signal of height, reduce the complexity of system design, support add drop multiplex and cross connect function between each speed level signal, improve the networking flexibility of OTN network.

Signal dispatching system based in this purpose a kind of optical transport network provided by the invention comprises:

At least one photoelectric conversion unit, the light signal that is used for receiving is converted to the signal of telecommunication;

At least one separates map unit, is used for that signal is separated mapping and handles;

At least one adaptive device is used for input signal is adapted for unified other signal of particle level; And

Asynchronous cross matrix is used for unified other signal of particle level is carried out asynchronous cross scheduling;

The light signal that receives is after photoelectric conversion unit is converted to the signal of telecommunication, input to and separate map unit, through separating after mapping handles output, enter adaptive device, be adapted to speed and meet and input to asynchronous cross matrix behind described unified other signal of particle level and carry out asynchronous cross scheduling.

In this system, if the speed of described input signal is described unified particle rank, described adaptive device is the signal generation unit that is used for signal framing, scrambler;

If described input signal is multiplexing the forming of other low speed signal mapping of described particle level by multichannel speed, comprise in the described adaptive device: described signal generation unit and time-division demultiplexing unit, the time-division demultiplexing unit is used for that decomposition multiplex is described unified other low speed signal of particle level for multichannel speed with by the multiplexing high speed signal that forms of multi-path low speed signal map the time, and exports described signal generation unit to;

If received signal is formed greater than other high speed signal mapping of described particle level by one tunnel speed, comprise in the described adaptive device: it is described unified other parallel signal of particle level that described signal generation unit and split cells, split cells are used for the signal that export described signal generation unit processing back is split as multichannel speed;

If received signal shines upon multiplexing forming by speed more than one tunnel greater than other high speed signal of described particle level, comprise in the described adaptive device: described signal generation unit, time-division demultiplexing unit and split cells, the time-division demultiplexing unit will be that the described low speed signal of multichannel inputs to described signal generation unit and split cells by the multiplexing high speed signal demultiplexing that forms of multi-path low speed signal map, and the low speed signal that split cells is handled back output with the signal generation unit further is split as described unified other parallel signal of particle level.

The described split cells of this system comprises: decide frame module, write address generation module, read address generating module, n frequency division module and 2n pushup storage FIFO, wherein, n is that signal splits the signal way that export the back through this split cells;

Input signal has with the road synchronised clock, after handling, frame obtains frame signal through deciding searching of frame module, synchronised clock is imported the write address generation module with frame signal, produce write address and write and allow to enter respectively each FIFO, control FIFO writes, and the synchronous signal clock also inputs to the n distribution module, and the output behind n frequency division module frequency division inputs to frame signal and reads address generating module, generation is read the address and is read to allow to enter respectively each FIFO, and control FIFO reads;

The data of input signal order frame by frame writes n FIFO successively, writes the data parallel output among full n FIFO in back, and the data of back write an other n FIFO successively simultaneously, writes the data parallel output among the full described other n FIFO in back.

This system further comprises: at least one electrooptic switching element, and the electrical signal conversion that is used for receiving is a light signal;

At least one map unit is used for signal is shone upon processing;

At least one is used for unified other signals reverse of particle level of described asynchronous cross matrix output is adapted for the signal of desired rate against adaptive device;

Asynchronous cross matrix carries out the signal exported behind the asynchronous cross scheduling, enters contrary adaptive device and carries out opposite adaptation and handle, and inputs to map unit, after mapping is handled, enters electrooptic switching element and is converted to light signal.

If the speed of this required output signal of system is described unified particle rank, described contrary adaptive device comprises: decide frame alignment unit and signal recovery unit, describedly decide the frame alignment unit and unified other signal of particle level of asynchronous cross matrix output is carried out deciding to input to the signal recovery unit after the frame registration process carry out exporting after the descrambling code processing;

If required output for by multichannel speed being the multiplexing signal that forms of other low speed signal of described particle level mapping, described contrary adaptive device comprises: decide frame alignment unit, signal recovery unit and time-division multiplexing unit, time-division multiplexing unit is used for exporting after being one road other high speed signal of desired rate level through described multi-path low speed signal time division multiplexing of deciding frame alignment unit and the output of signal recovery unit;

If the signal for forming greater than other high speed signal mapping of described particle level of required output by one tunnel speed, described contrary adaptive device comprises: decide frame alignment unit, signal recovery unit and merge cells, describedly decide the frame alignment unit and every group of described asynchronous cross matrix output unified other parallel signal of particle level carry out deciding to input to merge cells after the frame registration process, merge cells is merged into multi-path parallel signal and is inputed to signal recovery unit descrambling code behind one road other high speed signal of desired rate level and handle back output;

If required output is greater than the multiplexing signal that forms of other high speed signal mapping of described particle level by speed more than one tunnel, described contrary adaptive device comprises: decide the frame alignment unit, the signal recovery unit, time-division multiplexing unit and merge cells, describedly decide the frame alignment unit and every group of described asynchronous cross matrix output unified other parallel signal of particle level carry out deciding to input to merge cells after the frame registration process, merge cells is merged into multi-path parallel signal and is inputed to that to export the time-division multiplexing unit time division multiplexing after signal recovery unit descrambling code is handled to be to export behind one road other high speed signal of desired rate level behind one road signal.

The described merge cells of this system comprises:

The backplane interface module, be used for the n road signal of input is carried out clock and data recovery, n road clock after recovering and data-signal inputed to decide the frame alignment module, select wherein one road clock to be sent to respectively and decide the frame alignment module and FIFO merges module as the reference clock;

Decide the frame alignment module, be used for every road signal is carried out frame search respectively, find n road signal frame start position separately, the frame start position of n road signal is all snapped on the identical frame phase place, the data of output n road alignment and frame signals merge module to FIFO; And

FIFO merges module, inside is provided with 2n FIFO, and data and frame signals write each FIFO successively and carry out registration process, and each FIFO stores frame data, meanwhile, with n times of speed reading of data and output from a described n FIFO successively to write operation.

The described asynchronous cross matrix of this system is asynchronous crossing net sheet.

From above as can be seen, the method and system of signal dispatching has following characteristics and advantage in a kind of optical transfer network provided by the invention:

1) adopts the adaptive mode of signal rate, make no matter which kind of other signal of speed level can arrive is converted to unified speed rank, and in unified asynchronous cross matrix, dispatch, and need not multistage cross unit, thereby reduced the complexity of system design, and unified scheduling can realize the flexible add drop multiplex between each speed level signal, has improved the networking flexibility of OTN network.

2) the present invention has expanded the time division multiplexing/demultiplexing technology of prior art signal, high speed signal is split into multi-path low speed parallel signal binding scheduling, by transmitting the high speed signal particle on the parallel signal of channelizing framing, and in dispatching patcher, use identical scheduling path, thereby realize the scheduling feature of high speed signal particle.Make on existing asynchronous cross chips technical merit, solved the scheduling problem of ODU2/ODU3 higher rate signal.

Description of drawings

G.709, the multiplexing path of the mapping schematic diagram between the various signals that Fig. 1 defines for ITU-T;

Fig. 2 is the signal dispatching system configuration schematic diagram of existing first kind of technical scheme;

Fig. 3 is the signal dispatching system configuration schematic diagram of existing second kind of technical scheme;

Fig. 4 is the structured flowchart of signal dispatching of the present invention system;

Fig. 5 is the structural representation of adaptive device in the signal dispatching of the present invention system;

Fig. 6 is the structural representation of contrary adaptive device in the signal dispatching of the present invention system;

Fig. 7 is the present invention's system configuration schematic diagram to unifying to dispatch based on ODU1/ODU2/ODU3 simultaneously;

G.709, the mapping structure schematic diagram from ODUk to OTUk that Fig. 8 stipulates for ITU-T;

Fig. 9 is the structural representation of the ODU2 split cells in the signal dispatching of the present invention system;

Figure 10 in the signal dispatching of the present invention system at the structural representation of the ODU2 FIFO merge cells of ODU2 signal;

Figure 11 is the structural representation that the present invention is directed to the ODU2 FIFO merge cells dorsulum interface module of ODU2 signal;

Figure 12 the present invention is directed to the structural representation of deciding the frame alignment module in the ODU2 FIFO merge cells of ODU2 signal;

Figure 13 decides the sequential chart of frame alignment module frame alignment procedure for the present invention;

Figure 14 the present invention is directed to the structural representation of ODU2FIFO merge cells in the ODU2 FIFO merge cells of ODU2 signal for the present invention.

Embodiment

The present invention is further described in more detail below in conjunction with drawings and the specific embodiments.

Core thinking of the present invention is: on the basis of existing high-speed asynchronous interleaving techniques, scheduling unit for unified ODU1/ODU2/ODU3 signal, the light signal that is received is become the signal of telecommunication through opto-electronic conversion, and after separating the mapping processing, be fitted to a unified particle rank, in based on other same asynchronous cross matrix of this particle level, carry out asynchronous cross scheduling and handle.

Carry out in the adaptation procedure,, make the speed of every road signal satisfy described unified particle rank if the speed of signal then resolves into multiple signals with current demand signal greater than described unified particle rank; If the speed of signal equals described unified particle rank, then signal can directly be sent into asynchronous cross matrix and carries out asynchronous cross scheduling after separating mapping; If the speed of signal then can be merged into one road signal by modes such as time division multiplexinges with multiple signals less than described unified particle rank, make the speed of this signal satisfy described particle rank.

This wherein when the speed of signal during greater than described unified particle rank, has three kinds of situations again, and G.709 under the agreement, adopting based on other asynchronous cross matrix of 2.5Gbps particle level is example with ITU-T:

First kind of situation, this signal is multiplexing the forming of other low speed signal mapping of described particle level by multichannel speed, such as: current OTU2 or OTU3 are by multiplexing the forming of 4 road or 16 road ODU1 mapping, decomposition multiplex in the time of then only current demand signal need being carried out, being reduced into multichannel speed is described other low speed signal of particle level, decomposition multiplex is 4 road ODU1 when being about to the ODU2 signal of OTU2 after separating mapping, and decomposition multiplex is 16 road ODU1 during with the ODU3 signal of OTU3 after separating mapping.

Second kind of situation, this signal is formed greater than other high speed signal mapping of described particle level by one tunnel speed, such as: current OTU2 is formed by the ODU2 mapping, or OTU3 is formed by the ODU3 mapping, then current demand signal should be split into multichannel speed is described other parallel signal of particle level, such as: with OTU2 through separate be mapped as ODU2 after, it is the signal of 2.5Gbps that the method that re-uses the channelizing framing splits into 4 tunnel speed ranks, it is ODU1 speed rank, walk abreast again and be sent to asynchronous cross matrix, and when scheduling, use identical scheduling path, make parallel signal binding scheduling, because this 4 tunnel signal combination could constitute complete ODU2 together, therefore for convenience of description, ODU2 after the present invention will split is expressed as ODU2[3:0], each ODU2[3:0] in include 4 other signals of ODU1 speed level; With OTU3 through separate be mapped as ODU3 after, the method that re-uses the channelizing framing splits into 16 road other signals of ODU1 speed level, walk abreast again and be sent to asynchronous cross matrix binding scheduling, for convenience of description, ODU3 after the present invention will split is expressed as ODU3[15:0], each ODU3[15:0] in include 16 other signals of ODU1 speed level.

The third situation, this signal shines upon multiplexing forming by multichannel speed greater than other high speed signal of described particle level, such as: current OTU3 is by multiplexing the forming of 4 road ODU2 mapping, then should be demultiplexed into multichannel speed the current demand signal time-division greater than described other high speed signal of particle level, it is described other parallel signal of particle level that every road high speed signal that will obtain again splits into multichannel speed, be OTU3 through separate be mapped as ODU3 after, elder generation's demultiplexing is 4 road ODU2, again every road ODU2 is split as 4 road other signals of ODU1 speed level, be ODU2[3:0], thereby included 16 road other signals of ODU1 speed level altogether, i.e. 4 * ODU2[3:0], parallelly be sent to asynchronous cross matrix.

For realizing that said method the invention provides a kind of signal dispatching system, the structured flowchart of this system is referring to shown in Figure 4, at least should comprise: the asynchronous cross matrix that is used for unified other signal of particle level is carried out asynchronous cross scheduling, and at least one photoelectric conversion unit, separate map unit and adaptive device, the rate adapted before being used for signal dispatched.Scheduling process is: after the required light signal of dispatching processing is received by this signal dispatching system, after photoelectric conversion unit is converted to the signal of telecommunication, input to and separate map unit, after separating mapping processing output, after entering the adaptive device adaptation processing, particle rank output with unified enters asynchronous cross matrix and carries out asynchronous cross scheduling.

The signal of scheduling back output can also further carry out opposite adaptation as required again, converts the signal of transmission desired rate to, and the output at asynchronous cross matrix also can increase contrary adaptive device, map unit and electrooptic switching element like this.Like this, the output signal after asynchronous cross matrix scheduling enters contrary adaptation module and carries out adaptive inverse process of associating, and is converted to the signal of desired rate, after map unit remaps, enters and exports after electrooptic switching element reverts to light signal.

Based on the current I TU-T various connection signal ODU1/ODU2/ODU3 of agreement regulation G.709, the structure of adaptive device of the present invention is referring to shown in Figure 5.

For the ODU1 signal and since the asynchronous cross matrix of present embodiment unified adopt ODU1 speed level other, therefore according to required different output signals to the ODU1 signal carry out simple framing, operation such as adaptive gets final product.Specifically, export the ODU1 signal if desired, then the adaptive device of ODU1 is the ODU1 signal generation unit 501 that is used to expand ODU frame head and signal scrambling code; Increase control information bit and FEC error correction if desired on signal, output has the OTU1 signal of FEC coding, and then the adaptive device of ODU1 is the OTU1 signal generation unit 502 that is used for ODU1 mapping, OTU1 framing, FEC coding and scrambler.

For by the multiplexing ODU2 signal that forms of 4 * ODU1, output has 4 * OTU1 signal of FEC coding if desired, then the adaptive device of ODU2 by signal flow to comprising successively: be used to finish the time-division demultiplexing unit 511 of ODU2 signal decomposition multiplex conversion when 4 tunnel low-level ODU1 signals, and handle these multiple signals finish ODU1 mapping, OTU1 framing, FEC encodes and the OTU1 signal generation unit 502 of scrambler; Export 4 * ODU1 signal if desired, then the adaptive device of ODU2 by signal flow to comprising successively: be used to finish the time-division demultiplexing unit 511 of ODU2 signal decomposition multiplex conversion when 4 tunnel low-level ODU1 signals, and the ODU1 signal generation unit 501 that is used to expand ODU frame head and signal scrambling code of handling these multiple signals.Wherein, because the signal that need export after time-division demultiplexing unit 511 is handled is 4 the tunnel, therefore ODU1 signal generation unit 501 described here, OTU1 signal generation unit 502 should be respectively 4 (only drawing one for simplicity among Fig. 5).

For not being the ODU2 signal that forms by rudimentary signal multiplexing, output has the OTU signal of FEC coding if desired, then the adaptive device of ODU2 by signal flow to comprising successively: finish the OTU2 signal generation unit 504 of ODU2 mapping, OTU2 framing, FEC coding and scrambler, and be used to finish serial OTU2 signal to OTU2[3:0] the OTU2 split cells 506 of parallel signal conversion; Export the ODU2 signal if desired, then the adaptive device of ODU2 by signal flow to comprising successively: be used to expand the ODU2 signal generation unit 503 of ODU frame head and signal scrambling code, and be used to finish serial ODU2 signal to ODU2[3:0] the ODU2 split cells 505 of parallel signal conversion.

For by the multiplexing ODU3 signal that forms of 16 * ODU1, output has 16 * OTU1 signal of FEC coding if desired, then the adaptive device of ODU3 by signal flow to comprising successively: be used to finish the time-division demultiplexing unit 512 of ODU3 signal decomposition multiplex conversion when 16 tunnel low-level ODU1 signals, and 16 corresponding OTU1 signal generation units 502; Export 16 * ODU1 signal if desired, then the adaptive device of ODU3 by signal flow to comprising successively: be used to finish the time-division demultiplexing unit 512 of ODU3 signal decomposition multiplex conversion when the low-level ODU1 signal of multichannel, and 16 corresponding ODU1 signal generation units 501.

For by the multiplexing ODU3 signal that forms of 4 * ODU2, output has the OTU signal of FEC coding if desired, then the adaptive device of ODU3 by signal flow to comprising successively: the time-division demultiplexing unit 513 that is used to finish the decomposition multiplex conversion when 4 tunnel low-level ODU2 signals of ODU3 signal, 4 corresponding OTU2 signal generation units 504, and corresponding a plurality of being used to finish serial OTU2 signal to OTU2[3:0] the OTU2 split cells 506 of parallel signal conversion; Export the ODU signal if desired, then the adaptive device of ODU3 by signal flow to comprising successively: the time-division demultiplexing unit 513 that is used to finish the decomposition multiplex conversion when 4 tunnel low-level ODU2 signals of ODU3 signal, 4 corresponding ODU2 signal generation units 503, and corresponding 4 be used to finish serial ODU2 signal to ODU2[3:0] the ODU2 split cells 505 of parallel signal conversion.

For not being the ODU3 signal that forms by rudimentary signal multiplexing, output has the OTU signal of FEC coding if desired, then the adaptive device of ODU3 by signal flow to comprising successively: be used to finish the OTU3 signal generation unit 508 of ODU3 mapping, OTU3 framing, FEC coding and scrambler, and be used to finish serial OTU3 signal to OTU3[15:0] the OTU3 split cells 510 of parallel signal conversion; Export the ODU signal if desired, then the adaptive device of ODU3 by signal flow to comprising successively: be used to expand the ODU3 signal generation unit 507 of ODU frame head and signal scrambling code, and be used to finish serial ODU3 signal to ODU3[15:0] the ODU3 split cells 509 of parallel signal conversion.

Wherein, the also unified sometimes in the present invention signal generation unit that is called of above-mentioned ODUk/OTUk (k=1,2,3) signal generation unit, the also unified split cells that is called of described ODUk/OTUk (k=1,2,3) split cells.

Based on the current I TU-T various connection signal ODU1/ODU2/ODU3 of agreement regulation G.709, the structure of the contrary adaptive device of the present invention is referring to shown in Figure 6.

For the contrary signal that is adapted for ODU1 of needs and since the asynchronous cross matrix of present embodiment unified adopt ODU1 speed level other, in the therefore contrary adaptation procedure, only need carry out simply deciding frame and align processing such as descrambling code.Specifically, if input be the OTU1 signal, then the contrary adaptive device of ODU1 decide the frame OTU1 that aligns and is decided frame alignment unit 616 and finish descrambling, fec decoder, ODU1 and separate and shine upon the OTU1 signal recovery unit 602 that formation ODU1 exports for being used for the OTU1 signal; If input is the ODU1 signal, then the contrary adaptive device of ODU1 is to be used for the ODU1 signal to decide the ODU1 signal recovery unit 601 that the ODU1 of frame alignment decides frame alignment unit 615 and is used for descrambling.

For the contrary signal that is adapted for ODU2 of needs, if input is 4 * OTU1 signal, then the contrary adaptive device of ODU2 by signal flow to comprising successively: OTU1 decides frame alignment unit 616 and 4 and has the OTU1 signal recovery unit 602 that descrambling, fec decoder and ODU1 separate mapping function, and is used to finish the time-division multiplexing unit 617 of 4 tunnel low-level ODU1 signals to the conversion of ODU2 signal time division multiplexing; If input is 4 * ODU1 signal, then the contrary adaptive device of ODU2 by signal flow to comprising successively: ODU1 decides the ODU1 signal recovery unit 601 of frame alignment unit 615 and ODU1 descrambling function, and is used to finish the time-division multiplexing unit 617 of the low-level ODU1 signal of multichannel to the conversion of ODU2 signal time division multiplexing.

If that input is OTU2[3:0] signal, then the contrary adaptive device of ODU2 by signal flow to comprising successively: 4 are used for OTU2[3:0] decide the OTU2[3:0 of frame alignment] decide frame alignment unit 604, being used to finish OTU2[3:0] parallel signal is to the OTU2 FIFO of serial OTU2 conversion of signals merge cells 612, and be used to finish OTU2 descrambling, fec decoder and ODU2 and separate the OTU2 signal recovery unit 606 that mapping function forms ODU2; If that input is ODU2[3:0] signal, then the contrary adaptive device of ODU2 by signal flow to comprising successively: 4 are used for ODU2[3:0] decide the ODU2[3:0 of frame alignment] decide frame alignment unit 603, being used to finish ODU2[3:0] parallel signal is to the ODU2FIFO merge cells 611 of serial ODU2 conversion of signals, and the ODU2 signal recovery unit 605 of finishing ODU2 descrambling function.

For the contrary signal that is adapted for ODU3 of needs, if input is 16 * OTU1 signal, then the contrary adaptive device of ODU3 by signal flow to comprising successively: OTU1 decides frame alignment unit 616 and 16 and has the OTU1 signal recovery unit 602 that descrambling, fec decoder and ODU1 separate mapping function, and is used to finish the time-division multiplexing unit 618 of the low-level ODU1 signal of multichannel to the conversion of ODU3 signal time division multiplexing; If input is 16 * ODU1 signal, then the contrary adaptive device of ODU3 by signal flow to comprising successively: ODU1 decides frame alignment unit 615 and 16 ODU1 signal recovery units 601 with descrambling function, and is used to finish the time-division multiplexing unit 618 of the low-level ODU1 signal of multichannel to the conversion of ODU3 signal time division multiplexing.

If that input is 4 * OTU2[3:0] signal, then the contrary adaptive device of ODU3 by signal flow to comprising successively: be used for 4 * OTU2[3:0] decide 4 * OTU2[3:0 of frame alignment] decide frame alignment unit 604,4 are used to finish OTU2[3:0] parallel signal is to the OTU2 FIFO of serial OTU2 conversion of signals merge cells 612,4 are used to finish the OTU2 signal recovery unit 606 that OTU2 descrambling, fec decoder and ODU2 separate mapping function, and time-division multiplexing unit 619; If that input is 4 * ODU2[3:0] signal, then the contrary adaptive device of ODU3 by signal flow to comprising successively: be used for 4 * ODU2[3:0] decide 4 * ODU2[3:0 of frame alignment] decide frame alignment unit 603,4 are used to finish ODU2[3:0] parallel signal is to the ODU2 FIFO of serial ODU2 conversion of signals merge cells 611, be used to finish the ODU2 signal recovery unit 605 of ODU2 descrambling function, and time-division multiplexing unit 619.

If that input is OTU3[15:0] signal, then the contrary adaptive device of ODU3 by signal flow to comprising successively: be used for OTU3[15:0] decide the OTU3[15:0 of frame alignment] decide frame alignment unit 608, being used to finish OTU3[15:0] parallel signal is to the OTU3 FIFO of serial OTU3 conversion of signals merge cells 614, and be used for OTU3 descrambling, fec decoder and ODU3 and separate the OTU3 signal recovery unit 610 that mapping function forms ODU3; If that input is ODU3[15:0] signal, then the contrary adaptive device of ODU3 by signal flow to comprising successively: be used for ODU3[15:0] decide the ODU3[15:0 of frame alignment] decide frame alignment unit 608, being used to finish ODU3[15:0] parallel signal is to the ODU3 FIFO of serial ODU3 conversion of signals merge cells 613, and the ODU3 signal recovery unit 609 that is used for ODU3 descrambling formation ODU3.

Wherein, above-mentioned ODUk/OTUk (k=1,2,3) the also unified sometimes in the present invention signal recovery unit that is called of signal recovery unit, described ODU1/OTU1, ODU2[3:0]/OTU2[3:0], ODU3[15:0]/OTU3[15:0] decide frame alignment unit also unified sometimes being called and decide the frame alignment unit, the also unified merge cells that is called of described ODUk/OTUk (k=1,2,3) FIFO merge cells.

Comparatively complete can realize based on present ITU-T G.709 all of agreement regulation connect signal ODU1/ODU2/ODU3, the system configuration of unifying to dispatch, referring to shown in Figure 7, externally there are OTU1, OTU2 and OTU3 three class interfaces in this system respectively at OTU1, OTU2 and OTU3, and concentrate on asynchronous crossing net sheet unify the scheduling.

The signal dispatching system of Fig. 7 comprises:

Asynchronous crossing net sheet is used to carry out the cross scheduling of signal, and the total interface signal of asynchronous crossing net sheet is 2.5Gbps rank (promptly belonging to the 2.5Gbps scope);

The mapping conversion of ODUk to the OTUk signal finished in the Map unit, and the signal of being imported is carried out ODUk mapping, the insertion of OTUk expense, OTUk framing, forward error correction (FEC) coding, scrambler operation successively;

The separate mapping conversion of OTUk signal to the ODUk signal finished in the Demap unit, the signal of being imported carried out OTUk successively decide that frame, descrambling, fec decoder, OTUk expense terminate, ODUk separates map operation;

Time-division multiplexing unit, finish the time division multiplexed process of multichannel ODU1/2 signal to higher level ODU2/3 signal, its process is transparent asynchronous mapping multiple connection process, guaranteed the complete transparent transmission of multichannel ODU1/2 signal, about concrete time-division multiplexing method, ITU-T G.709 the 19th joint has specific definition.

The time-division demultiplexing unit, finish the time decomposition multiplex process of time-multiplexed ODU2/3 signal to multichannel low level ODU1/2 signal, its process is the transparent asynchronous mapping branch termination process of separating, guaranteed the complete transparent transmission of multichannel ODU1/2 signal, separating time division multiplexing is time-multiplexed reverse procedure, in ITU-TG.709 the 19th joint specific definition is arranged also.

ODU2 FIFO merge cells 611 and ODU3 FIFO merge cells 613 are finished asynchronous crossing net sheet side ODU2[3:0] and ODU3[15:0] parallel signal is to the conversion of serial ODU2 and ODU3 signal, this transfer process is the combined transformation process of a physics.

ODU2 split cells 505 and ODU3 split cells 509 use the method for channelizing framing to finish serial ODU2 and ODU3 signal to asynchronous intersection netting direction ODU2[3:0] and ODU3[15:0] conversion of parallel signal, be the fractionation conversion process of a physics.

Shown in the frame of broken lines among Fig. 7 be above-mentioned adaptive/contrary adaptation unit, wherein, on the input direction of asynchronous crossing net sheet, also have ODUk signal generation unit at signal, the ODUk that has also corresponding on opposite direction decides frame alignment unit and signal recovery unit, k=1,2,3, because these unit correspondences all is generally to need the routine techniques that adopts in the signal processing, therefore among Fig. 7 for simplicity, do not draw.

The signal dispatching process prescription of this system is as follows:

Shine upon OTU1 (1 * ODU1) signal that forms for what import by ODU1, after the O/E cell translation is the signal of telecommunication, enter the Demap unit separate the mapping treatment conversion be 1 * ODU1, in adaptive device, carry out ODU framing, scrambler etc. adaptive after, send into asynchronous crossing net sheet and carry out asynchronous cross scheduling.

Here convenient for statement, with n * ODUk or n * ODUk[m:0] represent n road ODUk signal or ODUk[m:0] (m+1) bit parallel signal, k=1 wherein, 2,3.

Shine upon the multiplexing OTU2 that forms (4 * ODU1) signals for what import by 4 road ODUI, after the O/E cell translation is the signal of telecommunication, enter the Demap unit separate the mapping treatment conversion be 1 * ODU2, enter adaptive device again, demultiplexing is 4 * ODU1 in the time-division demultiplexing unit therein, and after carrying out processing such as ODU framing, scrambler, send into asynchronous crossing net sheet and carry out asynchronous cross scheduling.

Shine upon the multiplexing OTU3 that forms (16 * ODU1) signals for what import by 16 road ODU1, after the O/E cell translation is the signal of telecommunication, enter the Demap unit separate the mapping treatment conversion be 1 * ODU3, enter adaptive device again, time-division demultiplexing unit demultiplexing therein is 16 * ODU1, and after carrying out processing such as ODU framing, scrambler, send into asynchronous crossing net sheet and carry out asynchronous cross scheduling.

(1 * ODU2) signal after the O/E cell translation is converted to the signal of telecommunication, enters the Demap cell translation and becomes 1 * ODU2 signal for the OTU2 that is formed by 1 road ODU2 mapping that imports; Enter adaptive device, after carrying out processing such as ODU framing, scrambler, because this moment, the speed of every road ODU2 serial signal reached the 10Gbps rank, asynchronous crossing net sheet can't satisfy it and transmit requirement, must changing down, therefore this ODU2 signal demand enters ODU2 split cells 505, splits into 1 * ODU2[3:0] the parallel signal form, parallel signal single line speed drops to the 2.5Gbps rank; Like this, the ODU2[3:0 after the fractionation] parallel signal can enter asynchronous cross unit and carry out asynchronous cross scheduling.

(1 * ODU3) signal after the O/E cell translation is the signal of telecommunication, enters the Demap cell translation and becomes 1 * ODU3 signal for the OTU3 that is formed by 1 road ODU3 mapping that imports; Enter adaptive device, after carrying out processing such as ODU framing, scrambler, because the speed of every road ODU3 serial signal has reached the 40Gbps rank, asynchronous crossing net sheet can't satisfy it and transmit requirement, must changing down, therefore this ODU3 signal also will enter ODU3 split cells 509 again, splits into 1 * ODU3[15:0] the parallel signal form, parallel signal single line speed drops to the 2.5Gbps rank; Like this, the ODU3[15:0 after the fractionation] parallel signal can enter asynchronous cross unit and carry out asynchronous cross scheduling.

For input (4 * ODU2) signals after the O/E cell translation is the signal of telecommunication, enters the Demap cell translation and become 1 * ODU3 signal by the multiplexing OTU3 that forms of 4 road ODU2 mapping; Enter adaptive device, at first 1 * ODU3 signal enters time-division demultiplexing unit 513 and converts 4 * ODU2 signal to, and carries out processing such as ODU framing, scrambler at ODU2 signal generation unit 503; Afterwards, because the speed of every road ODU2 serial signal has reached the 10Gbps rank, asynchronous crossing net sheet can't satisfy it and transmit requirement, must changing down, therefore every road ODU2 signal enters 4 ODU2 split cells 505 more respectively, use the method for channelizing framing to split into ODU2[3:0 respectively] the parallel signal form, parallel signal single line speed drops to the 2.5Gbps rank; Like this, 4 * ODU2[3:0 after the fractionation] parallel signal enters asynchronous cross unit and carries out asynchronous cross scheduling.

Asynchronous cross unit is on the 2.5Gbps benchmark, between uniformity signal, carry out asynchronous cross scheduling, promptly between the ODU1 signal of input, dispatch, the input ODU2[3:0] between dispatch, the input ODU3[15:0] between dispatch, promptly finished the scheduling feature of ODU1/ODU2/ODU3 particle.Signal through the output of scheduling back carries out reverse process respectively according to the multiplexing demand of different mappings.

Reverse procedure is described below:

For need (situation of 1 * ODU1) output, as can be seen, the signal from asynchronous crossing net sheet output of its correspondence should be 1 * ODU1 among the mapping relations of G.709 stipulating according to ITU-T and Fig. 7 with OTU1 after the scheduling.1 * ODU1 carries out in contrary adaptive device after simple ODU decide frame (if be the OTU1 signal output of many light mouth, then needing the frame of deciding of ODU1 to align) and descrambling, enter the Map cell translation and be OTU1 (1 * ODU1), after the E/O cell translation is light signal, export.

For need (situations of 4 * ODU1) outputs, as can be seen, the signal from asynchronous crossing net sheet output of its correspondence should be 4 * ODU1 among the mapping relations of G.709 stipulating according to ITU-T and Fig. 7 with OTU2 after the scheduling.4 * ODU1 is introduced into contrary adaptive device, at first, 4 * ODU1 signal demand carries out deciding frame alignment descrambling, converts 1 * ODU2 signal afterwards in time-division multiplexing unit 617 to, enter the Map cell translation again and be OTU2 (4 * ODU1), after the E/O cell translation is light signal, export.

For need (situations of 16 * ODU1) outputs, as can be seen, the signal from asynchronous crossing net sheet output of its correspondence should be 16 * ODU1 among the mapping relations of G.709 stipulating according to ITU-T and Fig. 7 with OTU3 after the scheduling.16 * ODU1 is introduced into contrary adaptive device, at first 16 * ODU1 signal is carried out deciding frame alignment descrambling, in time-division multiplexing unit 618, convert 1 * ODU3 signal afterwards to, enter the Map cell translation again and be OTU3 (16 * ODU1), after the E/O cell translation is light signal, export.

For after the scheduling need with OTU2 (situation of 1 * ODU2) output, as can be seen, the signal from asynchronous crossing net sheet output of its correspondence should be 1 * ODU2[3:0 among the mapping relations of G.709 stipulating according to ITU-T and Fig. 7].1 * ODU2[3:0] be introduced into contrary adaptive device, through ODU2[3:0] decide frame alignment unit 603 decide the frame registration process after, at ODU2 FIFO merge cells 611, be merged into 1 * ODU2 signal, and carry out scramble process at ODU2 signal recovery unit 605; Enter then the Map cell translation become OTU2 (1 * ODU2), after the E/O cell translation is light signal, export.

For after the scheduling need with OTU3 (situation of 1 * ODU3) output, as can be seen, the signal from asynchronous crossing net sheet output of its correspondence should be 1 * ODU3[15:0 among the mapping relations of G.709 stipulating according to ITU-T and Fig. 7].1 * ODU3[15:0] be introduced into contrary adaptive device, through ODU3[15:0] decide the frame alignment unit decide the frame registration process after, at ODU3 FIFO merge cells 613, be merged into 1 * ODU3 signal, and carry out scramble process at the signal recovery unit; Enter then the Map cell translation become the OTU3 signal (1 * ODU3), after the E/O cell translation is light signal, export.

For after the scheduling need with OTU3 (situations of 4 * ODU2) outputs, as can be seen, the signal from asynchronous crossing net sheet output of its correspondence should be 4 tunnel ODU2[3:0 among the mapping relations of G.709 stipulating according to ITU-T and Fig. 7].4 * ODU2[3:0] signal enters earlier contrary adaptive device respectively, through ODU2[3:0] decide frame alignment unit 603 decide the frame registration process after, at ODU2 FIFO merge cells 611, be merged into 4 * ODU2 signal, and carry out scramble process at ODU2 signal recovery unit 605, enter time-division multiplexing unit then and convert 1 * ODU3 signal to; Enter again the Map cell translation become OTU3 (4 * ODU2), after the E/O cell translation is light signal, export.

In addition, on ODU1 or ODU2/ODU3 backboard signal, can also increase control information bit and FEC error correction, thereby more help the transmission of asynchronous crossing net sheet backboard signal.

Specific practice can be provided with corresponding OTUk signal generation/recovery unit 701 in adaptive/contrary adaptive device, k=1 wherein, 2,3.

OTUk signal generation unit is finished ODUk mapping, OTUk framing, FEC coding and scrambler function successively; OTUk signal recovery unit is finished OTUk descrambling, fec decoder and ODUk successively and is separated mapping function.

Above-mentioned ODUk shines upon/separates mapping, OTUk framing, FEC encoding and decoding and OTUk scrambler descrambling code and is existing mature technology, and therefore the inside concrete structure for them repeats no more here.

Mapping structure from ODUk to OTUk can be referring to shown in Figure 8, with respect to ODUk, OTUk has increased frame at first row the 1st to 14 row and has delimited expense (FA OH) and OTUk expense (OTUk OH), has increased by the 3825th to 4080 row, and has filled the FEC coding (OTUk FECRS) of OTUk therein.

Like this, the OTUk signal of asynchronous crossing net sheet side is for having the FEC encoded signals, thereby can improve the backboard transmission performance greatly, and corrects a certain amount of error code.

At this moment, the input/output signal of asynchronous crossing net sheet all is the OTU type signal, to OTU1 or with the OTU2[3:0 of OTU1 same level], OTU3[15:0] parallel signal carries out cross scheduling.

For clarity sake, (scheduling process of 4 * ODU2) signals is that example is illustrated with OTU3 below, the OTU3 (4 * ODU2) of input, after the O/E cell translation is the signal of telecommunication, enter the Demap cell translation and become 1 * ODU3 signal, 1 * ODU3 signal enters the time-division demultiplexing unit and converts 4 * ODU2 signal to then, afterwards, carry out the ODU2 mapping, and by the OTU framing, FEC coding and scrambler form 4 * OTU2, every road 4 * OTU2 signal enters 4 OTU2 split cells 506 more respectively, splits into OTU2[3:0 respectively] the parallel signal form, parallel signal single line speed drops to the 2.5Gbps rank; 4 * OTU2[3:0 after the fractionation] parallel signal enters asynchronous cross unit at last and carries out asynchronous cross scheduling.

In the signal of output after asynchronous crossing net sheet scheduling, 4 road OTU2[3:0 are arranged] parallel signal is through 4 * OTU[3:0] decide to enter OTU2 FIFO merge cells 612 after the frame registration process, be merged into 4 * OTU2 signal, separate mapping by descrambling, fec decoder and ODU2 again and form 4 * ODU2, enter time-division multiplexing unit then and convert 1 * ODU3 signal to, enter again the Map cell translation become OTU3 (4 * ODU2), after the E/O cell translation is light signal, export.

The scheduling process of other signal can repeat no more by that analogy.

At signal on the input and output direction of asynchronous crossing net sheet, above described O/E, E/O unit, Demap/Map unit, the time decomposition multiplex/time-division multiplexing unit and ODU mapping, OTU framing, FEC coding and scrambler/OTU descrambling, fec decoder, ODU separate that map unit all adopts is present prior art, can utilize existing device to realize.But for above-mentioned split process, what use among the present invention is a kind of method of channelizing framing, existing channelizing framing method is to be that unit splits into 4 paths and transmits with the frame of each OTU or ODU with 16 block of bytes, but this method only is applicable to the ODU2/OTU2 signal, can adopt this method to the ODU2/OTU2 signal in the scheduling process of the present invention.But for convenience to the unified scheduling of different rates signal, the present invention has proposed again a kind ofly can generally be applicable to the new method for splitting of various OTN signals.

This method is unit with the frame, and signal order is frame by frame carried out buffer memory, after being filled with the n frame, the data parallel of this n frame being sent, and repeat said process; Wherein n is the way of desiring to split into of current demand signal.

Certainly, be applicable to that method for splitting of the present invention is not limited to this, other any method for splitting that can finish other high speed signal channelizing framing of ODU1 higher level all allows.

According to above-mentioned method for splitting, the structure of the ODU split cells of the ODU2 signal in the signal dispatching of the present invention system is referring to shown in Figure 9, comprise: decide frame module, write address generation module, read address generating module, 4 frequency division modules and 8 pushup storage FIFO_1, FIFO_2, FIFO_3, FIFO_4, FIFO_5, FIFO_6, FIFO_7, FIFO_8.Wherein, 4 frequency division modules are used for the frequency of input signal is reduced to 1/4 of original frequency; The write address generation module is used to control the write frequency of each FIFO write pointer; Read the read frequency that address generating module is used to control each FIFO read pointer; It is two groups that 8 FIFO are divided into, and per 4 is one group, and each FIFO can store the data of an ODU2 frame.

The split process of signal specifically comprises:

The ODU2 signal of input has the synchronised clock with the road, and through deciding to obtain frame signal FP after frame module is searched the frame processing, this process is ripe prior art, repeats no more.Synchronised clock enters the write address generation module with frame signal, produces write address W_Addr and writes to allow WE1, and WE2 ..., WE8, the W_Addr and the WE that enter each FIFO respectively hold, and control FIFO writes.Described write address with the generation rule of writing permission is: FIFO write address circulation change makes the ODU2 data serial write each FIFO successively; Written allowance signal in turn effectively jumps to another group FIFO after making 4 FIFO that write full first group again.Wherein, the corresponding shared one group of write address line W_Addr of FIFO receives writing address signal in two groups in Fig. 9, be shared in twos one group of FIFO_1 and FIFO_5, FIFO_2 and FIFO_6, FIFO_3 and FIFO_7, FIFO_4 and FIFO_8, thereby can simplified wiring, also allow for each FIFO certainly one group of write address line W_Addr all is provided.

Clock Clk also inputs to 4 frequency division modules, output signal behind 4 frequency division module frequency divisions inputs to Clk and the FP end of reading address generating module respectively with frame signal FP, read the address generating module generation and read address R_Addr and read to allow RE1, RE2, read the R_Addr that address R_Addr enters each FIFO respectively; Read to allow RE1 to import first group of pushup storage FIFO_1, FIFO_2, FIFO_3, FIFO_4, RE2 imports second group of pushup storage FIFO_5, FIFO_6, FIFO_7, FIFO_8, controls reading of each FIFO respectively.The generation rule of reading the address and reading to allow is: read address cycle and change, read to allow signal RE1 and RE2 alternately effectively, make two groups of data among the FIFO replace parallel read-out, wherein, corresponding FIFO reads address wire for shared one group in two groups in Fig. 9, be shared in twos one group of FIFO_1 and FIFO_5, FIFO_2 and FIFO_6, FIFO_3 and FIFO_7, FIFO_4 and FIFO_8, certainly, also can be set to not shared.In addition, the read-write of ping-pong is carried out in reading address signal and need guaranteeing that current one group of FIFO and the current one group of FIFO that carries out write operation that carries out read operation staggers of generation, promptly write FIFO_1 to FIFO_4 during, read FIFO_5 to FIFO_8; When writing FIFO_5 to FIFO_8, read FIFO_1 to FIFO_4.Wherein, as can be seen, the read frequency of FIFO is 1/4 of a write frequency.

The ODU2 data write FIFO_1, FIFO_2, FIFO_3 and FIFO_4 in proper order, and each FIFO stores frame data; FIFO_1 to FIFO_4 writes after the frame, jumping to the same order of FIFO_5, FIFO_6, FIFO_7 and FIFO_8 writes, meanwhile, read pointer begins while parallel read-out data from FIFO_1, FIFO_2, FIFO_3 and FIFO_4, form the parallel data ODU2[0 of low speed], ODU2[1], ODU2[2] and ODU2[3] output, read rate is 1/4 of an ODU2 speed, so read-write motion has alternately promptly been finished the ODU2 signal to parallel signal ODU2[3:0] conversion of (ODU1 speed level signal).

So, ODU2[3:0 that obtains after the fractionation] signal still is framing signals, includes the FA zone; Data delay is 4 * T _ODU2=4 * 12.191 μ s=48.764 μ s.

Basic identical for the situation of OTU2 signal and ODU2, just each FIFO_x of OTU split cells need store the frame data of OTU2.

Signal from asynchronous crossing net sheet on the outbound course of light mouth, above described E/O unit, Map unit, time-division multiplexing unit, ODUk/OTUk signal recovery unit all adopt is present prior art, can utilize existing device to realize.But, be n * ODUk[m:0 owing to what receive from the crossing net sheet], so ODUk/OTUk decides frame alignment unit and ODUk/OTUk FIFO merge cells, k=1,2,3, the new technology of necessary employing.Below be a kind of implementation provided by the invention:

Because ODUk/OTUk described here decides the frame alignment unit and the contact of ODUk/OTUk FIFO merge cells is tightr, therefore below the two is described altogether, referring to shown in Figure 10, being example to the ODU2 Signal Processing, comprise: the backplane interface module, decide frame alignment module and ODU2 FIFO merge cells 611, wherein backplane interface module and decide the frame alignment module and belong to ODU and decide frame alignment unit 1001.

ODU2[3:0 behind cross scheduling] enter in the backplane interface module, 4 road parallel signals to input carry out clock and data recovery, n road clock after recovering and data-signal inputed to decide the frame alignment module, and select wherein one road clock to be sent to respectively and decide frame alignment module and ODU2FIFO merge cells 611 as the reference clock.

Decide the frame alignment module every road signal is carried out frame search respectively, find 4 road signals frame start position separately, the frame start position of 4 road signals is all snapped on the identical frame phase place, export 4 tunnel data of aliging and frame signals to ODU2 FIFO merge cells 611.

ODU2 FIFO merge cells 611 inside are provided with two groups of FIFO, and 4 every group, each FIFO stores frame data.ODU2[3:0 after the alignment] parallel data uses low-speed clock to be written in parallel to wherein one group of FIFO with reference frame frame by frame, carries out registration process; Meanwhile, with 4 times to the speed of write operation by frame sequential reading of data and sending from another group FIFO successively, two groups of FIFO adopt the table tennis read-write modes to prevent read/write conflict.Obtain the ODU2 data at last; Data delay is 4 * T _ODU2=4 * 12.191 μ s=48.764 μ s.

Wherein, the structure of backplane interface module is referring to shown in Figure 11, comprise: 4 clock and data recovery modules (CDR) and four are selected one selector 1101, ODU2[3:0] each road parallel signal ODU2[0], ODU2[1], ODU2[2] and ODU2[3] enter 4 CDR respectively and recover data ODU2[n] and corresponding clock signal ODU2[n] Clk and output, n=0 wherein, 1,2,3; 4 tunnel clock signal ODU2[n that recover] Clk enters four simultaneously and selects a selector 1101, selects the output of one road clock according to the clock selecting control signal, as the reference clock.Wherein, because ODU2[3:0] signal splits by same ODU2 signal and forms, therefore the CDR clock signal is with the clock source, can select wherein one road CDR clock conduct to decide the clock of reading of frame alignment FIFO, to finish ODU2[3:0] data decide frame alignment, remedied the delay variance of 4 road signals through producing in cross scheduling and the transport process.

Decide frame alignment module structure referring to shown in Figure 12, comprising: search frame module, 4 FIFO and corresponding write address generation module and frame phase alignment module and one for 4 and read address generating module.

Each circuit-switched data ODU2[n after CDR recovers] (n=0,1,2,3) and clock ODU2[n] Clk (n=0,1,2,3) enter at first respectively and search frame module and search frame, the frame phase place that searches out each road signal is exported to the write address generation module of frame phase alignment module and each FIFO respectively; The write address generation module also receives corresponding clock signal, produces write address and exports corresponding FIFO respectively to; Frame phase alignment module, generates frame signals and exports to the ODU2 FIFO merge cells 611 of reading address generating module and back the frame phase alignment to of each a signal suitable position according to the reference clock that receives; Reading address generating module receives described frame signals and reference clock and generates and read the address and export to each FIFO; Each FIFO circulates under the effect of read/write address and carries out read-write operation, and 4 road signals are all snapped on the identical frame phase place.Wherein, this frame phase place is that a certain road signal is searched the frame signal that frame comes out in 4 the tunnel, promptly inner frame alignment operation automatically.Because the clock frequency of read/write address is identical, under suitable read/write address difference condition, FIFO can not overflow or be empty.Wherein read/write address difference is determined by frame phase alignment module, and is relevant with the size of FIFO.

Referring to shown in Figure 13, be the sequential chart of frame alignment procedure.Because the size of each FIFO is conditional, so the maximum deviation of each frame signal can not surpass the magnitude range of FIFO, frame signals phase place after the alignment should be positioned at the position of a certain amount of delay after the most backward frame phase place, but can not surpass the scope of FIFO, promptly the phase place of this frame signals should drop in the zone of solid box shown in Figure 13.

The structure of ODU2 FIFO merge cells 611 comprises referring to shown in Figure 14: the write address generation module, read address generating module, 4 frequency multiplication modules and 8 pushup storage FIFO_1, FIFO_2, FIFO_3, FIFO_4, FIFO_5, FIFO_6, FIFO_7 and FIFO_8.Wherein 8 FIFO are divided into two groups, and each FIFO stores frame data.

Reference clock and frame signals enter the write address generation module, produce write address W_Addr and the written allowance signal WE1 of each FIFO, WE2, generation rule is: FIFO write address circulation change, WE1 and WE2 are alternately effectively, the ODU2[3:0 of alignment] parallel data ODU2[0] to ODU2[3] be written in parallel to first group of FIFO, wherein, corresponding FIFO can shared one group of write address line in two groups, be FIFO_1 and FIFO_5, FIFO_2 and FIFO_6, FIFO_3 and FIFO_7, shared in twos one group of FIFO_4 and FIFO_8, writing speed is a reference clock speed, jumps to another group FIFO afterwards.The quadruple clock signal that reference clock is exported after the quadruple module enters with frame signals and reads address generating module, produce reading the address and reading to allow signal RE1, RE2, RE3, RE4, RE5, RE6, RE7, RE8 of each FIFO, generation rule is: FIFO reads address cycle and changes, read to allow signal in turn effectively, jump to another group FIFO again after making 4 FIFO that run through first group.Wherein, corresponding FIFO can shared one group reads address wire in two groups, and promptly FIFO_1 and FIFO_5, FIFO_2 and FIFO_6, FIFO_3 and FIFO_7, FIFO_4 and FIFO_8 are shared in twos one group.Data among the FIFO are by series read-out, and current one group of FIFO and the current one group of FIFO that is just writing that is reading staggers.Being that the write pointer of FIFO is parallel writes FIFO_1, FIFO_2, FIFO_3 and FIFO_4 respectively, and then is written in parallel to FIFO_5, FIFO_6, FIFO_7 and FIFO_8, and writing speed is a reference clock speed; At this moment, read pointer begins to call over data from FIFO_1, FIFO_2, FIFO_3 and FIFO_4.Read rate is 4 frequencys multiplication of reference clock.Thereby finished 4 road ODU2 parallel signal ODU2[3:0] (2.5Gbps level signal) to the conversion of one road ODU2 signal.

Handle to adopt using the same method and can realize for the merging of OTU2 signal, just the FIFO_x of OTU2 FIFO merge cells 612 need store the frame data of OTU2.

The structure of the ODU/OTU split cells of the ODU3/OTU3 signal in the signal dispatching of the present invention system and the split cells of ODU2/OTU2 signal are similar, comprise: decide frame module, the write address generation module, read address generating module, 16 frequency division modules and 32 pushup storages (FIFO) FIFO_1, FIFO_2 ..., FIFO_32.

The deconsolidation process process basically identical of the deconsolidation process process of ODU3/OTU3 and above-mentioned ODU2/OTU2, just 16 FIFO are one group of read-write of carrying out ping-pong, the clock frequency of FIFO read pointer is 1/16 of a write pointer clock frequency.

The ODU3/OTU3 of ODU3/OTU3 signal decides the structure of frame alignment unit and ODU3/OTU3 FIFO merge cells, and also the situation with the ODU2/OTU2 signal is similar, comprises in the backplane interface module that 16 CDR, 16 select one selector; ODU3/OTU3 decides to comprise in the frame alignment module that 16 are searched frame module, 16 FIFO and corresponding write address generation module and frame phase alignment module and one and read address generating module; Comprise the write address generation module in the ODU3/OTU3 FIFO merge cells, read address generating module, 16 frequency multiplication modules and 32 pushup storage FIFO_1, FIFO_2 ..., FIFO_32.

Equally, the merging processing procedure of ODU3/OTU3 and the merging processing procedure of above-mentioned ODU2/OTU2 be basically identical also, and just 16 FIFO are one group of read-write of carrying out ping-pong, and the clock of FIFO read pointer is 16 times of write pointer clock.

Fractionation/merge cells recited above just for example also can adopt alternate manner to realize conversion between high level signal and the ODU1/OTU1 speed level signal, and the present invention is not limited.

The above only is preferred embodiment of the present invention, and is in order to restriction the present invention, within the spirit and principles in the present invention not all, any modification of being done, is equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (16)

1, the signal dispatching method in a kind of optical transport network is characterized in that, comprising:

The light signal that is received is treated as the signal of telecommunication through opto-electronic conversion, separates again after mapping handles, signal rate is fitted to a unified speed rank, in based on other asynchronous cross matrix of this particle level, carry out asynchronous cross scheduling and handle.

2, method according to claim 1 is characterized in that, described signal rate adaptation procedure comprises:

After separating the mapping processing, be described other signal of particle level if the speed of current demand signal greater than described particle rank, then resolves into current demand signal multichannel speed;

If the speed of current demand signal equals described particle rank, then current demand signal is directly sent into described asynchronous cross matrix and carried out asynchronous cross scheduling;

If the speed of current demand signal is less than described particle rank, then the signal of multichannel and current demand signal same kind being merged into one tunnel speed is described other signal of particle level.

3, method according to claim 2 is characterized in that, further comprises greater than described other situation of particle level for the speed of current demand signal:

If received signal is multiplexing the forming of other low speed signal mapping of described particle level by multichannel speed, then the demultiplexing process of described signal is for to demultiplex into the described low speed signal of multichannel with the current demand signal time-division;

If received signal is formed greater than other high speed signal mapping of described particle level by one tunnel speed, then the demultiplexing process of described signal is described other parallel signal of particle level for current demand signal is split into multichannel speed;

If received signal shines upon multiplexing forming by speed more than one tunnel greater than other high speed signal of described particle level, then the demultiplexing process of described signal is for to demultiplex into the described high speed signal of multichannel with the current demand signal time-division, and it is described other parallel signal of particle level that the every road high speed signal that obtains is split into multichannel speed.

According to claim 1,2 or 3 described methods, it is characterized in that 4, the light signal of described reception is the G.709 light signal under the agreement of ITU-T.

5, method according to claim 4 is characterized in that, described unified particle rank is an ODU1 speed rank;

If the OTU1 of the light signal that is received for being formed by 1 road ODU1 mapping, then described signal adaptation process is carried out after ODU framing, scrambler handle for the ODU1 that will separate the mapping back and form, and sending into described asynchronous cross matrix carries out asynchronous cross scheduling;

If the light signal that is received is for by the multiplexing OTU2 that forms of 4 road ODU1 mapping, then described signal adaptation process is carried out after ODU framing, scrambler handle for the ODU2 that will separate the mapping back and form, the time decomposition multiplex be 4 road ODU1;

If the light signal that is received is for by the multiplexing OTU3 that forms of 16 road ODU1 mapping, then described signal adaptation process is carried out after ODU framing, scrambler handle for the ODU3 that will separate the mapping back and form, the time decomposition multiplex be 16 road ODU1;

If the OTU2 of the light signal that is received for forming by 1 road ODU2 mapping, then described signal adaptation process is carried out after ODU framing, scrambler handle for the ODU2 that will separate mapping back and form, and uses the method for channelizing framing to be split as 4 tunnel speed and is other parallel signal of ODU1 speed level;

If the OTU3 of the light signal that is received for forming by 1 road ODU3 mapping, then described signal adaptation process is carried out after ODU framing, scrambler handle for the ODU3 that will separate mapping back and form, and uses the method for channelizing framing to be split as 16 tunnel speed and is other parallel signal of ODU1 speed level;

If the light signal that is received is for shining upon the multiplexing OTU3 that forms by 4 road ODU2, then described signal adaptation process is carried out after ODU framing, scrambler handle for the ODU3 that will separate mapping back and form, the time decomposition multiplex be 4 road ODU2, use the method for channelizing framing to be split as 4 tunnel speed respectively the every road ODU2 that obtains and be other parallel signal of ODU1 speed level.

6, method according to claim 5 is characterized in that, the described mapping processing procedure of separating comprises, and: OTU decide that frame, descrambling, fec decoder, OTU expense terminate, ODU separates mapping.

7, according to any described method in the claim 3,5,6, it is characterized in that described split process is: after signal is carried out deciding the frame processing, order is frame by frame carried out buffer memory, after being filled with the n frame, the data parallel of this n frame being sent, and repeat said process; Wherein n is the way that current demand signal is desired to split into.

8, method according to claim 4 is characterized in that, the described mapping processing procedure of separating further comprises after ODU separates mapping executing: ODU mapping, OTU framing, FEC coding increase FEC zone, scrambler; Described unified particle rank is an OTU1 speed rank;

If the OTU1 of the light signal that is received for forming by 1 road ODU1 mapping, then described signal adaptation process is for after the ODU1 signal that will separate mapping and form after the processing procedure carries out ODU1 mapping, OTU1 framing, FEC coding, scrambler processing, form OTU1, send into described asynchronous cross matrix and carry out asynchronous cross scheduling;

If the light signal that is received is for shining upon the multiplexing OTU2 that forms by 4 road ODU1, decomposition multiplex was 4 * ODU1 signal when then described signal adaptation process was shone upon the ODU2 that forms after the processing procedure for separating, after carrying out ODU1 mapping, OTU1 framing, FEC coding, scrambler processing, form 4 road OTU1, enter asynchronous cross scheduling;

If the light signal that is received is for shining upon the multiplexing OTU3 that forms by 16 road ODU1, decomposition multiplex was 16 * ODU1 signal when then described signal adaptation process was shone upon the ODU3 that forms after the processing procedure for separating, after carrying out ODU1 mapping, OTU1 framing, FEC coding, scrambler processing, form 16 road OTU1, enter asynchronous cross scheduling;

If the OTU2 of the light signal that is received for forming by 1 road ODU2 mapping, then described signal adaptation process is for after the ODU2 that will separate mapping and form after the processing procedure carries out ODU2 mapping, OTU2 framing, FEC coding, scrambler processing, form OTU2, use the method for channelizing framing to be split as 4 tunnel speed, enter asynchronous cross scheduling as other parallel signal of OTU1 speed level;

If the OTU3 of the light signal that is received for forming by 1 road ODU3 mapping, then described signal adaptation process is for after the ODU3 that will separate mapping and form after the processing procedure carries out ODU3 mapping, OTU3 framing, FEC coding, scrambler processing, form OTU3, use the method for channelizing framing to be split as 16 tunnel speed, enter asynchronous cross scheduling as other parallel signal of OTU1 speed level;

If the light signal that is received is for shining upon the multiplexing OTU3 that forms by 4 road ODU2, decomposition multiplex was 4 * ODU2 signal when then described signal adaptation process was shone upon the ODU3 that forms after the processing procedure for separating, after carrying out ODU2 mapping, OTU2 framing, FEC coding, scrambler processing, form 4 road OTU2, use the method for channelizing framing to be split as 4 tunnel speed respectively the every road OTU2 that obtains, enter asynchronous cross scheduling as other parallel signal of OTU1 speed level.

9, method according to claim 8 is characterized in that, described split process is: signal order is frame by frame carried out buffer memory, after being filled with the n frame, the data parallel of this n frame being sent, and repeat said process; Wherein n is the way of desiring to split into of current demand signal.

10, according to any described method in the claim 1,2,3,5,6,8,9, it is characterized in that, after described asynchronous cross scheduling is handled, further comprise: carry out the inverse process of described adaptation procedure, separate and export after mapping processing and electric light are converted into light signal.

11, the signal dispatching system in a kind of optical transport network is characterized in that, comprising:

At least one photoelectric conversion unit, the light signal that is used for receiving is converted to the signal of telecommunication;

At least one separates map unit, is used for that signal is separated mapping and handles;

At least one adaptive device is used for input signal is adapted for unified other signal of particle level; And

Asynchronous cross matrix is used for unified other signal of particle level is carried out asynchronous cross scheduling;

The light signal that receives is after photoelectric conversion unit is converted to the signal of telecommunication, input to and separate map unit, through separating after mapping handles output, enter adaptive device, be adapted to speed and meet and input to asynchronous cross matrix behind described unified other signal of particle level and carry out asynchronous cross scheduling.

12, system according to claim 11 is characterized in that, if the speed of described input signal is described unified particle rank, described adaptive device is the signal generation unit that is used for signal framing, scrambler;

If described input signal is multiplexing the forming of other low speed signal mapping of described particle level by multichannel speed, comprise in the described adaptive device: described signal generation unit and time-division demultiplexing unit, the time-division demultiplexing unit is used for that decomposition multiplex is described unified other low speed signal of particle level for multichannel speed with by the multiplexing high speed signal that forms of multi-path low speed signal map the time, and exports described signal generation unit to;

If received signal is formed greater than other high speed signal mapping of described particle level by one tunnel speed, comprise in the described adaptive device: it is described unified other parallel signal of particle level that described signal generation unit and split cells, split cells are used for the signal that export described signal generation unit processing back is split as multichannel speed;

If received signal shines upon multiplexing forming by speed more than one tunnel greater than other high speed signal of described particle level, comprise in the described adaptive device: described signal generation unit, time-division demultiplexing unit and split cells, the time-division demultiplexing unit will be that the described low speed signal of multichannel inputs to described signal generation unit and split cells by the multiplexing high speed signal demultiplexing that forms of multi-path low speed signal map, and the low speed signal that split cells is handled back output with the signal generation unit further is split as described unified other parallel signal of particle level.

13, system according to claim 12, it is characterized in that, described split cells comprises: decide frame module, write address generation module, read address generating module, n frequency division module and 2n pushup storage FIFO, wherein, n is the signal way of signal output after this split cells splits;

Input signal has with the road synchronised clock, after handling, frame obtains frame signal through deciding searching of frame module, synchronised clock is imported the write address generation module with frame signal, produce write address and write and allow to enter respectively each FIFO, control FIFO writes, and the synchronous signal clock also inputs to the n distribution module, and the output behind n frequency division module frequency division inputs to frame signal and reads address generating module, generation is read the address and is read to allow to enter respectively each FIFO, and control FIFO reads;

The data of input signal order frame by frame writes n FIFO successively, writes the data parallel output among full n FIFO in back, and the data of back write an other n FIFO successively simultaneously, writes the data parallel output among the full described other n FIFO in back.

14, system according to claim 11 is characterized in that, this system further comprises: at least one electrooptic switching element, and the electrical signal conversion that is used for receiving is a light signal;

At least one map unit is used for signal is shone upon processing;

At least one is used for unified other signals reverse of particle level of described asynchronous cross matrix output is adapted for the signal of desired rate against adaptive device;

Asynchronous cross matrix carries out the signal exported behind the asynchronous cross scheduling, enters contrary adaptive device and carries out opposite adaptation and handle, and inputs to map unit, after mapping is handled, enters electrooptic switching element and is converted to light signal.

15, system according to claim 14, it is characterized in that, if the speed of required output signal is described unified particle rank, described contrary adaptive device comprises: decide frame alignment unit and signal recovery unit, describedly decide the frame alignment unit and unified other signal of particle level of asynchronous cross matrix output is carried out deciding to input to the signal recovery unit after the frame registration process carry out exporting after the descrambling code processing;

If required output for by multichannel speed being the multiplexing signal that forms of other low speed signal of described particle level mapping, described contrary adaptive device comprises: decide frame alignment unit, signal recovery unit and time-division multiplexing unit, time-division multiplexing unit is used for exporting after being one road other high speed signal of desired rate level through described multi-path low speed signal time division multiplexing of deciding frame alignment unit and the output of signal recovery unit;

If the signal for forming greater than other high speed signal mapping of described particle level of required output by one tunnel speed, described contrary adaptive device comprises: decide frame alignment unit, signal recovery unit and merge cells, describedly decide the frame alignment unit and every group of described asynchronous cross matrix output unified other parallel signal of particle level carry out deciding to input to merge cells after the frame registration process, merge cells is merged into multi-path parallel signal and is inputed to signal recovery unit descrambling code behind one road other high speed signal of desired rate level and handle back output;

If required output is greater than the multiplexing signal that forms of other high speed signal mapping of described particle level by speed more than one tunnel, described contrary adaptive device comprises: decide the frame alignment unit, the signal recovery unit, time-division multiplexing unit and merge cells, describedly decide the frame alignment unit and every group of described asynchronous cross matrix output unified other parallel signal of particle level carry out deciding to input to merge cells after the frame registration process, merge cells is merged into multi-path parallel signal and is inputed to that to export the time-division multiplexing unit time division multiplexing after signal recovery unit descrambling code is handled to be to export behind one road other high speed signal of desired rate level behind one road signal.

16, system according to claim 15 is characterized in that, described merge cells comprises:

The backplane interface module, be used for the n road signal of input is carried out clock and data recovery, n road clock after recovering and data-signal inputed to decide the frame alignment module, select wherein one road clock to be sent to respectively and decide the frame alignment module and FIFO merges module as the reference clock;

Decide the frame alignment module, be used for every road signal is carried out frame search respectively, find n road signal frame start position separately, the frame start position of n road signal is all snapped on the identical frame phase place, the data of output n road alignment and frame signals merge module to FIFO; And

FIFO merges module, inside is provided with 2n FIFO, and data and frame signals write each FIFO successively and carry out registration process, and each FIFO stores frame data, meanwhile, with n times of speed reading of data and output from a described n FIFO successively to write operation.

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