CN1832582A - Image output and input system - Google Patents
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- CN1832582A CN1832582A CN 200510053404 CN200510053404A CN1832582A CN 1832582 A CN1832582 A CN 1832582A CN 200510053404 CN200510053404 CN 200510053404 CN 200510053404 A CN200510053404 A CN 200510053404A CN 1832582 A CN1832582 A CN 1832582A
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Abstract
An image input and output system includes a phase comparator, an image synchronous signal generator, a sensor clock pulse generator, a sensor, an image color process unit and a video coder, in which, said system receives power supply or optical source and converts it to digital signal synchronous to the frequency of the supply or the optical source by a voltage comparator and takes it as the reference to carry out clock pulse period compensation to the vertical image signal generated by this system, therefore, the vertical image synchronous signal is synchronized to the frequency of AC supply or optical source within small error sphere and the exposing time point of the sensor in the system is synchronized to the frequency and phase of the supply of optical source.
Description
Technical field
The invention relates to a kind of image processing system, particularly about a kind of image output and input system.
Background technology
Fig. 1 shows general image output and input system.This image output comprises a voltage comparator (Voltage comparator) 12 with input system 10, one phase-locked loop (PLL, Phase lockloop) 13, one image synchronous generator (Image synchronous signal generator) 133, one sensor clock pulse generator (Sensor timing generator) 14, one transducer (Sensor) 15, one colors of image processing unit (Image/Color procession unit) 16, one clock pulse generator (Timing generator) 17, one video encoder (Video encoder) 18.It is noted that, this image output is to utilize the synchronous output clock pulse signal P1 of phase-locked loop 13 outputs one and power supply to image synchronous generator 133 with input system 10, sensor clock pulse generator 14, colors of image processing unit 16, and video encoder 18 replaces the system clock pulse in the general digital system, use and make image synchronous generator 133, sensor clock pulse generator 14, colors of image processing unit 16, and video encoder 18 4 can be synchronous with power supply, reaching the effect of locking supply frequency and phase place, and other assembly still adopts the original system clock pulse to operate in this image output and the input system 10.
This image output is that an analog signal As (can be comprised general power supply, light source with input system 10 ... Deng signal) produce a digital signal V1 by voltage comparator 12 conversion backs.In the present embodiment, be to be 50 or 60 hertz with a frequency (Hz, AC power Hertz) (AC, Alternating current) 11 is represented this analog signal As.Certainly, the frequency of this AC power 11 also can be other frequency.Phase-locked loop 13 be with simulated mode with digital signal V1 frequency multiplication to required frequency of operation, and after producing an output clock pulse signal P1, this image synchronous generator 133 receives output clock pulse signal P1, produces a vertical image synchronizing signal VSYNC (Vertical synchronous signal).Afterwards, phase-locked loop 13 can receive vertical image synchronizing signal VSYNC, and come to compare the frequency of adjusting output clock pulse signal P1 with digital signal V1 with vertical image data VSYNC, the frequency of therefore vertical image synchronizing signal VSYNC can reach the effect synchronous with power supply.Then, sensor clock pulse generator 14 receives vertical image synchronizing signal VSYNC and output clock pulse signal P1, produces a sensor clock pulse signal S.Wherein, this sensor clock pulse signal S has comprised clock pulse signal and many control signals that is used for controlling transducer 15.Transducer 15 receiving sensor clock pulse signal S, and behind pick-up image, produce a raw video data (Sensor raw data) Sr.Colors of image processing unit 16 receives raw video data Sr and output clock pulse signal P1, and this raw video data Sr is carried out the processing of image and color, produces a target image data T.Afterwards, video encoder 18 receives by clock pulse signal CK, the output clock pulse signal P1 of clock pulse generator 17 generations, reaches target image data T, and after described signal CK, P1, T integrated and encode, produce analog video coding image data O.
Yet known image output can produce following point with input system 10 in practical application.
One, when image output utilizes transducer 15 pick-up images with input system 10, because the shooting environmental light source is artificial light sources (for example fluorescent lamp, incandescent lamp mostly ... Deng), but not lamp (sunlight for example ... Deng), and general artificial light sources easily changes its luminous frequency along with the supply frequency change when luminous, cause when sensing, can constantly glimmer phenomenon with colour cast of transducer 15, reduced the output quality of image data.The general method that solves this problem is to prolong the time for exposure of transducer 15 or the time for exposure point of transducer 15 variation frequency and the phase place with light source obtained synchronously.Prolong the time for exposure of transducer 15, easily be subject to the saturated restriction of transducer 15 time for exposure length itself, therefore in some cases can't normal operation.And the time for exposure point of transducer 15 is obtained synchronous method with the light source variation frequency, can raise the cost, and the noise resisting ability of phase-locked loop 13 is relatively poor in output of Chang Yinwei image and the input system 10, when power supply noise is big, output clock pulse signal P1 is easy to can't lock supply frequency, causes the sensor clock pulse signal S also can't be synchronous with power supply.As a result, the time for exposure of transducer 15 point can't be obtained synchronously with the light source variation frequency, and can't solve the problem of image flicker and colour cast.
Two, as shown in Figure 2, this video encoder 18 comprises a video clock pulse generator (Videotiming generator) 181, one brightness and synchronous generator (Luminance/Synchronoussignal generator) 182, two-digit analog converter (Digital to analogconverter) 183,185, and a chroma is a chrominance signal generator (Chroma/burstgenerator) 184.And general chroma to be chrominance signal generator 184 carrying out chroma and be chrominance signal when handling, needing very accurately, the clock pulse signal of (range of allowable error is very little) cooperates.But because the output clock pulse signal P1 of phase-locked loop 13 must lock the frequency of AC power 11, so this output clock pulse signal P1 can follow change along with the change of AC power 11 frequencies.Simultaneously, general phase-locked loop 13 antimierophonic abilities are relatively poor, so often cause output clock pulse signal P1 can't reach fixing and accurately output.Therefore, image output must increase by a clock pulse generator 17 in addition with input system 10, the clock pulse signal CK that offers chroma and be 184 1 tool pinpoint accuracy of chrominance signal generator (error range is minimum) (for example, NTSC system (NTSC, National Television System Committee) in, chroma, be look to handle required clock pulse signal CK be 3.579545MHz, its range of allowable error only can be ± 5Hz).So, brightness and synchronous generator 182, and chroma be the clock pulse signal that chrominance signal generator 184 receives different sizes, and the output signal of generation different size, therefore must use two digital analog converters 183,185 to carry out digital-to-analogue conversion respectively respectively.As a result, cause the whole image output and the manufacturing cost of input system 10 to increase.
Therefore, how a kind of image output and input system are provided, and reach time for exposure point and the power supply or the light source of transducer in image output and the input system ... Frequency Synchronization etc. analog signal, solve the problem that flicker and colour cast take place transducer when pick-up image, and reduce the use amount of digital analog converter and reduce cost, be a urgent problem in fact.
Summary of the invention
At the problems referred to above, purpose of the present invention is providing a kind of image output and input system, and reach time for exposure point and the power supply or the light source of transducer in image output and the input system ... Frequency Synchronization etc. analog signal, solve the problem that flicker and colour cast take place transducer when pick-up image, and the use amount of minimizing digital analog converter, reach the effect that reduces cost.
The invention provides a kind of image output and input system.The output of this image and input system are to receive the digital signal that is produced after with an analog signal conversion via a voltage comparator.This image output comprises a phase comparator, an image synchronous generator, a sensor clock pulse generator, a transducer, a colors of image processing unit and a video encoder with input system.Phase comparator receives the vertical image synchronizing signal with of above-mentioned digital signal, the clock cycle of the vertical image synchronizing signal of this digital signal relatively with this, and produce a clock pulse corrected signal.Image synchronous generator receive clock pulse corrected signal, and this vertical image synchronous generator is to be used for producing vertical image synchronizing signal.The clock cycle of next vertical image synchronizing signal of being produced according to this clock pulse corrected signal correction image synchronous generator of image synchronous generator simultaneously.The sensor clock pulse generator receives vertical image synchronizing signal, and produces a sensor clock pulse signal according to this vertical image synchronizing signal.Transducer receiving sensor clock pulse signal, and behind pick-up image, produce a raw video data.The colors of image processing unit receives the raw video data, and this raw video data is carried out the processing of image and color, produces the preferable target image data of image quality.Video encoder receives vertical image synchronizing signal and target image data, and this vertical image synchronizing signal and this target image data are integrated and encoded, and produces analog video coding image data.
Because image output of the present invention and input system, be to receive the digital signal that receives analog signal generation of a power supply or light source via a voltage comparator after change, and with this digital signal as a reference, this image output is carried out compensation clock cycle with the vertical image synchronizing signal that input system itself produces.As a result, vertical image synchronizing signal and frequency analog signal, Phase synchronization, and this vertical image synchronizing signal can be controlled in the very little error range.Make sensor clock pulse generator in image output and the input system can produce one and give transducer with the synchronous sensor clock pulse signal of analog signal.As a result, frequency, the Phase synchronization of the time for exposure of transducer point and AC power, and solved the problem that flicker and colour cast take place transducer when pick-up image.
Again because the output of whole image is to adopt the same system clock pulse to operate with input system, do not need as known technology, also will use phase-locked loop and clock pulse generator to provide video encoder two kinds of different clock pulse in addition, so video encoder can directly utilize the same system clock pulse to carry out the brightness of image, chroma, be look, the encoding process that reaches synchronizing signal.So image output of the present invention only need be used a digital analog converter with input system, has reduced the manufacturing cost of whole system.
Description of drawings
Fig. 1 shows the schematic diagram of a kind of known image output and input system;
Fig. 2 shows a kind of schematic diagram of known video encoder;
Fig. 3 figure shows the schematic diagram of a kind of image output of the present invention and input system;
Fig. 4 A shows the schematic diagram of transducer video cycle compensating unit of the present invention;
Fig. 4 B shows another schematic diagram of transducer video cycle compensating unit of the present invention;
Fig. 5 shows the schematic diagram of a kind of video encoder of the present invention;
Fig. 6 A shows the schematic diagram of image input system of the present invention;
Fig. 6 B shows another schematic diagram of image input system of the present invention.
Embodiment
Below with reference to graphic detailed description image output of the present invention and input system, and identical assembly will be with identical symbology.
Fig. 3 shows a kind of image output of the present invention and input system.This image output comprises a voltage comparator 32, a transducer video cycle compensating unit (Sensor/Video periodcompensation unit) 33, one sensor clock pulse generator 34, a transducer 35, a colors of image processing unit 36, a video encoder 38 with input system 30.It is noted that assemblies all in this image output and the input system 30 all can adopt the original system clock pulse to operate, different with known image output with input system 10.Therefore, in Fig. 3, especially the system clock pulse that each assembly received is not drawn.
This voltage comparator 32 receives an analog signal As, and this analog signal As is carried out analog digital conversion, the digital signal Vs of generation one and this analog signal As Frequency Synchronization.Voltage comparator 32 is a known technology, as long as can reach above-mentioned functions, for example analog-digital converter (A/D, Analog to digitalconverter) ... Deng, therefore all can be used to implement this voltage comparator 32, its detailed execution mode of repeat specification no longer.Certainly, in voltage comparator 32, also can add circuit in addition, for example digital filter with elimination noise function ... Deng, use the quality that promotes digital signal Vs.And wherein, analog signal As can be power supply, light source ... one of them produces etc. signal source.Particularly the part of light source can be utilized an optical sensor (Photo sensor) direct sensing light source, this light source is converted to the signal of telecommunication handles.
Transducer video cycle compensating unit 33 receiving digital signals Vs, produce a vertical image synchronizing signal VSYNC, and this vertical image synchronizing signal VSYNC done clock cycle (Clock cycle) compensation, make equal in length clock cycle (being Frequency Synchronization) of vertical image synchronizing signal VSYNC and digital signal Vs.Shown in Fig. 4 A, this transducer video cycle compensating unit 33 comprises a phase comparator (Phase comparator) 332 and one image synchronous generator 333.The vertical image synchronizing signal VSYNC that phase comparator 332 receiving digital signals Vs and image synchronous generator 333 produces, and comparative figures signal Vs and vertical image synchronizing signal VSYNC phase place clock cycle leading with fall behind, and produce a clock pulse corrected signal Cc.Image synchronous generator 333 receive clock pulse corrected signal Cc, and this image synchronous generator 333 is in order to produce vertical image synchronizing signal VSYNC.Image synchronous generator 333 is revised length clock cycle of next vertical image synchronizing signal VSYNC ' according to clock pulse corrected signal Cc simultaneously.So, constantly reference digital signal Vs and repeat to revise the clock cycle of vertical image synchronizing signal VSYNC just can make vertical image synchronizing signal VSYNC reach locking analog signal As frequency effect phase locked with it.For example, suppose to go up sometime 50 clock pulse clock cycle (Clock) of the digital signal Vs that lags behind analog signal As Frequency Synchronization clock cycle of vertical image synchronizing signal VSYNC, after process phase comparator 332 compares, this phase comparator 332 produces a clock pulse corrected signal Cc, and notice image synchronous generator 333 is in next clock pulse during the cycle, length clock cycle of vertical image synchronizing signal VSYNC is reduced by 50 clock pulse, and make vertical image synchronizing signal VSYNC reach frequency with analog signal As, phase locked effect.Wherein, this transducer video cycle compensating unit 33 also can comprise a phasing unit (Phaseadjustment (Time delay) unit) 331 that is used for adjusting digital signal Vs phase place, shown in Fig. 4 B.This phasing unit 331 receiving digital signals Vs, with the clock cycle of this digital signal Vs as a reference, and postpone this digital signal Vs to default time point (promptly adjusting the phase place of this digital signal Vs).Certainly, this phasing unit 331 can utilize the mode of firmware (Firmware), software (Software) or hardware (Hardware) one of them or its combination to set the phase delay of this digital signal Vs.
The importation of image then, is discussed.Sensor clock pulse generator 34 receives vertical image synchronizing signal VSYNC, and produces the required sensor clock pulse signal S of a transducer 35 according to this vertical image synchronizing signal VSYNC.Transducer 35 receiving sensor clock pulse signal S, and behind pick-up image, produce a raw video data Sr.Colors of image processing unit 36 receives raw video data Sr, and this raw video data Sr is carried out the processing of image and color, produces the preferable target image data T of image quality.It is noted that, because frequency, the Phase synchronization of this vertical image synchronizing signal VSYNC and analog signal As, so sensor clock pulse generator 34 can produce the reference that a sensor clock pulse signal S with analog signal As Frequency Synchronization puts as the time for exposure to transducer 35.As a result, the time for exposure of transducer 35 point can be reached synchronously with analog signal As, and then can obtain synchronously with glow frequency and the phase place of utilizing this analog signal As the artificial light sources of the energy, solves the problem of image flicker and colour cast.
Afterwards, be the output of image.Video encoder 38 receives vertical image synchronizing signal VSYNC and target image data T, and vertical image synchronizing signal VSYNC and target image data T are encoded, and produces analog video coding image data O.As shown in Figure 5, this video encoder 38 comprises a video clock pulse generator 381, a brightness chroma is colour xynchronizing generator (Luminance/Chroma/burst/Synchronous signal generator) 382, one digital analog converter 383.This video clock pulse generator 381 receives vertical image synchronizing signal VSYNC, and produces a video clock pulse data Cv according to this vertical image synchronizing signal VSYNC.The brightness chroma is colour xynchronizing generator 382 receiver, video clock pulse data Cv and target image data T, and this video clock pulse data Cv and this target image data T carried out brightness (Luminance), chroma (Chroma), be look (Burst) and the image integration and the encoding process of (Image synchronous) synchronously, produce a digital video coding image data Od.Digital analog converter 383 receives and converting digital video coding image data Od, produces analog video coding image data O.Wherein, because whole image output is to adopt the same system clock pulse to operate with input system 30, do not need as known technology, also will use phase-locked loop 13 and clock pulse generator 17 to provide video encoder 38 2 kinds of different clock pulse in addition, therefore video encoder 38 for the high chroma of frequency error range requirement for restriction, be that chrominance signal is handled (chroma of Fig. 2 is a chrominance signal generator 184), just can adopt and the brightness synchronizing signal is handled (brightness of Fig. 2 and synchronous generator 182) same system clock pulse.And the clock pulse generator 17 (Fig. 1) that must not increase a different frequency in addition provides accurate clock pulse signal CK, so must not increase a digital analog converter 185 (Fig. 2) more in addition.So video encoder 38 can be that chrominance signal generator 184 merges with the brightness of Fig. 2 and synchronous generator 182 and chroma, with a brightness chroma is that colour xynchronizing generator 382 is implemented, therefore 38 of this video encoders need to use a digital analog converter 383 carry out digital-to-analogue conversion, reach the effect that reduces whole image output and input system 30 costs.
Image output of the present invention is with input system 30 and the difference of known image output with input system 10 maximums, the output of this image and input system 30 be utilize transducer video cycle compensating unit 33 with one with the digital signal Vs of analog signal As Frequency Synchronization as a reference, come the vertical image synchronizing signal VSYNC that image synchronous generator 333 is produced is carried out compensating clock cycle.The result, this vertical image synchronizing signal VSYNC can be controlled in the very little error range, and reach synchronously with the frequency of analog signal As, make the Frequency Synchronization of time for exposure point with analog signal As of transducer 35 in image output and the input system 30, and solve the problem that flicker and colour cast take place transducer 35 when pick-up image.
Again because image of the present invention output is directly to adopt the same system clock pulse to be used as clock pulse signal with input system 30, thus video encoder 38 can carry out simultaneously image brightness, chroma, be look, and synchronous integration and the encoding process of image.Therefore, image output of the present invention needs to use a digital analog converter with 30 of input systems, has reduced the cost of making.
Present embodiment is that the input system and the output system that merge image are discussed, and illustrates that this image is exported and how input system 30 makes vertical image synchronizing signal VSYNC reach enforcement framework with analog signal As Frequency Synchronization.And also can only use in another embodiment an image input system 30 ', as shown in Figure 6A, reach the effect of vertical image synchronizing signal VSYNC and analog signal As Frequency Synchronization, and the problem of flicker and colour cast takes place when solving image input system 30 ' middle transducer 35 pick-up images.Wherein, the image input system 30 of Fig. 6 A ' a comprise voltage comparator 32, a transducer video cycle compensating unit 33, a sensor clock pulse generator 34 and a transducer 35.Certainly, this image input system 30 ' also can comprise a colors of image processing unit 36, shown in Fig. 6 B.And the raw video data Sr of this image input system 30 ' output or target image data T may be output in various Storage Medias or the coffret.
Though more than with embodiment the present invention is described, therefore do not limit scope of the present invention, if the sector person carries out various distortion or change, only otherwise break away from main idea of the present invention, do not break away from claim of the present invention yet.
Claims (11)
1, a kind of image output and input system is characterized in that comprising:
One phase comparator receives the vertical image synchronizing signal with of a digital signal, the clock cycle of the vertical image synchronizing signal of this digital signal relatively with this, and produce a clock pulse corrected signal;
One image synchronous generator, receive aforementioned clock pulse corrected signal, and in order to producing aforementioned vertical image synchronizing signal, the clock cycle of next the vertical image synchronizing signal that is produced according to this this image synchronous generator of clock pulse corrected signal correction;
One sensor clock pulse generator receives aforementioned vertical image synchronizing signal, and produces a sensor clock pulse signal according to this vertical image synchronizing signal;
One transducer receives the sensor as aforementioned clock pulse signal, and behind pick-up image, produces a raw video data;
One colors of image processing unit receives aforementioned raw video data, and this raw video data is carried out image processing, produces a target image data; And
One video encoder receives aforementioned vertical image synchronizing signal and aforementioned target image data, and this vertical image synchronizing signal and this target image data are encoded, and produces analog video coding image data;
Wherein, aforementioned digital signal is produced after changing by an analog signal.
2, image output as claimed in claim 1 and input system is characterized in that more comprising a phasing unit, and this phasing unit receives aforementioned digital signal, adjusts and delay the phase place of this digital signal.
3, image output as claimed in claim 1 and input system is characterized in that, wherein aforementioned colors of image processing unit also carries out color to this raw video data to be handled.
4, image as claimed in claim 1 output and input system is characterized in that, one of them is produced wherein aforementioned analog signal by power supply and light source.
5, image output as claimed in claim 1 and input system is characterized in that more comprising a voltage comparator, and this voltage comparator receives and change aforementioned analog signal, generation one and the synchronous aforementioned digital signal of this frequency analog signal.
6, image output as claimed in claim 1 and input system is characterized in that wherein aforementioned video encoder comprises:
One video clock pulse generator receives aforementioned vertical image synchronizing signal, and produces a video clock pulse data according to this vertical image synchronizing signal;
One brightness chroma is a colour xynchronizing generator, receive aforementioned video clock pulse data and aforementioned target image data, and with this video clock pulse data and this target image data is carried out brightness, chroma, be synchronous integration of look and image and encoding process, produce a digital video coding image data; And
One digital analog converter receives and changes aforementioned digital video coding image data, produces analog video coding image data.
7, a kind of image input system is characterized in that comprising:
One phase comparator receives the vertical image synchronizing signal with of a digital signal, the clock cycle of the vertical image synchronizing signal of this digital signal relatively with this, and produce a clock pulse corrected signal;
One image synchronous generator, receive aforementioned clock pulse corrected signal, and in order to producing aforementioned vertical image synchronizing signal, the clock cycle of next the vertical image synchronizing signal that is produced according to this vertical image synchronous generator of this clock pulse corrected signal correction;
One sensor clock pulse generator receives aforementioned vertical image synchronizing signal, and produces a sensor clock pulse signal according to this vertical image synchronizing signal; And
One transducer receives the sensor as aforementioned clock pulse signal, and behind pick-up image, produces a raw video data;
Wherein, aforementioned digital signal is produced after changing by an analog signal.
8, image input system as claimed in claim 7 is characterized in that more comprising a phasing unit, and this phasing unit receives aforementioned digital signal, adjusts and delay the phase place of this digital signal.
9, image input system as claimed in claim 7, it is characterized in that more comprising a colors of image processing unit, this colors of image processing unit receives aforementioned raw video data, and this raw video data is carried out the processing of image and color, produces a target image data.
10, image input system as claimed in claim 7 is characterized in that, one of them is produced wherein aforementioned analog signal by power supply and light source.
11, image input system as claimed in claim 7 is characterized in that more comprising a voltage comparator, and this voltage comparator receives and change aforementioned analog signal, generation one and the synchronous aforementioned digital signal of this frequency analog signal.
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| Application Number | Priority Date | Filing Date | Title |
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| CN200510053404A CN100576926C (en) | 2005-03-07 | 2005-03-07 | Image output and input system |
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| CN200510053404A CN100576926C (en) | 2005-03-07 | 2005-03-07 | Image output and input system |
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| CN100576926C CN100576926C (en) | 2009-12-30 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101977285A (en) * | 2010-11-29 | 2011-02-16 | 杭州海康威视软件有限公司 | Shooting system and shooting method |
| CN102140640A (en) * | 2010-02-01 | 2011-08-03 | 日本航空电子工业株式会社 | Slide member and surface processing method of the same |
| CN113721702A (en) * | 2021-09-06 | 2021-11-30 | 合肥松豪电子科技有限公司 | Clock compensation method applied to externally-hung touch chip |
-
2005
- 2005-03-07 CN CN200510053404A patent/CN100576926C/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102140640A (en) * | 2010-02-01 | 2011-08-03 | 日本航空电子工业株式会社 | Slide member and surface processing method of the same |
| CN102140640B (en) * | 2010-02-01 | 2012-11-28 | 日本航空电子工业株式会社 | Slide member and surface processing method of the same |
| TWI558481B (en) * | 2010-02-01 | 2016-11-21 | 日本航空電子工業股份有限公司 | Processing method of the slide part surface |
| CN101977285A (en) * | 2010-11-29 | 2011-02-16 | 杭州海康威视软件有限公司 | Shooting system and shooting method |
| CN101977285B (en) * | 2010-11-29 | 2015-09-02 | 杭州海康威视数字技术股份有限公司 | Camera system and image capture method |
| CN113721702A (en) * | 2021-09-06 | 2021-11-30 | 合肥松豪电子科技有限公司 | Clock compensation method applied to externally-hung touch chip |
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| CN100576926C (en) | 2009-12-30 |
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