CN1828841A - Method of surface processing substrate, method of cleaning substrate, and programs for implementing the methods - Google Patents

Abstract

A method of surface processing a substrate that enables deposit to be removed from a substrate so as to obtain a clean substrate. A substrate is cleaned with a liquid chemical. A deposit which is formed through the cleaning with liquid chemical is exposed to an atmosphere of a mixed gas containing ammonia and hydrogen fluoride under a predetermined pressure. The deposit that has been exposed to the atmosphere of the mixed gas is heated to a predetermined temperature.

Description

Method for treating substrate surface, method for cleaning substrate, and program

Technical Field

The present invention relates to a method for treating a substrate surface, a method for cleaning a substrate, and a program, and particularly to a method for removing a silicon oxide film (SiO) formed on a surface₂) The method for treating a surface of a substrate according to (1).

Background

Conventionally, wet cleaning methods are generally used to remove contaminants such as particles, metals, organic substances, adsorbed molecules, and surface coatings on Silicon wafers (hereinafter simply referred to as wafers), natural oxide films (Silicon native oxide), and water stains formed on wafers. The conventional wet cleaning method is an RCA cleaning method developed in 1960 s, and many cleaning methods using this technique have been proposed.

As a method for cleaning the wafer surface, for example, a method of cleaning the wafer surface before forming a gate insulating film on the wafer or a method of cleaning the wafer surface exposed by forming a contact hole, the most common cleaning method is described below.

First, to remove particles on a wafer, so-called SC1 cleaning (hereinafter referred to as SC1 cleaning) is performed using APM (Ammonium Hydroxide, Hydrogen Peroxide Mix, a mixture of Ammonium Hydroxide and Hydrogen Peroxide). SC1 cleaning is generally performed by NH₄OH (29% by weight aqueous solution) and H₂O₂(30% by weight aqueous solution) was prepared in the proportion of NH₄OH∶H₂O₂∶H₂Taking the solution with O being 1: 5-1: 2: 7 as a cleaning solution, soaking the wafer in the solution with the temperature of 65-85 ℃ for 5-20 min, and cleaning. Since the natural oxide film or pseudo SiO is formed on the surface of the wafer cleaned by SC1₂Layer having hydrophilic properties on the wafer surface after SC1 cleaning.

Then, after the pure water cleaning, the natural oxide film or pseudo SiO formed on the wafer surface after the SC1 cleaning is removed₂Layer, DHF (dilute hydrofluoric Acid) cleaning is performed. DHF cleaning generally uses a Hydrogen Fluoride (HF) (49 wt% aqueous solution) formulation in the ratio HF to H₂And cleaning the wafer by soaking the wafer for 40-60 sec by using a solution with O being 1: 30 as a cleaning solution. DHF cleaning can remove contaminants. Subsequently, pure water washing was performed, and finally, spin drying was performed by a rinser dryer (rinser dryer).

In the SC1 cleaning, after the pure Water cleaning, so-called SC2 cleaning (hereinafter referred to as SC2 cleaning) is performed using HPM (Hydrochloric acid/Hydrogen Peroxide/Water Mixture) or DHF cleaning may be performed after the pure Water cleaning. The SC2 cleaning is performed to remove metal contamination using HCl and H₂O₂The prepared solution is used as a cleaning solution. In the SC2 cleaning, a natural oxide film or pseudo SiO is formed on the wafer surface as in the SC1 cleaning₂Layer, rendering the wafer surface hydrophilic.

However, in the above conventional cleaning method, the natural oxide film or pseudo SiO is removed by contacting the wafer surface with a DHF cleaning solution₂Layer exposing the underlying silicon. Therefore, since the surface of the wafer after DHF cleaning has hydrophobicity, water droplets remain on the surface when the wafer is taken out from the DHF cleaning solution. Such water droplets become water marks (watermarks) after spin drying. The water stain is considered to be a silicon oxide film (SiO) locally formed via water droplets during the process of transporting or drying the wafer₂) Or the scale (H) remaining after drying after the silicon oxide film formed by the above elution into water droplets₂SiF₆)。

Such water stains may be a mask in an etching process performed after the cleaning process, and may be a harmful factor in a film forming process, thereby deteriorating the performance of the electronic device. Therefore, it is a problem in the cleaning and drying technology to suppress the generation of water stains in the cleaning process.

On the other hand, in the spin drying step, the wafer is charged by high-speed rotation, and electrostatic adsorption of particles and adhesion of dust or contamination mist generated by the rotating device are caused. Therefore, the wafer surface is easily contaminated. Further, it is known that a natural oxide film having a film thickness of 0.5nm or more is formed on the surface of the wafer exposed to the atmosphere, and this natural oxide film is a great problem in forming a gate insulating film of 65nm or less.

Therefore, a method of using isopropyl alcohol (IPA) in the drying step is known in order to suppress the generation of water stains or a natural oxide film. The drying method using IPA (hereinafter referred to as IPA drying) is a method in which the surface of a wafer cleaned with pure water is exposed to IPA vapor, the water on the surface of the wafer is replaced with IPA condensate, and thereafter, IPA condensed and adhered to the surface of the wafer is evaporated in a clean air atmosphere to rapidly dry the surface of the wafer.

In the cleaning method using IPA drying, the following is specificThe wafer is sequentially moved in a plurality of processing tanks provided in series by an openable and closable split curtain, and is subjected to cleaning processes of chemical liquid (APM, DHF), pure water cleaning, and IPA drying, respectively. Thus, in the IPA drying method, since the solubility of IPA in water is high and the IPA is relatively hydrophobic on the silicon surfaceSince the surface wetting property is high (surface tension is low), water droplets are not formed on the wafer surface during the drying process, and therefore, water stains are not generated. In addition, N is also readily available₂The gas is replaced in the processing chamber, and the generation of a natural oxide film on the wafer can be prevented (see, for example, Japanese patent laid-open publication No. 2002-166237).

However, IPA molecules (organic substances such as carbon) may remain on the wafer surface after drying the IPA. There is a risk that these IPA molecules may adversely affect the characteristics of the gate oxide film (see K.MOTAI, T.Itoga and T.Iric, Extended Abstract of 1997, International conference on Solid State Devices and Materials, Hamamatsu, pp.24-25 (1997)).

Therefore, even if drying with IPA suppresses generation of water stains, it is difficult to obtain a clean wafer surface after drying.

Disclosure of Invention

The invention aims to provide a surface treatment method of a substrate, a cleaning method of the substrate and a program, which can remove the attachment of the substrate and obtain a clean substrate.

According to a first aspect of the first invention, the above object is achieved.

According to the method for treating the surface of the substrate, the substrate deposit cleaned with the chemical solution is exposed to a mixed gas atmosphere containing ammonia and hydrogen fluoride under a predetermined pressure, and the deposit exposed to the mixed gas atmosphere is heated to a predetermined temperature. When the deposit is exposed to a mixed gas atmosphere containing ammonia and hydrogen fluoride under a predetermined pressure, a product as a complex is generated based on the deposit and the mixed gas. When the product thus produced is heated to a predetermined temperature, the product is vaporized. The product is vaporized to remove the substrate deposits such as oxide film. Therefore, the adhesion of the substrate such as an oxide film can be removed, and a clean substrate can be obtained.

The second aspect is preferred.

According to this method, since the plasma etching process is performed on the substrate, in an electronic device manufactured from the substrate, deterioration or destruction of the gate oxide film can be prevented because electric charges are not accumulated on the gate electrode, impact damage (crystal defect) can be prevented from occurring in the semiconductor because energy particles are not irradiated to the electronic device (element), and furthermore, generation of impurities can be prevented because an unintended chemical reaction caused by plasma is not generated, thereby preventing contamination of a processing chamber where the process is performed on the substrate.

Further, the third aspect is preferable.

According to this method, since the substrate is subjected to the dry cleaning treatment, water molecules do not adhere to the substrate in a liquid state, and a silicon oxide film as an adhering substance is not formed on the surface of the substrate. Thus, a cleaner substrate can be obtained. Further, it is possible to suppress a change in physical properties of the substrate surface and reliably prevent a decrease in wiring reliability.

Further, the fourth aspect is preferable.

According to this method, at 6.7X 10^-2Since the substrate is exposed to a mixed gas atmosphere containing ammonia and hydrogen fluoride at a pressure ranging from 4.0Pa, water molecules do not adhere to the substrate in a liquid state, and a silicon oxide film as an adherent is not formed on the surface of the substrate. Further, since the substrate is heated and exposed to the mixed gas atmosphere at 100 to 200 ℃ and converted into an adherent of a complex, water molecules do not adhere to the substrate in a liquid state, and a silicon oxide film is not formed on the surface of the substrate. Thus, a cleaner substrate can be obtained.

The fifth aspect is preferred.

According to this method, since the substrate deposit heated to a predetermined temperature by exposure to a mixed gas atmosphere containing ammonia and hydrogen fluoride under a predetermined pressure is silicon oxide, oxides such as water stains formed on the substrate can be removed.

The sixth aspect is preferred.

According to this method, since the shape of the deposit on the substrate is measured and at least one of the volume flow ratio of the hydrogen fluoride and the ammonia in the mixed gas and the predetermined pressure is determined based on the measured shape, the amount of the deposit to be removed can be accurately controlled and the efficiency of the substrate surface treatment can be improved.

The seventh aspect is preferred.

According to this method, since the substrate is cleaned with the chemical solution and then cleaned with the rinse solution, the contaminants and the natural oxide film removed by the chemical solution can be removed together with the chemical solution.

The eighth aspect is preferred.

According to this method, since the substrate is spin-dried after being cleaned with the rinse liquid, it is possible to prevent organic matter such as carbon from remaining on the substrate.

The above object is achieved according to a ninth aspect of the second invention.

According to this method, a substrate having a connection hole formed in a first layer formed on the substrate by etching using a photoresist layer having a predetermined pattern formed on the first layer is subjected to removal of the photoresist layer, and a chemical solution for forming a hydrophilic layer on the surface of the substrate is subjected to cleaning, exposed to an atmosphere containing a mixed gas of ammonia and hydrogen fluoride at a predetermined pressure, and then heated at a predetermined temperature, whereby a predetermined contaminant can be removed from the chemical solution.In addition, although a hydrophilic layer (natural oxide film or pseudo SiO) is generated on the surface of the substrate due to the cleaning of the chemical solution₂Layer), but can remove substrate deposits such as a native oxide film as a hydrophilic layer with the same effect as the first invention. Thus, a clean substrate can be obtained. Further, the cleaning method can be applied to a substrate which has been cleaned by an unknown method.

The tenth aspect is preferred.

According to this method, the chemical solution is either SC1 or SC2, and thus particles and metal contaminants can be removed from the substrate, respectively.

Further, the eleventh aspect is preferable.

According to this method, the hydrophilic layer is a natural oxide film of silicon, and thus the effect of the second invention is surely obtained.

The above object is achieved according to a twelfth aspect of the third invention.

According to this method, a substrate having a connection hole formed in a first layer formed on the substrate by etching using a photoresist layer having a predetermined pattern formed on the first layer is subjected to removal of the photoresist layer, cleaned with a chemical solution that forms a hydrophobic surface on the substrate surface, exposed to a mixed gas atmosphere containing ammonia and hydrogen fluoride at a predetermined pressure, and then heated at a predetermined temperature, whereby a predetermined contaminant can be removed by the chemical solution. In addition, although the chemical cleaning generates a hydrophobic surface on the substrate surface and generates water stains as deposits, the chemical cleaning can remove the deposits on the hydrophobic surface with the same effect as the first invention. Thus, a clean substrate can be obtained. Further, the cleaning method can be applied to a substrate which has been cleaned by an unknown method.

The thirteenth aspect is preferred.

According to this method, since the chemical solution is an HF aqueous solution, the native oxide film can be removed from the substrate.

The above object is achieved according to a fourteenth aspect of the fourth invention.

According to this method, a substrate having a connection hole formed in a first layer by etching treatment using a photoresist layer having a predetermined pattern formed on the first layer formed on the substrate is subjected to removal of the photoresist layer, cleaning with SC1, cleaning with SC2, cleaning with an aqueous hydrogen fluoride solution, drying, exposure to a mixed gas atmosphere containing ammonia and hydrogen fluoride under a predetermined pressure, and heating at a predetermined temperature, whereby contaminants, a natural oxide film, and the like can be removed. Further, although water stain as a deposit is generated by drying, the same effect as the first invention can be obtained to remove the deposit on the substrate. Thus, a clean substrate can be obtained. In particular, SC2 cleaning is effective for cleaning a substrate of metal contaminants adhering thereto as a deposit because metal contaminants can be removed.

The above object is achieved according to a fifteenth aspect of the fifth invention.

According to this substrate cleaning method, a substrate having a connection hole formed in a first layer formed on the substrate by etching using a photoresist layer having a predetermined pattern formed on the first layer is subjected to removal of the photoresist layer, cleaning with SC1, cleaning with an aqueous hydrogen fluoride solution, drying, exposure to a mixed gas atmosphere containing ammonia and hydrogen fluoride at a predetermined pressure, and heating at a predetermined temperature, whereby contaminants, a natural oxide film, and the like can be removed. Further, although water stain as a deposit is generated by drying, the same effect as the first invention can be obtained to remove the deposit on the substrate. Thereby, a clean substrate was obtained.

The above object is achieved according to a sixteenth aspect of the sixth invention.

According to this substrate cleaning method, a substrate having a connection hole formed in a first layer formed on the substrate by etching using a photoresist layer having a predetermined pattern formed on the first layer is subjected to removal of the photoresist layer, cleaning with SC1, cleaning with SC2, drying, exposure to a mixed gas atmosphere containing ammonia and hydrogen fluoride under a predetermined pressure, and then heating at a predetermined temperature, whereby contaminants, a natural oxide film, and the like can be removed. Although water stain as a deposit is generated by drying, the same effect as the first invention can be obtained to remove the deposit on the substrate. Thereby, a clean substrate was obtained.

The above object is achieved according to a seventeenth aspect of the seventh invention.

According to this substrate cleaning method, the substrate having the connection hole formed in the first layer by etching treatment using the photoresist layer having the predetermined pattern formed on the first layer formed on the substrate is subjected to removal of the photoresist layer, cleaning with SC1, cleaning with an aqueous hydrogen fluoride solution, cleaning with SC2, drying, exposure to a mixed gas atmosphere containing ammonia and hydrogen fluoride under a predetermined pressure, and heating at a predetermined temperature, whereby contaminants, a natural oxide film, and the like can be removed. Further, although water stain as a deposit is generated by drying, the same effect as the first invention can be obtained to remove the deposit on the substrate. Thereby, a clean substrate was obtained. In particular, SC2 cleaning is effective for cleaning a substrate to which metal contaminants are attached, because metal contaminants can be removed.

The above object is achieved according to an eighteenth aspect of the eighth invention.

According to this program, the same effects as those of the first embodiment can be obtained.

The above object can be achieved according to a nineteenth aspect of the ninth invention.

According to this procedure, the same effects as those of the second invention can be obtained.

The above object is achieved according to a twentieth aspect of the tenth invention.

According to this program, the same effects as those of the third invention can be obtained.

The above object can be achieved according to a twenty-first aspect of the eleventh invention.

According to this procedure, the same effects as those of the fourth invention can be obtained.

The above object is achieved according to a twenty-second aspect of the twelfth invention.

According to this program, the same effects as those of the fifth invention can be obtained.

The above object can be achieved according to a twenty-third aspect of the thirteenth invention.

According to this procedure, the same effects as those of the sixth invention can be obtained.

The above object can be achieved according to a twenty-fourth aspect of the fourteenth invention.

According to this procedure, the same effects as those of the seventh invention can be obtained.

The above and other objects, features and advantages of the present invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings.

Drawings

Fig. 1 is a plan view showing a schematic configuration of a substrate processing apparatus to which the substrate surface processing method according to the embodiment of the present invention is applied.

FIGS. 2(A), (B) are sectional views of the second treating unit in FIG. 1, and FIG. 2(A) is a sectional view taken along line II-II in FIG. 1; fig. 2(B) is an enlarged view of a portion a in fig. 2 (a).

Fig. 3 is a perspective view showing a schematic structure of the second processing chamber in fig. 1.

Fig. 4 is a view showing a schematic configuration of the unit driving dry air supply system of the second load lock unit in fig. 3.

Fig. 5 is a diagram showing a schematic configuration of a system controller in the substrate processing apparatus of fig. 1.

Fig. 6(a) to (I) are process diagrams showing the substrate surface treatment method according to the present embodiment.

Fig. 7 is an enlarged view showing a water stain formed on the hydrophobic surface of the wafer.

Fig. 8 is a diagram showing a schematic configuration of a substrate cleaning system according to a modification of the substrate processing apparatus to which the substrate surface processing method according to the embodiment of the present invention is applied.

Fig. 9 is a plan view schematically showing a configuration of a second modification of the substrate processing apparatus to which the substrate surface processing method according to the present embodiment is applied.

Fig. 10 is a plan view schematically showing a configuration of a third modification of a substrate processing apparatus to which the substrate surface processing method according to the embodiment is applied.

Detailed Description

Embodiments of the present invention are described below with reference to the drawings.

First, a substrate surface treatment method according to an embodiment of the present invention will be described.

Fig. 1 is a plan view schematically showing a configuration of a substrate processing apparatus to which the substrate surface processing method according to the present embodiment is applied.

As described below, the substrate processing apparatus performs a COR cleaning process as a post-processing step in a cleaning process for removing contaminants attached to a surface of a wafer for electronic equipment, such as a wafer having a contact hole formed therein, or a natural oxide film formed on the surface.

In fig. 1, a substrate processing apparatus 10 includes: a first process chamber 11 for performing a reactive ion etching process (hereinafter referred to as "RIE") on a wafer (hereinafter referred to simply as "wafer") (substrate) W for electronic equipment; a second processing chamber 12 disposed in parallel with the first processing chamber 11, for subjecting the wafer W to COR (Chemical Oxide Removal) Treatment and PHT (Post Heat Treatment) Treatment as described below; and a loading unit 13 as a rectangular common transfer chamber connected to the first and second processing bays 11 and 12, respectively.

In addition to the first processing chamber 11 and the second processing chamber 12, the loading unit 13 is connected with: 3 Pod stages 15 on which pods (front opening Unified Pod) 14 as containers for accommodating 25 wafers W are placed, respectively; an orienter 16 for pre-orienting the wafer W taken out of the foup 14; first and second IMS (integrated metrology System, thermal-Wave, Inc.)17, 18 for measuring the surface condition of the wafer W.

The first and second processing compartments 11 and 12 are connected to the side wall in the longitudinal direction of the loading unit 13, are disposed to face the 3 foup stages 15, and are disposed to hold the loading unit 13 together, the aligner 16 is located at one end of the loading unit 13 in the longitudinal direction, the first IMS17 is located at the other end of the loading unit 13 in the longitudinal direction, and the second IMS18 is disposed in parallel with the 3 foup stages 15.

The loading unit 13 has a Scara type double arm transfer arm mechanism 19 disposed therein for transferring the wafer W; and 3 load ports 20 as wafer W inlets disposed in the side wall corresponding to the wafer cassette stages 15. The transfer arm mechanism 19 takes out the wafer W from the pod 14 mounted on the pod stage 15 through the load port 20, and takes in and out the taken-out wafer W among the first processing chamber 11, the second processing chamber 12, the orienter 16, the first IMS17, and the second IMS 18.

The first IMS17 is an optical monitor, and includes a mounting table 21 on which the wafer W to be loaded is mounted; and an optical sensor 22 directed to the wafer W mounted on the stage 21, for measuring the surface shape of the wafer W, for example, the film thickness of the surface layer, the CD (Critical Dimension) value of the wiring groove, the gate electrode, or the like. The second IMS18 is also an optical monitor, and has a stage 23 and an optical sensor 24 for measuring the number of particles on the surface of the wafer W, as in the first IMS 17.

The first processing compartment 11 has a first processing unit 25 as a vacuum processing chamber for performing RIE processing on the wafer W; and a first load lock unit 27 provided therein with a link-type single picker-type first transfer arm 26 that transfers the wafer W in the first process unit 25.

The first processing unit 25 has a cylindrical processing chamber container (chamber); and an upper electrode and a lower electrode disposed in the chamber, wherein a distance between the upper electrode and the lower electrode is set to an appropriate distance in order to perform RIE processing on the wafer W. Further, the lower electrode has an ESC28 at its top, and grasps the wafer W by Coulomb force.

In the first processing unit 25, a processing gas is introduced into the chamber, and the introduced processing gas is converted into plasma by generating an electric field between the upper electrode and the lower electrode to generate ions and radicals, and the RIE process is performed on the wafer W with the ions and radicals.

In the first processing compartment 11, the pressure inside the loading unit 13 is maintained at atmospheric pressure, and on the other hand, the pressure inside the first processing unit 25 is maintained at vacuum. Therefore, the first load lock unit 27 is configured as a vacuum preliminary transfer chamber capable of adjusting the internal pressure thereof by including a vacuum gate valve 29 at a connection portion with the first processing unit 25 and an atmosphere gate valve 30 at a connection portion with the loading unit 13.

A first transfer arm 26 is provided near the center inside the first load lock unit 27, a first buffer 31 is provided on the first processing unit 25 side with respect to the first transfer arm 26, and a second buffer 32 is provided on the loading unit 13 side with respect to the first transfer arm 26. The first buffer 31 and the second buffer 32 are disposed above a track on which a support part (pickup) 33 disposed at the tip of the first transfer arm 26 for supporting the wafer W moves, so that the wafer W subjected to the RIE process temporarily stays above the track of the support part 33, thereby allowing the wafer W not subjected to the RIE process and the wafer W subjected to the RIE process to be smoothly exchanged in the first process unit 25.

The second processing chamber 12 has a second processing unit 34 as a second vacuum processing chamber for performing COR processing on the wafer W; a third processing unit 36 connected to the second processing unit 34 through a vacuum gate valve 35 and serving as a third vacuum processing chamber for performing PHT processing on the wafer W; and a second load lock unit 49 provided therein with a link-type single picker-type second transfer arm 37 that transfers the wafer W between the second and third process units 34 and 36.

FIG. 2 is a sectional view of the second treating unit in FIG. 1, and FIG. 2(A) is a sectional view taken along line II-II of FIG. 1; fig. 2(B) is an enlarged view of a portion a in fig. 2 (a).

In fig. 2(a), the second process unit 34 has a cylindrical process chamber container (chamber) 38; a stage ESC39 disposed on the wafer W in the chamber 38; a showerhead 40 disposed above the chamber 38; a TMP (turbo molecular Pump)41 for discharging the gas and the like in the chamber 38; and an APC (Automatic Pressure Control) valve 42 disposed between chamber 38 and TMP41 for controlling the Pressure in chamber 38.

The ESC39 has an electrode plate (not shown) for applying a dc voltage therein, and holds the wafer W by adsorption by coulomb force or Johnsen-Rahbek force generated by the dc voltage. The ESC39 also has a coolant chamber (not shown) as a temperature control mechanism. A coolant of a predetermined temperature, such as cooling water or Galden Fluid, is circulated and supplied to this coolant chamber, and the process temperature of the wafer W held by adsorption on the upper surface of the ESC39 is controlled by the temperature of this coolant. The ESC39 has a heat transfer gas supply system (not shown) for supplying a heat transfer gas (helium gas) between the upper surface of the ESC39 and the back surface of the wafer W so as to be filled with the heat transfer gas. The heat transfer gas exchanges heat between the ESC39, which is maintained at a desired specified temperature by the coolant, and the wafer W during COR processing, effectively and uniformly cooling the wafer W.

The ESC39 has a plurality of lift pins 56 as lift pins freely protruding from the upper surface thereof, and the lift pins 56 are accommodated in the ESC39 when the ESC39 holds the wafer W by suction, and protrude from the upper surface of the ESC to feed the wafer W upward when the wafer W subjected to the COR process is carried out of the chamber 38.

The shower head 40 has a double-layer structure, and has a first buffer chamber 45 and a second buffer chamber 46 in a lower portion 43 and an upper portion 44, respectively. The first buffer chamber 45 and the second buffer chamber 46 communicate with the inside of the chamber 38 via vent holes 47, 48, respectively. That is, the shower head 40 has internal passages leading into the chamber 38 for supplying gas to the first buffer chamber 45 and the second buffer chamber 46, respectively, and is composed of two plate-like bodies (the lower portion 43 and the upper portion 44) which are overlapped in a stepped manner.

When the COR process is performed on the wafer W, NH is supplied into the first buffer chamber 45 from an ammonia gas supply pipe 57 described below₃The supplied ammonia gas is supplied into the chamber 38 through the vent hole 47, and the hydrogen fluoride gas is supplied into the second buffer chamber 46 through an HF (hydrogen fluoride) gas supply pipe 58 described below, and the supplied hydrogen fluoride gas is supplied into the chamber 38 through the vent hole 48.

The shower head 40 is provided with a heater (not shown) such as a heating element therein. This heating element preferably controls the temperature of the hydrogen fluoride gas in the second buffer chamber 46 disposed above the upper portion 44.

As shown in fig. 2(B), the vent holes 47, 48 have openings formed therein that are enlarged at their ends toward the inside of the chamber 38. Thereby, the ammonia gas or the hydrogen fluoride gas can be efficiently diffused into the chamber 38. Further, since the cross-section of the vent holes 47 and 48 is thin at the center and thick at both ends, the gas vent holes 47 and 48 can prevent deposits generated in the chamber 38 from flowing backward into the first buffer chamber 45 or the second buffer chamber 46. The vent holes 47 and 48 may be spiral vent holes.

The second processing unit 34 performs COR processing on the wafer W by adjusting the pressure in the chamber 38 and the volume flow ratio of the ammonia gas to the hydrogen fluoride gas. In addition, since the second processing unit 34 is designed to mix the ammonia gas and the hydrogen fluoride gas in the chamber 38 (post-mixing design), the two gases can be prevented from being mixed before the two gases are introduced into the chamber 38, and thus, the reaction between the hydrogen fluoride gas and the ammonia gas before the hydrogen fluoride gas is introduced into the chamber 38 can be prevented.

In the second processing unit 34, a heater (not shown) such as a heating element is provided inside a side wall of the chamber 38, and the ambient temperature in the chamber 38 can be prevented from being lowered. This can improve the reproducibility of COR processing. In addition, the heating elements within the sidewalls, by controlling the temperature of the sidewalls, can prevent byproducts generated within the chamber 38 from adhering to the inside of the sidewalls.

Returning again to fig. 1, the third processing unit 36 has a frame-like processing chamber container (chamber) 50; a stage heater 51 disposed in the chamber 50 as a stage for the wafer W; a buffer arm 52 disposed around the stage heater 51 and configured to lift the wafer W placed on the stage heater 51; and a PHT chamber lid (not shown) as a lid that can be opened and closed to partition the chamber from the external atmosphere.

The stage heater 51 is made of an aluminum material having an oxide film formed on the surface thereof, and heats the wafer W placed thereon to a predetermined temperature by a heating wire or the like provided therein. Specifically, the stage heater 51 directly heats the wafer W placed on the stage heater 51 to 100 to 200 ℃, preferably about 135 ℃ for at least one minute.

A plate heater made of silicone rubber is provided on the PHT chamber cover. Further, a cartridge heater (not shown) is provided inside the side wall of the chamber 50, and the cartridge heater controls the wall surface temperature of the side wall of the chamber 50 to 25 to 80 ℃. This prevents byproducts from adhering to the sidewalls of the chamber 50, and prevents particles from being generated due to the adhering byproducts, thereby extending the cleaning cycle of the chamber 50. Further, the outer periphery of the chamber 50 is covered with a heat shield.

Instead of the plate heater, an ultraviolet radiation (irradiation) heater may be disposed as a heater for heating the wafer W from above. As the ultraviolet radiation heater, an ultraviolet lamp emitting ultraviolet rays having a wavelength of 190 to 400nm can be used.

The buffer arm 52 can smoothly exchange the wafer W in the second process unit 34 or the third process unit 36 by temporarily placing the wafer W subjected to the COR process above the track of the support portion 53 in the second transfer arm 37.

The third processing unit 36 performs PHT processing on the wafer W by adjusting the temperature of the wafer W.

The second load lock unit 49 has a frame-shaped transfer chamber (chamber) 70 in which the second transfer arm 37 is provided. Further, the internal pressure of the loading unit 13 is maintained at atmospheric pressure, while the internal pressures of the second and third processing units 34 and 36 are maintained at vacuum. Therefore, the second load lock unit 49 has a vacuum gate valve 54 at a connection portion with the third processing unit 36 and an atmospheric valve 55 at a connection portion with the loading unit 13, and is configured as a vacuum preliminary transfer chamber capable of adjusting the internal pressure.

Fig. 3 is a perspective view showing a schematic structure of the second processing chamber in fig. 1.

In fig. 3, the second processing unit 34 has: an ammonia gas supply pipe 57 for supplying ammonia gas to the first buffer chamber 45; a hydrogen fluoride gas supply pipe 58 for supplying hydrogen fluoride gas to the second buffer chamber 46; a pressure gauge 59 for measuring the pressure in the chamber 38; and a cooling unit 60 that supplies coolant to a cooling system disposed within the ESC 39.

An MFC (Mass flow controller) (not shown) for adjusting the flow rate of the ammonia gas to be supplied to the first buffer chamber 45 is provided in the ammonia gas supply pipe 57, and an MFC (not shown) for adjusting the flow rate of the hydrogen fluoride gas to be supplied to the second buffer chamber 46 is also provided in the hydrogen fluoride gas supply pipe 58. The MFC in the ammonia gas supply line 57 and the MFC in the hydrogen fluoride gas supply line 58 cooperate with each other to adjust the volume flow rate ratio of the ammonia gas and the hydrogen fluoride gas supplied into the chamber 38.

Further, a second process unit exhaust system 61 connected to a DP (Dry Pump) (not shown) is disposed below the second process unit 34. The exhaust system 61 of the second treatment unit has: an exhaust pipe 63 disposed between the chamber 38 and the APC valve 42 and connected to the exhaust passage 62; and an exhaust pipe 64 connected to a lower side (exhaust side) of the TMP41, for exhausting the gas and the like in the chamber 38. The exhaust pipe 64 is connected to the exhaust pipe 63 in front of the DP.

The third processing unit 36 has: nitrogen gas (N) is supplied to the chamber 50₂) The nitrogen gas supply pipe 65; a pressure gauge 66 for measuring the pressure in the chamber 50; and a third process unit exhaust system 67 that exhausts nitrogen and the like in the chamber 50.

The nitrogen gas supply pipe 65 is provided with an MFC (not shown) that adjusts the flow rate of nitrogen gas supplied to the chamber 50. The third process unit exhaust system 67 has a main exhaust pipe 68 communicating with the chamber 50 while being connected to the DP; an APC valve 69 disposed in the middle of the main exhaust pipe 68, and a sub-exhaust pipe 68a branched from the main exhaust pipe 68, bypassing the APC valve 69, and connected to the main exhaust pipe 68 at the front side of the DP. The APC valve 69 controls the pressure within the chamber 50.

The second load lock unit 49 has: a nitrogen gas supply pipe 71 for supplying nitrogen gas to the chamber 70; a pressure gauge 72 for measuring the pressure in the chamber 70; a second load lock unit exhaust system 73 that exhausts nitrogen gas and the like in the chamber 70; and an atmosphere communication pipe 74 that opens the inside of the chamber 70 to the atmosphere.

An MFC (not shown) is provided on the nitrogen gas supply pipe 71, and adjusts the flow rate of nitrogen gas supplied to the chamber 70. The second load lock unit exhaust system 73 is comprised of one exhaust pipe that communicates with the chamber 70 while being connected to the main exhaust pipe 68 in the third process unit exhaust system 67 prior to DP. Further, the second load lock unit exhaust system 73 and the atmosphere connection pipe 74 have an exhaust valve 75 and a relief valve 76, respectively, which are freely openable and closable, and the exhaust valve 75 and the relief valve 76 cooperate to regulate the pressure in the chamber 70 to any pressure between the atmospheric pressure and the desired vacuum degree.

Fig. 4 is a view showing a schematic configuration of the unit driving dry air supply system of the second load lock unit in fig. 3.

In fig. 4, the dry air of the unit driving dry air supply system 77 of the second load lock unit 49 is supplied to: a sliding door driving door cylinder provided in the atmospheric door valve 55; asN₂The nitrogen gas supply pipe 71 of the cleaning unit of (1) has an MFC; a relief valve 76 provided in the atmosphere communication pipe 74 serving as relief means for opening to the atmosphere; the second load lock unit exhaust system 73 as the vacuum evacuation unit has an exhaust valve 75; and a gate cylinder for driving the slide gate provided in the vacuum gate valve 54.

The unit driving dry air supply system 77 includes: a secondary dry air supply pipe 79 branched from the main dry air supply pipe 78 provided in the second processing compartment 12; and a first solenoid valve 80 and a second solenoid valve 81 connected to the secondary dry air supply pipe 79.

The first solenoid valve 80 is connected to a gate cylinder, an MFC, a relief valve 76, and a gate cylinder via dry air supply pipes 82, 83, 84, and 85, and controls the operation of each part by controlling the amount of dry air supplied to these parts. The second solenoid valve 81 is connected to the exhaust valve 75 via a dry air supply pipe 86, and controls the operation of the exhaust valve 75 by controlling the amount of dry air supplied to the exhaust valve 75.

In addition, MFC and nitrogen (N) gas on the nitrogen gas supply pipe 71₂) The supply system 87 is connected.

The second processing unit 34 or the third processing unit 36 has a unit driving dry air supply system having the same configuration as the unit driving dry air supply system 77 of the second load lock unit 49 described above.

Returning to fig. 1, the substrate processing apparatus 10 includes: a system controller for controlling the actions of the first processing compartment 11, the second processing compartment 12 and the loading unit 13; and an operation controller 88 disposed at one end in the longitudinal direction of the loading unit 13.

The operation controller 88 has a display unit formed of, for example, an LCD (Liquid crystal display), and the display unit displays the operation status of each component of the substrate processing apparatus 10.

Further, as shown in fig. 5, the system Controller has an EC (device Controller EquidmentController)89, 3 MCs (Module Controller)90, 91, 92, and a switching hub (switching hub)93 connecting the EC89 and the respective MCs. The System controller is connected to a PC171, which is an MES (Manufacturing Execution System) that manages the entire Manufacturing process of the plant in which the substrate processing apparatus 10 is installed, via a LAN (Local Area Network)170 by an EC 89. The MES cooperates with the system controller to feed back real-time information relating to various processes in the plant to the backbone service system (not shown) and to make decisions regarding the processes taking into account the load of the whole plant, etc.

EC89 is a master controller (master controller) that controls the overall operation of the substrate processing apparatus 10 for each MC. Further, the EC89 has a CPU, a RAM, an HDD, and the like, and in the operation controller 88, the CPU controls the operations of the first processing compartment 11, the second processing compartment 12, and the loading unit 13 by outputting control signals to the respective MCs in accordance with a processing method of the wafer W designated by a user or the like, that is, in accordance with a program corresponding to a processing recipe.

The switching hub 93 switches the MC that is the connection target of the EC89 in accordance with the control signal from the EC 89.

The MC90, 91, 92 are sub-control sections (Slave controllers) that control the operations of the first processing compartment 11, the second processing compartment 12, and the loading unit 13, respectively. Each MC is connected to each I/O (input/output) module 97, 98, 99 via a GHOST network 95 via a DIST (Distribution) switch 96. The GHOST network 95 is a network implemented by an LSI called a GHOST (general high-Speed Scalable optical Transceiver) mounted on an MC switch having an MC. At most 31I/O modules can be connected to the GHOST network 95, and in the GHOST network 95, MC corresponds to the main control unit and I/O modules correspond to the sub-control unit.

The I/O module 98 is composed of a plurality of I/O units 100 connected to respective components (hereinafter referred to as "terminal devices") in the second processing compartment 12, and transmits control signals to the respective terminal devices and output signals from the respective terminal devices. The terminal devices connected to the I/O section 100 in the I/O module 98 include, for example, the MFC of the ammonia gas supply line 57, the MFC of the hydrogen fluoride gas supply line 58, the pressure gauge 59 and the APC valve 42 in the second processing unit 34, the MFC of the nitrogen gas supply line 65, the pressure gauge 66, the APC valve 69, the buffer arm 52 and the stage heater 51 in the third processing unit 36, the MFC of the nitrogen gas supply line 71 in the second load lock unit 49, the pressure gauge 72 and the second transfer arm 37, and the first solenoid valve 80 and the second solenoid valve 82 in the unit-driving dry air supply system 77.

The I/O modules 97 and 99 have the same configuration as the I/O module 98, and the connection relationship between the MC90 and the I/O module 97 corresponding to the first process compartment 11 and the connection relationship between the MC92 and the I/O module 99 corresponding to the load cell 13 are the same as those between the MC91 and the I/O module 98, and the description thereof will be omitted.

In each of the GHOST networks 95, the I/O unit 100 is connected to an I/O switch (not shown) that controls input and output of digital signals, analog signals, and serial signals.

In the substrate processing apparatus 10, when the COR process is performed on the wafer W, the CPU of the EC89 transmits a control signal to a desired terminal device via the switching hub 93, the MC91, the GHOST network 95, and the I/O unit 100 of the I/O module 98 according to a program corresponding to a process recipe of the COR process, thereby performing the COR process in the second processing unit 34.

Specifically, the CPU sends control signals to the MFC in the ammonia gas supply line 57 and the MFC in the hydrogen fluoride gas supply line 58 to adjust the volume flow ratio of the ammonia gas and the hydrogen fluoride gas in the chamber 38 to a desired value, and sends control signals to the TMP41 and the APC valve 42 to adjust the pressure in the chamber 38 to a desired value. At this time, the pressure gauge 59 sends the pressure value in the chamber 38 as an output signal to the CPU of the EC89, which determines the control parameters of the MFC of the ammonia gas supply line 57, the MFC of the hydrogen fluoride gas supply line 58, the APC valve 42, or the TMP41 based on the sent pressure value in the chamber 38.

When the PHT process is performed on the wafer W, the CPU of the EC89 sends a control signal to a desired terminal device according to a program corresponding to a process recipe of the PHT process, and the third processing unit 36 performs the PHT process.

Specifically, the CPU transmits a control signal to the MFC and the APC valve 69 of the nitrogen gas supply pipe 65 to adjust the pressure in the chamber 50 to a desired value, and transmits a control signal to the stage heater 51 to adjust the temperature of the wafer W to a desired temperature. The pressure gauge 66 sends the pressure value in the chamber 50 as an output signal to the CPU of the EC89, which determines the control parameters of the APC valve 69 or the MFC of the nitrogen gas supply pipe 65 based on the pressure value in the chamber 50 that is sent.

In the system controller of fig. 5, a plurality of terminal devices are not directly connected to the EC89, and the I/O section 100 connected to the plurality of terminal devices is modularized into an I/O module, and the I/O module is connected to the EC89 via the MC and the switching hub 93, whereby the communication system can be further simplified.

Further, since the control signal transmitted from the CPU of the EC89 includes the address of the I/O unit 100 connected to the desired terminal device and the address of the I/O module including the I/O unit 100, the switching hub 93 refers to the address of the I/O module in the control signal, the GHOST of the MC refers to the address of the I/O unit 100 in the control signal, and the switching hub 93 or the MC can transmit the control signal without inquiring the target of the CPU to send the control signal. Whereby the transfer of the control signal can be smoothly achieved.

Here, after forming contact holes for source/drain connection and the like in an insulating film formed on the surface of the wafer W, the wafer W must be cleaned in order to perform a post-processing step on the wafer W. As described above, in the conventional cleaning method, water stains are generated on the surface of the wafer W by spin drying, and organic substances such as carbon remain on the surface of the wafer W by IPA drying. Since these water stains on the surface of the wafer W become a factor causing various troubles in electronic devices manufactured from the wafer W, it is necessary to remove them.

In the substrate surface treatment method according to the present embodiment, the wafer W is subjected to the COR process and the PHT process as the post-treatment process in the cleaning process.

The COR process is a process of generating a product by a chemical reaction between an oxide film of an object to be processed and gas molecules, and the PHT process is a process of heating an object to be processed to which the COR process has been performed, vaporizing and thermally oxidizing the product generated by the chemical reaction of the COR process, and removing the product from the object to be processed. As described above, the COR process and the PHT process, particularly the COR process, are processes for removing an oxide film on a target object without using plasma and without using a water component, and therefore correspond to a plasma-free etching process and a dry cleaning process (dry cleaning process).

In the substrate surface treatment method of the present embodiment, ammonia gas and hydrogen fluoride gas are used as gases. Here, the hydrogen fluoride gas promotes SiO₂Etching of the layer, ammonia gas limiting the reaction of the oxide film with hydrogen fluoride gas as required, and synthesis of By-products (By-products) eventually terminating the reaction. Specifically, in the COR process and the PHT process, a silicon oxide film (SiO) formed on the hydrophobic surface of the wafer W is removed by the following chemical reaction₂) The wafer W is cleaned by the water stain.

(COR treatment)

(PHT treatment)

The present inventors confirmed that COR treatment and PHT treatment using the above chemical reaction have the following characteristics. In addition, in the PHT process, a certain amount of N is also generated₂And H₂。

1) The selectivity (removal rate) of the thermal oxide film is high.

Specifically, in the COR process and the PHT process, the selectivity of the thermal oxide film is high, and the selectivity of the polysilicon film is low. Therefore, SiO as a thermal oxide film can be effectively removed₂The surface layer of the insulating film being formed of a film or having a structure similar to that of SiO₂Film of similar properties of suspected SiO₂Natural oxide film and water stain of the layer or silicon surface layer. In addition, the suspected SiO₂The layer is also called an "altered layer"Or "sacrificial layer".

2) On the removed surface layer or the suspected SiO₂Formation of a natural oxide film on the surface of the insulating film of the layerThe long speed is slow.

Specifically, the growth time of the natural oxide film having a thickness of 3 Å on the surface of the wafer W whose surface is exposed by wet etching is 10 minutes, while the growth time of the natural oxide film having a thickness of 3 Å on the surface of the wafer W whose surface is exposed by COR treatment and PHT treatment is 2 hours or more.

3) The reaction was carried out in a dry environment.

Specifically, in the COR treatment, water is not used in the reaction, and water molecules are generated by the COR treatment as described above, but since the COR treatment is performed in a state close to vacuum as described below, water molecules are generated in a gas state. Therefore, water molecules do not adhere to the wafer W in a liquid state, and water stains do not occur on the surface of the wafer W. Further, since the PHT treatment is performed at a high temperature as described below, water stains and the like are not generated on the surface of the wafer W. Further, OH groups are not provided on the surface of the wafer W exposed on the surface. Therefore, the surface of the wafer W is not hydrophilic, and the surface does not absorb moisture, so that the wiring reliability of the electronic device can be prevented from being lowered.

4) The amount of the product (complex) produced was saturated over a certain period of time.

Specifically, when the water stain is continuously exposed to the mixed gas of ammonia gas and hydrogen fluoride gas after a certain period of time has elapsed, the amount of the product generated does not increase. The amount of the product to be produced is determined by the mixed gas parameters such as the pressure and the volume flow ratio of the mixed gas. Therefore, the amount of water stain removed can be easily controlled. In the COR process, hydrogen fluoride gas is a reactive gas and ammonia gas is a corrosive gas. Thus, in COR treatment, ammonia (NH)₃) Neutralization with Hydrogen Fluoride (HF) inhibits fluorineHydrogen gas and silicon oxide film (SiO)₂) The reaction of (3) proceeds. Thus, the amount of water stain removed can be easily controlled by adjusting the volume flow ratio of, for example, ammonia gas and hydrogen fluoride gas.

5) Very few particles are produced.

Specifically, in the second and third processing units 34 and 36, even if the water stain removal operation is performed on 2000 wafers W, the adhered particles are hardly observed on the inner wall of the chamber 38 or 50. Thus, short-circuiting of wiring due to particles does not occur in the electronic apparatus, and the reliability of the electronic apparatus can be improved.

Fig. 6(a) to 6(I) are process diagrams illustrating the substrate surface treatment method according to the present embodiment.

In this embodiment, after forming source/drain connection contact holes 303 and the like in an insulating film 301 formed on the surface of a wafer W using a resist film 302 (see fig. 6 a), the wafer W is cleaned.

In fig. 6(a) to (I), the pretreatment step in the cleaning step of the substrate surface treatment method according to the present embodiment is performed by a pre-cleaning apparatus (not shown), and wet cleaning is first performed, for example, by H₂SO₄(sulfuric acid) and H₂O₂The resist film 302 formed on the wafer W is removed by cleaning (SPM cleaning) with a mixed solution of (hydrogen peroxide) water (fig. 6B). By this wet cleaning, contaminants such as particles 304 and metal contaminants 305 are attached to the wafer W. The removal of the resist film may be performed by plasma ashing instead of the wet cleaning. In this case, the ashed residue adheres to the wafer W as a contaminant.

Next, SC1 washing was performed to remove the particles 304 (see fig. 6C). The SC1 wash is performed, for example, for less than 5 minutes. As described above, since SC1 is NH₄OH (Ammonia) solution and H₂O₂Since the liquid mixture of (hydrogen peroxide) and water is used, a natural oxide film 306 as a hydrophilic layer is formed on the silicon surface in the contact hole 303 of the wafer W after SC1 cleaning. Thus, after the SC1 cleaning, the natural oxide film 306 is formed on the surface of the wafer W, so that the surface of the wafer W is cleanedHas hydrophilic property. The natural oxide film 306 is a silicon natural oxide film (silicon native oxide) which is an oxidized state of a terminal surface (oxygen generation on silicon surface) of silicon grown in the chemical solution.

Next, SC1 containing the removed particles 304 was washed away by pure water washing (rinsing), and then SC2 washing was performed to remove the metal contaminants 305 (see fig. 6D). The SC2 cleaning is performed, for example, for 5 minutes or less. As mentioned above, since SC2 is HCl (hydrochloric acid) and H₂O₂The mixed solution of (hydrogen peroxide) and water forms a natural oxide film 306 as a hydrophilic layer on the silicon surface in the contact hole 303 of the wafer W after SC2 cleaning. Thus, the surface of the wafer W is rendered hydrophilic by the native oxide film 306 formed on the surface of the wafer W after SC2 cleaning, as in the case after SC1 cleaning.

Next, SC2 containing the removed metal contaminants 305 is washed away by pure water cleaning, and thereafter DHF cleaning is performed to remove the native oxide film 306 generated on the surface of the wafer W (see fig. 6E). After the DHF cleaning, DHF containing the natural oxide film 306 removed by the pure water cleaning of the wafer W is washed off and spin-dried. As described above, since the surface of the wafer W is made hydrophobic by DHF cleaning, when the wafer W is taken out from the cleaning tank, the wafer W is cleaned by DHF cleaningWater droplets remain on the surface of the wafer W. Further, when the wafer W is taken out from the cleaning tank, oxygen dissolved in water droplets remaining on the surface of the Si wafer reacts with the surface of the wafer to form SiO₂While remaining HF and SiO₂Reaction to form H₂SiF₆. When spin-drying is performed in this state, H₂SiF₆After drying, on the hydrophobic surface as a silicon oxide (SiO) as shown in fig. 7₂) The water stain 307 remains as an adherent. Since the spin drying is performed, IPA molecules (organic substances such as carbon) do not remain on the surface of the wafer W when the IPA drying is performed.

Next, the process proceeds to a post-treatment process performed by the substrate processing apparatus 10. The wafer W on which the water mark 307 is formed as described above is placed on any of the foups 14 on any of the foup stages 15 of the substrate processing apparatus 10 having the surface on which the contact hole 303 is formed as the upper surface. Thus, the substrate processing apparatus 10 is started to perform the COR cleaning process in a state where the wafer W is accommodated in the pod 14.

In the COR cleaning process, the substrate processing apparatus 10 first accommodates the wafer W in the chamber 38 of the second processing unit 34 through the transfer arm mechanism 19, the second load lock unit 49, and the third processing unit 36. Next, the pressure in the chamber 38 is adjusted to a predetermined pressure, ammonia gas, hydrogen fluoride gas, and argon gas (Ar) as a diluent gas are introduced into the chamber 38, a mixed gas atmosphere having the composition is formed in the chamber 38, and the water stain 307 is exposed to the mixed gas atmosphere at the predetermined pressure (an adhering substance exposure step) (see fig. 6G). Thereby forming a water trace 307 of SiO₂The ammonia gas and the hydrogen fluoride gas generate a product having a complex structure, and the water stain 307 is modified into a product layer 308 having a complex structure composed of the product (see fig. 6H).

Then, the wafer W on which the product layer 308 is formed is placed on the stage heater 51 in the chamber 50 of the third processing unit 36, the pressure in the chamber 50 is adjusted to a predetermined pressure, nitrogen gas is introduced into the chamber 50 to generate a viscous flow, and the wafer W is heated to a predetermined temperature by the stage heater 51 (a deposit heating step). At this time, the product complex structure of the product layer 308 is decomposed by heating, and the product is decomposed and gasified to silicon tetrafluoride (SiF)₄) Ammonia and hydrogen fluoride. The vaporized molecules are entrained in a viscous flow and exhausted from the chamber 50 by the third process unit exhaust system 67. Thereby, water stains formed on the surface of the wafer W are removed by spin drying (see fig. 6(I)), and COR cleaning is terminated. The wafer W subjected to COR cleaning is placed on a predetermined wafer boat 14 via the second load lock unit 49 and the transfer arm mechanism 19.

In the second processing unit 34, since hydrogen fluoride gas easily reacts with water molecules, the hydrogen fluoride gas is present in the chamberThe volume of ammonia gas in the chamber 38 is preferably set to be larger than the volume of hydrogen fluoride gas, and water molecules in the chamber 38 are preferably removed as much as possible. Specifically, mixing hydrogen fluoride gas with ammonia gas in the gas in chamber 38The volume flow ratio (SCCM) is preferably 1to 1/2, and the predetermined pressure in the chamber 38 is preferably 6.7 x 10^-24.0Pa (0.5 to 30 mTorr). This stabilizes the flow rate ratio of the mixed gas in the chamber 38, and thus contributes to the production of the product.

Further, when the prescribed pressure in the chamber 38 is 6.7X 10^-2When the pressure is 4.0Pa (0.5 to 30mTorr), the amount of the product can be saturated reliably after a certain time has elapsed, and thus the depth of etching can be controlled reliably (self-limiting). For example, when the predetermined pressure in the chamber 38 is 1.3Pa (101mTorr), the etching is stopped after about 3 minutes from the start of the COR process. The etch depth at this point is approximately 15 nm. When the predetermined pressure in the chamber 38 is 2.7Pa (20mTorr), the etching is stopped after about 3 minutes from the start of the COR process. The etch depth at this time was about 24 nm.

In order to promote the reaction of the reactants at around room temperature, the temperature is preferably set to 25 ℃ by a temperature control mechanism (not shown) provided inside the ESC39 on which the wafer W is placed. Further, since the by-products generated in the chamber 38 are less likely to adhere as the temperature increases, it is preferable to set the temperature of the inner wall of the chamber 38 at 50 ℃ by a heater (not shown) embedded in the side wall.

In the third processing unit 36, the reactant is a complex (complex) containing a coordinate bond, and since the bond of the complex is weak and thermal decomposition is promoted even at a low temperature, the predetermined temperature of the wafer W is preferably 80 to 200 ℃, more preferably 100 to 200 ℃. This is because the temperature of the wafer W is preferably reduced to a predetermined pressure as (NH)₄)₂SiF₆The sublimation temperature of (a) is 80 to 200 ℃, and more preferably 125 to 150 ℃. The time for performing the PHT treatment on the wafer W is preferably 60 to 180 seconds. Furthermore, since a viscous flow is generated in the chamber 50, the degree of vacuum in the chamber 50 is preferably not so high that a certain flow rate of the gas flow is necessary. Therefore, the predetermined pressure in the chamber 50 is preferably 6.7 × 10 to 1.3 × 10²pa (500mTorr to 1Torr), and the flow rate of nitrogen gas is preferably 500 to 3000 SCCM. Thereby, the chamber 50 can be reliably filled with the liquidSince a viscous flow is formed, gas molecules generated by thermal decomposition of the product can be reliably removed.

First, before the COR process is performed on the wafer W, the shape of the water streak 307, for example, the film thickness is measured, and from the measured shape, the CPU of EC89 preferably determines the process condition parameter values for the COR process or the PHT process based on the predetermined relationship between the film thickness of the water streak 307 and the process condition parameters relating to the removal amount. This enables the amount of water marks 307 to be accurately controlled, and the water marks 307 formed on the front surface of the wafer W to be more accurately removed, and also enables the efficiency of the COR cleaning process to be improved.

The predetermined relationship is set based on the difference in film thickness of the water stain 307 before and after the COR process and the PHT process, that is, the amount of water stain 307 removed by the COR process and the PHT process, measured by the first IMS17 at the initial stage of processing a batch of a plurality of wafers W, and the process condition parameters in the COR process and the PHT process at that time. The parameters of the processing conditions include, for example, the volume flow ratio of the hydrogen fluoride gas to the ammonia gas, a predetermined pressure in the chamber 38, and the heating temperature of the wafer W placed on the stage heater 51. The predetermined relationship thus set is stored in the HDD of EC89, and is referred to as described above during the processing of wafers W in the initial lot and thereafter.

Whether or not the wafer W should be subjected to the COR process and the PHT process again can be determined based on the difference in film thickness of the water stain 307 between before and after the COR process and the PHT process on an arbitrary wafer W, and when the COR process and the PHT process are to be performed again, the CPU of the EC89 can determine the condition parameters for the COR process and the PHT process based on the film thickness of the water stain 307 after the COR process and the PHT process on the wafer W.

As described above, according to the substrate surface treatment method of the present embodiment, in the cleaning process of the wafer W, the COR cleaning process including the COR process of exposing the wafer W having the water mark 307 formed on the surface thereof to the mixed gas atmosphere of the ammonia gas, the hydrogen fluoride gas, and the argon gas under the predetermined pressure and the PHT process of heating the wafer W exposed to the mixed gas atmosphere to the predetermined temperature is performed. Thereby, the water stain 307 is formed by SiO₂The ammonia gas and the hydrogen fluoride gas generate a product (product layer 308) having a complex structure, and the complex structure of the product is decomposed by heating, so that the product is decomposed and gasified into silicon tetrafluoride, ammonia gas, and hydrogen fluoride. By vaporizing the product, the water stain 307 can be removed from the surface of the wafer W. In addition, since the COR cleaning process is performed in a dry atmosphere, water is not used in the reaction in the COR process, and water molecules are generated by the COR process, but the water molecules are generated in a gas state, and thus the water molecules do not adhere to the wafer W in a liquid state, and water stains are not formed again on the surface of the wafer W from which the water stains have been removed. Further, since the PHT treatment is performed at a high temperature, the water mark is not formed again on the surface of the wafer W from which the water mark has been removed. Therefore, water stains and the like can be removed to obtain a clean wafer W.

Further, according to the substrate surface treatment method of the present embodiment, SPM cleaning or plasma ashing, SC1 cleaning, pure water cleaning, SC2 cleaning, pure water cleaning, DHF cleaning, pure water cleaning, spin drying, and COR cleaning are sequentially performed to perform cleaning, particles or ashing residues generated by SPM cleaning or plasma ashing may be removed by SC1 cleaning, metal contamination generated by SPM cleaning or plasma ashing and SC1 cleaning is removed by SC2 cleaning, and a natural oxide film generated by SC1 cleaning and SC2 cleaning is removed by DHF cleaning, SPM cleaning, or plasma ashing. Although water stain is generated by spin drying, the water stain can be removed by COR cleaning, and therefore, the water stain, contaminants, a natural oxide film, and the like can be reliably removed to obtain a clean wafer W.

Further, according to the substrate surface treatment method of the present embodiment, since the water mark 307 is removed by performing the plasma-free etching process on the wafer W, in the electronic device manufactured from the wafer W, the gate oxide film can be prevented from being aged or damaged without accumulating electric charges in the gate electrode, and since the electronic device is not irradiated with energetic particles, the occurrence of crystal defects in the semiconductor can be prevented, and particularly since the expected chemical reaction due to plasma is not caused, the generation of impurities can be prevented, and thereby the inside of the chamber 38 or the chamber 50 can be prevented from being contaminated.

Further, according to the substrate surface treatment method of the present embodiment, since the water stain is removed by performing the dry cleaning process on the wafer W, it is possible to suppress the change in the physical properties of the surface of the wafer W, thereby reliably preventing the deterioration of the wiring reliability in the electronic device manufactured from the wafer W.

Further, according to the substrate surface treatment method of the present embodiment, since IPA drying is performed, generation of organic substances (carbon) can be prevented.

Further, according to the substrate surface treatment method of the present embodiment, since water stains, contaminants, a natural oxide film, and the like can be reliably removed, a decrease in reliability of an electronic device can be suppressed.

In addition, in the COR cleaning process, since the amount of the product having a complex structure generated from the water stain 307 by the COR process can be controlled by the parameters of the mixed gas formed of ammonia gas, hydrogen fluoride gas, and argon gas, the amount of water stain removed can be easily controlled by controlling the parameters of the mixed gas. This makes it possible to reliably remove the water marks formed on the surface of the wafer W and to improve the efficiency of the COR cleaning process.

The amount of product produced is saturated after a certain time has elapsed, and is determined by the parameters of the mixed gas. Therefore, the amount of water stain 307 removed can be easily controlled, and the reliability of the electronic device manufactured from the cleaned wafer W can be prevented from being lowered.

In the substrate surface treatment method of the present embodiment, each step is performed by performing SPM cleaning, plasma ashing, SC1 cleaning, pure water cleaning, and SC2 cleaning in this order. The pure water cleaning, DHF cleaning, pure water cleaning, spin drying, and COR cleaning are not limited to these steps in the substrate surface treatment (cleaning method).

For example, as a modification of the substrate surface treatment method of the present embodiment, the SC2 cleaning step may be omitted, and the steps of SPM cleaning, plasma ashing, SC1 cleaning, pure water cleaning, DHF cleaning, pure water cleaning, spin drying, COR cleaning, and the like may be performed in this order.

As a modification of the substrate surface treatment method of the present embodiment, the DHF cleaning step may be omitted, and the steps of SPM cleaning, plasma ashing, SC1 cleaning, pure water cleaning, SC2 cleaning, pure water cleaning, spin drying, COR cleaning, and the like may be performed in this order.

As a modification of the substrate surface treatment method of the present embodiment, the order of the SC2 cleaning step and the DHF cleaning step may be changed, and the steps of SPM cleaning, plasma ashing, SC1 cleaning, pure water cleaning, DHF cleaning, pure water cleaning, SC2 cleaning, pure water cleaning, spin drying, COR cleaning, and the like may be performed in this order.

As a modification of the substrate surface treatment method of the present embodiment, NH dissolved in water may be used₄A mixed solution of F (ammonium fluoride) and HF (hydrogen fluoride) is used as a cleaning solution to perform BHF (Buffered Hydrofluoric Acid) cleaning instead of DHF cleaning.

As a modification of the substrate surface treatment method of the present embodiment, the respective steps of SC1 cleaning, pure water cleaning, spin drying, and COR cleaning may be sequentially performed, the respective steps of SC2 cleaning, pure water cleaning, spin drying, and COR cleaning may be sequentially performed, and the respective steps of DHF cleaning, pure water cleaning, spin drying, and COR cleaning may be sequentially performed. Thus, even when it is not clear with which cleaning liquid the surface of the processed wafer W is cleaned, the user can obtain a clean wafer W by applying the surface treatment method to the wafer W. For example, SC1 cleaning of the wafer W to which particles are attached, SC2 cleaning of the wafer W to which metal contaminants are attached, and DHF cleaning of the wafer W on which a natural oxide film is formed can remove contaminants and the natural oxide film, respectively, and can also remove water stains generated.

These modifications enable optimum cleaning of the wafer W to be performed, and thus shorten the processing time.

The object to be cleaned by the substrate surface treatment method of the present embodiment is not limited to the formation of the source/drain connection contact holes 303 and the like in the insulating film 301 formed on the surface as described above, and the surface of the wafer W may be exposed in the contact holes. The object to be cleaned by the substrate cleaning method of the present embodiment is not limited to the wafer W whose surface is exposed, and the wafer W whose surface is exposed to the metal film formed on the wafer W may be used. In this case, the water stain formed on the exposed metal surface can be removed.

The COR cleaning target in the substrate surface treatment method of the present embodiment is not limited to the water stain as described above, and may be silicon oxide (SiO) that can be removed by the COR treatment and the PHT treatment₂) And (4) finishing. For example, the method can be applied to cleaning before forming the metal-silicon contact, cleaning before epitaxy and cleaning before silicidation.

In cleaning before forming the metal-silicon contact, before forming a wiring metal film on a wafer, COR cleaning is performed on the wafer. Thereby, a silicon oxide film (SiO) generated on the silicon can be removed₂) The resistance of contacts in electronic devices can be reduced.

In the cleaning before the epitaxial growth, COR cleaning is performed on a wafer before silicon epitaxial processing (silicon epitaxial process). Thereby, the silicon oxide film (SiO) on the wafer can be removed₂) The wafer surface before the silicon epitaxial process is made a clean surface.

In cleaning before silicidation, before CVD film formation of a silicide metal, COR cleaning is performed on a polycrystalline silicon wafer. Thereby, the silicon oxide film (SiO) on the polysilicon wafer can be removed₂) So that Si can be easily diffused on the polycrystalline silicon wafer of the silicide.

Further, although the substrate processing apparatus 10 includes the orienter 16, the first IMS17, and the second IMS18, the substrate processing apparatus 10 may not include the orienter 16, the first IMS17, and the second IMS18, and may include only one of these components.

The present invention is not limited to the above embodiments, and includes, for example, a method for manufacturing an electronic device or a method for cleaning an electronic device, which includes the above substrate surface treatment method.

The substrate processing apparatus 10 has one second processing chamber 12, but may have a plurality of second processing chambers 12 juxtaposed to each other.

Next, a modified example of a substrate processing apparatus to which the substrate surface processing method according to the present embodiment is applied will be described. In the following description, the same components as those of the substrate processing apparatus 10 are given the same reference numerals, and the description thereof is omitted, and only different parts will be described.

Fig. 8 is a diagram showing a schematic configuration of a substrate cleaning system according to a first modification of the substrate processing apparatus to which the substrate surface processing method of the present embodiment is applied.

As shown in fig. 8, a substrate cleaning system 400 as a first modification example includes: a pre-cleaning device 410 having the same function as the pre-cleaning device, not shown, that performs the pre-treatment step in the cleaning step of the substrate cleaning method according to the present embodiment; the substrate processing apparatus 10 of fig. 1; the pre-cleaning apparatus 410 and the buffer apparatus 420 of the substrate processing apparatus 10 are connected.

The front cleaning apparatus 410 is configured to sequentially perform each step of SPM cleaning, plasma ashing, SC1 cleaning, pure water cleaning, SC2 cleaning, pure water cleaning, DHF cleaning, pure water cleaning, and spin drying. The front cleaning apparatus 410 is configured to batch process a plurality of wafers W in each process.

The buffer device 420 has: a transfer arm not shown; and a buffer chamber, not shown, capable of storing the predetermined wafer W having been spin-dried. The transfer arm is configured to transfer and store the wafer W, which has been spin-dried in the pre-cleaning apparatus 410, in the buffer chamber, and to transfer and store the wafer W stored in the buffer chamber in the predetermined wafer transfer cassette 14 to the substrate processing apparatus 10.

The system controller (see fig. 5) of the substrate processing apparatus 10 includes: the MC, the GHOST network, the DIST switch, and the I/O module, which correspond to the front cleaning apparatus 410 and the buffer apparatus 420, respectively, control the front cleaning apparatus 410 and the buffer apparatus 420.

The system controller manages records of a process recipe and the like of the wafer W transferred from the front cleaning apparatus 410 to the substrate processing apparatus 10 through the buffer chamber 420, and also manages a time period for controlling the transfer arm to transfer the wafer W from the front cleaning apparatus 410 to the substrate processing apparatus 10.

With the above-described configuration, in the substrate cleaning system 400, the wafers W batch-processed in the front cleaning apparatus 410 can be smoothly transferred to the substrate processing apparatus 10 that performs the single wafer processing by the buffer apparatus 420.

As described above, according to the substrate cleaning system of the present embodiment, since the wafers W batch-processed in the pre-cleaning apparatus 410 can be smoothly transferred to the substrate processing apparatus 10 for performing the single wafer processing via the buffer apparatus 420, the substrates can be effectively cleaned.

The substrate processing apparatus to which the substrate surface processing method of the above embodiment is applied is not limited to the parallel type substrate processing apparatus having two processing chambers parallel to each other as shown in fig. 1, and there is also a substrate processing apparatus having a plurality of processing chambers radially arranged as vacuum processing chambers for performing predetermined processing on wafers W as shown in fig. 9 or 10.

Fig. 9 is a plan view schematically showing a configuration of a second modification of the substrate processing apparatus to which the substrate surface processing method according to the present embodiment is applied. In fig. 9, the same components as those of the substrate processing apparatus 10 of fig. 1 are denoted by the same reference numerals, and description thereof is omitted.

In fig. 9, the substrate processing apparatus 137 includes: a transfer unit 138 having a hexagonal shape in plan view; 4 processing units 139 to 142 radially disposed around the transfer unit 138; a loading unit 13; two load lock units 143, 144 disposed between the transfer unit 138 and the loading unit 13 and connecting the transfer unit 138 and the loading unit 13.

The internal pressure of the transfer unit 138 and each of the processing units 139 to 142 is maintained at vacuum, and the transfer unit 138 and each of the processing units 139 to 142 are connected by vacuum gate valves 145 to 148.

In the substrate processing apparatus 137, the internal pressure of the loading unit 13 is maintained at atmospheric pressure, while the internal pressure of the transfer unit 138 is maintained at vacuum. Therefore, the load lock units 143 and 144 each have a vacuum gate valve 149 and 150 at a connection portion with the transfer unit 138, and a large gate valve 151 and 152 at a connection portion with the loading unit 13, respectively, thereby constituting a vacuum preliminary transfer chamber whose internal pressure can be adjusted. The load lock units 143 and 144 each include wafer tables 153 and 154 on which the transferred wafer W is temporarily placed between the loading unit 13 and the transfer unit 138.

The transfer unit 138 has a frog-leg type transfer arm 155 disposed inside and capable of freely extending and rotating, and the transfer arm 155 transfers the wafer W between the processing units 139 to 142 or the load lock units 143 and 144.

Each of the processing units 139 to 142 has a mounting table 156 to 159 for mounting a processed wafer W. Here, the processing unit 140 has the same configuration as the first processing unit 25 of the substrate processing apparatus 10, the processing unit 141 has the same configuration as the second processing unit 34, and the processing unit 142 has the same configuration as the third processing unit 36. Therefore, the RIE process may be performed on the wafer W in the processing unit 140, the COR process may be performed on the wafer W in the processing unit 141, and the PHT process may be performed on the wafer W in the processing unit 142.

In the substrate processing apparatus 137, the wafer having the water mark formed thereon is carried into the processing unit 141 to be subjected to the COR process, and is further carried into the processing unit 142 to be subjected to the PHT process, whereby the substrate surface processing method according to the present embodiment is performed.

The operations of the respective constituent elements of the substrate processing apparatus 137 are controlled by a system controller having the same configuration as that of the system controller of the substrate processing apparatus 10.

Fig. 10 is a plan view schematically showing a configuration of a third modification of the substrate processing apparatus to which the substrate processing method according to the present embodiment is applied. In fig. 10, the same components as those of the substrate processing apparatus 10 of fig. 1 and the substrate processing apparatus 137 of fig. 9 are denoted by the same reference numerals, and the description thereof will be omitted.

In fig. 10, a substrate processing apparatus 160 includes two processing units 161 and 162 added to the substrate processing apparatus 137 of fig. 9. Accordingly, the shape of the transfer unit 163 is different from the shape of the transfer unit 138 of the substrate processing apparatus 137. The additional two processing units 161 and 162 are connected to the transfer unit 163 via vacuum gate valves 164 and 165, respectively, and have stages 166 and 167 for placing the wafer W thereon.

Further, the transfer unit 163 has a transfer arm unit 168 constituted by two transfer arms of SCARA type. The transfer arm unit 168 moves along a guide rail 169 disposed in the transfer unit 163, and transfers the wafer W between the process units 139 to 142, 161, and 162 or the load lock units 143 and 144.

In the substrate processing apparatus 160, similarly to the substrate processing apparatus 137, the wafer W having the water mark formed thereon is carried into the processing unit 141 to be subjected to the COR process, and is further carried into the processing unit 142 to be subjected to the PHT process, whereby the substrate surface processing method according to the present embodiment is performed.

The operations of the respective constituent elements in the substrate processing apparatus 160 are controlled by a system controller having the same configuration as that of the system controller of the substrate processing apparatus 10.

The electronic devices include, in addition to so-called semiconductor devices, nonvolatile or large-capacity memory elements having thin films made of insulating metal oxides such as ferroelectric substances and high dielectric materials, particularly materials having perovskite-type crystal structures. As a substance having a perovskite crystal structure, lead zirconate titanate (PZT), Barium Strontium Titanate (BST), Strontium Bismuth Niobium Tantalate (SBNT), and the like are cited.

The object of the present invention is achieved by supplying a storage medium, in which program codes of software for realizing the functions of the present embodiment are recorded, to EC89, and reading and operating the program codes stored in the storage medium by a computer (or CPU, MPU, or the like) of EC 89.

In this case, the program code itself read out from the storage medium realizes the functions of the above-described embodiment, and the program code and the storage medium storing the program code constitute the present invention.

Examples of the storage medium for supplying the program code include an optical disk such as a floppy (registered trademark) disk, a hard disk, a magneto-optical disk, a CD-ROM, a CD-R, CD-RW, a DVD-ROM, a DVD-RAM, a DVD-RW, and a DVD + RW, a magnetic tape, a nonvolatile memory card, and a ROM. Further, the program code may be downloaded via a network.

Further, the functions of the present embodiment may be realized not only by running the read program codes on a computer but also by performing part or all of actual processing by an OS (operating system) or the like running on the computer in accordance with instructions of the program codes, and the functions of the present embodiment may be realized by the processing.

The present invention also includes a case where the program code read out from the storage medium is written into a memory provided in a function expansion board inserted into a computer or a function expansion unit connected to the computer, and then, in accordance with an instruction of the program code, a CPU or the like executes a part or all of actual processing by operating an expansion function provided in the expansion board or the expansion unit, and the functions of the present embodiment are realized by the processing.

The program code may be configured by, for example, an object code, a program code executed by a decoding program, script data supplied to an OS, or the like.

Claims (24)

1. A substrate surface treatment method for removing a substrate deposit, comprising:

a chemical cleaning step of cleaning the substrate with a chemical;

an adherent substance exposure step of exposing the adherent substance to a mixed gas atmosphere containing ammonia and hydrogen fluoride under a predetermined pressure; and

and an attached matter heating step of heating the attached matter exposed to the mixed gas atmosphere to a predetermined temperature.

2. The substrate surface treatment method according to claim 1, wherein in the deposit exposure step, a plasma-free etching treatment is performed on the substrate.

3. The method according to claim 1, wherein in the deposit exposure step, a dry cleaning process is performed on the substrate.

4. The substrate surface treatment method according to claim 1, wherein in the deposit exposure step, the predetermined pressure is 6.7 x 10^-2-4.0 Pa, and the predetermined temperature is 100 to 200 ℃ in the attached matter heating step.

5. The substrate surface treatment method according to claim 1, wherein the adherent is a silicon oxide formed on the substrate.

6. The substrate surface treatment method according to claim 1, further comprising a product formation condition determining step of measuring a shape of the deposit, and determining at least one of a volume flow rate ratio of the hydrogen fluoride to the ammonia in the mixed gas and the predetermined pressure based on the measured shape.

7. The method of surface treatment of a substrate according to claim 1, further comprising a rinsing liquid cleaning step of cleaning the substrate with a rinsing liquid after the chemical liquid cleaning step.

8. The method of surface treatment of a substrate according to claim 7, further comprising a spin-drying step of spin-drying the substrate after the rinsing liquid cleaning step.

9. A method of cleaning a substrate, the substrate having: a first layer formed on a substrate; a photoresist layer having a predetermined pattern formed on the first layer; and processing a shaped contact hole in the first layer by an etching process using the photoresist layer, wherein the method has:

a photoresist layer removing step of removing the photoresist layer;

a hydrophilic treatment cleaning step of cleaning the substrate with a chemical solution for forming a hydrophilic layer on the surface of the substrate;

an adherent exposure step of exposing the substrate to a mixed gas atmosphere containing ammonia and hydrogen fluoride under a predetermined pressure; and

and an attached matter heating step of heating the substrate exposed to the mixed gas atmosphere to a predetermined temperature.

10. The method of cleaning a substrate according to claim 9, wherein the chemical solution is any one of SC1 and SC 2.

11. The method of cleaning a substrate according to claim 9, wherein the hydrophilic layer is a natural oxide film of silicon.

12. A method of cleaning a substrate, the substrate comprising: a first layer formed on a substrate; a photoresist layer having a predetermined pattern formed on the first layer; and processing a formed contact hole in the first layer by an etching process using the photoresist layer; wherein, the method comprises the following steps:

a photoresist layer removing step of removing the photoresist layer;

a hydrophobic treatment cleaning step of cleaning the substrate with a chemical liquid that forms a hydrophobic surface on the substrate surface;

an adherent exposure step of exposing the substrate to a mixed gas atmosphere containing ammonia and hydrogen fluoride under a predetermined pressure; and

and an attached matter heating step of heating the substrate exposed to the mixed gas atmosphere to a predetermined temperature.

13. The method of cleaning a substrate according to claim 12, wherein the chemical solution is an aqueous HF solution.

14. A method of cleaning a substrate, the substrate having: a first layer formed on a substrate; a photoresist layer having a predetermined pattern formed on the first layer; and processing a shaped contact hole in the first layer by an etching process using the photoresist layer, wherein the method has:

a photoresist layer removing step of removing the photoresist layer;

a first wet cleaning step of cleaning the substrate by SC 1;

a second wet cleaning step of cleaning the substrate cleaned in the first wet cleaning step by SC 2;

a third wet cleaning step of cleaning the substrate cleaned in the second wet cleaning step by an aqueous hydrogen fluoride solution;

a drying step of drying the substrate cleaned in the third wet cleaning step;

an adherent exposure step of exposing the substrate dried in the drying step to a mixed gas atmosphere containing ammonia and hydrogen fluoride under a predetermined pressure; and

and an attached matter heating step of heating the substrate exposed to the mixed gas atmosphere to a predetermined temperature.

15. A method of cleaning a substrate, the substrate having: a first layer formed on a substrate; a photoresist layer having a predetermined pattern formed on the first layer; and processing a shaped contact hole in the first layer by an etching process using the photoresist layer, wherein the method has:

a photoresist layer removing step of removing the photoresist layer;

a first wet cleaning step of cleaning the substrate by SC 1;

a second wet cleaning step of cleaning the substrate cleaned in the first wet cleaning step by an aqueous hydrogen fluoride solution;

a drying step of drying the substrate cleaned in the second wet cleaning step;

an adherent exposure step of exposing the substrate dried in the drying step to a mixed gas atmosphere containing ammonia and hydrogen fluoride under a predetermined pressure; and

and an attached matter heating step of heating the substrate exposed to the mixed gas atmosphere to a predetermined temperature.

16. A method of cleaning a substrate, the substrate having: a first layer formed on a substrate; a photoresist layer having a predetermined pattern formed on the first layer; and processing a shaped contact hole in the first layer by an etching process using the photoresist layer, wherein the method has:

a photoresist layer removing step of removing the photoresist layer;

a first wet cleaning step of cleaning the substrate by SC 1;

a second wet cleaning step of cleaning the substrate cleaned in the first wet cleaning step by SC 2;

a drying step of drying the substrate cleaned in the second wet cleaning step;

an adherent exposure step of exposing the substrate dried in the drying step to a mixed gas atmosphere containing ammonia and hydrogen fluoride under a predetermined pressure; and

and an attached matter heating step of heating the substrate exposed to the mixed gas atmosphere to a predetermined temperature.

17. A method of cleaning a substrate, the substrate having: a first layer formed on a substrate; a photoresist layer having a predetermined pattern formed on the first layer; and processing a shaped contact hole in the first layer by an etching process using the photoresist layer, wherein the method has:

a photoresist layer removing step of removing the photoresist layer;

a first wet cleaning step of cleaning the substrate by SC 1;

a second wet cleaning step of cleaning the substrate cleaned in the first wet cleaning step with an aqueous hydrogen fluoride solution;

a third wet cleaning step of cleaning the substrate cleaned in the second wet cleaning step by SC 2;

a drying step of drying the substrate cleaned in the third wet cleaning step;

an adherent exposure step of exposing the substrate dried in the drying step to a mixed gas atmosphere containing ammonia and hydrogen fluoride under a predetermined pressure; and

and an attached matter heating step of heating the substrate exposed to the mixed gas atmosphere to a predetermined temperature.

18. A program for running a substrate surface treatment method for removing a substrate deposit in a computer, comprising:

a chemical cleaning module for cleaning the substrate with a chemical;

an attachment exposure module that exposes the attachment to a mixed gas atmosphere containing ammonia and hydrogen fluoride at a predetermined pressure; and

and an adherent heating module for heating the adherent exposed to the mixed gas atmosphere to a predetermined temperature.

19. A program for executing a method for cleaning a substrate in a computer, the substrate comprising: a first layer formed on a substrate; a photoresist layer having a predetermined pattern formed on the first layer; and processing a formed contact hole in the first layer by an etching process using the photoresist layer, the process including:

a photoresist layer removing module that removes the photoresist layer;

a hydrophilic treatment cleaning module for cleaning the substrate with a chemical solution for forming a hydrophilic layer on the surface of the substrate;

an attachment exposure module that exposes the substrate to a mixed gas atmosphere containing ammonia and hydrogen fluoride at a predetermined pressure; and

and an attached matter heating module for heating the substrate exposed to the mixed gas atmosphere to a predetermined temperature.

20. A program for executing a method for cleaning a substrate in a computer, the substrate having: a first layer formed on a substrate; a photoresist layer having a predetermined pattern formed on the first layer; and processing a formed contact hole in the first layer by an etching process using the photoresist layer, the process including:

a photoresist layer removing module that removes the photoresist layer;

a hydrophobic treatment cleaning module for cleaning the substrate with a chemical solution for forming a hydrophobic surface on the substrate surface;

an attachment exposure module that exposes the substrate to a mixed gas atmosphere containing ammonia and hydrogen fluoride at a predetermined pressure; and

and an attached matter heating module configured to heat the substrate exposed to the mixed gas atmosphere to a predetermined temperature.

21. A program for executing a cleaning method of a substrate in a computer, the substrate having: a first layer formed on a substrate; a photoresist layer having a predetermined pattern formed on the first layer; and processing a formed contact hole in the first layer by an etching process using the photoresist layer, the process including:

a photoresist layer removing module that removes the photoresist layer;

a first wet cleaning module for cleaning the substrate by SC 1;

a second wet cleaning module for cleaning the substrate cleaned in the first wet cleaning module by SC 2;

a third wet cleaning module for cleaning the substrate cleaned in the second wet cleaning module with an aqueous hydrogen fluoride solution;

a drying module drying the substrate cleaned in the third wet cleaning module;

an adherent exposure module that exposes the substrate dried in the drying module to a mixed gas atmosphere containing ammonia and hydrogen fluoride under a prescribed pressure; and

and an adherent heating module for heating the substrate exposed to the mixed gas atmosphere to a predetermined temperature.

22. A program for executing a method for cleaning a substrate in a computer, the substrate having: a first layer formed on a substrate; a photoresist layer having a predetermined pattern formed on the first layer; and processing a formed contact hole in the first layer by an etching process using the photoresist layer, the process including:

a photoresist layer removing module that removes the photoresist layer;

a first wet cleaning module for cleaning the substrate by SC 1;

a second wet cleaning module for cleaning the substrate cleaned in the first wet cleaning module with an aqueous hydrogen fluoride solution;

a drying module drying the substrate cleaned in the second wet cleaning module;

an adherent exposure module that exposes the substrate dried in the drying module to a mixed gas atmosphere containing ammonia and hydrogen fluoride under a prescribed pressure; and

and an adherent heating module for heating the substrate exposed to the mixed gas atmosphere to a predetermined temperature.

23. A program for executing a method for cleaning a substrate in a computer, the substrate having: a first layer formed on a substrate; a photoresist layer having a predetermined pattern formed on the first layer; and processing a formed contact hole in the first layer by an etching process using the photoresist layer, the process including:

a photoresist layer removing module that removes the photoresist layer;

a first wet cleaning module for cleaning the substrate by SC 1;

a second wet cleaning module for cleaning the substrate cleaned in the first wet cleaning module by SC 2;

a drying module drying the substrate cleaned in the second wet cleaning module;

an adherent exposure module that exposes the substrate dried in the drying module to a mixed gas atmosphere containing ammonia and hydrogen fluoride under a prescribed pressure; and

and an adherent heating module for heating the substrate exposed to the mixed gas atmosphere to a predetermined temperature.

24. A program for executing a method for cleaning a substrate in a computer, the substrate having: a first layer formed on a substrate; a photoresist layer having a predetermined pattern formed on the first layer; and processing a formed contact hole in the first layer by an etching process using the photoresist layer, the process including:

a photoresist layer removing module that removes the photoresist layer;

a first wet cleaning module for cleaning the substrate by SC 1;

a second wet cleaning module for cleaning the substrate cleaned in the first wet cleaning module with an aqueous hydrogen fluoride solution;

a third wet cleaning module for cleaning the substrate cleaned in the second wet cleaning module by SC 2;

a drying module drying the substrate cleaned in the third wet cleaning module;

an adherent exposure module that exposes the substrate dried in the drying module to a mixed gas atmosphere containing ammonia and hydrogen fluoride under a prescribed pressure; and

and an adherent heating module for heating the substrate exposed to the mixed gas atmosphere to a predetermined temperature.

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