CN1828549A - Memory refreshing speed control device and method - Google Patents
Memory refreshing speed control device and method Download PDFInfo
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- CN1828549A CN1828549A CN 200610074033 CN200610074033A CN1828549A CN 1828549 A CN1828549 A CN 1828549A CN 200610074033 CN200610074033 CN 200610074033 CN 200610074033 A CN200610074033 A CN 200610074033A CN 1828549 A CN1828549 A CN 1828549A
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Abstract
The device comprises: a temperature sensing unit on memory module to active generate a temperature variation signal, a control circuit electric connected to the memory module and temperature sensing unit to update data every set time. Wherein, the control method comprises: when the leakage speed increasing of a capacitor, the temperature sensing unit activates a temperature variation signal; the control circuit updates the DRAM; if the received temperature variation signal shows temperature raise, it sets the time reducing with the temperature raising.
Description
Technical field
The present invention relates to a kind of control device of memory refreshing speed, particularly relate to the control device that is applied to the memory refreshing speed in the computer system.
Background technology
See also Fig. 1, it is the circuit diagram of a storage unit in the common dynamic RAM module (DRAM module), wherein can know and find out, it mainly is made of a transistor 11 and an electric capacity 12, wherein when electric charge is expired in electric capacity 12 storages, the data of representing its storage are 1, and when electric capacity 12 did not store electric charge, the data of representing its storage were 0.But because the electric charge in the electric capacity 12 can run off when data are read, even be not to be read but also can oneself electric leakage after after a while, therefore just need carry out Refresh Data (refresh) operation at set intervals once, generally speaking, approximately at least, per 64 milliseconds (ms) refresh once whole dynamic RAM module (DRAM module), to guarantee the correctness of data.
In addition, see also Fig. 2 again, it is the function block schematic diagram of known computer systems, the dynamic RAM module 23 that wherein consists predominantly of CPU (central processing unit) 20, north bridge chips 21, South Bridge chip 22 and be connected with north bridge chips 21 by bus 210.And computer system all has standby mode (Suspend mode) now, after computer system is left unused a period of time, CPU (central processing unit) 20 just can be passed through some necessary datas bus 210 unloadings to dynamic RAM module 23 backs and north bridge chips 21, South Bridge chip 22 powered-down in the lump, only stay the power supply of dynamic RAM module 23, promptly so-called temporary to random access memory (Suspend to RAM).At this moment, because other chip is powered-down all, therefore dynamic RAM module 23 must utilize the clock generator (this figure is not shown) of self to carry out the operation of above-mentioned Refresh Data (refresh), promptly so-called self-refreshing (Self-refresh).
But owing to the speed of electric capacity 12 electric leakage can change along with temperature, when temperature rises, can cause the speed of electric capacity 12 electric leakages to increase, so might cause before carrying out Refresh Data, just not running off multi-charge and cause error in data (data error).Therefore the Electrically Erasable Read Only Memory (EEPROM) 230 in the dynamic RAM module 23 just is provided with the temperature that the temperature sensing assembly (not shown) is monitored dynamic RAM module 23 at any time, when being used to computer system and entering battery saving mode and other chip and all entered dormant state, still can allow dynamic RAM module 23 oneself carry out some emergency measures can be at temperature variation the time, the speed that for example increases self-refreshing (Self-refresh) when temperature rises to be preventing error in data (data error), and the speed that just reduces self-refreshing (Self-refresh) when temperature descends is with effective saving electric power.But in any means known, be in normal power supply but not during battery saving mode for computer system, the someone can not propose anyly effectively according to temperature variation dynamic RAM module 23 to be carried out the technological means that refresh rate is adjusted, make dynamic RAM module 23 in non-battery saving mode still have the risk of error in data (data error), therefore how utilizing the assembly of existing system to improve this disappearance, is fundamental purpose of the present invention.
Summary of the invention
The present invention is a kind of control device of memory refreshing speed, be applied in the computer system, computer system comprises a memory module, and control device comprises: a temperature sensing component, it is arranged on the memory module, and it is according to the temperature variation of memory module and initiatively send a temperature variation signal; An and control circuit, be electrically connected on memory module and temperature sensing component, it carries out the Refresh Data operation for coming every a setting-up time to memory module, and the length of setting-up time changes according to the temperature variation signal that temperature sensing component initiatively sends.
Another aspect of the invention is a kind of control device of memory refreshing speed, be applied in the computer system, computer system comprises a dynamic RAM module, control device comprises: a temperature sensing component, it is arranged on the dynamic RAM module, when the electric capacity Yin Wendu in the dynamic RAM module rises when causing electric leakage speed to increase, temperature sensing component promptly rises according to the temperature of dynamic RAM module and changes and initiatively send a temperature variation signal; An and control circuit, be electrically connected on dynamic RAM module and temperature sensing component, it is to come the dynamic RAM module is carried out the Refresh Data operation every a setting-up time, and the length of setting-up time changes according to the temperature variation signal that temperature sensing component initiatively sends.
The present invention also provides a kind of control method of memory refreshing speed, be applied in the computer system, computer system comprises a dynamic RAM module and a control circuit, the dynamic RAM module is provided with a temperature sensing component, and control circuit is arranged in the chipset, control method comprises the following steps: to rise when causing electric leakage speed to increase as the electric capacity Yin Wendu in the dynamic RAM module, and temperature sensing component rises according to the temperature of dynamic RAM module and changes and initiatively send a temperature variation signal; And control circuit comes the dynamic RAM module is carried out Refresh Data operation every a setting-up time according to this temperature variation signal, and when received temperature variation signal indication temperature rose, setting-up time rose along with temperature and reduces.
Description of drawings
Fig. 1 is the circuit diagram of a storage unit in the common dynamic RAM module;
Fig. 2 is the known function block schematic diagram of personal computer system inside;
Fig. 3 is that the present invention is the preferred embodiment function block schematic diagram about a kind of control device of memory refreshing speed that improves that known defect proposes;
Fig. 4 is that the present invention is another preferred embodiment function block schematic diagram about a kind of control device of memory refreshing speed that improves that known defect proposes; With
Fig. 5 is the process flow diagram of the control method of memory refreshing speed of the present invention.
The reference numeral explanation
Transistor 11
Electric capacity 12
CPU (central processing unit) 20
South Bridge chip 22
Bus 210
Electrically Erasable Read Only Memory 230
CPU (central processing unit) 30
Electrically Erasable Read Only Memory 330
System Management Bus 32
Dynamic ram bus 310
South Bridge chip 312
Embodiment
Please earlier referring to Fig. 3, it is that the present invention is the preferred embodiment function block schematic diagram about a kind of control device of memory refreshing speed that improves that known defect proposes, it is applied in the computer system 3, computer system 3 comprises a memory module 33 and a CPU (central processing unit) 30, and control device includes a temperature sensing component 3300 and a control circuit 31.Memory module 33 of the present invention can be two coaxial memory module (Dual Inline Memory Module, abbreviation DIMM) the dynamic RAM module (DRAM Module) of form, and temperature sensing component 3300 its can be arranged among the Electrically Erasable Read Only Memory 330 that memory module 33 had, its function mainly is initiatively to send a temperature variation signal according to the temperature variation of memory module 33.
Specifically, when computer system 3 and CPU (central processing unit) 30 all are in normal mode of operation but not standby mode (Suspend mode), and memory module 33 is can't effectively bring into play (for example radiator fan efficient deficiency even fault) and cause temperature to raise because of heat dissipation the time, temperature sensing component 3300 just initiatively sends a temperature rising signals, makes the outer control circuits 31 of memory module 33 know the situation that memory module 33 is overheated.Otherwise, and when the temperature of memory module 33 reduced, 3300 of temperature sensing components initiatively sent the control circuit 31 of a temperature dropping signal to memory module 33.And the temperature sensing component 3300 of present embodiment is finished in an Electrically Erasable Read Only Memory 330, and Electrically Erasable Read Only Memory 330 can be finished with the South Bridge chip 312 in the control circuit 31 that can be finished by a chipset with a System Management Bus (SMBus) 32 and is connected, and be initiatively to send signal, Electrically Erasable Read Only Memory 330 of the present invention needs to exist with the master control set in the System Management Bus 32 (master device) kenel.
Thus, when being in South Bridge chip 312 in the control circuit 31 in the normal mode of operation (normal mode) when the computer system normal power supply and receiving the temperature variation signal that Electrically Erasable Read Only Memory 330 initiatively transmitted by System Management Bus 32, just send a setting-up time variable signal again to north bridge chips 311 according to its content, make north bridge chips 311 can change the length of a setting-up time according to the setting-up time variable signal that South Bridge chip 312 transmits, and be in the control signal that the north bridge chips 311 in the normal mode of operation (normal mode) is just just transmitted according to dynamic ram bus 310 every this setting-up time, and then memory module 33 is carried out Refresh Data (refresh).
In other words, when the temperature of memory module 33 raise, north bridge chips 311 just shortened setting-up time, and when the temperature of memory module 33 descended, north bridge chips 311 just elongated setting-up time.Thus, even the computer system that is in other non-battery saving mode also can be adjusted the speed of Refresh Data according to variation of temperature, effectively avoid error in data (data error) to take place, and the present invention does not need the intervention by softwares such as operating systems, but the temperature sensing component that utilization has been present in the known configuration just can effectively improve the defective of any means known, and then realize fundamental purpose of the present invention.
See also Fig. 4 again, it is that the present invention is another preferred embodiment function block schematic diagram about the control device of memory refreshing speed that improves that known defect proposes, it also is applied in the computer system 3, computer system 3 comprises a memory module 33 and a CPU (central processing unit) 30, and control device then includes temperature sensing component 3300 and control circuit 31.Memory module 33 of the present invention can be two coaxial memory module (Dual Inline Memory Module, be called for short DIMM), and temperature sensing component 3300 its can be arranged among the Electrically Erasable Read Only Memory 330 that memory module 33 had, its function mainly is initiatively to send the temperature variation signal according to the temperature variation of memory module 33.
Same, when the temperature of memory module 33 raise, temperature sensing component 3300 just initiatively sent the temperature rising signals, and when the temperature of memory module 33 reduced, 3300 of temperature sensing components initiatively sent a temperature dropping signal.And the temperature sensing component 3300 of present embodiment is also finished in Electrically Erasable Read Only Memory 330, different is, the Electrically Erasable Read Only Memory 330 of the embodiment of the invention is to be connected with can being finished with north bridge chips 311 by the South Bridge chip in the chipset 312 with System Management Bus (SMBus) 42, and be initiatively to send signal, the Electrically Erasable Read Only Memory 330 of the embodiment of the invention also needs to exist with the master control set kenel in the System Management Bus 32.
Thus, being in north bridge 311 in the control circuit 31 in the normal mode of operation (normal mode) just can directly receive Electrically Erasable Read Only Memory 330 and initiatively need not pass through the commentaries on classics of South Bridge chip 312 by temperature variation signal that System Management Bus 42 transmitted, make north bridge chips 311 can directly change the length of setting-up time according to the temperature variation signal, and the north bridge chips 311 that is in the normal mode of operation (normal mode) just can just send control signal by dynamic ram bus 310 every this setting-up time, and then memory module 33 is carried out Refresh Data (refresh).Therefore, when system is in normal mode of operation (normal mode) and the temperature of memory module 33 when raising, the present invention can make way for memory module 33 outer north bridge chips 311 to be known that the temperature of memory module 33 raises and this setting-up time can be shortened; Otherwise when the temperature of memory module 33 descended, north bridge chips 311 just elongated this setting-up time.So the embodiment of the invention does not need the intervention by softwares such as operating systems equally, just can allow the computer system that is in other non-battery saving mode also can be and adjust the speed of memory module 33 Refresh Datas from the outside according to variation of temperature, effectively avoid error in data (data error) to take place, and then realize fundamental purpose of the present invention.
And above-mentioned steps can be carried out according to method flow diagram shown in Figure 5, at first after computer system enters step 501 " normal mode of operation ", just then carrying out step 502 " utilizes temperature sensing component to come the temperature of sensing dynamic RAM module ", utilize step 503 " whether temperature rises surpasses a first threshold " to judge whether temperature rises above a predeterminable level again, if, then carry out step 504 " temperature sensing component initiatively sends a temperature variation signal to control circuit " and step 505 " control circuit comes this dynamic RAM module is carried out the Refresh Data operation every a setting-up time according to this temperature variation signal; when received this temperature variation signal indication temperature rises, and this setting-up time can reduce along with the temperature rising ".If rising, temperature do not surpass a predeterminable level, then utilize step 506 " whether temperature descends surpasses one second threshold value " to judge whether temperature descends above a predeterminable level again, if, then carry out step 507 " temperature sensing component initiatively sends a temperature variation signal to control circuit " and step 508 " control circuit comes this dynamic RAM module is carried out the Refresh Data operation every a setting-up time in response to this temperature variation signal; when received this temperature variation signal indication temperature descends, and this setting-up time can increase along with temperature decline ".
In sum, the present invention can improve the defective of known technology, and then realizes fundamental purpose of the present invention.And other does not break away from the equivalence change of being finished under the disclosed spirit of the present invention or modifies, and all should be included in the scope of claim of the present invention.
Claims (10)
1. the control device of a memory refreshing speed is applied in the computer system, and this computer system comprises a memory module, and this control device comprises:
One temperature sensing component, it is arranged on this memory module, and it is according to the temperature variation of this memory module and initiatively send a temperature variation signal; And
One control circuit, be electrically connected on this memory module and this temperature sensing component, it comes this memory module is carried out the Refresh Data operation every a setting-up time, and the length of this setting-up time changes according to this temperature variation signal that this temperature sensing component initiatively sends.
2. the control device of memory refreshing speed as claimed in claim 1, wherein this temperature sensing component is finished in an Electrically Erasable Read Only Memory chip, and this Electrically Erasable Read Only Memory chip is to finish with a System Management Bus and this control circuit to be connected, and this Electrically Erasable Read Only Memory chip is the master control set in this System Management Bus.
3. the control device of memory refreshing speed as claimed in claim 1, when wherein this temperature variation signal that initiatively sends when this temperature sensing component is a temperature rising signals, this control circuit just shortens this setting-up time, and this temperature variation signal that initiatively sends when this temperature sensing component is when being a temperature dropping signal, and control circuit just elongates this setting-up time.
4. the control device of memory refreshing speed as claimed in claim 1, wherein this control circuit is a chipset, this chipset comprises:
One South Bridge chip is electrically connected to this temperature sensing component, produces a setting-up time variable signal in order to the variation according to this temperature variation signal; And
One north bridge chips is electrically connected to this South Bridge chip and this memory module, and it comes this memory module is carried out the Refresh Data operation every this setting-up time, and changes the length of this setting-up time according to this setting-up time variable signal that this South Bridge chip transmits.
5. the control device of memory refreshing speed as claimed in claim 1, wherein this control circuit comes this memory module is carried out the Refresh Data operation every this setting-up time in a normal mode of operation, and the length of this setting-up time changes according to this temperature variation signal that this temperature sensing component initiatively sends.
6. the control method of a memory refreshing speed, be applied in the computer system, this computer system comprises a dynamic RAM module, this dynamic RAM module is provided with a temperature sensing component, and this control circuit is arranged in the chipset, and this control method comprises the following steps:
When the electric capacity Yin Wendu in this dynamic RAM module rises when causing electric leakage speed to increase, this temperature sensing component rises according to the temperature of this dynamic RAM module and changes and initiatively send a temperature variation signal; And
This control circuit comes this dynamic RAM module is carried out the Refresh Data operation every a setting-up time in response to this temperature variation signal, and when received this temperature variation signal indication temperature rose, this setting-up time rose along with temperature and reduces.
7. control method as claimed in claim 6, wherein this control circuit comes this dynamic RAM module is carried out the Refresh Data operation every this setting-up time, when received this temperature variation signal indication temperature descended, this setting-up time descended along with temperature and increases.
8. control method as claimed in claim 6, wherein this control circuit receives this temperature variation signal via a System Management Bus.
9. control method as claimed in claim 8, wherein comprise a north bridge chips and a South Bridge chip in this chipset, this South Bridge chip receives this temperature variation signal that this temperature sensing component initiatively sends via this System Management Bus, so that this north bridge chips is adjusted the length of this setting-up time and this dynamic RAM module is carried out the Refresh Data operation according to this temperature variation signal.
10. control method as claimed in claim 8, wherein comprise a north bridge chips in this chipset, this north bridge chips receives this temperature variation signal that this temperature sensing component initiatively sends via this System Management Bus, carries out the Refresh Data operation with the length of adjusting this setting-up time and to this dynamic RAM module.
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| Application Number | Priority Date | Filing Date | Title |
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| CNB2006100740336A CN100390750C (en) | 2006-04-04 | 2006-04-04 | Memory refreshing speed control device and method |
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| CNB2006100740336A CN100390750C (en) | 2006-04-04 | 2006-04-04 | Memory refreshing speed control device and method |
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| CN100390750C CN100390750C (en) | 2008-05-28 |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101188141B (en) * | 2006-11-22 | 2012-04-04 | 奇梦达股份公司 | Resistive memory including refresh operation and refreshing method thereof |
| CN104115227A (en) * | 2011-12-23 | 2014-10-22 | 英特尔公司 | Memory operations using system thermal sensor data |
| US9490003B2 (en) | 2011-03-31 | 2016-11-08 | Intel Corporation | Induced thermal gradients |
| CN107797897A (en) * | 2016-08-30 | 2018-03-13 | 爱思开海力士有限公司 | Operating method including main equipment and the system of slave unit and the system |
| CN108932175A (en) * | 2017-05-24 | 2018-12-04 | 光宝电子(广州)有限公司 | The control method of solid state storage device |
| US10514305B2 (en) | 2011-03-31 | 2019-12-24 | Intel Corporation | Induced thermal gradients |
| CN111124088A (en) * | 2019-12-25 | 2020-05-08 | 联想(北京)有限公司 | Control method and electronic equipment |
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| US6134167A (en) * | 1998-06-04 | 2000-10-17 | Compaq Computer Corporation | Reducing power consumption in computer memory |
| US6714473B1 (en) * | 2001-11-30 | 2004-03-30 | Cypress Semiconductor Corp. | Method and architecture for refreshing a 1T memory proportional to temperature |
| CN100487816C (en) * | 2003-04-23 | 2009-05-13 | 富士通微电子株式会社 | Semiconductor memory and refreshing method thereof |
| JP4167632B2 (en) * | 2004-07-16 | 2008-10-15 | エルピーダメモリ株式会社 | Refresh cycle generation circuit and DRAM having the same |
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2006
- 2006-04-04 CN CNB2006100740336A patent/CN100390750C/en active Active
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101188141B (en) * | 2006-11-22 | 2012-04-04 | 奇梦达股份公司 | Resistive memory including refresh operation and refreshing method thereof |
| US9490003B2 (en) | 2011-03-31 | 2016-11-08 | Intel Corporation | Induced thermal gradients |
| US10514305B2 (en) | 2011-03-31 | 2019-12-24 | Intel Corporation | Induced thermal gradients |
| CN104115227A (en) * | 2011-12-23 | 2014-10-22 | 英特尔公司 | Memory operations using system thermal sensor data |
| US9396787B2 (en) | 2011-12-23 | 2016-07-19 | Intel Corporation | Memory operations using system thermal sensor data |
| TWI567738B (en) * | 2011-12-23 | 2017-01-21 | 英特爾股份有限公司 | Memory operations using system thermal sensor data |
| CN104115227B (en) * | 2011-12-23 | 2017-02-15 | 英特尔公司 | Memory operations using system thermal sensor data |
| CN107797897A (en) * | 2016-08-30 | 2018-03-13 | 爱思开海力士有限公司 | Operating method including main equipment and the system of slave unit and the system |
| CN108932175A (en) * | 2017-05-24 | 2018-12-04 | 光宝电子(广州)有限公司 | The control method of solid state storage device |
| CN108932175B (en) * | 2017-05-24 | 2022-01-11 | 建兴储存科技(广州)有限公司 | Control method of solid state storage device |
| CN111124088A (en) * | 2019-12-25 | 2020-05-08 | 联想(北京)有限公司 | Control method and electronic equipment |
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| CN100390750C (en) | 2008-05-28 |
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