CN1820206A - Test apparatus and test method - Google Patents

Test apparatus and test method Download PDF

Info

Publication number
CN1820206A
CN1820206A CN 200580000284 CN200580000284A CN1820206A CN 1820206 A CN1820206 A CN 1820206A CN 200580000284 CN200580000284 CN 200580000284 CN 200580000284 A CN200580000284 A CN 200580000284A CN 1820206 A CN1820206 A CN 1820206A
Authority
CN
China
Prior art keywords
pattern
output
title
pattern row
row
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN 200580000284
Other languages
Chinese (zh)
Other versions
CN100559204C (en
Inventor
大空聡
中川哲郎
角田慎
高岩伸贤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Publication of CN1820206A publication Critical patent/CN1820206A/en
Application granted granted Critical
Publication of CN100559204C publication Critical patent/CN100559204C/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

There is provided a testing device including: a first signal comparator operable to acquire a value of an output pattern based on a result that is obtained by comparing a voltage of an output signal and a first threshold value voltage in a first strobe timing, in order to acquire a first output pattern sequence; a second signal comparator operable to acquire a value of an output pattern based on a result that is obtained by comparing a voltage of an output signal and a second threshold value voltage in a second strobe timing, in order to acquire a second output pattern sequence; a header pattern sequence detecting unit operable to detect that the first output pattern sequence is identical with a header pattern sequence; and an expectation comparing unit operable to output a comparison result between the second output pattern sequence acquired by the second signal comparator and an expectation pattern sequence when detecting a correspondence between the first output pattern sequence and the header pattern sequence.

Description

Proving installation and method of testing
Technical field
The present invention relates to a kind of proving installation and method of testing, its output pattern (pattern) and predetermined expected value pattern to a signal of being exported by electronic installation compares, to judge the good of this electronic installation.For the designated state of confirming by the reference of document to enroll, by the content of being put down in writing in the application case with reference to following note and enroll in the application's case, with a part as the record of the application's case.
The spy is willing to June 17 2004 2004-179857 applying date
The spy is willing to June 29 2004 2004-192195 applying date
The spy is willing to June 21 2004 2004-183067 applying date
The spy is willing to July 20 2004 2004-212234 applying date
Background technology
Proving installation comes a kind of device being tested as tested object (DUT:DeviceUnder Test) is tested according to test formula.Test formula comprises: each orders the order that proving installation should be carried out in each cycle; And the expected value pattern, it is used for comparing with the test pattern of exporting with respect to respectively holding of device being tested or with the output pattern that each end of device being tested is exported.Then, proving installation is docile and obedient the order that preface is read this test formula by memory body.Proving installation is read by memory body and is respectively ordered pairing test pattern, to export each end of device being tested to.The output pattern that this kind result is exported must be compared with the predetermined expected value pattern that should export of device being tested.
The test that usefulness is checked at the edge (margin) of enumerating the output signal of device being tested is with a kind of form as the test of device being tested.In this kind test, for example, the parameter of used thresholding (threshold) threshold voltage etc. changed when the sequential the when output signal of device being tested is taken into by this proving installation or this output signal were taken into, and make on the one hand the device being tested action, with to the test of using each parameter value pass through (pass) or fail (fail) carries out record.Then, as axes of coordinates, on the pairing coordinate of each parameter value, make a kind of figure that passes through (pass) or failure (fail) that uses the test of this parameter value with each parameter.This kind figure is called Shmoo figure.
Now, because the patent document of associated it be unclear that, therefore omit its record.
Summary of the invention
By device being tested, the periodicity till then being output to the pattern of exporting corresponding to this test pattern by test pattern input beginning can exist not specific situation or indefinite situation.Output pattern during the output of this kind device being tested is when comparing with the expected value pattern, proving installation detects predetermined title pattern (header pattern) that this device being tested exports and this proving installation and is preferably and possesses a kind of search (hunt) function, and its output pattern and a kind of expected value pattern to the comparison other that this title pattern was exported after specific cycle compares.
Therefore, if use a kind of proving installation that possesses above-mentioned function of search to examine to make Shmoo figure, then when proving installation is imported the output pattern of this comparison other, the parameter change of sequential (timing) in the time of need making input or threshold voltage etc.Yet, if these parameters are changed, can not correctly import above-mentioned title pattern itself, so can not detect unanimity between this output pattern and the expected value pattern or inconsistent.
If by function of search, then have different situations between sequential of being exported by output pattern row in the device being tested and the sequential when reading by memory body and exist with the suitable expected value pattern that these output pattern row are compared again.Therefore, in order suitably each pattern to be compared, expected value pattern row that sequential is different and output pattern row should become synchronously.
Again, by device being tested, the sequential the when output of then exporting pattern row begins has uncertain situation and takes place.Therefore, to device being tested export in the used method front that must consider these output pattern row when showing used predetermined title pattern be listed as.That is, if this method of use when detecting these title pattern row, then continues the output pattern row of output and must compare with expected value pattern row in this title pattern.Yet, because the reasons such as obstacle of device being tested, take place detecting the situation that has failure when a kind of and title pattern are listed as corresponding to output pattern row.At this moment, in the prior art reason that detects failure of title pattern row is resolved because of difficulty.
Again, in the previous proving installation, should support the obstacle of device being tested and resolve, can specify the comparison form at the scope place of the output pattern that becomes comparison other and expected value pattern.That is,, also needn't carry out detecting of obstacle and can proceed test even when output pattern and expected value pattern are inconsistent beyond the scope of form relatively.Yet, when relatively the scope of form is failed with detecting of external title pattern row, the information of this kind meaning is recorded in the wrong diary (log) and on the other hand if notify this user on the one hand, then the extraneous data of not wanting of tested object can be mixed mutually with the comparative result of tested object, so have the situation generation that obstacle is separated the factorial difficulty.
Therefore, the purpose of this invention is to provide a kind of proving installation that solves above-mentioned problem.
Foundation the 1st form of the present invention is to provide a kind of proving installation, this kind tested the proving installation of usefulness to the edge of the output signal that the output terminal of device being tested is exported, it comprises: the 1st signal comparator, in each other output map sample that its output pattern row of being exported by the output terminal of device being tested are contained, result after comparing according to a voltage that is in the output signal in predetermined the 1st gating (strobe) sequential and the 1st a predetermined threshold voltage to be obtaining the value of this output pattern, and therefore also obtains the 1st output pattern of being exported by output terminal and be listed as; The 2nd signal comparator, in each other output map sample that its output pattern row of being exported by the output terminal of device being tested are contained, result after comparing according to a voltage that is in the output signal in predetermined the 2nd gating (strobe) sequential and the 2nd a predetermined threshold voltage to be obtaining the value of this output pattern, and therefore also obtains the 2nd output pattern of being exported by output terminal and be listed as; Title pattern row detecting element, it detects: the 1st output pattern row are consistent with predetermined title pattern row; And the expected value comparing section, detecting the 1st output pattern row and title pattern row when consistent, the comparative result that the expected value pattern that the 2nd obtained output pattern row of the 2nd signal comparator and the 2nd output pattern are listed as is listed as is output.
Also can possess a kind of comparative result memory portion in addition, it is corresponding to the 2nd gating sequential and the 2nd threshold voltage, to remember the comparative result that the 2nd output pattern row and expected value pattern are listed as.
Also can possess in addition: the test control part, it is inferior that plural number is carried out in the test when it is output with the same output pattern row of title pattern row and with the same output pattern row of expected value pattern row making in the device being tested; And parameter modification portion, it makes 1 different value of test of one of them parameter modification Cheng Yudi in this two parameter of the 2nd gating sequential and the 2nd threshold voltage in the 2nd test.
The comparative result that the test control part also can be exported according to the expected value comparing section in each other test repeatedly makes that the 2nd output pattern row output is a kind of to be listed as the scope of corresponding to the 2nd gating sequential and the 2nd threshold voltage with the expected value pattern.
The 1st gating sequential also can be set different value mutually with the 2nd gating sequential and the 1st threshold voltage for at least one parameter in the 2nd threshold voltage.
Be listed as when consistent at the 1st output pattern row and title pattern, the expected value comparing section also can make the 1st output pattern row obtain back one after predetermined skew (offset) time the 2nd obtained output pattern row be output with the comparative result that the expected value pattern is listed as.
The 2nd output pattern row that should be listed as corresponding to the 1st output pattern row with the title pattern and should compare with expected value pattern row can also be the identical pattern row of being exported with same sequential by the output terminal of device being tested.
Foundation the 2nd form of the present invention is to provide a kind of proving installation, this kind tested the proving installation of usefulness to the edge of the output signal that the output terminal of device being tested is exported, it comprises: the test pattern efferent, and used test pattern row exported device being tested to when its title pattern row that output terminal of device being tested is scheduled to were exported; Signal comparator, in each other output map sample that its output pattern row of being exported by the output terminal of device being tested are contained, according to being in result after the voltage of the output signal in predetermined gating (strobe) sequential and a threshold voltage compare obtaining the value of this output pattern, and therefore also obtaining the output pattern of exporting by output terminal and be listed as; Title pattern row detecting element, it detects: the 1st obtained output pattern row of the 1st signal comparator are listed as consistent with the title pattern; Time delay obtaining section, its after test pattern begins to export, obtain the 1st consistent output pattern of a kind of and title pattern row be listed as be detected till the time time delay; Parameter modification portion, it is changed at least one parameter in gating sequential and the threshold voltage when obtaining above-mentioned time delay; The test control part, under its state when causing parameter modification by parameter modification portion, by the test pattern efferent to carry out the output of this test pattern row once again; And expected value comparing section, its output by test pattern row begins and once again by the skew of be scheduled to through the time point of above-mentioned time delay (offset) after the time, and the comparative result that the expected value pattern of the 2nd obtained output pattern row of signal comparator and the 2nd output pattern row is listed as is output.
Foundation the 3rd form of implementation of the present invention is to provide a kind of method of testing, used method of testing when the edge of the output signal that this kind exported the output terminal of device being tested is tested by proving installation, it comprises: the 1st signal comparison step, in each other output map sample that its output pattern row of being exported by the output terminal of device being tested are contained, result after comparing according to a voltage that is in the output signal in predetermined the 1st gating (strobe) sequential and the 1st a predetermined threshold voltage to be obtaining the value of this output pattern, and therefore also obtains the 1st output pattern of being exported by output terminal and be listed as; The 2nd signal comparison step, in each other output map sample that its output pattern row of being exported by the output terminal of device being tested are contained, result after comparing according to a voltage that is in the output signal in predetermined the 2nd gating (strobe) sequential and the 2nd a predetermined threshold voltage to be obtaining the value of this output pattern, and therefore also obtains the 2nd output pattern of being exported by output terminal and be listed as; Title pattern row detect step, and it detects: the 1st output pattern row are consistent with predetermined title pattern row; And the expected value comparison step, detecting the 1st output pattern row and title pattern row when consistent, the comparative result that the expected value pattern that the 2nd obtained output pattern row of the 2nd signal comparator and the 2nd output pattern are listed as is listed as is output.
Foundation the 4th form of implementation of the present invention is to provide a kind of method of testing, used method of testing when the edge of the output signal that this kind exported the output terminal of device being tested is tested by proving installation, it comprises: test pattern output step, and used test pattern row exported device being tested to when its title pattern row that output terminal of device being tested is scheduled to were exported; The signal comparison step, in each other output map sample that its output pattern row of being exported by the output terminal of device being tested are contained, according to being in result after the voltage of the output signal in predetermined gating (strobe) sequential and a threshold voltage compare obtaining the value of this output pattern, and therefore also obtaining the output pattern of exporting by output terminal and be listed as; Title pattern row detect step, and it detects: the 1st obtained output pattern row of signal comparison step are listed as consistent with the title pattern; Obtain step time delay, its after test pattern begins to export, obtain the 1st consistent output pattern of a kind of and title pattern row be listed as be detected till the time time delay; The parameter modification step, changed at least one parameter in gating sequential and threshold voltage when having obtained above-mentioned time delay; The test controlled step under its state when causing parameter modification by the parameter modification step, is exported step to carry out the output of these test pattern row once again by test pattern; And expected value comparison step, by the skew of be scheduled to through the time point of above-mentioned time delay (offset) after the time, the comparative results that the expected value pattern with the 2nd output pattern row of the 2nd obtained output pattern row of signal comparator is listed as were output when its output by test pattern row began once again.
Foundation the 5th form of the present invention is to provide a kind of proving installation, output pattern row that this kind foundation is exported in regular turn by the output terminal of device being tested and what should export therewith that the comparative result of the expected value pattern row that the pattern row compare judges device being tested very denys used proving installation, it comprises: sequential control portion, it carries out a plurality of orders that contained in the test formula of device being tested in regular turn, and by reading the executed pairing expected value pattern of respectively ordering in the memory body; Title pattern detecting element, " to be listed as the beginning that detects of corresponding to output pattern row with predetermined title pattern " used when detecting the initiation command executed in indication for it, and detect: whether one is listed as corresponding to output pattern with the title pattern is listed as by exporting in the device being tested; The expected value comparing section, it compares output pattern row and expected value pattern row; And the sequential adjustment part, it makes each other expected value pattern and the output pattern that should compare with this expected value pattern becomes synchronously and inputs in the expected value comparing section in one-period when being listed as corresponding to output pattern row and being detected with the title pattern.
Sequential control portion carries out each other order by the command execution pipeline (pipeline) that a plurality of steps (its have output pattern and expected value pattern are compared used comparison step) are constituted.When also can should being transfused in comparison step with the output pattern of expected value pattern comparison this in the sequential when the expected value pattern is imported when comparison step, the sequential adjustment part adjusts.
By sequential control portion, then end order when being performed in used the detecting of indication " title pattern row detect ends of a period ", obtained output pattern inputed in one-period in the expected value comparing section when sequential adjustment part also can make one to order a pairing expected value pattern and a command execution.
More comprise title pattern reservoir used when a plurality of title pattern row store.The performed order of sequential control portion comprises a kind of indication, and it points out that " choosing this title pattern that detects object row by title pattern reservoir " is with as detecting initiation command.With regard to detect the selected title pattern row of initiation command according to this with regard to, this title pattern detecting element also can detect: whether the output pattern row consistent with these title pattern row are exported by device being tested.
Also can possess error notification portion in addition, by title pattern row be scheduled to when beginning to detect during in, be listed as when undetected at the output pattern consistent with title pattern row, this error notification portion can notify " this title pattern be listed as detect fail ".
Foundation the 6th form of implementation of the present invention is to provide a kind of proving installation, it is according to the output pattern row of being exported in regular turn by the output terminal of device being tested and should export the comparative result that pattern is listed as the expected value pattern row of comparing therewith, to judge the good of this device being tested, this method of testing comprises: the sequential control step, it carries out a plurality of orders that contained in the test formula of device being tested in regular turn, by reading the executed pairing expected value pattern of respectively ordering in the memory body; The title pattern detects step, its point out " being listed as the beginning that detects of corresponding to output pattern row " with predetermined title pattern used detect the initiation command executed time, detect: whether the output pattern consistent with these title pattern row is listed as is exported by device being tested; The expected value comparison step, it compares output pattern row and expected value pattern row; And sequential set-up procedure, it makes each other expected value pattern and the output pattern that should compare with this expected value pattern becomes synchronously and compares in the expected value comparison step in one-period when being listed as corresponding to output pattern row and being detected with the title pattern.
Foundation the 7th form of the present invention is to provide a kind of proving installation, output pattern row that this kind foundation is exported in regular turn by the output terminal of device being tested and what should export therewith that the comparative result of the expected value pattern row that the pattern row compare judges device being tested very denys used proving installation: title pattern detecting element, it detects: whether a kind of with predetermined title pattern is listed as corresponding to output pattern row and is exported by device being tested; The expected value comparing section, it continues one to be listed as in the corresponding to output pattern row with this title pattern output pattern row and this expected value pattern row of being exported by device being tested are compared at this when detecting a kind of and this title pattern and be listed as corresponding to output pattern row; And selection write section, it is when being listed as corresponding to output pattern row and being detected with this title pattern, the resulting comparative result of expected value comparing section is stored in the inefficacy memory body, be listed as when undetected being listed as corresponding to output pattern with this title pattern, the output pattern row of device being tested are stored in the inefficacy memory body.
Again, more can possess command execution portion, it carries out a plurality of orders in regular turn in each command cycle, these orders contain a kind of pointing out " title pattern row detect beginning " used detect initiation command.When detecting the initiation command executed, above-mentioned selection write section begins to carry out a kind of output pattern and writes processing, its output pattern of in regular turn device being tested being exported writes in this inefficacy memory body, when being listed as corresponding to output pattern row and being detected with this title pattern, also can stop above-mentioned output pattern and write processing, begin to carry out a kind of processing the resulting comparative result of expected value comparing section is stored in the inefficacy memory body in regular turn.
Again, be listed as when undetected being listed as corresponding to output pattern with this title pattern, after detecting initiation command and beginning to carry out through in during till the predetermined command cycle number, the output pattern row that this selection write section also can be exported device being tested are stored in the inefficacy memory body, and the output pattern row of having exported are not stored in the inefficacy memory body.
Foundation the 8th form of the present invention is to provide a kind of method of testing, output pattern row that this kind foundation is exported in regular turn by the output terminal of device being tested and what should export therewith that the comparative result of the expected value pattern row that the pattern row compare judges device being tested very denys used method of testing, it comprises: the title pattern detects step, and it detects: whether a kind of with predetermined title pattern is listed as corresponding to output pattern row and is exported by device being tested; The expected value comparison step, when detecting a kind of and this title pattern and be listed as corresponding to output pattern row, continue one to be listed as in the corresponding to output pattern row with this title pattern output pattern row and this expected value pattern row of being exported by device being tested are compared at this; And selection write step, when being listed as corresponding to output pattern row and being detected with this title pattern, the resulting comparative result of expected value comparison step is stored in the inefficacy memory body, be listed as when undetected being listed as corresponding to output pattern with this title pattern, the output pattern row of device being tested are stored in the inefficacy memory body.
Foundation the 9th form of the present invention is to provide a kind of proving installation, output pattern row that this kind foundation is exported in regular turn by the output terminal of device being tested and what should export therewith that the comparative result of the expected value pattern row that the pattern row compare judges device being tested very denys used proving installation, it comprises: sequential control portion, it carries out a plurality of orders that contained in the test formula of device being tested in regular turn, and by reading the executed pairing expected value pattern of respectively ordering in the memory body; Title pattern detecting element, " to be listed as the beginning that detects of corresponding to output pattern row with predetermined title pattern " used when detecting the initiation command executed in indication for it, detects " whether one is listed as corresponding to output pattern with the title pattern is listed as by exporting in the device being tested "; The expected value comparing section when being listed as corresponding to output pattern row and being detected with the title pattern, continues to compare being listed as in the corresponding to output pattern row output pattern row exported by device being tested and above-mentioned expected value pattern be listed as with the title pattern; Title detects the scope configuration part, and it is set the effective range that is listed as detecting of corresponding to output pattern row and becomes when effective with the title pattern in a plurality of orders; And false judgment notice portion, its detect initiation command begin to carry out until make at the end used the detecting of detecting of title pattern row end order till when being performed during in, if being listed as corresponding to output pattern with the title pattern is listed as when undetected, then with detect the order of initiation command till detect the order that ends be in effective range as condition a kind of error message that sends a notice, fail to show detecting of these title pattern row.
Again, more can possess a kind of title and detect scope and set working storage, it is storing the beginning address at address place of order used when effective range is begun and the end of a period address that makes the address place of the at the end used order of effective range.Title detects the scope configuration part by making a kind of title that is stored in detect scope and set value in the working storage to set a kind of effective range.False judgment notice portion also can detect scope at title and set beginning address stored in the working storage and title and detect scope and set between the end of a period address stored in the working storage to detect initiation command or to detect the order that ends and be performed as condition a kind of error message that sends a notice, and fails to show detecting of these title pattern row.
Again, more can possess a kind of relatively effective range configuration part, it sets a kind of relatively form corresponding at least one order, this relatively form demonstration " becoming more effectively of this pairing expected value pattern of order and this output pattern ".By detect initiation command till detecting the order that ends during at least 1 order in when setting a kind of relatively form, this title detect the scope configuration part also can this detect initiation command till detect the order that ends during in detecting of title pattern row become effectively.
Foundation the 10th form of implementation of the present invention is to provide a kind of method of testing, it is according to the output pattern row of being exported in regular turn by the output terminal of device being tested and should export the comparative result that pattern is listed as the expected value pattern row of comparing therewith, to judge the good of this device being tested, this method of testing comprises: the sequential control step, it carries out a plurality of orders that contained in the test formula of device being tested in regular turn, by reading the executed pairing expected value pattern of respectively ordering in the memory body; The title pattern detects step, its point out " being listed as the beginning that detects of corresponding to output pattern row " with predetermined title pattern used detect the initiation command executed time detect: one with these title pattern row whether consistent output pattern is listed as and is exported by device being tested; The expected value comparison step when it is detected at the output pattern row consistent with title pattern row, continues in the output pattern row consistent with title pattern row output pattern row and this expected value pattern row of being exported by device being tested to be compared; Title detects scope and sets step, and it is set the effective range that detecting of making in a plurality of orders that the output pattern consistent with title pattern row be listed as becomes when effective; And false judgment notifying process, its detect initiation command begin to carry out to make detecting of title pattern row end used detecting end order till being performed during in, when if the output pattern row consistent with title pattern row do not detect, then with " detecting initiation command to the order that detects till the order that ends is in effective range " as condition, notifying a kind of error message, it shows that detecting of these title pattern row fail.
Again, above-mentioned brief summary of the invention is not enumerated the whole of essential feature of the present invention, and the following bit pattern (sub-combination) of these syndromes also belongs to scope of the present invention.
The effect of invention
According to the present invention, the edge of the output signal that can export device being tested is suitably tested.Again, even when the output timing of output pattern row is uncertain, the output of output pattern row still can with the reading of expected value pattern row synchronously to compare.Again, show when the used title pattern of the beginning of this test is undetected, also can easily investigate its reason.Also can suitably set detecting of title pattern row and become scope when effective again.
For above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, preferred embodiment cited below particularly, and cooperate appended graphicly, be described in detail below.
Description of drawings
Fig. 1 is the pie graph of the proving installation 10 of embodiment 1.
Fig. 2 is comparer 180 under the embodiment 1 and the formation of searching for comparing section 148.
Fig. 3 is the test action figure in the proving installation 10 under the embodiment 1.
Fig. 4 is the formation of the affiliated proving installation 10 of the variation of embodiment 1.
Fig. 5 is the formation of affiliated comparer 180 of the variation of embodiment 1 and search comparing section 148.
Fig. 6 is the test action in the affiliated proving installation 10 of the variation of embodiment 1.
Fig. 7 is the pie graph of the proving installation 10 of embodiment 2.
Fig. 8 is the formation of the search comparing section 148 under the embodiment 2.
Fig. 9 is the sequential chart by the processing of the search comparing sections 148 under the embodiment 2 when showing that title pattern row are detected.
Figure 10 is the pie graph of the proving installation 10 of embodiment 3.
Figure 11 is the formation of the search comparing section 148 under the embodiment 3.
Figure 12 is that expected value pattern row and the output pattern under the embodiment 3 is listed as the sequential chart of handling when comparing.
Figure 13 is the pie graph of the proving installation 10 of embodiment 4.
Figure 14 is the formation of the search comparing section 148 under the embodiment 4.
Figure 15 is the formation of the test control device 195 under the embodiment 4.
Figure 16 is an example of the search form under the embodiment 4.
Figure 17 is an example of the comparison form under the embodiment 4.
10: proving installation 100: device being tested (DUT)
102: memory main body 104: the order memory body
106: test pattern memory body 108: expected value pattern memory body
110: digital type is caught (capture) memory body 112: central pattern control part
114: pattern tabular (list) memory body 116: vector produces control part
118: set pattern memory body 120: control part is caught by central authorities
122: pattern is memory body 130 as a result: the passage square
140: passage pattern generating unit 142: order pattern generating unit
144: formatting controls portion 146: order pattern generating unit
148: search comparing section 150: lost efficacy and catch control part
152: inefficacy capture memory body 160: timing sequence generating portion
170: driver 180: comparer
190: test control device 192: the test control part
194: parameter modification portion 195: test control device
196: time delay obtaining section 200a～b: voltage comparator
210a～b: delay element 220a～b: flip-flop (FF)
230a～b: search section 240a～b: aligned portions
250a～b: comparing section 260,270: switch
300: title pattern row 305,310: comparison other pattern row
320: expected value pattern row 330: comparative result
500a～b: test pattern row 510a～b: set pattern row
520a～b: comparison other pattern row 530a～b: expected value pattern row
600: title pattern reservoir 610: title pattern detecting element
620: aligned portions 630: the expected value comparing section
640: sequential adjustment part 650: selector switch
660: error notification portion 700: title pattern detecting element
710: aligned portions 720: the expected value comparing section
730: select write section 800: title pattern detecting element
810: expected value comparing section 820: title detects scope and sets working storage
830: relatively effective range is set working storage 840: false judgment notice portion
850: selector switch 900: title detects the scope configuration part
910: compare the effective range configuration part
Embodiment
Below will the present invention be described, but following form of implementation not the invention under being used for limiting in every claim according to form of implementation of the present invention.Again, illustrated combination of features whole are not limited to the solution essential person of institute of the present invention in each form of implementation.
(embodiment 1)
Fig. 1 is the pie graph of the proving installation 10 of embodiment 1.Proving installation 10 can be tested and has a marginal test function a kind of DUT (device being tested) 100 that possesses one or more terminals, and the edge of the output signal that it can be exported the output terminal of device being tested is tested.This proving installation 10 possesses: memory main body 102, central pattern control part 112, a plurality of passage square 130 and test control device 190.
Memory main body 102 is storing the test formula of DUT100 and is writing down this test formula the output pattern that " DUT100 as a result " after carrying out exported.Memory main body 102 possesses: order memory body 104, a plurality of test pattern memory body 106, a plurality of expected value pattern memory body 108 and digital type capture memory body 110.
Order memory body 104 is storing each order that is contained in this test formula.In a plurality of test pattern memory bodys 106 each all is provided with corresponding to each terminal of DUT100, and corresponding to each order used test pattern is listed as to be stored in respectively in each terminal.Therefore, this test pattern is listed in and contains a kind of a plurality of test patterns that should export in regular turn the terminal of DUT100 in the command cycle.For example, proving installation 10 can produce the signal of 32 bits and when DUT100 export in each cycle of 1 order, and then the test pattern formed with pairing 32 test patterns of the signal that stores 32 bits of being exported in 1 command cycle corresponding to each order of test pattern memory body 106 is listed as.
In a plurality of expected value pattern memory bodys 108 each all is provided with corresponding to each terminal of DUT100, and corresponding to each order used expected value pattern is listed as to be stored in respectively in each terminal.Therefore, this expected value pattern is listed in and contains a plurality of expected value patterns that should compare in regular turn with a plurality of output patterns that the terminal of DUT100 is exported in regular turn in the command cycle.Digital type capture memory body 110 is writing down the output pattern that DUT100 exported as a result after this test formula is carried out.
In above-mentioned description, order memory body 104, a plurality of test pattern memory bodys 106, a plurality of expected value pattern memory bodys 108 and/or digital type capture memory body 110 also can design to be divided into and constitute each used other memory body module of memory main body 102, also can be designed to the different memory bodys zone in the same memory body module.
Central authorities' pattern control part 112 is connected to memory main body 102 and a plurality of passage square 130, with each terminal of carrying out DUT100 common processing.Central authorities' pattern control part 112 has: pattern tabular memory body 114, vector produce control part 116, central authorities' seizure control part 120 and pattern memory body 122 as a result.
Pattern tabular memory body 114 is storing with regard to customary incident of the master of test formula (routine) and time customary incident: beginning/end of a period address that should the routine incident in the order memory body 104, the beginning address of the test pattern in the test pattern memory body 106, beginning address of the expected value pattern in the expected value pattern memory body 108 or the like.The vectorial control part 116 that produces is used as order pattern generating unit 146 and is used as sequential control portion affiliated among the present invention simultaneously on function, or as the command execution portion among the present invention.Then, vector produces control part 116 and carry out the order that is contained in the test formula of DUT100 in regular turn in each command cycle.More specifically, vector produces control part 116 and is read in regular turn by the beginning address by pattern tabular memory body 114 in each customary incident and begin respectively ordering and be docile and obedient preface and carry out till the end of a period address.
Central authorities catch control part 120 and accept each the good not result of determination of each terminal of DUT100 by each passage square 130, to add up the good not result of determination of each DUT100 in each customary incident.Pattern memory body 122 is as a result storing the good not result of determination of each DUT100 in each customary incident.
In a plurality of passage squares 130 each all is provided with corresponding to each terminal of DUT100.For example, passage square 130 is provided with corresponding to a certain terminal of DUT100, and passage square 130b is provided with corresponding to the another terminal of DUT100.Each other passage square 130a, b then are generically and collectively referred to as " passage square 130 " owing to adopt identical formation generally mutually except following difference.Each passage square 130 has passage pattern generating unit 140, timing sequence generating portion 160, driver 170 and comparer 180.That is, for example, passage square 130a has passage pattern generating unit 140a, the 160a of timing sequence generating portion, driver 170a and comparer 180a.
Passage pattern generating unit 140 produces the test pattern row or the expected value pattern row of the test usefulness of this terminal, and carries out the comparison of output pattern row and the expected value pattern row of DUT100.Passage pattern generating unit 140 comprises: control part 150, inefficacy capture memory body 152 are caught in set pattern memory body 118, order pattern generating unit 142, formatting controls portion 144, order pattern generating unit 146, search comparing section 148, inefficacy.Promptly, for example, passage pattern generating unit 140a comprises: control part 150a, inefficacy capture memory body 152a are caught in set pattern memory body 118a, order pattern generating unit 142a, the 144a of formatting controls portion, order pattern generating unit 146a, search comparing section 148a, inefficacy.
Predefined set pattern is listed as set pattern memory body 118 in test pattern row and/or the expected value pattern row (below be generically and collectively referred to as " pattern row ") to store corresponding to the set pattern identification information of set pattern row identification usefulness.Therefore, test pattern memory body 106 and/or expected value pattern memory body 108 are storing the set pattern identification information of these set pattern row to replace these pattern row itself with regard to the pattern row identical with set pattern row.
The beginning address of the test pattern row that order pattern generating unit 142 should be exported by 116 receptions of vector generation control part corresponding to the customary incident that must carry out.Then, order pattern generating unit 142 begins address corresponding to each command cycle by this and begins to read this test pattern row by test pattern memory body 106 in regular turn, and exports formatting controls portion 144 in regular turn to.This formatting controls portion 144 is used as driver 170 and is used as test pattern efferent of the present invention simultaneously on function, and makes the test pattern row convert the form of these driver 170 control usefulness to.
Order pattern generating unit 146 produces control part 116 as vector and simultaneously as sequential control of the present invention portion on function.Then, order pattern generating unit 146 produces the beginning address that control part 116 receives these expected value pattern row corresponding to the customary incident that must carry out by vector.Then, order pattern generating unit 146 begins address corresponding to each command cycle by this and begins and read this expected value pattern in regular turn by expected value pattern memory body 108, to export this search comparing section 148 in regular turn to and the seizure control part 150 that lost efficacy.
Search comparing section 148 compares with the input output pattern that DUT100 was exported row and with expected value pattern row by comparer 180.Therefore, with regard to regard to the uncertain output pattern row of the sequential that DUT100 exported, search comparing section 148 also can have a kind of function of search being output as with the specific title pattern row that come by DUT100 under the condition, to begin to carry out comparisons a kind of and these expected value pattern row.At this moment, search comparing section 148 also can as under the condition, begin to carry out detecting of title pattern row with " the required initiation command that detects is performed when being listed as detecting of corresponding to output pattern row and beginning to carry out with this title pattern ".By function of search, then search for comparing section 148 for example begin to be detected to title pattern row according to detecting of title pattern row till the needed time, the sequential when comparing so that output pattern row and expected value pattern are listed as is adjusted.
Losing efficacy and catch control part 150 by the output pattern row of searching for comparing section 148 reception DUT100 and the unanimity/inconsistent information of expected value pattern row, denys result of determination to produce the good of DUT100 relevant with this terminal.Inefficacy capture memory body 152 is examples of the comparative result memory portion under the present invention and is storing the inefficacy information that it contains a kind of result of the search processing of carrying out with search comparing section 148 or value of the inconsistent output pattern of expected value etc. of becoming.
Required sequential and produce this comparer 180 required sequential when being taken into the output pattern of DUT100 when timing sequence generating portion 160 produces each test pattern in these test pattern row of output of these drivers 170.Driver 170 on function as this formatting controls portion 144 and simultaneously as the test pattern efferent among the present invention, in the sequential specified, make each test pattern of having exported export DUT100 to by the formatting controls portions 144 in the passage pattern generating unit 140 by timing sequence generating portion 160.Comparer 180 is obtained the output pattern of being exported by the terminal of DUT100 in the specified sequential of timing sequence generating portion 160, to be supplied in the search comparing section 148 sum digit formula capture memory bodies 110 in the passage square 130.
Again, passage pattern generating unit 140 also can adopt a kind of formation that possesses common suitable pattern generating unit, it has the function of above-mentioned order pattern generating unit 142 and order pattern generating unit 146, to replace the formation that is provided with order pattern generating unit 142 and order pattern generating unit 146 severally as implied above.
Test control device 190 has test control part 192 and a parameter modification portion 194 and this proving installation 10 of may command.In marginal test, test control part 192 these vectors of control produce control part 116, repeatedly to test, the output pattern of title pattern and comparison other are exported among the DUT100.Then, the test result that this test control part 192 is obtained repeatedly by inefficacy capture memory body 152 becomes the marginal test result of the output signal of DUT100 with the user who exports this proving installation 10 to.In each test that control part 192 carried out by test, parameter modification portion 194 is changed the parameter that is taken into sequential or threshold voltage etc. of the output signal in the test.
Fig. 2 is comparer 180 under the embodiment 1 and the formation of searching for comparing section 148.In the present embodiment, marginal test for 1 pairing output signal of output terminal of carrying out DUT100, then in the detecting of title pattern, must use a kind of the 1st passage square 130a, when consistent the detecting of output pattern and expected value pattern, must use a kind of the 2nd passage square 130b with a comparer 180b and a search comparing section 148b with a comparer 180a and a search comparing section 148a.
Comparer 180a comprises voltage comparator 200a, delay element 210a and flip-flop 220a.In each other output map sample that is contained in the output pattern row of being exported by the output terminal of DUT100, voltage comparator 200a compares the voltage and the 1st predetermined threshold voltage VT1 of output signal.More specifically, voltage comparator 200a when the voltage of output signal surpasses VT1 output logic value " 1 " and when not surpassing output logic value " 0 " with value as this output pattern.Delay element 210a makes the specified sequential of the 160a of timing sequence generating portion in the 1st passage square 130 only postpone the specified retardation of this parameter modification portion 194, with the gating signal of the 1st predetermined gating sequential in the cycle that produces this output signal.Flip-flop 220a is taken into the output signal of this voltage comparator 200a in the 1st gating sequential.Therefore, in each other output map sample that in output pattern row, is contained, flip-flop 220a according to the comparative result of the voltage of the output signal that is in the 1st gating sequential and the 1st threshold voltage to obtain the value of this output pattern.By above-mentioned formation, then comparer 180a can obtain the 1st output pattern row of being exported by output terminal.
Comparer 180b comprises voltage comparator 200b, delay element 210b and flip-flop 220b.Voltage comparator 200b adopts a kind of and about identical functions of voltage comparator 200a and formation.Voltage comparator 200b is connected to an output terminal identical with the output terminal of the DUT100 that is connected to voltage comparator 200a, in each other output map sample that is contained in the output pattern row of being exported by this output terminal, voltage comparator 200b compares the voltage and the 2nd predetermined threshold voltage VT2 of this output signal.Delay element 210b adopts a kind of and about identical functions of delay element 210a and formation, with the gating signal of the 2nd predetermined gating sequential in the cycle that produces this output signal.Flip-flop 220b adopts a kind of and about identical functions of flip-flop 220a and formation, and is taken into the output signal of this voltage comparator 200b in the 2nd gating sequential.Therefore, in each other output map sample that in output pattern row, is contained, flip-flop 220b according to the comparative result of the voltage of the output signal that is in the 2nd gating sequential and the 2nd threshold voltage to obtain the value of this output pattern.By above-mentioned formation, then comparer 180b can obtain the 2nd output pattern row of being exported by output terminal.
Search comparing section 148a comprises search section 230a, aligned portions 240a and comparing section 250a.Search section 230a detects: consistent with the title pattern row at the pattern row place of being scheduled to by the 1st output pattern row that comparer 180a is obtained.Therefore, the pattern that search section 230a uses one or more title patterns to be constituted is listed as to be listed as the title pattern, and it can be compared with the 1st output pattern row that pattern constituted by one or more outputs.Though aligned portions 240a and comparing section 250a adopt a kind of respectively with aligned portions 240b and comparing section 250b identical functions and formation, in marginal test, use.
Search comparing section 148b comprises search section 230b, aligned portions 240b, comparing section 250b, switch 260 and switch 270.Though search section 230b adopts a kind of and search section 230a identical functions and formation, in marginal test, use.The 2nd output pattern row that aligned portions 240b is exported flip-flop 220b can become synchronously with a kind of expected value pattern row that are supplied among the comparing section 250b by the order pattern generating unit in the 2nd passage square 130.More specifically, it is a kind of by the specified periodicity of the search section 230 that is connected to this aligned portions 240 that aligned portions 240b only postpones the 2nd output pattern row so that the 2nd output pattern row can with expected value pattern row synchronously.Be listed as when consistent detecting the 1st output pattern row and title pattern, comparing section 250b compares the expected value pattern row that the 2nd obtained output pattern of this comparer 180b is listed as and is listed as by the 2nd output pattern that order pattern generating unit 146 is supplied with, and makes comparative result output.
Switch 260 makes the side among search section 230a and the search section 230b be connected to aligned portions 240b.Switch 270 makes the side among search section 230a and the search section 230b be connected to comparing section 250b.Therefore, when using this 2nd passage square 130 with search comparing section 148b independently, switch 260 is connected this search section 230b respectively with switch 270, aligned portions 240b and comparing section 250b.On the other hand, the 1st passage square 130 and the 2nd passage square 130 become one group when carrying out marginal test, and then switch 260 connects this search section 230a respectively, aligned portions 240b and comparing section 250b.
Fig. 3 is the test action figure in the proving installation 10 under the embodiment 1.
In the marginal test in the time can obtaining Shmoo figure, test control part 192 is repeatedly tested, and each test all makes output pattern row and with expected value pattern row identical output pattern row identical with title pattern row export among the DUT100.More specifically, test control part 192 produces control part 116 repeatedly to carry out the test formula of this test by vector.
Parameter modification portion 194 makes the 2nd gating sequential and the change of the 2nd threshold voltage that sets among the comparer 180b in regular turn in each other test of carrying out repeatedly.That is, the 1st test back is when carrying out the 2nd test, and parameter modification portion 194 makes the 2nd gating sequential and at least a parameter modification in the 2nd threshold voltage become a kind of in the 2nd test and tests different values with the 1st.Value when on the other hand, parameter modification portion 194 makes among the comparer 180a the 1st gating sequential of setting usefulness and the output signal that the 1st threshold voltage maintains DUT100 correctly be taken in each test.That is, parameter modification portion 194 is set in a kind of ideal value that method determined by DUT100 with the 1st gating sequential and the 1st threshold voltage.
In each test, vector produces control part 116, order pattern generating unit 142,170 couples of DUT100 of formatting controls portion 144 and driver export a kind of test pattern row, and it is output a kind of output pattern row identical with title pattern row and a kind of output pattern row identical with expected value pattern row.DUT100 accepts this test pattern and is listed as to export a kind of title pattern row 300 and a kind of comparison other pattern row 305 that should compare with expected value pattern row.
Comparer 180a uses the 1st a gating sequential and the 1st threshold voltage of having set ideal value for, output pattern D0, the D1 that obtains DUT100 in regular turn and exported ... D10 and be output into the 1st output pattern series.Again, comparer 180b uses the 2nd gating sequential and the 2nd threshold voltage, output pattern D0, the D1 that obtains DUT100 in regular turn and exported ... D10 and be output into the 2nd output pattern series.Therefore, the 1st gating sequential, the 2nd gating sequential and the 1st threshold voltage, at least a in these 4 kinds of parameters of the 2nd threshold voltage is to be configured to different value mutually as purpose with marginal test.Therefore, by the setting of the 2nd gating sequential and the 2nd threshold voltage, the comparer 180b output pattern that may obtain DUT100 mistakenly and exported then.So resulting situation shows when making wrong the generation, then the obtained output pattern of comparer 180b must be shown as D0 ', D1 ' ... D10 '.
In this example, must set title pattern row D1, D2, D3 among the search section 230a.
Therefore, when exporting the 1st output pattern row D1, D2, D3 as if comparer 180a, then search section 230a detects " the 1st output pattern row are consistent with title pattern row ".Then, to make the series of the 2nd output pattern that comparer 180b exported become the expected value pattern row of being supplied with order pattern generating unit 146 320 synchronous for aligned portions 240b.
Secondly, ED5, ED6, the ED7 at expected value pattern row 320 places that the 2nd output data row D5, D6, D7 and the 2nd output data that comparing section 250b obtains corresponding to comparison other pattern row 305 this comparer 180b is listed as compare, to export a kind of comparative result 330, it comprises unanimity (T:True) or inconsistent (F:False) of each pattern in each pattern.Therefore, to classify the shift time that ends as be to be specified in advance by test procedure institute until obtaining these comparison other pattern row 305 pairing the 2nd output patterns by obtaining pairing the 1st output patterns row beginning of title pattern row 300.Then, when the 1st output pattern row and title pattern row 300 were consistent, comparing section 250b made by obtaining the 1st output pattern row beginning after a predetermined shift time the obtained the 2nd to export the comparison other pattern row 310 at pattern row place and the comparative result of expected value pattern row 320 is output.
Catch control part 150b to be supplied in the inefficacy capture memory body 152 in the 2nd passage square 130 by the comparative result that comparing section 250b is obtained via the inefficacy in the 2nd passage square 130.Then, inefficacy capture memory body 152 is exported the comparative result that pattern is listed as and the expected value pattern is listed as corresponding to the 2nd gating sequential and the 2nd threshold voltage to remember the 2nd.
The 2nd gating sequential and/or the 2nd threshold voltage are changed, and repeatedly to carry out the test shown in above, consequently the pairing comparative result of each setting value of the 2nd gating sequential and the 2nd threshold voltage can be stored among the inefficacy capture memory body 152b.Test control part 192 is obtained the comparative result that this comparing section 250b is exported by inefficacy capture memory body 152b in each test of repeatedly test, and according to this comparative result the user of this proving installation 10 is exported the 2nd output pattern row and expected value pattern and be listed as the 2nd gating sequential that becomes when consistent and the scope of the 2nd threshold voltage.At this moment, test control part 192 also can show that out of the ordinary relevant with the 2nd threshold voltage with the 2nd gating sequential Shmoo that passes through/fail to have drawn schemes to the user.
According to the proving installation 10 shown in above, can use suitable gating sequential and threshold voltage detecting the title pattern on the one hand, and gating sequential and threshold voltage are changed, whether correctly obtain this output signal with test.
Again, in above-mentioned description, title pattern row 300, comparison other pattern row 305, comparison other pattern row 310 and expected value pattern row 320 also can comprise multiple pattern, but also can only be constituted rather than be made of multiple pattern by single pattern.
Should can also be the same pattern row of being exported with identical sequential by the output terminal of DUT100 with the 1st output pattern row of title pattern row 300 unanimities and the 2nd comparison other pattern row 305 of exporting pattern row place that should compare with comparative result 330 again.The expected value pattern row that detect and undertaken by comparing section 250b of the title pattern row that undertaken by search section 230a at this moment, relatively be to carry out with parallel mode.Comparative result when then, comparing section 250b makes the title pattern be listed as the time point that is detected is stored among the inefficacy capture memory body 152b.
Fig. 4 is the formation of the affiliated proving installation 10 of the variation of embodiment 1.The member that symbol is identical with Fig. 1 among Fig. 4 is because the function or the formation that are possessed are approximately identical with Fig. 1, then below all no longer explanations except difference.Again, passage square 130a, the b shown in Fig. 1 ... owing to have about identical functions mutually, then these passage squares are generically and collectively referred to as passage square 130 in this example.
Proving installation 10 under in this variation uses 1 passage square 130, with the marginal test of 1 pairing output signal of output terminal of carrying out DUT100.In order to realize this kind marginal test, then searching for comparing section 148, to receive a kind of test formula that made by order pattern generating unit 142 be the sequential that the output of the test pattern of benchmark begins, and obtain a kind of output by this test pattern in advance and begin to be listed as time delay by till obtaining the time until the title pattern.Then, when marginal test, search comparing section 148 is used this time delay, and the sequential when being output so that this comparison other pattern is listed as is particularly limited.
Fig. 5 is the formation of affiliated comparer 180 of the variation of embodiment 1 and search comparing section 148.Among Fig. 5, the member that symbol is identical with Fig. 2 is identical with Fig. 2 haply with formation owing to the function that is had, then following explanation no longer in addition except difference.
Comparer 180 adopts comparer 180a/b identical functions and the formation shown in a kind of and Fig. 2.Search comparing section 148 comprises search section 230, aligned portions 240, comparing section 250 and time delay obtaining section 196.Search section 230, the function that aligned portions 240 and comparing section 250 are adopted and constituting respectively and the search section 230a/b shown in Fig. 2, aligned portions 240a/b and comparing section 250a/b are identical.
Time delay, obtaining section 196 was in order to measure above-mentioned time delay when carrying out this test formula, and the test pattern output that must be received and a kind ofly be " having made test formula is that the output of the test pattern of benchmark begins " by order pattern generating unit 142 on meaning begins notice.Again, time delay obtaining section 196 to receive a kind of by search section 230 be that the title pattern of " it is consistent with title pattern row having detected these comparer 180 obtained output patterns row " detects notice on meaning.Then, begin to notify sequential after being received and title pattern to detect sequential after notice has been received according to the output of this test pattern, time delay obtaining section 196 the output of this test pattern begins after, obtain a kind of used output pattern when consistent with title pattern row is listed as be detected till the time time delay and stored.
Again, in order to carry out marginal test, when then the output of this test pattern began in time delay obtaining section 196, must receive a kind of once again by order pattern generating unit 142 be that the test pattern output of " output of test pattern begins " begins notice on meaning.Then, time delay obtaining section 196 according to this test pattern output begin to notify after being received sequential and should time delay, sequential when being output so that this comparison other pattern is listed as is particularly limited, and in comparing section 250 " comparisons of these comparison other pattern row and expected value pattern row " is indicated.
Fig. 6 is the test action in the affiliated proving installation 10 of the variation of embodiment 1.
At first, in order to calculate above-mentioned time delay, the indication that proving installation 10 comes according to this test control part 192 with carry out a kind of in marginal test employed test formula.Gating sequential and threshold voltage when at this moment, parameter modification portion 194 makes the output signal that can suitably obtain DUT100 are set in the comparer 180.
If produce control part 116 and order pattern generating unit 142 is carried out above-mentioned test formula by vector, used test pattern row 500a exported DUT100 to when then formatting controls portion 144 and driver 170 made and export set pattern row 510a by the output terminal of DUT100.Time delay, obtaining section 196 began to notify by test pattern output so that receive the sequential that a kind of output that has made these test pattern row 500a begins by order pattern generating unit 142.Search section 230 is if detect the obtained output patterns row of this comparer 180 when consistent with set pattern row 510a, then by the title pattern detect notify this time delay obtaining section 196.The output that obtains these test pattern row 500a in the sequential after sequential after this time delay, obtaining section 196 outputs by test pattern row 500a began and set pattern row 510a have detected begin the back until the corresponding to output pattern of a kind of and set pattern row 510a be listed as be detected till the time time delay.
Under the acquired situation of TD time delay, parameter modification portion 194 is changed at least a parameter in gating sequential and these two kinds of parameters of threshold voltage.That is, for example, after the execution of the test formula of test pattern row 500a output usefulness had ended, parameter modification portion 194 also can change above-mentioned parameter.
Secondly, in the state after parameter modification portion 194 has made parameter modification, 192 pairs of test control parts should produce control part 116 a kind of test formulas of indication so that carry out once again by vector.Therefore, this test control part 192 by formatting controls portion 144 and driver 170 to carry out the output of these test pattern row once again.Obtaining section 196 received the output of this test pattern again by order pattern generating unit 142 and began notice picking up counting time delay, and waited for by DUT100 to obtain these comparison other pattern row 520b.More specifically, time delay, obtaining section 196 needed owing to these test pattern row 500b begins to export once again by beginning through the time point after this time delay TD, to wait for the arrival of the sequential behind the preassigned shift time TO.This kind shift time TO a kind ofly is output the time of beginning between till comparison other pattern row 520a or 520b are output by set pattern row 510a or 510b.Then, time delay, obtaining section 196 needed " by the comparison that begins this comparison other pattern row 520b and expected value pattern row 530b after this shift time TO through this time delay of TD time point afterwards " indicated owing to these test pattern row 500b begins output once again.Comparing section 250 receives these kinds indication and begins once again to export and by beginning to make after this shift time TO the comparative result of the expected value pattern row 530b of obtained comparison other pattern row 520b of comparer 180 and comparison other pattern row 520b to be output through the time point after this time delay TD at these test pattern row 500b.
According to the proving installation 10 of this variation, at first, use suitable gating sequential and threshold voltage, TD time delay when beginning to export till obtaining this set pattern row 510a with these test pattern row of instrumentation 500a.Therefore, even can not detect this set pattern row 510b in the marginal test, then according to instrumentation time delay TD and the shift time TO that has been scheduled to still can the sequential when obtaining these comparison other pattern row 520b be particularly limited.
(embodiment 2)
Fig. 7 is the pie graph of the proving installation 10 of embodiment 2.Proving installation 10 in this example also can not possess the set pattern memory body 118 in the proving installation 10 shown in Fig. 1 etc.With regard to other formation, have the member of the symbol identical owing to possess a kind of and rough identical functions of Fig. 1 or formation with Fig. 1, therefore following except difference other explanation will omit.Again, passage square 130a, the b shown in Fig. 1 ... owing to have rough identical functions mutually, then these squares are generically and collectively referred to as passage square 130 in this example.
Fig. 8 is the formation of the search comparing section 148 under the embodiment 2.Search comparing section 148 has title pattern reservoir 600, title pattern detecting element 610, aligned portions 620, expected value comparing section 630, sequential adjustment part 640, selector switch 650 and error notification portion 660.Title pattern reservoir 600 is storing a plurality of title pattern row.Title pattern detecting element 610 is according to being produced signal that control part 116 received by vector to judge: indication " the output pattern consistent with title pattern row be listed as detect beginning " is used detects whether executed of initiation command.Used indication when therefore, detecting initiation command and contain a kind of " selecting this title pattern that detects object row " by title pattern reservoir 600.
When this detected the initiation command executed, title pattern detecting element 610 detected initiation command according to this and selects this to detect the title pattern of object by title pattern reservoir 600.Then, with regard to detect the selected title pattern row of initiation command according to this with regard to, title pattern detecting element 610 detects: whether the output pattern row consistent with these title pattern row are by device being tested 100 outputs.Particularly, detect a kind of output pattern row consistent in the output signal of title pattern detecting element 610 by comparer 180 with title pattern row.
When the output pattern row consistent with these title pattern row have been detected, this sequential adjustment part 640 detects beginning institute's elapsed time till title pattern row have been detected according to title pattern row, makes the output timing of output pattern row regulate the parameter setting of usefulness in aligned portions 620.For example, sequential adjustment part 640 also can make the retardation of output timing row delay usefulness be set in the aligned portions 620.By suitably setting this retardation, then can make output pattern row and expected value pattern row synchronously.
The output pattern row that aligned portions 620 is exported by comparer 180 these devices being tested 100 of input.Then, aligned portions 620 makes the output pattern row of having imported only postpone a kind of retardation that is set by sequential adjustment part 640, and is sent to then in expected value comparing section 630 and the selector switch 650.Again, when title pattern row did not detect, aligned portions 620 also can make output pattern row not postpone and its output is maintained the original state.
More specifically, aligned portions 620 has a plurality of flip-flops and the selector switch of vertical connection, its can choose a plurality of flip-flops any output and with its output.Then, just the flip-flop of section is docile and obedient preface and is imported this output pattern and be listed as.The retardation that selector switch sets according to sequential adjustment part 640 is selected the output of arbitrary flip-flop and with its output.Therefore, aligned portions 620 can make the number of the output flip-flop that pattern passed through change, so that the sequential of output pattern row and expected value pattern row is consistent.
When title pattern row had detected, 630 pairs of output patterns of being imported by this aligned portions 620 of expected value comparing section were listed as and are compared by the expected value pattern row that order pattern generating unit 146 is imported, and this comparative result is sent to selector switch 650 in regular turn.When title pattern row have detected, the comparative result that these selector switch 650 these expected value comparing sections 630 of input are obtained and be sent to lose efficacy and catch control part 150.On the other hand, when title pattern row did not detect, this selector switch 650 made the output pattern row of being imported by aligned portions 620 be sent to lose efficacy and catches control part 150.
By title pattern row detect beginning one predetermined during in, if the output pattern consistent with these title pattern row is listed as when undetected, then error notification portion 660 will " title pattern be listed as detect fail " notifies the user of this proving installation 10.Therefore, the user can know suitably that the mistake of " title pattern row can not detect " takes place, and simultaneously can be easily be listed as to investigate this wrong occurrence cause by stored output pattern till wrong the generation time in this inefficacy capture memory body 152 of investigation.
Fig. 9 is the expected value pattern row under the embodiment 2 and exports the sequential chart that pattern is listed as the processing when comparing.Vector produces control part 116 and carries out respectively other order by having the command execution step (its be used for fill order) and the command execution pipeline that a plurality of step constituted of comparison step (it compares output pattern and expected value pattern).More specifically, in the command execution step, vector produces control part 116 and carry out a plurality of orders in regular turn in each command cycle, comprises: PKTST order, its indication " detecting of title pattern row begins "; And the PKTEND order, its indication " detecting of these title pattern row ends ".Herein, the PKTST order is an example that detects initiation command of the present invention, and the PKTEND order is an example that detects the order that ends of the present invention.
With regard to each order of a plurality of orders, order pattern generating unit 146 is ordered pairing expected value pattern by reading this in the expected value pattern memory body 108 in regular turn.For example, order pattern generating unit 146 is read the ED that PKTST orders pairing expected value pattern to be had 1Again, order pattern generating unit 146 is read the ED that the pairing expected value pattern of next nop command of PKTST order is had 2Herein, because comparison step is just to carry out the command execution step after, then the sequential of sequential when pairing order is performed in the command execution step that the expected value pattern is listed as when being transfused in the comparison step delayed more.
In comparison step, comparer 180 is obtained a kind of output timing of being exported by the output terminal of DUT100, to be supplied to search comparing section 148.For example, comparer 180 is obtained output pattern row D in regular turn 1, D 2, D 3... D n, D N+1And D N+2, to be supplied to search comparing section 148.Aligned portions 620 makes these output pattern row only postpone the retardation that this sequential adjustment part 640 sets, and makes this output pattern export expected value comparing section 630 to.
More specifically, in by aligned portions 620, set suitable retardation so that expected value pattern row ED in the comparison step 1, ED 2And ED 3In the sequential when being transfused to, sequential adjustment part 640 in comparison step to this and ED 1, ED 2And ED 3The output pattern row D that compares 1, D 2, D 3Input adjust.Equally, expected value pattern row ED in comparison step n, ED N+1And ED N+2In the sequential when being transfused to, sequential adjustment part 640 in comparison step, make should with ED n, ED N+1And ED N+2The output pattern row D that compares n, D N+1And D N+2Be transfused to.Therefore, sequential adjustment part 640 becomes synchronously each other expected value pattern and the output pattern that should compare with this expected value pattern, and can input in one-period in the expected value comparing section 630.
Therefore, according to the proving installation in the present embodiment 10, even the sequential after the output of the output pattern that is come by device being tested 100 begins be uncertain in, still can make expected value pattern and output pattern suitably synchronous.
When vector produced control part 116 execution PKTEND orders, a kind of the making setting of " the output pattern can not postpone " was carried out by expected value comparing section 630 in sequential adjustment part 640.Therefore, expected value comparing section 630 original form that the output pattern row imported are not delayed exports in the expected value comparing section 630.More specifically, after the PKTEND command execution, order pattern generating unit 146 is read expected value pattern row ED m, ED M+1And ED M+2Herein, because comparison step is just to carry out this command execution step after, then the sequential of sequential when corresponding order is performed in the command execution step that the expected value pattern is listed as when being transfused in the comparison step delayed more.
In comparison step, comparer 180 is obtained these output pattern row D in regular turn m, D M+1And D M+2To be supplied to search comparing section 148.Aligned portions 620 does not postpone these output pattern row and exports expected value comparing section 630 to.As a result, 630 pairs of expected value comparing sections should output pattern D M+1With expected value pattern ED mCompare, and with this comparative result R mWrite in the inefficacy memory body.
As mentioned above, during PKTEND order executed, sequential adjustment part 640 makes the retardation of having set in the aligned portions 620 turn back to the title pattern and detects preceding state.Sequential adjustment part 640 in one-period, inputs in the expected value comparing section 630 by device being tested 100 obtained output patterns when as a result, can make the pairing expected value pattern of a certain order and this command execution.Therefore, can only control " this expected value pattern and output pattern are become synchronously " to the part of the test of this device being tested 100.
(embodiment 3)
Figure 10 is the pie graph of the proving installation 10 of embodiment 3.Proving installation 10 in this example also can not possess the set pattern memory body 118 in the proving installation 10 shown in Fig. 1 etc.With regard to other formation, has the member of the symbol identical because function that is possessed or formation are roughly identical with Fig. 1, therefore following all no longer explanations except difference with Fig. 1.Again, passage square 130a, the b shown in Fig. 1 ... owing to have roughly the same function mutually, then these passage squares are generically and collectively referred to as passage square 130 in this example.
Figure 11 is the formation of the search comparing section 148 under the embodiment 3.Search comparing section 148 has title pattern detecting element 700, aligned portions 710, expected value comparing section 720 and selection write section 730.Title pattern detecting element 700 is by a kind of output pattern row of being exported by device being tested 100 of comparer 180 inputs.Then, title pattern detecting element 700 detects whether executed of initiation command according to produced signal that control part 116 received by vector with what judge a kind of indication " to become the beginning that detects that consistent output pattern is listed as with title pattern row " used.If this detects the initiation command executed, then title pattern detecting element 700 detects " whether becoming consistent output pattern row by device being tested 100 outputs with predetermined title pattern row ".
When title pattern row have detected, title pattern detecting element 700 according to a kind of by title pattern row detect beginning till title pattern row have been detected time institute's elapsed time, the output timing that makes output pattern row when regulating used parameter setting in aligned portions 710.For example, title pattern detecting element 700 also can make the retardation of output pattern row delay usefulness be set in the aligned portions 710.By suitably setting this retardation, output pattern row and expected value pattern row are become synchronously.
Aligned portions 710 is by a kind of output pattern row of being exported by this device being tested 100 of comparer 180 inputs.Then, aligned portions 710 makes the output pattern row of having imported only postpone a kind of retardation that is set by this title pattern detecting element 700, to be sent to expected value comparing section 720 and to select in the write section 730.When a kind of output pattern row consistent with these title pattern row were detected, expected value comparing section 720 continued in these output pattern row consistent with title pattern row a kind of output pattern row and this expected value pattern row of being exported by device being tested 100 to be compared.Herein, the output pattern row of survival comprise in the so-called output pattern row consistent with title pattern row: the output pattern of output continuously only in the consistent output pattern row with title pattern row, and the output pattern consistent with title pattern row is listed as the output pattern that is output after the pattern of exporting afterwards other is output.
When the output pattern row consistent with title pattern row are detected, select write section 730 to make a kind of comparative result of being imported by expected value comparing section 720 be sent to inefficacy and catch control part 150.Therefore, when the output pattern row consistent with title pattern row were detected, the comparative result of selecting write section 730 that expected value comparing section 720 is obtained was stored in the inefficacy capture memory body 152.
On the other hand, be listed as when undetected at the output pattern consistent with title pattern row, the output pattern of selecting write section 730 that aligned portions 710 is imported is sent in the seizure control part 150 that lost efficacy.Therefore, be listed as when undetected, select write section 730 that the output pattern of device being tested 100 is listed as and be stored in the inefficacy capture memory body 152 at the output pattern consistent with title pattern row.
Figure 12 is the sequential chart of the processing when by the search comparing section 148 under the embodiment 3 title pattern row being detected.Vector produces control part 116 is carried out a plurality of orders by a kind of pipeline (pipeline) that comprises a plurality of steps of command execution step and comparison step each order.More specifically, in the command execution step, vector produces control part 116 and carry out a plurality of orders in regular turn in each command cycle, its comprise a kind of indication " title pattern row detect beginning " used detect initiation command.
For example, vector produces control part 116 and carries out the above-mentioned initiation command that detects in regular turn, and order 2 and order 3 is carried out this at last and detected the order that ends.
Then, with regard to each order of a plurality of orders, order pattern generating unit 146 is read this in regular turn by expected value pattern memory body 108 orders pairing expected value pattern.For example, order pattern generating unit 146 is read this in regular turn and is detected the pairing expected value pattern 1 of initiation command, orders 2 pairing expected value patterns 2 and orders 3 pairing expected value patterns 3.Herein, because comparison step is to carry out the command execution step after, then the sequential of sequential when pairing order is performed in the command execution step that the expected value pattern is listed as when being referenced in the comparison step more delayed.
In comparison step, comparer 180 is obtained a kind of output pattern of being exported by the terminal of DUT100, to be supplied to search comparing section 148.For example, search comparing section 148 obtains output pattern 1, and a part is omitted in the way, obtains title pattern row then in regular turn, output pattern N and output pattern N+1.
By detect initiation command begin to carry out till title pattern row are detected during in, aligned portions 710 does not postpone the setting of the retardation of usefulness owing to receive a kind of output pattern row that make, and exports to so acquired output pattern row are not delayed and selects in the write section 730.Selection write section 730 receives these output pattern row and make indication in the seizure control part 150 that lost efficacy, and output pattern row are write in the inefficacy capture memory body 152.Therefore, when detecting the initiation command executed, select write section 730 to begin to carry out a kind of output pattern and write processing, write in the inefficacy capture memory body 152 with the output pattern of in regular turn this device being tested 100 being exported.
Herein, be listed as when undetected at the output pattern consistent, then be listed as and be stored in the inefficacy capture memory body 152 at the output pattern that 730 of this selection write sections are exported device being tested 100 till through a predetermined command cycle number time when detecting initiation command and be performed with title pattern row.That is, select write section 730 that the output pattern row through being exported after this command cycle number are not stored in the inefficacy capture memory body 152.Therefore, have only that the title pattern is listed as that undetected reason investigates is that effective pattern just can be in store effectively.But be listed as at the output pattern consistent and also can adopt alternate manner when undetected with title pattern row, at this moment, select write section 730 also can make to detect initiation command be performed till detecting the order that ends and being performed during in whole output pattern row of being exported continue to be stored in the inefficacy capture memory body 152.
On the other hand, when the output pattern row consistent with title pattern row were detected, the sequential of reading that title pattern detecting element 700 should make the expected value pattern and export pattern became consistent, and with fixed retardation be set in the aligned portions 710.As a result, aligned portions 710 continues the output pattern row of being exported by device being tested 100 are delayed and becomes consistent with the sequential of the output of expected value pattern row.
Expected value comparing section 720 receives these output pattern row and continues and in the output pattern row consistent with title pattern row output pattern row and the expected value pattern row of being exported by device being tested compared.At this moment, this selection write section 730 is made indication in the seizure control part 150 that lost efficacy, and the comparative result that expected value comparing section 720 is obtained is stored in the inefficacy capture memory body 152.Therefore, when the output pattern row consistent with title pattern row are detected, select write section 730 to stop the processing that writes of this output pattern, to begin carrying out a kind of processing, the comparative result that expected value comparing section 720 is obtained is stored in the inefficacy capture memory body 152 in regular turn.
Again, even when title pattern row are detected, the output pattern that inefficacy capture memory body 152 is exported before also can making and detecting is listed as not cancellation and continues keeping, and also can write the output pattern row that this is exported before detecting by this comparative result.
More than, according to Figure 12, this proving installation 10 till this title pattern row are detected the time during in output pattern row are write in the inefficacy capture memory body 152, when title pattern row were detected, the comparative result of these output pattern row and expected value pattern row write in the inefficacy capture memory body 152.Therefore, can easily not resolve its reason at title pattern row when detecting.When title pattern row are detected, can apply flexibly the memory capacity of this inefficacy capture memory body 152 effectively again.
(embodiment 4)
Figure 13 is the pie graph of the proving installation 10 of embodiment 4.Proving installation 10 in this example possesses a kind of test control device 195 to replace the test control device 190 in the proving installation 10 shown in Fig. 1 etc.Again, proving installation 10 also can not possess a kind of set pattern memory body 118.With regard to other formation, have with the member of Fig. 1 prosign because the function that is possessed and constitute approximately identically with Fig. 1 person no longer explains except difference below therefore.Again, passage square 130a, the b shown in Fig. 1 ... between mutually, has about identical functions in this example, so these passage squares are generically and collectively referred to as passage square 130.
Figure 14 is the pie graph of the search comparing section 148 of embodiment 4.Search comparing section 148 has title pattern detecting element 800, expected value comparing section 810, and title detects scope and sets working storage 820, and relatively effective range is set working storage 830, false judgment notice portion 840 and selector switch 850.Produced by vector that control part 116 performed orders have been set in that title detects that scope is set in the working storage 820 and becoming under the situation of the effective range when effective detecting of being listed as of the output pattern consistent with title pattern row, this title pattern detecting element 800 judges that this detects whether executed of initiation command.Then, when " detecting initiation command " executed, title pattern detecting element 800 is obtained a kind of output pattern row of being exported by device being tested 100 by comparer 180, to detect " whether the output pattern row consistent with title pattern row are exported by device being tested 100 ".
Expected value comparing section 810 obtains the output pattern row that this device being tested 100 is exported by comparer 180, and obtains this expected value pattern row by order pattern generating unit 146.Then, when the output pattern row consistent with title pattern row were detected, this expected value comparing section 810 continued in this output pattern row consistent with title pattern row output pattern row and the expected value pattern row of being exported by device being tested 100 to be compared.At this moment, expected value comparing section 810 makes the expected value pattern of comparison other be set in the comparison effective range and sets in the working storage 830, also can be corresponding with " expected value pattern row and output pattern row relatively become any order in effective range when effective " with as condition, so that this expected value pattern and output pattern are compared.
The beginning address at the address place of the order that title detects scope when setting working storage 820 and in produced the performed a plurality of orders of control part 116 by vector detecting of making that the output pattern consistent with title pattern row be listed as being become effective range when effective and begin and the end of a period address at the address place of the at the end used order of effective range is being stored.Above-mentioned effective range is called the search form.For example, title detect scope set working storage 820 also can be by test control device 195 to receive the setting of above-mentioned address.
In produce the performed a plurality of orders of control part 116 by vector, relatively effective range is set working storage 830 and is made a kind of beginning address of the pairing order of expected value pattern when effective with relatively becoming of output pattern and make and the end of a period address of exporting the expected value pattern pairing order of relatively becoming of pattern when effective is being stored.Begin the scope of address till the address of ending by this and be called the comparison form.For example, relatively effective range is set the setting that working storage 830 also can receive a kind of above-mentioned address that is undertaken by test control device 195.
Again, in the expected value pattern memory body 108 for each terminal of same order during corresponding to a plurality of expected value pattern, relatively effective range is set working storage 830 and also can be stored a kind of parameter in addition, and it shows " which expected value pattern compares the starting point of form as this ".Equally, relatively effective range is set working storage 830 and also can be stored a kind of parameter in addition, and it shows " which expected value pattern compares the end of a period point of form as this ".Therefore, can specify this scope of the pattern used of form as a comparison in more detail.Again, can make otherwise to replace aforesaid way, at this moment, relatively effective range set working storage 830 also can store a kind of by the test beginning until till the beginning of form relatively process the command cycle number and a kind of by the test beginning till the end of a period of form relatively the command cycle number of process, with as this relatively form show the parameter of usefulness.Therefore, in the designation method that compares form,, then can carry out rapid and suitable obstacle and resolve various obstacles owing to can use various method.
Detect begin when initiation command is performed until make at the end used the detecting of detecting of title pattern row end order till being performed during in, if the output pattern consistent with title pattern row is listed as when undetected, then this false judgment notice portion 840 with " detecting initiation command to the order that detects till the order that ends is to be positioned at the search form " as condition, with to a kind of mistake of user's untill further notice, it shows " detecting of title pattern row failed ".
When the output pattern row consistent with title pattern row are detected, the comparative result that selector switch 850 selects this expected value comparer 810 to be obtained, being sent to then lost efficacy catches control part 150, and is stored in the inefficacy capture memory body 152 by losing efficacy seizure control part 150.On the other hand, be listed as when undetected at the output pattern consistent with title pattern row, selector switch 850 is selected the obtained output patterns row of this comparer 180, and being sent to then lost efficacy catches control part 150, and catches control part 150 by losing efficacy and be stored in the inefficacy capture memory body 152.Therefore, the title pattern is listed as the reason that can easily carry out obstacle when undetected obstacle takes place and investigates.
Figure 15 is the formation of the test control device 195 under the embodiment 4.Test control device 195 has title and detects scope configuration part 900 and compare effective range configuration part 910.Title detects scope configuration part 900 and sets in stored a plurality of orders in the memory body 104 in order and a kind ofly make detecting of the output pattern row consistent with title pattern row become effective range when effective (, search for form).Particularly, title detects the indication of scope configuration part 900 corresponding to user etc., makes the used value of indication " the beginning address of this search form and end of a period address " be stored in title and detects scope and set in the working storage 820.
Again, title detect scope configuration part 900 by detect initiation command till detect the order that ends during at least 1 order in when setting a kind of relatively form by effective range configuration part 910 relatively, also can detect initiation command till detect the order that ends during in set detecting of these title pattern row effectively.
Particularly, title detects scope configuration part 900 and also can carry out next one processing at every turn when relatively form carries out new settings.At first, title detects scope configuration part 900 by this order memory body 104 of scanning, to detect detecting initiation command and detecting the whole group of ordering that ends.Whether secondly, title detects scope configuration part 900 other detects initiation command and judges with regard to each: detect initiation command this comparison form to corresponding at least 1 order that detects till the order that ends by this and reset.Then, title detect scope configuration part 900 after this comparison form has reset detect initiation command and corresponding detect till the order that ends during in detecting of title pattern row become effectively.
Figure 16 is an example of the search form under the embodiment 4.In a plurality of each other order of carrying out in regular turn of being read by vector generation control part 116, the output pattern that the sequential during with this command execution is exported device being tested 100 shows accordingly among this figure.For example, show " this output data D in the sequential when the PKTST command execution of an example that detects initiation command 0Export ".Show " this output data D in sequential when again, performed nop command is performed after the PKTST order 1Export ".
Then this nop command is carried out nop command again in addition to carry out in regular turn after a plurality of orders.Sequential when carrying out with this nop command is to export this output data D nSecondly, carry out the PKTEND order of this example that detects the order that ends.Herein, even in arbitrary order of ordering by PKTST till the PKTEND order, also do not set above-mentioned search form.Therefore, when being ordered each other order till PKTEND order to be performed by PKTST, title pattern row do not detect.And when being ordered each other order till PKTEND order to be performed by PKTST, even title pattern row are undetected, false judgment notice portion 840 does not also notify a kind of demonstration " title pattern row are undetected " used error message.
Then, vector produces control part 116 and carry out other order in regular turn after the PKTEND command execution, and then carries out the PKTST order, and the sequential when being performed with this PKTST order makes output data D mBy device being tested 100 outputs.Secondly, carry out nop command, the sequential when carrying out with this nop command makes output data D M+1Be output.Then this nop command is more carried out nop command to carry out in regular turn after a plurality of orders.Sequential when carrying out with this nop command makes output data D 1Be output.Secondly, carry out the PKTEND order, the sequential when being performed with this PKTEND order makes this output data D 1+1Be output.
Show that " the beginning address of search form " used Parameter H UNT_ST shows herein: the address that begins the order carried out in this PKTST order earlier.Then, the end of a period address of this search form shows that the Parameter H UNT_END of usefulness shows: than the address of the order of just carrying out after this PKTEND order more.That is, these two kinds of PKTST orders and PKTEND order are in the scope of search form.Therefore, when being ordered each other order till PKTEND order to be performed by PKTST, title pattern detecting element 800 detects a kind of output pattern consistent with title pattern row and is listed as.And when being ordered each other order till PKTEND order to be performed by PKTST, even when not detecting these title pattern row, false judgment notice portion 840 also can notify a kind of demonstration " title pattern row are undetected " used error message.
Therefore, when even vector produces a plurality of groups that control part 116 execution PKTST order and PKTEND orders, detect in the scope working storage 820 by making suitable value be stored in title, also " whether title pattern row detect " can be set in each group of PKTST order and PKTEND order independently.Therefore, the obstacle of the device being tested 100 that can not rewrite of test formula is resolved and can easily be realized.
Figure 17 is an example of the comparison form under the embodiment 4.In a plurality of each other order of carrying out in regular turn of being read by vector generation control part 116, the output pattern that the sequential during with this command execution is exported device being tested 100 shows accordingly among this figure.For example, show " this output data D in the sequential when the PKTST command execution of an example that detects initiation command 0Export ".Show " this output data D in sequential when again, performed nop command is performed after the PKTST order 1Export ".The corresponding relation of other order and output data since with the roughly the same and no longer explanation of Figure 16.
Herein, by also not setting a kind of relatively form in the arbitrary order till the extremely corresponding PKTEND order of initial executed PKTST order beginning.Therefore, title detect scope configuration part 900 order by PKTST till the PKTEND order during in that detecting of title pattern row become is invalid.On the other hand, by performed subsequently PKTST order beginning till corresponding PKTEND order during arbitrary order in do not set a kind of relatively form.Particularly, CPEW_ST is a kind of used parameter of beginning address that shows this comparison form, and it shows the address than the order of the back execution of this PKTST order.Again, CPEW_END is a kind of used parameter of end of a period address that shows this comparison form, and it shows the address of the order of carrying out earlier in this PKTEND order.
Therefore, when ordering each other order executed that begins till the PKTEND order by this PKTST, this title pattern detecting element 800 detects a kind of output pattern consistent with title pattern row and is listed as.Then, be listed as when undetected at the output pattern consistent with title pattern row, false judgment notice portion 840 notifies a kind of demonstration " title pattern be listed as detect fail " used error message.As a result, only with regard to the command component that sets in the comparison other,, except the information of not wanting, can make the raising of obstacle analytic efficiency during then the obstacle of device being tested 100 is resolved owing to notify " title pattern row detect failure ".
More than, though use each form of implementation that the present invention is described, technical scope of the present invention is not limited to above-mentioned each form of implementation.Can apply various improvement in above-mentioned each form of implementation.The form that applies after this kind change or the improvement also is included in the available scope of technology of the present invention institute.
Utilizability on the industry
As shown above, suitable test is done at the edge of the output signal of can be suitably device being tested being exported according to the present invention.Again, though the output timing of output pattern row uncertain in, the output of output pattern row still can become synchronously with reading of expected value pattern row and compare.Again, show when the used title pattern of the beginning of this test is undetected, can easily investigate its reason.In addition, also can suitably set and a kind ofly make detecting of title pattern row become scope when effective.
Though the present invention discloses as above with preferred embodiment, so it is not in order to limiting the present invention, anyly has the knack of this skill person, without departing from the spirit and scope of the present invention, when doing a little change and retouching, all belongs within the scope of technical scheme of the present invention.

Claims (24)

1, a kind of proving installation is that the proving installation of usefulness is tested at a kind of edge of the output signal that the output terminal of device being tested is exported, and it is characterized in that comprising:
The 1st signal comparator, in each other output map sample that its output pattern row of being exported by the output terminal of device being tested are contained, result after comparing according to a voltage that is in the output signal in the 1st predetermined gating sequential and the 1st a predetermined threshold voltage to be obtaining the value of this output pattern, and therefore also obtains the 1st output pattern of being exported by output terminal and be listed as;
The 2nd signal comparator, in each other output map sample that its output pattern row of being exported by the output terminal of device being tested are contained, result after comparing according to a voltage that is in the output signal in the 2nd predetermined gating sequential and the 2nd a predetermined threshold voltage to be obtaining the value of this output pattern, and therefore also obtains the 2nd output pattern of being exported by output terminal and be listed as;
Title pattern row detecting element, it detects: the 1st output pattern row are consistent with predetermined title pattern row; And
The expected value comparing section, its output: be listed as when consistent the comparative result that the expected value pattern of the 2nd obtained output pattern row of the 2nd signal comparator and the 2nd output pattern row is listed as detecting the 1st output pattern row with the title pattern.
2, proving installation according to claim 1 is characterized in that wherein possessing comparative result memory portion in addition, and it is corresponding to the 2nd gating sequential and the 2nd threshold voltage, to remember the comparative result of the 2nd output pattern row and expected value pattern row.
3, proving installation according to claim 1 is characterized in that wherein possessing in addition:
The test control part, the test when it is output with the same output pattern row of title pattern row and with the same output pattern row of expected value pattern row making in the device being tested is carried out repeatedly; And
Parameter modification portion, it makes 1 different value of test of one of them parameter modification Cheng Yudi of the 2nd gating sequential and the 2nd threshold voltage in the 2nd test.
4, proving installation according to claim 3, it is characterized in that wherein testing the comparative result that control part can be exported according to the expected value comparing section in each other test repeatedly, make that the 2nd output pattern row output is a kind of to be listed as the scope of corresponding to the 2nd gating sequential and the 2nd threshold voltage with the expected value pattern.
5, proving installation according to claim 1 is characterized in that wherein the 1st gating sequential and the 2nd gating sequential and the 1st threshold voltage become different value mutually with at least one capable setting parameter in the 2nd threshold voltage.
6, proving installation according to claim 1, it is characterized in that wherein being listed as when consistent at the 1st output pattern row and title pattern, the comparative result that is listed as with the expected value pattern that the expected value comparing section can make that the 1st output pattern row obtain the 2nd obtained after the predetermined shift time in back one output pattern row is output.
7, proving installation according to claim 1, the 2nd output pattern that it is characterized in that wherein should being listed as corresponding to the 1st output pattern row with the title pattern and should compare with expected value pattern row is listed as, and can be the identical pattern row of being exported with same sequential by the output terminal of device being tested.
8, a kind of proving installation is that the proving installation of usefulness is tested at a kind of edge of the output signal that the output terminal of device being tested is exported, and it is characterized in that comprising:
The test pattern efferent, used test pattern row exported device being tested to when its title pattern row that output terminal of device being tested is scheduled to were exported;
Signal comparator, in each other output map sample that its output pattern row of being exported by the output terminal of device being tested are contained, according to being in result after the voltage of the output signal in the predetermined gating sequential and a threshold voltage compare obtaining the value of this output pattern, and therefore also obtaining the output pattern of exporting by output terminal and be listed as;
Title pattern row detecting element, it detects: the 1st obtained output pattern row of the 1st signal comparator are listed as consistent with the title pattern;
Time delay obtaining section, its after test pattern begins to export, obtain the 1st consistent output pattern of a kind of and title pattern row be listed as be detected till the time time delay;
Parameter modification portion, it is changed at least one parameter of this two parameter of gating sequential and threshold voltage when obtaining above-mentioned time delay;
The test control part, under its state when causing parameter modification by parameter modification portion, by the test pattern efferent to carry out the output of this test pattern row once again; And
The expected value comparing section, its output by the test pattern row begins once again, and by after the shift time of be scheduled to through the time point of above-mentioned time delay, the comparative results that the expected value pattern with the 2nd output pattern row of the 2nd obtained output pattern row of signal comparator is listed as are output.
9, a kind of method of testing is the method for testing that a kind of edge of the output signal that the output terminal of device being tested is exported is used when testing by proving installation, it is characterized in that comprising:
The 1st signal comparison step, in each other output map sample that its output pattern row of being exported by the output terminal of device being tested are contained, result after comparing according to a voltage that is in the output signal in the 1st predetermined gating sequential and the 1st a predetermined threshold voltage to be obtaining the value of this output pattern, and therefore also obtains the 1st output pattern of being exported by output terminal and be listed as;
The 2nd signal comparison step, in each other output map sample that its output pattern row of being exported by the output terminal of device being tested are contained, result after comparing according to a voltage that is in the output signal in the 2nd predetermined gating sequential and the 2nd a predetermined threshold voltage to be obtaining the value of this output pattern, and therefore also obtains the 2nd output pattern of being exported by output terminal and be listed as;
Title pattern row detect step, and it detects: the 1st output pattern row are consistent with predetermined title pattern row; And
The expected value comparison step is detecting the 1st output pattern row and title pattern row when consistent, and the comparative result that the expected value pattern that is listed as at obtained the 2nd output pattern row of the 2nd signal comparison step and the 2nd output pattern is listed as is output.
10, a kind of method of testing is characterized in that comprising:
Test pattern output step, used test pattern row exported device being tested to when its title pattern row that output terminal of device being tested is scheduled to were exported;
The signal comparison step, in each other output map sample that its output pattern row of being exported by the output terminal of device being tested are contained, according to being in result after the voltage of the output signal in the predetermined gating sequential and a threshold voltage compare obtaining the value of this output pattern, and therefore also obtaining the output pattern of exporting by output terminal and be listed as;
Title pattern row detect step, and it detects: consistent with title pattern row at the 1st output pattern row that the signal comparison step is obtained;
Obtain step time delay, its after test pattern begins output, obtain a kind of and title pattern row consistent the 1st export pattern be listed as be detected till the time time delay;
The parameter modification step, changed at least one parameter in gating sequential and threshold voltage this two parameter when having obtained above-mentioned time delay;
The test controlled step under its state when causing parameter modification by the parameter modification step, is exported step to carry out the output of these test pattern row once again by test pattern; And
The expected value comparison step, by after the shift time of be scheduled to through the time point of above-mentioned time delay, the comparative results that the expected value pattern with the 2nd output pattern row of the 2nd obtained output pattern row of signal comparator is listed as were output when its output by test pattern row began once again.
11, a kind of proving installation, its according to the output pattern row of exporting in regular turn by the output terminal of device being tested and the comparative result that should export the expected value pattern row that the pattern row compare therewith judge the good of device being tested, it is characterized in that comprising:
Sequential control portion, it carries out a plurality of orders that contained in the test formula of device being tested in regular turn, and by reading the executed pairing expected value pattern of respectively ordering in the memory body;
Title pattern detecting element, " to be listed as the beginning that detects of corresponding to output pattern row with predetermined title pattern " used when detecting the initiation command executed in indication for it, and detect: whether one is listed as corresponding to output pattern with the title pattern is listed as by exporting in the device being tested;
The expected value comparing section, it compares output pattern row and expected value pattern row; And
The sequential adjustment part, it makes each other expected value pattern and the output pattern that should compare with this expected value pattern becomes synchronously and inputs in the expected value comparing section in one-period when being listed as corresponding to output pattern row and being detected with the title pattern.
12, proving installation according to claim 11, it is characterized in that wherein sequential control portion carries out each other order by the command execution pipeline that a plurality of step constituted, wherein above-mentioned a plurality of steps have output pattern and expected value pattern are compared used comparison step, and
When can should being transfused in comparison step with the output pattern of expected value pattern comparison this in the sequential when the expected value pattern is imported when comparison step, the sequential adjustment part adjusts.
13, proving installation according to claim 11, it is characterized in that wherein by sequential control portion, end order when being performed in used the detecting of indication " title pattern row detect ends of a period ", and obtained output pattern inputed in one-period in the expected value comparing section when sequential adjustment part made one to order a pairing expected value pattern and a command execution.
14, proving installation according to claim 11 is characterized in that more comprising title pattern reservoir used when a plurality of title pattern row store,
The performed order of sequential control portion comprises a kind of indication, and it points out " choosing this title pattern that detects object row by title pattern reservoir " with as detecting initiation command, and
With regard to detect the selected title pattern row of initiation command according to this with regard to, this title pattern detecting element also can detect: whether the output pattern row consistent with these title pattern row are exported by device being tested.
15, proving installation according to claim 11, it is characterized in that wherein can possessing error notification portion in addition, by title pattern row be scheduled to when beginning to detect during in, be listed as when undetected at the output pattern consistent with title pattern row, this error notification portion can notify " this title pattern be listed as detect fail ".
16, a kind of method of testing, it is according to the output pattern row of being exported in regular turn by the output terminal of device being tested and should export the comparative result that pattern is listed as the expected value pattern row of comparing therewith, to judge the good of this device being tested, it is characterized in that comprising:
The sequential control step, it carries out a plurality of orders that contained in the test formula of device being tested in regular turn, by reading the executed pairing expected value pattern of respectively ordering in the memory body;
The title pattern detects step, its point out " being listed as the beginning that detects of corresponding to output pattern row " with predetermined title pattern used detect the initiation command executed time detect: whether consistent output pattern is listed as and is exported by device being tested with these title pattern row;
The expected value comparison step, it compares output pattern row and expected value pattern row; And
The sequential set-up procedure, it makes each other expected value pattern and the output pattern that should compare with this expected value pattern becomes synchronously and compares in the expected value comparison step in one-period when being listed as corresponding to output pattern row and being detected with the title pattern.
17, a kind of proving installation, its according to the output pattern row of exporting in regular turn by the output terminal of device being tested and the comparative result that should export the expected value pattern row that the pattern row compare therewith judge the good of device being tested, it is characterized in that comprising:
Title pattern detecting element, it detects: whether a kind of with predetermined title pattern is listed as corresponding to output pattern row and is exported by device being tested;
The expected value comparing section, it continues one to be listed as in the corresponding to output pattern row with this title pattern output pattern row and this expected value pattern row of being exported by device being tested are compared at this when detecting a kind of and this title pattern and be listed as corresponding to output pattern row; And
Select write section, it is when being listed as corresponding to output pattern row and being detected with this title pattern, the resulting comparative result of expected value comparing section is stored in the inefficacy memory body, be listed as when undetected being listed as corresponding to output pattern with this title pattern, the output pattern row of device being tested are stored in the inefficacy memory body.
18, proving installation according to claim 17, it is characterized in that more comprising command execution portion, it carries out a plurality of orders in regular turn in each command cycle, these orders contain a kind of pointing out " title pattern row detect beginning " used detect initiation command, wherein
When detecting the initiation command executed, this selection write section begins to carry out a kind of output pattern and writes processing, its output pattern of in regular turn device being tested being exported writes in this inefficacy memory body, when being listed as corresponding to output pattern row and being detected with this title pattern, stop above-mentioned output pattern and write processing, begin to carry out a kind of resulting comparative result of expected value comparing section that makes and be stored in processing in the inefficacy memory body in regular turn.
19, proving installation according to claim 18, it is characterized in that wherein being listed as corresponding to output pattern with this title pattern is listed as when undetected, after detecting initiation command and beginning to carry out through in during till the predetermined command cycle number, the output pattern row that this selection write section is exported device being tested are stored in the inefficacy memory body, and the output pattern row of having exported are not stored in the inefficacy memory body.
20, a kind of method of testing, its according to the output pattern row of exporting in regular turn by the output terminal of device being tested and the comparative result that should export the expected value pattern row that the pattern row compare therewith judge the good of device being tested, it is characterized in that comprising:
The title pattern detects step, and it detects: whether a kind of with predetermined title pattern is listed as corresponding to output pattern row and is exported by device being tested;
The expected value comparison step, when detecting a kind of and this title pattern and be listed as corresponding to output pattern row, continue one to be listed as in the corresponding to output pattern row with this title pattern output pattern row and this expected value pattern row of being exported by device being tested are compared at this; And
Select write step, when being listed as corresponding to output pattern row and being detected with this title pattern, the resulting comparative result of expected value comparison step is stored in the inefficacy memory body, be listed as when undetected being listed as corresponding to output pattern with this title pattern, the output pattern row of device being tested are stored in the inefficacy memory body.
21, a kind of proving installation, its according to the output pattern row of exporting in regular turn by the output terminal of device being tested and the comparative result that should export the expected value pattern row that the pattern row compare therewith judge the good of device being tested, it is characterized in that comprising:
Sequential control portion, it carries out a plurality of orders that contained in the test formula of device being tested in regular turn, and by reading the executed pairing expected value pattern of respectively ordering in the memory body;
Title pattern detecting element, " to be listed as the beginning that detects of corresponding to output pattern row with predetermined title pattern " used when detecting the initiation command executed in indication for it, detects " whether one is listed as corresponding to output pattern with the title pattern is listed as by exporting in the device being tested ";
The expected value comparing section when being listed as corresponding to output pattern row and being detected with the title pattern, continues to compare being listed as in the corresponding to output pattern row output pattern row exported by device being tested and above-mentioned expected value pattern be listed as with the title pattern;
Title detects the scope configuration part, and it is set the effective range that is listed as detecting of corresponding to output pattern row and becomes when effective with the title pattern in a plurality of orders; And
False judgment notice portion, its detect initiation command begin to carry out until make at the end used the detecting of detecting of title pattern row end order till when being performed during in, if being listed as corresponding to output pattern with the title pattern is listed as when undetected, then with detect the order of initiation command till detect the order that ends be in effective range as condition a kind of error message that sends a notice, fail to show detecting of these title pattern row.
22, proving installation according to claim 21, it is characterized in that wherein more comprising that a kind of title detects scope and sets working storage, it is storing the beginning address at address place of order used when effective range is begun and the end of a period address that makes the address place of the at the end used order of effective range
Title detects the scope configuration part, by making a kind of title that is stored in detect scope and set value in the working storage setting a kind of effective range, and
False judgment notice portion, also can detect scope and set beginning address stored in the working storage and title and detect scope and set between the end of a period address stored in the working storage with " detect initiation command or detect the order that ends and be performed ", fail to show detecting of these title pattern row as condition a kind of error message that sends a notice at title.
23, proving installation according to claim 21, it is characterized in that more comprising comparison effective range configuration part, it sets a kind of relatively form corresponding at least one order, this relatively form demonstration " becoming more effectively of this pairing expected value pattern of order and this output pattern ", wherein
By detect initiation command till detecting the order that ends during at least 1 order in when setting a kind of relatively form, this title detect the scope configuration part can this detect initiation command till detect the order that ends during in detecting of title pattern row become effectively.
24, a kind of method of testing, it is according to the output pattern row of being exported in regular turn by the output terminal of device being tested and should export the comparative result that pattern is listed as the expected value pattern row of comparing therewith, to judge the good of this device being tested, it is characterized in that comprising:
The sequential control step, it carries out a plurality of orders that contained in the test formula of device being tested in regular turn, by reading the executed pairing expected value pattern of respectively ordering in the memory body;
The title pattern detects step, its point out " being listed as the beginning that detects of corresponding to output pattern row " with predetermined title pattern used detect the initiation command executed time detect: one with these title pattern row whether consistent output pattern is listed as and is exported by device being tested;
The expected value comparison step when it is detected at the output pattern row consistent with title pattern row, continues in the output pattern row consistent with title pattern row output pattern row and this expected value pattern row of being exported by device being tested to be compared;
Title detects scope and sets step, and it is set the effective range that detecting of making in a plurality of orders that the output pattern consistent with title pattern row be listed as becomes when effective; And
The false judgment notifying process, its detect initiation command begin to carry out to make detecting of title pattern row end used detecting end order till being performed during in, when if the output pattern row consistent with title pattern row do not detect, then with " detecting initiation command to the order that detects till the order that ends is in effective range " as condition, notifying a kind of error message, it shows that detecting of these title pattern row fail.
CNB2005800002843A 2004-06-17 2005-06-14 Proving installation and method of testing Active CN100559204C (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2004179857A JP4511880B2 (en) 2004-06-17 2004-06-17 Test apparatus and test method
JP179857/2004 2004-06-17
JP183067/2004 2004-06-21
JP192195/2004 2004-06-29
JP212234/2004 2004-07-20

Publications (2)

Publication Number Publication Date
CN1820206A true CN1820206A (en) 2006-08-16
CN100559204C CN100559204C (en) 2009-11-11

Family

ID=35771724

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2005800002843A Active CN100559204C (en) 2004-06-17 2005-06-14 Proving installation and method of testing

Country Status (2)

Country Link
JP (1) JP4511880B2 (en)
CN (1) CN100559204C (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102057287A (en) * 2008-06-09 2011-05-11 株式会社爱德万测试 Test device
CN102288901A (en) * 2011-09-01 2011-12-21 上海宏力半导体制造有限公司 Method for processing emulated data
CN102057288B (en) * 2008-06-10 2014-02-12 爱德万测试株式会社 Test module, test device, and test method
TWI475235B (en) * 2010-08-18 2015-03-01 Kingtiger Technology Canada Inc Determining data valid windows in a system and method for testing an integrated circuit device

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7213182B2 (en) 2005-01-19 2007-05-01 Advantest Corporation Test apparatus and test method
JP5113624B2 (en) 2007-05-24 2013-01-09 株式会社アドバンテスト Test equipment
KR20100034757A (en) 2007-07-17 2010-04-01 가부시키가이샤 어드밴티스트 Electronic device, host device, communication system, and program
KR101138196B1 (en) 2008-01-23 2012-05-14 가부시키가이샤 어드밴티스트 Testing apparatus
US8666691B2 (en) 2008-12-08 2014-03-04 Advantest Corporation Test apparatus and test method
US20110184687A1 (en) * 2010-01-25 2011-07-28 Advantest Corporation Test apparatus and test method

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07225263A (en) * 1994-02-09 1995-08-22 Advantest Corp Bit-error measuring instrument
JP3214830B2 (en) * 1998-02-27 2001-10-02 アジレント・テクノロジー株式会社 Data processing device for IC test
JP2002139557A (en) * 2000-11-02 2002-05-17 Mitsubishi Electric Corp Semiconductor device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102057287A (en) * 2008-06-09 2011-05-11 株式会社爱德万测试 Test device
CN102057287B (en) * 2008-06-09 2013-08-21 株式会社爱德万测试 Test device
CN102057288B (en) * 2008-06-10 2014-02-12 爱德万测试株式会社 Test module, test device, and test method
US8949062B2 (en) 2008-06-10 2015-02-03 Advantest Corporation Test module, test apparatus, and test method
TWI475235B (en) * 2010-08-18 2015-03-01 Kingtiger Technology Canada Inc Determining data valid windows in a system and method for testing an integrated circuit device
CN102288901A (en) * 2011-09-01 2011-12-21 上海宏力半导体制造有限公司 Method for processing emulated data
CN102288901B (en) * 2011-09-01 2016-05-11 上海华虹宏力半导体制造有限公司 A kind of processing method of emulated data

Also Published As

Publication number Publication date
JP2006003216A (en) 2006-01-05
JP4511880B2 (en) 2010-07-28
CN100559204C (en) 2009-11-11

Similar Documents

Publication Publication Date Title
CN1820206A (en) Test apparatus and test method
CN1269041C (en) Method for testing semiconductor integrated circuit and memory
CN1599913A (en) Iris identification system and method, and storage media having program thereof
CN1885273A (en) Function coverage ratio analysis method for logic test
CN1596401A (en) Non-volatile storage device control method
CN1171389C (en) Parallet CRC generation circuit for generating a CRC code
CN1684503A (en) Image pickup system for preventing image darkening due to the entrance of intense light
CN1845213A (en) Method for realizing encryption/decryption processing in SMS4 cipher algorithm
CN1319185A (en) Gas identification system
CN1536581A (en) Semiconductor integrated circuit and its check method
CN1732388A (en) Semiconductor test device
CN1700357A (en) Semiconductor memory device for build-in fault diagnosis
CN1278421C (en) Semiconductor devices
CN101065725A (en) Command supply device
CN1729400A (en) Semiconductor test instrument
CN1183456C (en) Camera system and accessories apparatus
CN100347993C (en) Protocol interoperation characteristic test generating method based on communication multi-port finite state machine
CN1862511A (en) Method for testing software unit
CN100351900C (en) Magnetic tape read channel employing PRML viterbi detector
CN1266481C (en) Measurable technology for semiconductor integrated circuit
CN1288538A (en) Interface device, method of controlling interface device and information recording device
CN1848680A (en) Comparator and infrared remote control receiver
CN1918917A (en) Video encoding method and device, video decoding method and device, program thereof, and recording medium containing the programs
CN1135567C (en) Semiconductor memory device
CN1698062A (en) Information coding device, information decoding device, and method thereof, and program

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant