CN1818668A - Method for electric feeding, discharging and super-current time delay protecting on high-frequency tuning device - Google Patents
Method for electric feeding, discharging and super-current time delay protecting on high-frequency tuning device Download PDFInfo
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- CN1818668A CN1818668A CN 200610013309 CN200610013309A CN1818668A CN 1818668 A CN1818668 A CN 1818668A CN 200610013309 CN200610013309 CN 200610013309 CN 200610013309 A CN200610013309 A CN 200610013309A CN 1818668 A CN1818668 A CN 1818668A
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Abstract
A method for protecting power on and power discharge as well as over current of high frequency tuner by time delay includes setting KEY=1 and making each path Vout be zero by system control as well as setting all OUT CONTROLLER to be off-state before tuner is debugged, making KEY=1 and outputting Vout 1-Vout8 by MCU SYSTEM according to preset parameters when element to be tested is placed on testing clamp.
Description
Technical field
The present invention relates to high-frequency tuner and produce the testing and measuring technology technology, tuner powers on and discharges time-delay and supercurrent delay protection method specifically.
Background technology
In tuner debugging, the operator puts tested tuner or when taking off test fixture, system should not power to it, otherwise warm swap may cause the measured piece damage.When the operator was placed on measured piece on the anchor clamps, system powered to it, and the period should be controlled its 8 road electric sequence and can not power on simultaneously but power supply powers on, otherwise can damage measured piece.Want the DCO detailed checkout power-on impact current when powering on,, otherwise also can damage measured piece in case inflow-rate of water turbine is closed the overcurrent current supply circuit within a certain period of time.When operator test finish measured piece can be shifted out test fixture before, system cuts off the power supply to it, 8 tunnel power supplies should be shifted out successively during outage, otherwise also can cause the measured piece damage.In old technology, tested TUNER implementation is once powered on simultaneously because measured piece indoor design otherness, generation overshoot simultaneously powers on, may burn out measured piece, 2% left and right sides loss is arranged in the actual production, have a strong impact on production efficiency if the line processing is moved back in overshoot without exception, the split run production capacity descends 40~50%.
Summary of the invention
The invention provides that a kind of high-frequency tuner powers on, the method for discharge and supercurrent delay protection, to reduce the wastage, improve production capacity.
Method of the present invention may further comprise the steps:
1. before carrying out the tuner debugging operations, make KEY=1, system's control makes each road Vout be zero, and OUT CONTROLLER all is in off-state.
2. when measured piece was placed on the test fixture, KEY=0, MCU SYSTEM exported Vout1~Vout8 according to preset parameter.Order and interval time that voltage output is opened all can freely be set by technological parameter.MCU gives D/A1 and CPLD respectively with steering order.By the D/A1 control output voltage, by CPLD control output opening sequence and interval, the cut-off current that while MCU exports each loop is adjusted into the reference edge of REF as the current limliting comparer to D/A2 by AMP3.Undesired as load in output procedure, its Iout is excessive, obtains Iv>REF by sampling link (SAMPLING) sampling, then CMP comparer action upset notice.The indication of CPLD overcurrent, the CPLD internal logic provides CMP and filters, and surpasses as the overcurrent time and presets the time that technological parameter allows, and then disconnects OUT CONTROLLER and notifies the MCU overcurrent simultaneously, and MCU carries out the over current fault handling procedure.
3. in the power up as no abnormal, MCU can operate the notifying operation person, and CPLD enters the real-Time Tracking Control state simultaneously; Behind overcurrent, then cut off output immediately, MCU can utilize AMP4, and A/D carries out the real-time current value and measures.
4. after the tuner test finished, KEY=1, notice MCU started electric program down, and MCU makes Vout1~Vout8 output drop to 0V, disconnect OUT CONTROLLER according to process sequence successively.But power down sequence free arrangement.
When powering on and when outage, MCU may command Vout classification reaches predetermined value.
Beneficial effect
The present invention is to powering on and discharge process carries out shunt delay power supply, and overshoot monitored in real time, identifying the overshoot grade opens circuit to the overshoot implementation that might damage device, the time-delay buffering is carried out in general overshoot to power on, loss can be dropped to below 0.1%, the split run production capacity surpasses designed capacity 20%~30%; And can adjust flexibly according to technological parameter, multiple-way supply is delayed time respectively and is powered on, current value when in real time monitoring powers on, and make according to setting valve and to open circuit or slowly go up electric treatment.
Description of drawings
Fig. 1 is the synoptic diagram of flow process of the present invention
→ be the single flow direction of signal,
It is one group of single flow direction of signal
Be one group of signal bidirectional flow to
Each Elementary Function summary:
1.MCU SYSTEM:, send running parameter setting and control sequence as the controller of total system
2.CPLD: delay time automatically and go up the judgement of discharge of electricity and supercurrent protection and carry out control
3.D/A1 AMP1 AMP2: output voltage control can be provided with its voltage parameter of output
4.D/A2 AMP3: output current control can be provided with the overcurrent thresholding
5.R SAMPLING: output current sampling link
6.CMP: the process detection comparator
7.OUT CONTROLLER: output controlling unit
8.KEY: the indication of tuner duty
9.AMP4 A/D: electric current output detects, and can precisely measure current value in real time
Embodiment
The high-frequency tuner of present embodiment powers on and the discharge time-delay and the method for supercurrent delay protection, comprises the steps:
1. before carrying out the tuner debugging operations, make KEY=1, system's control makes each road Vout be zero, and OUT CONTROLLER all is in off-state.
2. when measured piece was placed on the test fixture, KEY=0, MCU SYSTEM exported Vout1~Vout8 successively according to preset parameter.Voltage is 5V; The time interval is by 10ms.MCU gives D/A1 and CPLD respectively with steering order.By the D/A1 control output voltage, by CPLD control output opening sequence and interval, the cut-off current that while MCU exports each loop is adjusted into the reference edge of REF as the current limliting comparer to D/A2 by AMP3.Undesired as load in output procedure, its Iout is excessive, obtains Iv>REF by sampling link (SAMPLING) sampling, then CMP comparer action upset notice.The indication of CPLD overcurrent, the CPLD internal logic provides CMP and filters, and surpasses as the overcurrent time and presets the time that technological parameter allows, and then disconnects OUT CONTROLLER and notifies the MCU overcurrent simultaneously, and MCU carries out the over current fault handling procedure, and the procedure initialization time is from 1ms.
3. in the power up as no abnormal, MCU can operate the notifying operation person, and CPLD enters the real-Time Tracking Control state simultaneously; Behind overcurrent, then cut off output immediately, MCU can utilize AMP4, and A/D carries out the real-time current value and measures.
4. after the tuner test finished, KEY=1, notice MCU started electric program down, and MCU makes Vout1~Vout8 output drop to 0V, disconnect OUT CONTROLLER according to process sequence successively.But the power down sequence free arrangement, outage at interval can be by 1ms.
5. when powering on and when outage, MCU may command Vout classification reaches predetermined value.1/32,1/16,1/8,1/4,1/2 and 1 times of classification by Vout when powering on increases.3/4,5/8,1/2 and 1/4 classification of pressing Vout during the Vout outage reduces, in case overshoot.
Claims (2)
1. a high-frequency tuner powers on and the method for discharge time-delay and supercurrent delay protection, comprises the steps:
-before carrying out the tuner debugging operations, making KEY=1, system's control makes each road Vout be zero, and OUTCONTROLLER all is in off-state;
-when measured piece was placed on the test fixture, KEY=0, MCU SYSTEM exported Vout1~Vout8 successively according to preset parameter; MCU gives D/A1 and CPLD respectively with steering order; By the D/A1 control output voltage, by CPLD control output opening sequence and interval, the cut-off current that while MCU exports each loop is adjusted into the reference edge of REF as the current limliting comparer to D/A2 by AMP3; Undesired as load in output procedure, its Iout is excessive, obtains Iv>REF by the sampling of SAMPLING sampling link, then CMP comparer action upset notice; The indication of CPLD overcurrent, the CPLD internal logic provides CMP and filters, and surpasses as the overcurrent time and presets the time that technological parameter allows, and then disconnects OUT CONTROLLER and notifies the MCU overcurrent simultaneously, and MCU carries out the over current fault handling procedure;
As no abnormal, MCU can operate the notifying operation person in the-power up, and CPLD enters the real-Time Tracking Control state simultaneously; Behind overcurrent, then cut off output immediately, MCU can utilize AMP4, and A/D carries out the real-time current value and measures;
After the test of-tuner finished, KEY=1, notice MCU started electric program down, and MCU makes Vout1~Vout8 output drop to 0V, disconnect OUT CONTROLLER according to process sequence successively.
2. a kind of high-frequency tuner as claimed in claim 1 powers on and the discharge time-delay and the method for supercurrent delay protection, it is characterized in that: power on and when cutting off the power supply, MCU control Vout classification reaches predetermined value.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CNB200610013309XA CN100419434C (en) | 2006-03-15 | 2006-03-15 | Method for electric feeding, discharging and super-current time delay protecting on high-frequency tuning device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CNB200610013309XA CN100419434C (en) | 2006-03-15 | 2006-03-15 | Method for electric feeding, discharging and super-current time delay protecting on high-frequency tuning device |
Publications (2)
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CN1818668A true CN1818668A (en) | 2006-08-16 |
CN100419434C CN100419434C (en) | 2008-09-17 |
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CNB200610013309XA Expired - Fee Related CN100419434C (en) | 2006-03-15 | 2006-03-15 | Method for electric feeding, discharging and super-current time delay protecting on high-frequency tuning device |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115308520A (en) * | 2022-10-10 | 2022-11-08 | 杭州三海电子有限公司 | Method, program and circuit for determining delay time of multichannel sequential sampling current |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000286096A (en) * | 1999-03-31 | 2000-10-13 | Sumitomo Heavy Ind Ltd | Controller for high frequency acceleration cavity and controlling method for-electron beam |
JP3358724B2 (en) * | 1999-08-20 | 2002-12-24 | シャープ株式会社 | Electronic tuner |
JP2004064258A (en) * | 2002-07-26 | 2004-02-26 | Matsushita Electric Ind Co Ltd | High frequency receiver |
RU2231885C1 (en) * | 2002-12-23 | 2004-06-27 | Шляхов Станислав Сергеевич | High-frequency rejecter (variants) |
JP2004287202A (en) * | 2003-03-24 | 2004-10-14 | Seiko Epson Corp | Projector |
CN100417947C (en) * | 2004-11-12 | 2008-09-10 | 阮炎 | Portable type microwave signal detector |
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2006
- 2006-03-15 CN CNB200610013309XA patent/CN100419434C/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115308520A (en) * | 2022-10-10 | 2022-11-08 | 杭州三海电子有限公司 | Method, program and circuit for determining delay time of multichannel sequential sampling current |
CN115308520B (en) * | 2022-10-10 | 2023-01-24 | 杭州三海电子有限公司 | Method, program and circuit for determining delay time of multichannel sequential sampling current |
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CN100419434C (en) | 2008-09-17 |
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Granted publication date: 20080917 Termination date: 20160315 |