CN1808403A - Independent hard disk controller - Google Patents
Independent hard disk controller Download PDFInfo
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- CN1808403A CN1808403A CN 200510002721 CN200510002721A CN1808403A CN 1808403 A CN1808403 A CN 1808403A CN 200510002721 CN200510002721 CN 200510002721 CN 200510002721 A CN200510002721 A CN 200510002721A CN 1808403 A CN1808403 A CN 1808403A
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- 239000000758 substrate Substances 0.000 claims description 21
- 238000006073 displacement reaction Methods 0.000 claims description 7
- 238000000802 evaporation-induced self-assembly Methods 0.000 claims description 7
- 238000004804 winding Methods 0.000 claims description 7
- 238000012360 testing method Methods 0.000 description 7
- 230000005540 biological transmission Effects 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
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Abstract
The invention relates to an independent hard disk controller for connecting a main board and a hard disk. The controller comprises: a first base board, a first interface, a second interface and a hard disk control device. The first interface, second interface and the hard disk control device are provided on the first base board, and the hard disk control device is connected to the first and second interfaces. Herein the hard disk is provided with a third interface which is connected with the first interface via a row bus; the main board is provided with a forth interface which is connected with the second interface, thereby, signal and data are transferred from main board and hard disk via the hard disk control device.
Description
Technical field
The present invention relates to a kind of information storage device controller, particularly a kind of independent hard disk controller.
Background technology
Hard drives (hard disk) almost is one of information storage equipment of present data handling system standard.Along with the progress of science and technology, seagate is also and then advanced by leaps and bounds, and hard disk volume now can be done littler and littler, but capacity can be increasing.Therefore, for solving the bottleneck of hard disc data transmission, develop and driving interface standard miscellaneous, as: IDE, SCSI, S-ATA, S-ATA II, ESDI, SAS, ST-506 etc., the interface that relative engagement is used is also released hard disk control device framework miscellaneous one after another, hard disc data is made the demand of quick access with compliance with system.
With reference to Fig. 1, general electronic installation (as: computing machine, server etc.) has a hardware controller 110, have a hard drive bus 120 (as: IDE, SCSI, S-ATA, S-ATA II, ESDI, SAS or ST-506) and be connected to first PC bus 130 (as: ISA, EISA, VL or PCI).Wherein, hard drive bus 120 can be connected by a winding displacement 220 and a hard disk 210.
When harddisk access requirement signal occurring on first PC bus 130, hardware controller 110 can send signals such as hard disk control to hard drive bus 120, and carries out the transmission work of hard drive bus 120 and 130 data of first PC bus.
Have one in addition in addition and get a control device 140 and a high-speed cache 150 soon, link with signal wire 11 between the two, and by signal wire 11 signal and control signal by reference mutually.In addition, get control device 140 soon and can be connected to second PC bus 132 (as: ISA, EISA, VL or PCI).
When harddisk access requirement signal occurring on second PC bus 132, get control device 140 soon and can see through signal wire 11 outputs one and get control and one soon and get address signal soon, whether have one to back up and be stored in the high-speed cache 150 so that check the hard disc data of desiring access.
If be that a reading requirement and the data wanting to read are stored in the high-speed cache 150, get 140 of control device soon and in high-speed cache 150, read the corresponding data that read, and send main system to by the 3rd PC bus 134 (as: ISA, EISA, VL or PCI).
If be that a reading requirement and the data wanting to read are not in high-speed cache 150, then getting control device 140 soon produces the information of one miss (MISS) and notifies hardware controller 110 with this information by second PC bus 132 and first PC bus 130, at this moment, hardware controller 110 sends the hard disk control signal and carries out reading of data via 120 pairs of hard disks of hard drive bus 210, to send main system to, and with the hard disc data of the block (block) at this data place via the hardware controller 110 and first PC bus 130, and the control by main system pass through in the 3rd PC bus 134 write caches 150, to make things convenient for reading fast of next hard disc data.
If be one to write when requiring, the data of then wanting to write write in the hard disk 210 by first PC bus 130, hardware controller 110 and hard drive bus 120.Simultaneously, get soon control device 140 be subjected to second on people's bus 132 signal controlling and check whether the block that writes has the memory cache district of a correspondence in high-speed cache 150.If any, then signal wire 11 is sent address, control signal, and with the data write cache 150 on the 3rd PC bus 134 to upgrade its data.
At present, above-mentioned hardware controller 110, hard drive bus 120, PC bus 130,132,134, get control device 140, high-speed cache 150 and signal wire 11 soon and can be arranged on the same substrate 100, and be commonly referred to as motherboard with the main system (not shown).
For guaranteeing production quality and Product Safety, in research and development or when manufacturing, the product test link that all is absolutely necessary.Even increase by a device or increase the function of a device, still need again through after the characteristic and function of testing each part repeatedly, could be at last a complete finished product.
Yet, in the scientific and technological transition of making rapid progress at present, single needle just has several to the hard disk drive interface kind on the hard disk, as: IDE, SCSI, S-ATA, S-ATA II, ESDI, SAS or ST-506, and the relative engagement hard disk uses interface also need have same-interface by the hard disk control device that interface connected.That is to say that the hard disk control device on motherboard need provide identical interface, to be connected with hard disk.Therefore, when the user requires different hard disk drive interface specifications, then need change the hard disk control device on the motherboard, yet except the hard disk control device need carry out the test of each part characteristic and function, other each part also need be tested again on the whole motherboard, and after this this motherboard just can be sold.Also just cause manufacturer to be required to be this and consume great amount of manpower and material resources in test job repeatedly.So, be one of main method that increases production capacity how shortening the test duration and can obtaining complete certain test result simultaneously.
Summary of the invention
Technical matters to be solved by this invention is to provide a kind of independent hard disk controller, to solve existing problem of prior art or shortcoming substantially.
Independent hard disk controller disclosed in this invention can reduce the test duration of dispatching from the factory.
Independent hard disk controller disclosed in this invention can increase signal quality.
Therefore, for reaching above-mentioned purpose, independent hard disk controller disclosed in this invention in order to connect a motherboard and a hard disk, includes: one first substrate, one first interface, one second interface and a hard disk control device.First interface, second interface and hard disk control device together are arranged at first substrate, and the hard disk control device is connected to first and second interfaces.
Wherein, on hard disk, have one the 3rd interface, and this 3rd interface can be connected by a winding displacement and first interface; And on motherboard, have one the 4th interface, and this 4th interface and second interface is connected, and therefore transmits signal and data between motherboard and hard disk by the hard disk control device.
In this, the 3rd interface can be the interface in the interface standards such as IDE, SCSI, S-ATA, S-ATAII, ESDI, SAS and ST-506, and first interface then is another interface of the interface standard under corresponding the 3rd interface.And the 4th interface can be the interface in the interface standards such as ISA, EISA, VL and PCI, and second interface then is another interface of the interface standard under corresponding the 4th interface.
In addition, the motherboard and first substrate up and down superimposed mode make the 4th interface and the second interface combination.
Describe the present invention below in conjunction with the drawings and specific embodiments, but not as a limitation of the invention.
Description of drawings
Fig. 1 is the system architecture diagram of the hard disk controller of prior art;
Fig. 2 is the system architecture diagram of independent hard disk controller according to an embodiment of the invention.
Wherein, Reference numeral is as follows:
The 11-signal wire
The 100-substrate
The 110-hardware controller
120-hard drive bus
130-first PC bus
132-second PC bus
134-the 3rd PC bus
140-gets control device soon
The 150-high-speed cache
The 210-hard disk
The 220-winding displacement
300-first substrate
310-hard disk control device
320-first interface
330-second interface
The 400-hard disk
420-the 3rd interface
500-second substrate
510-gets control device soon
The 520-high-speed cache
530-the 4th interface
Embodiment
Below enumerate specific embodiment describing content of the present invention in detail, and with icon as aid illustration.The label of mentioning in the explanation please refer to accompanying drawing.
With reference to Fig. 2, be the independent hard disk controller of one embodiment of the invention.One hard disk control device 310 is arranged on first substrate 300, and is connected to one first interface 320 and one second interface 330 by signal wire.First interface 320 can be connected to a hard disk 400 by a winding displacement.Just, have one the 3rd interface 420 on the hard disk 400, and this winding displacement can link first interface 320 and the 3rd interface 420 mutually, to transmit signal and data.
And second interface 330 can combine with the 4th interface 530 on one second substrate 500, or links second interface 330 and the 4th interface 530 by another winding displacement.Wherein, on second substrate 500, have in addition and get control device 510 and high-speed cache 520 soon.At this, get control device 510, high-speed cache 520 and the 4th interface 530 soon and link mutually by signal wire.
When the main system (not shown) on second substrate 500 is sent harddisk access and is required signal, this signal is sent to hardware controller 310 by the 4th interface 530, second interface 330, this moment, hardware controller 310 can send signal to the first interfaces 320 such as hard disk control, and carried out the transmission work of hard disk 400 and 500 data of second substrate.
Whether in addition, harddisk access requires signal also to be sent to and gets control device 510 soon, gets control device 510 this moment soon and sends one and get control and one soon and get address signal soon and give high-speed cache 520, have one to back up and be stored in the high-speed cache 520 to check the data of desiring access.
If this access require signal be a reading requirement and the data desiring to read in high-speed cache 520, get 510 of control device soon and in high-speed cache 520, read the data of desiring to read, and send main system to.
If it is that a reading requirement and the data desiring to read are not in high-speed cache 520 that this access requires signal, then getting control device 510 soon produces a miss information and this information is passed through the 4th interface 530, second interface 330 and the notice hardware controller 310, at this moment, hardware controller 310 sends the hard disk control signal and by the binding of first interface 320 and the 3rd interface 420 hard disk 400 is carried out reading of data, binding by second interface 330 and the 4th interface 530 sends main system to again, and with this hard disc data by main system control and in the write cache 520, with reading fast of convenient next hard disc data.
If it is one to write when requiring that this access requires signal, then desire the data that write by second interface 330 and the 4th interface 530 the binding and the binding of first interface 320 and the 3rd interface 420 and write in the hard disk 400 via hard disk control device 310.Simultaneously, get control device 510 soon and check whether the data that write have the memory cache district of a correspondence in high-speed cache 520.If any, then send address, control signal and give and get control device 510 soon, and then with data write cache again 520 to upgrade its data.
At this, the 3rd interface is the interface in the driving interface standards such as IDE, SCSI, S-ATA, S-ATA II, ESDI, SAS and ST-506, and first interface is then for corresponding to another interface of driving interface standards such as IDE, SCSI, S-ATA, S-ATA II, ESDI, SAS and ST-506.In addition, the 4th interface is the interface in the interface standards such as ISA, EISA, VL and PCI, and second interface is then for corresponding to another interface of interface standards such as ISA, EISA, VL and PCI.
In addition, first substrate and second substrate can the overlap mode combinations, to dwindle the volume of single unit system, the trend of advancing to close the equality circuit microminiaturization.And,, therefore can design more signal track (tracks) to increase signal quality because hardware controller independently is arranged on one first substrate.At this, second substrate can be a motherboard.And hardware controller can be a hard disk control chip.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.
Claims (7)
1, a kind of independent hard disk controller in order to connect a motherboard and a hard disk, is characterized in that, comprising:
One first substrate;
One first interface is arranged at described first substrate, in order to be electrically connected to described hard disk;
One second interface is arranged at described first substrate, in order to be electrically connected to described motherboard; And
One hard disk control device is arranged at described first substrate and is connected to described first and second interfaces, in order to transmit signal and the data between described motherboard and described hard disk.
2, independent hard disk controller according to claim 1 is characterized in that, described hard disk has one the 3rd interface, and described the 3rd interface can be connected by a winding displacement and described first interface.
3, independent hard disk controller according to claim 2, it is characterized in that, described the 3rd interface can be the interface in the interface standards such as IDE, SCSI, S-ATA, S-ATA II, ESDI, SAS and ST-506, and described first interface then is another interface of corresponding described interface.
4, independent hard disk controller according to claim 1 is characterized in that, described motherboard has one the 4th interface, and described the 4th interface and described second interface are connected.
5, independent hard disk controller according to claim 4 is characterized in that, described the 4th interface can be the interface in the interface standards such as ISA, EISA, VL and PCI, and described second interface then is another interface of corresponding described interface.
6, independent hard disk controller according to claim 4 is characterized in that, described motherboard and described first substrate are in superimposed mode up and down, make described the 4th interface and the described second interface combination.
7, independent hard disk controller according to claim 1 is characterized in that, described hard disk control device is a hard disk control chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100027217A CN100378694C (en) | 2005-01-19 | 2005-01-19 | Independent hard disk controller |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100027217A CN100378694C (en) | 2005-01-19 | 2005-01-19 | Independent hard disk controller |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1808403A true CN1808403A (en) | 2006-07-26 |
| CN100378694C CN100378694C (en) | 2008-04-02 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005100027217A Expired - Fee Related CN100378694C (en) | 2005-01-19 | 2005-01-19 | Independent hard disk controller |
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| Country | Link |
|---|---|
| CN (1) | CN100378694C (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104615565A (en) * | 2015-02-12 | 2015-05-13 | 浪潮电子信息产业股份有限公司 | SAS card device with transmission rate reaching 12Gb |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1036298C (en) * | 1993-10-15 | 1997-10-29 | 清华大学 | Hard disk recording method controlled by single chip processor and its appliance |
| US20030159012A1 (en) * | 2002-02-18 | 2003-08-21 | Yec Co., Ltd. | Back-up system |
| CN1492345A (en) * | 2002-10-22 | 2004-04-28 | 张国飙 | Intelligent hard disc |
-
2005
- 2005-01-19 CN CNB2005100027217A patent/CN100378694C/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104615565A (en) * | 2015-02-12 | 2015-05-13 | 浪潮电子信息产业股份有限公司 | SAS card device with transmission rate reaching 12Gb |
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| Publication number | Publication date |
|---|---|
| CN100378694C (en) | 2008-04-02 |
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Owner name: GUO JINLONG Free format text: FORMER OWNER: YINGYEDA CO., LTD., TAIWAN Effective date: 20141210 |
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Free format text: CORRECT: ADDRESS; FROM: TAIWAN, CHINA TO: 033199 LVLIANG, SHAANXI PROVINCE |
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Effective date of registration: 20141210 Address after: 033199 Shanxi province Lvliang City Fangshan County Street No. 319 North Wayao Founder science and Technology Service Center Patentee after: Guo Jinlong Address before: Taipei City, Taiwan, China Patentee before: Inventec Corporation |
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Granted publication date: 20080402 Termination date: 20160119 |
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