CN1780362A - Synchronous reducer - Google Patents

Abstract

The invention relates to a technology by which presumption and synchronizing deviation can be made along with the direction of minimizing dispersion coefficient about received symbol under the condition of not using filter. Due to not using filter, the performance of synchronizing reduction device can't be depended on specific part of frequency so that the performance degradation of synchronizing reduction can be prevented in specific frequency. Specially, even if in the frequency whose selectivity is decreased, the synchronizing deviation also can be captured steadily.

Description

Synchronous reducer

Technical field

The present invention relates to broadcasting receiver, relate in particular to the synchronous reducer of reduction symbol clock from the data that received.

Background technology

Fig. 1 is the structure pie graph of common digital receiver, it comprises: antenna 101, tuner 102, analog processing unit 103, A/D converting unit 104, phase separator 105, carrier redactor (Carrier Recovery) 106, sign synchronization reductor 107, channel equalizer (Channel Equalizer) 108, phase tracking device (Pha se Tracer) 109, channel decoder 110, A/V (Audio/Video) signal processing unit 111.

In tuner 102, be converted into passband (Passband) signal of intermediate frequency (Intermediate Frequency:IF) by the aerial ripple signal of antenna 101 receptions, this signal is in order to remove the radio-frequency component that generates in intersymbol interference and the tuner 102, by the analog processing unit 103 that is made of SAW filter, gain adjustment unit (AGC:Automatic Gain Controller) etc.

And, in A/D converting unit 104, under the situation of using fixed oscillator, analog signal conversion is become to have the digital signal of fixed frequency.The passband signal that is converted into digital signal is converted into composite signal via phase separator 105, and this composite signal is converted into base band (Baseband) signal via carrier redactor 106.

By the baseband signal of carrier redactor 106 transmission, as being used to reduce the input of sign synchronization reductor 107 of symbol clock.

For the signal that receiving system received to digital TV and so on reduces, must generate with receiver in the identical clock of employed clock.The part of carrying out this effect is a sign synchronization reductor 107.

That is, sign synchronization reductor 107 is clocks of reduction symbol rank, and the target of reduction is synchronously: according to the data rows that is received, correct and infer sign change time point in the receiver accurately.

This sign synchronization reductor 107 transmission are arranged in the base band of digital TV receiver and the symbol data that the channel equalizer in the rear end is synchronized.

The output signal of sign synchronization reductor 107 is imported into channel equalizer 108, removes by transmission channel in channel equalizer 108 and composes the intersymbol interference (Inter SymbolInterference) that adds.And the residual phase of the carrier wave of failing to remove in carrier redactor 106 is reduced by phase tracking device 109.

Like this, through the signal of phase place correction by channel decoder (FEC) 110 by channel, simultaneously the error that is generated is revised.Signal by channel decoder 110 is transferred to A/V signal processing unit 111.

In A/V signal processing unit 111, can decode to video and the audio signal handled through MPEG2 and Dolby AC-3 mode, export by display and loud speaker 200 again.

In the formation of this digital broadcasting transmitter, the essential structure of sign synchronization reductor 107 as shown in Figure 2.

As shown in Figure 2, sign synchronization reductor 107 is made of inserter (Interpolator) 201, synchronous error detector 202 and loop filter 203.

Carry out the inserter 201 of the signal of A/D conversion by A/D converting unit 104 via phase separator 105 and the synchronous reductor 107 of carrier redactor 106 incoming symbols.Inserter 201 is by generating the median of the signal of sampling from A/D converting unit 104, output and actual symbol synchronizing frequency and the approaching sampling of phase place.

The output of inserter 201 is transferred to synchronous error detector 202, extracts synchronous error according to multiple algorithm.And the control signal of inserter 201 is the output signal of synchronous error detector 202 to be passed through loop filter 203 obtain.

Fig. 3 is the structure pie graph of the sign synchronization reductor of Gardner (Gardner) mode that is widely used in DTV receiver and other digital communication.

Enter from the input of the composite signal of carrier redactor output, generate 2 times the sampling that is equivalent to symbol frequency as resampler (Resampler) 301.

Assign to reduce the pattern jitter (pattern jitter) that forms by means of data for the real part of only taking wherein, utilize 1/2 place of 302 pairs of symbol frequencies of prefilter to carry out pre-filtering (prefiltering).

Through being transfused to Gardner's synchronous error detector (Gardner Timing Error Detector:Gardner TED) 303 by prefilter 302 pre-filtered signals, Gardner TED303 detects synchronous error and exports it loop filter 304 of rear end to from the signal of being imported.

Loop filter 304 in the relevant information of the synchronous error of from Gardner TED303, importing, only make low (frequently) band signal composition by and export digital controlled oscillator (NumericallyControlled Oscillator:NCO) 305 to.

Digital controlled oscillator 305 changes output frequency according to the low strap composition of synchronous error, and generates the control signal that the resampling that is used for counterweight sampling unit 301 is regulated synchronously.

At this moment, the output of resampling unit 301 is output to channel equalizer.

That is, the convergence property that reduces synchronously exerts an influence to the convergence property of the channel equalizer of rear end.Therefore, the convergence property of reduction unit requires to possess initial stage motion capture and the few characteristic of convergence back noise synchronously.

At this moment, for bigger simultaneous bias being carried out catch fast synchronously, the average gain of synchronous error detector (that is, the S-curve chart) must be very big, and reducing the convergence property in loop synchronously must be fine.

Particularly, even for the ghost image near 0dB, in order to catch synchronously fast, the average gain characteristic of synchronous error detector is also extremely important.

Use the synchronous error detector of Gardner's mode, it uses the synchronous error extraction algorithm for the sign synchronization reductor mainly uses the BPSK/QPSK modulation system, and this also is effective under any one pattern of catching and following the trail of; Owing to be not meaning decision feedback system (DecisionDirect), so can in carrier restoring, play a role independently basically.So, under the uncompleted state of carrier restoring, promptly exist under the situation of phase error, also detect characteristic and remove phase error according to synchronous error.That is, ignore the effect that the carrier restoring unit produces, take this to possess the advantage that walks abreast, catches synchronously with the carrier restoring unit.

But, this Gardner's mode, shown in Fig. 4 a and Fig. 4 b, for being equivalent to add 1 symbol delay, 0 degree (phase) the 0dB ghost image of null value (Null) or the ghost image of 2 symbol delays, 180 degree 0dB sizes on 1/2 the frequency spectrum of symbol frequency, the average gain of synchronous error detector (S-curve chart) is almost near 0, and therefore reduction unit has the problem that can't catch simultaneous bias synchronously.

And, Fig. 5 a and Fig. 5 b are that the influence because of the shake (Jitter) that carrier restoring produces is ignored in expression, forcibly compose to add the about 0.0001 times initial stage simultaneous bias (offset) that is equivalent to sample frequency carries out the result of emulation with the convergence property to synchronous reduction loop chart.

Referring to Fig. 5 a and Fig. 5 b, under the situation that has 1 symbol delay, 0 degree 0dB ghost image or 2 symbol delays, 180 degree 0dB ghost images, can confirm not restrain by initial stage simultaneous bias value.This is as the result who in statu quo reflects average gain (S-curve chart) characteristic of synchronous error detector, can reaffirm that synchronous reductor can't catch the problem of simultaneous bias.

In order to remedy the shortcoming of this Gardner's mode, there is the method for the output of prefilter being carried out standardization (Normalization).Actual conditions are, though this method can shorten convergence time, the shake composition after the convergence are increased, can't be as the solution to the essence under the serious situation about reducing of frequency content.

Summary of the invention

The present invention proposes for addressing the above problem just, its purpose is to provide the synchronous reducer with following feature: make the performance of synchronous reducer not rely on the frequency characteristic part, take this, even with multiplex (MUX) (Multi-path channel) similarly in the frequency selective fading channels (Frequency Selective Fading channel), also can stably catch simultaneous bias.

Synchronous reducer according to the present invention's design that is intended to realize above-mentioned purpose comprises with the lower part: the DC remover of removing the DC composition of the symbol that is received; Receive the simultaneous bias feedback of current sign, the resampler that inserts to the direction of signal that reduces to have removed the DC composition and the error between the signal; For signal being reduced, with the matching type filter of the transmission filter coupling that once was used for transferring input signal by the literal that has transmitted; Infer the synchronous error detecting unit of synchronization shift information to the minimized direction of the coefficient of dispersion of the symbol that will from the matching type filter, export; In the synchronization shift information of from the synchronous error detecting unit, exporting, the loop filter that the low strap signal component is filtered only; According to the synthetic oscillator that the low strap composition of synchronization shift information changes output frequency and the sample-synchronous of counterweight sampling unit is regulated.

Preferably, above-mentioned synchronous error detecting unit is a feature to use following formula to follow the trail of synchronization shift information.

${\mathrm{\τ}}_{k+1}={\mathrm{\τ}}_k-u{\left|y_k\left({\mathrm{\τ}}_k\right)\right|}^2-{\mathrm{\γ}}_T)y_k\frac{B}{B_{{\mathrm{\τ}}_k}}{y}_k\left({\mathrm{\τ}}_k\right)$

At this, μ: step size

τ _K+1, τ _k: simultaneous bias

y _k(τ _k): the output of matching type filter

γ _T: the coefficient of dispersion of former symbol

Preferably, the synchronous error detecting unit utilizes the real number composition of all symbols of exporting from the matching type filter and imaginary number composition to follow the trail of synchronization shift information.

Preferably, the synchronous error detecting unit only utilizes the real number composition of the symbol of exporting from the matching type filter to follow the trail of synchronization shift information.

Preferably, the matching type filter is a square root cosine matching type filter (square-root-cosine filter).

Preferably, the synchronous error detector is according to the MSE (Mean Square Error) of step size (μ) decision convergence rate and normal condition.

Preferably, being characterized as of synchronous error detector: step size (μ) becomes big more, and it is fast more that convergence rate just becomes, and the residual MSE under normal condition just increases; Step size (μ) becomes more little, and residual MSE just reduces, and convergence rate just slows down.

Description of drawings

Fig. 1 is the structure pie graph of common digital receiver.

The basic structure pie graph of the synchronous reductor of Fig. 2 is-symbol.

Fig. 3 is the structure pie graph of the sign synchronization reductor of Gardner's mode.

Fig. 4 a and Fig. 4 b are the charts of average gain (S-curve chart) characteristic of the synchronous error detector of expression Gardner mode.

Fig. 5 a and Fig. 5 b are the result of emulation is carried out in expression to the convergence property in the synchronous reduction loop of Gardner's mode charts.

Fig. 6 is the coefficient of dispersion (γ that represents the 8-VSB digital signal that is received the unit reception by channel _R) tendency carry out the result's of emulation chart.

Fig. 7 is the chart that the variation of the coefficient of dispersion produced because of simultaneous bias (Timing offset) of expression is inclined to.

Fig. 8 is the structure pie graph of the synchronous reducer that proposes among the present invention.

Fig. 9 a and Fig. 9 b are the chart of expression according to average gain (S-curve chart) characteristic of the synchronous reducer of the present invention's design.

Figure 10 a and Figure 10 b are the charts that the convergence property to the synchronous reduction loop of foundation the present invention design carries out emulation.

Accompanying drawing major part symbol description:

801:DC remover 802: resampler

803: integration kalman filter device 804: disperse to minimize synchronous error detector (DMTED)

805: loop filter 806:NCO

Embodiment

Other purpose of the present invention, feature and advantage can obtain understanding to the detailed description that embodiment did by the reference accompanying drawing.

Before the synchronous reducer to foundation the present invention design describes, do following explanation to calculating the process of in synchronous error detecting unit of the present invention, inferring the calculating formula of synchronous error.

Definite value modulus algorithm (Constant Modulus Algorithm:CMA) began to be applied to high definition TV (HDTV) receiver to cover equalization algorithm (Blind Equalization Algorithm) from the mid-90, it is as the theory through broad development and establishment, including in what write as by C.Richard Johnson is the Proc.IEEE of topic with " Blind Equalization Using theConstant Modulus Criterion:A View ", Vol.86 is in the No.10 0ct.1998 document.

This definite value modulus algorithm (CMA) is to the convergence of the minimized direction of definite value modulus (Constant Modulus:CM) cost function, and definite value modulus cost function then has very big value more more at the signal that is received away from the size of original signal or when distributing.

The present invention will be covered adaptive algorithm (Blind Adaptive Algorithm) and will be applied to the synchronous error detecting unit, and intention improves the performance of synchronous reducer.

The relation of self-adaptation type algorithm (Adaptive Algorithm) and lock unit, including in what write as by Willian A Sethares is the IEEE Conf of topic with " An Adaptive View ofSynchronization ", Circuits and SystemsMWSCAS2002, Tulsa, in the OK Aug.2002 document, we can say, used the algorithm of 2 cost functions to be applied in the sign synchronization reductor of OFM (Output Energy Maximization) mode and Gardner's mode.

In the present invention, use 4 cost functions that are called the coefficient of dispersion (Dispersion Constant:DC) performance of synchronous reducer is analyzed, confirm HDTV receiver and other communication system that it can be applicable to the 8-VSB mode.

At first, the meaning of the coefficient of dispersion is as follows.

Original signal in the transmitter unit generates from the symbol with certain sequence (constellation), the coefficient of dispersion (γ) that these symbols are intrinsic.

If former symbol is called S _n, the coefficient of dispersion (γ in the transmitter unit then _T) can express as following mathematical expression 1.

[mathematical expression 1]

${\mathrm{\γ}}_T=\frac{E\left\{{\left|S_n\right|}^4\right\}}{{{\mathrm{\σ}}_s}^2},{{\mathrm{\σ}}_s}^2=E\left\{{\left|S_n\right|}^2\right\}$

At this, E{.} represents overall desired value (ensemble expectation).

The 8-VSB system, its emission symbol conduct ± 1, ± 3, ± 5, ± 7 18 energy level signals, have the 1 yuan characteristic different with the QAM mode.

If 8-VSB is launched the coefficient of dispersion (γ that the above-mentioned mathematical expression 1 of value of symbol substitution is calculated in the transmitter unit _T), then can obtain

${\mathrm{\γ}}_T=\frac{\underset{8}{{|-7|}^4+{|-5|}^4+{|-3|}^4+{|-1|}^4+{\left|1\right|}^4+{\left|3\right|}^4+{\left|5\right|}^4+{\left|7\right|}^4}}{\underset{8}{{|-7|}^2+{|-5|}^2+{|-3|}^2+{|-1|}^2+{\left|1\right|}^2+{\left|3\right|}^2+{\left|5\right|}^2+{\left|7\right|}^2}}$

37 value.

If the signal that is received in the receiving element is identical with original signal in the transmitter unit, then the sequence of received signal (constellation) is with a demonstration, and the calculated value of the coefficient of dispersion in receiving element and the transmitter unit must be consistent with each other.

But if the influence that the signal that is received in the receiving element produces because of channel becomes dusky, then the disperse system numerical value in the receiving element becomes bigger than the disperse system numerical value of transmitter unit.

Fig. 6 is the coefficient of dispersion (γ that represents the 8-VSB digital signal that is received the unit reception by channel _R) the tendency schematic diagram that carries out emulation.

Under the situation that does not have ghost image (no ghost) on the channel, the coefficient of dispersion (γ in the receiving element _R) value be about 37, with the coefficient of dispersion (γ of original signal _T) identical.

At this, γ _RBe the coefficient of dispersion in the receiving element (Receiver), γ _TExpression transmitter unit (Transmitter) is the coefficient of dispersion of original signal.

But, can recognize, by AWGN and signal ghost image (signal ghost) channel the time, the coefficient of dispersion (γ in the receiving element _R) value becomes than the coefficient of dispersion (γ in the transmitter unit _T) value greatly.

That is, can confirm that under the situation that is AWGN (SNR 15dB) channel, the coefficient of dispersion is about 37.5, increases about 0.5; Under the situation that is 1 symbol delay 0dB ghost image,, has the value about 47,45,53,43 respectively for ghost image phase place 0 degree, 90 degree, 180 degree, 270 degree.

And Fig. 7 is the chart that the variation of the coefficient of dispersion of expression simultaneous bias (Timing offset) is inclined to.Can confirm, have simultaneous bias (τ _κ) situation under, the distribution of signal (constellation) becomes dusky, simultaneously the coefficient of dispersion (γ) value increases.

On this meaning, can be with the coefficient of dispersion as cost function, and to its minimized direction is inferred the necessary parameter of receiving element (parameter).

In the present invention, intention is applied to synchronous reducer with this principle, and when simultaneous bias (Timing offset) is changed, to the coefficient of dispersion (γ in the receiving element _R) minimized direction infers simultaneous bias.

If (Timing offset) is called τ with simultaneous bias _κ, the input signal of synchronous error detector is called y _κ(τ _κ), then be used for the coefficient of dispersion (γ with receiving element _R) minimized cost function (cost function), J (τ) is identical with following mathematical expression 2.

[mathematical expression 2]

$J\left(\mathrm{\τ}\right)=E\left\{{({\left|y_k\left(\mathrm{\τ}\right)\right|}^2-{\mathrm{\γ}}_T)}^2\right\},{\mathrm{\γ}}_T=\frac{E\left\{{\left|S_n\right|}^4\right\}}{E\left\{{\left|S_n\right|}^2\right\}}$

At this, E{} represents overall desired value (ensemble expectat ion), γ _TThe coefficient of dispersion in the expression receiving element, S _nOriginal signal in the expression receiving element.

And, if use stochastic gradient algorithm (stochastic gradient algorithm), then shown in mathematical expression 3, can be in the hope of with the minimized simultaneous bias (τ of cost function (J (τ)) _κ) value.

[mathematical expression 3]

${\mathrm{\τ}}_{k+1}={\mathrm{\τ}}_k-u{\left|y_k\left({\mathrm{\τ}}_k\right)\right|}^2-\mathrm{\γ})y_k\frac{B}{B{\mathrm{\τ}}_k}{y}_k\left({\mathrm{\τ}}_k\right)$

At this, μ is the value of the MSE (Mean Square Error) under decision convergence rate and the normal condition as step size (step size).

That is, under the very big situation of step size (μ), convergence rate is accelerated, and is big but the residual MSE under the normal condition becomes; On the contrary, under the very little situation of step size (μ), residual MSE diminishes, but convergence rate slows down.

The present invention is basis with the foregoing, and intention is provided with the synchronous error detector, inferring simultaneous bias according to above-mentioned mathematical expression 3.

Identical with it, under the situation that the synchronous error detector is set, can be with the coefficient of dispersion (γ in the receiving element _R) minimize.On this meaning, below synchronous error detector called after of the present invention is disperseed to minimize synchronous error detector (Dispersion MinimizationTiming Error Detector: hereinafter referred to as DMTED).

It is definition cost function the sequence (Constellation) from symbol that dispersion of the present invention minimizes synchronous error detector (DMTED), therefore exists in signal under the situation of DC composition, then obtains diverse result.

Thereby, before the synchronous error detector, the DC remover should be set earlier, in order to reduce the influence that produces because of the integration kalman filter device in the transmitter unit, only after front end is by the integration kalman filter device, detect synchronous error, just can try to achieve value more accurately.

Below, do following explanation with reference to accompanying drawing with regard to the preferred embodiments of the present invention.

Fig. 8 is the structure pie graph of the synchronous reductor that proposes of the present invention, by DC remover 801, resampler 802, matching type filter (MF) 803, disperse to minimize synchronous error detector (DMTED) 804, loop filter 805 and NCO 806 and constitute.

With regard to regard to the composite signal of carrier redactor output, the output characteristic that minimizes synchronous error detector 804 for the dispersion that prevents the rear end changes because of the DC signal component, and the DC signal component is removed by DC remover 801.

The signal of having removed the DC signal component by DC remover 801 enters as the input of resampler (Resampler) 802, generates 2 times the sampling that is equivalent to symbol frequency.

And matching type filter 803 is complementary with the transmission filter that once was used for transferring input signal (not shown) for the literal recovering signal that has transmitted.

Generally speaking, work with the square root cosine matching type filter (square-root-cosine filter) that exceeds bandwidth, to meet the DVB specification with a=0.35.

And, above-mentioned dispersion minimizes synchronous error detector (DispersionMinimization Timing Error Detector: hereinafter referred to as DMTED) 804 and must utilize the signal that filters by matching type filter 803 that the minimized direction of the coefficient of dispersion is inferred simultaneous bias, and exports it loop filter 805 of rear end to.

At this moment, disperse to minimize synchronous error detector 804, can utilize all to infer simultaneous bias, also can give up imaginary number composition (Q) and only utilize real number composition (I) to infer simultaneous bias by the real number composition and the imaginary number composition of the signal of matching type filter 803 filtrations.

At this moment, the input signal that disperses to minimize synchronous error detector 804 is the output signal of matching type filter 803 just, and therefore the Yk () of above-mentioned mathematical expression 2 and mathematical expression 3 is equivalent to the output signal of matching type filter 803.Disperse to minimize the output signal y that the synchronous error detector receives matching type filter 803 _κ(τ _κ), try to achieve the simultaneous bias value that satisfies mathematical expression 3.

And, loop filter 805 relevant from the information of the simultaneous bias value of disperseing to minimize 804 inputs of synchronous error detector, only make the low strap signal component by and export digital controlled oscillator (Numerically Controlled Oscillator:NCO) 806 to.

Digital controlled oscillator 806 changes output frequency according to the low strap composition of synchronous error, and generates the control signal that the sample-synchronous that is used for counterweight sampling unit 802 is regulated.

Fig. 9 a and Fig. 9 b are the chart of expression according to average gain (S-curve chart) generation of the synchronous reducer of the present invention's design.

With regard to synchronous reducer of the present invention, even owing to do not use prefilter good, so for specific ghost image, the gain of average gain (S-curve chart) can seriously not reduce.

That is, owing to do not use prefilter, so the performance of synchronous reducer does not rely on the specific part of frequency; Take this, though with multiplex (MUX) (Multi-path channel) similarly in the frequency selective fading channels (Frequency Selective Fading channel), also show stable performance.

Figure 10 a and Figure 10 b are the influences that the shake that produces because of carrier restoring is ignored in expression, force to give about 0.0001 times initial stage simultaneous bias (offset) that is equivalent to sample frequency and the schematic diagram that the convergence property in synchronous reduction loop is carried out the result of emulation.

Referring to Figure 10 a and Figure 10 b, under the situation that has 1 symbol delay, 0 degree 0dB ghost image or 2 symbol delays, 180 degree 0dB ghost images, can confirm that also it passes through initial stage simultaneous bias value convergence, thereby can confirm, can stably catch synchronous error to all frequency contents according to the synchronous reducer of the present invention's design.

Above-mentioned the present invention is taken this to the minimized direction of the coefficient of dispersion is inferred simultaneous bias, even do not use prefilter good before simultaneous bias detects.

Thereby, the performance of synchronous reducer does not rely on the specific part of frequency, therefore with multiplex (MUX) (Multi-path channel) similarly in the frequency selective fading channels (FrequencySelective Fading channel), can realize that also stable synchronous error catches performance.

By the above content that is illustrated, the staff of this area can recognize, can carry out numerous variations and correction within the scope that does not break away from technological thought of the present invention.

Thereby, the content that technical scope of the present invention is not limited among the embodiment to be write down, and should determine according to the claim scope.

Claims (7)

1, a kind of synchronous reducer is characterized in that, comprising:

Remove the DC remover of the DC composition of the symbol that is received;

Receive the simultaneous bias feedback of current sign, the resampler that inserts to the direction of signal that reduces to have removed the DC composition and the error between the signal;

For signal being reduced, with the matching type filter of the transmission filter coupling that once was used for transferring input signal by the literal that has transmitted;

Infer the synchronous error detecting unit of synchronization shift information to the minimized direction of the coefficient of dispersion of the symbol that will from the matching type filter, export;

In the synchronization shift information of from the synchronous error detecting unit, exporting, the loop filter that the low strap signal component is filtered only; And

According to the synthetic oscillator that the low strap composition of synchronization shift information changes output frequency and the sample-synchronous of counterweight sampling unit is regulated.

2, synchronous reducer as claimed in claim 1 is characterized in that, described synchronous error detecting unit uses following mathematical expression to infer synchronization shift information:

${\mathrm{\τ}}_{k+1}={\mathrm{\τ}}_k-\mathrm{\μ}{\left|y_k\left({\mathrm{\τ}}_k\right)\right|}^2-{\mathrm{\γ}}_T)y_k-\frac{B}{B{\mathrm{\τ}}_k}{y}_k\left({\mathrm{\τ}}_k\right)$

At this, μ: step size

τ _K+1, τ _k: simultaneous bias

y _k(τ _k): the output of matching type filter

γ _T: the coefficient of dispersion of former symbol.

3, synchronous reducer as claimed in claim 1 is characterized in that, all the real number compositions and the imaginary number composition of the symbol that the utilization of described synchronous error detecting unit is exported from the matching type filter are inferred synchronization shift information.

4, synchronous reducer as claimed in claim 1 is characterized in that, described synchronous error detecting unit only utilizes from the real number composition of the symbol of matching type filter output and infers synchronization shift information.

5, synchronous reducer as claimed in claim 1 is characterized in that, described matching type filter is a square root cosine matching type filter.

6, synchronous reducer as claimed in claim 2 is characterized in that, described synchronous error detector is according to the MSE (MeanSquare Error) under step size (μ) decision convergence rate and the normal condition.

7, synchronous reducer as claimed in claim 6 is characterized in that, being characterized as of described synchronous error detector: step size (μ) becomes big more, and it is fast more that convergence rate just becomes, and the residual MSE under normal condition just increases; Step size (μ) becomes more little, and residual MSE just reduces, and convergence rate just slows down.

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