Novel pretreatment method of aluminum oxide atom deposition layer
Technical Field
The invention relates to a method for manufacturing a semiconductor device, in particular to a novel pretreatment method of a capacitor dielectric aluminum oxide atom deposition layer in a Dynamic Random Access Memory (DRAM).
Background
As a new type of capacitor dielectric, alumina has been commonly introduced in 0.13 micron and sub-0.13 micron DRAM technology. Atomic deposition (ALD) is the most commonly used method for aluminum oxide deposition.
Typically, the bottom electrode of a capacitor in a Dynamic Random Access Memory (DRAM) is comprised of polysilicon. A dielectric layer and a capacitor top electrode are deposited thereon. The ALD alumina dielectric layer is composed of Trimethylaluminum (TMA) and ozone (O)3) Or water vapor (H)2O) is chemically reacted. Due to ozone (O)3) Or water vapor (H)2O) will form silicon dioxide (SiO) with the polysilicon bottom electrode2) And silicon oxide (SiO)2Has a dielectric constant of 3.8) is smaller than that of aluminum oxide (Al)2O3Dielectric constant of (2) is 10), and in order to increase the capacitance of the capacitor, it is necessary to increase the dielectric constant of the dielectric layer to prevent the formation of silicon dioxide (SiO)2). For this purpose, a pretreatment is formed before forming an alumina dielectric layer, and a silicon nitride (SiNx) protective layer is formed on the surface of the polysilicon hemispherical gate layer.
In the present general method for manufacturing a capacitor in a Dynamic Random Access Memory (DRAM), a pretreatment method before forming an aluminum oxide atom deposition layer dielectric includes the steps of:
step 1, depositing a polysilicon gate layer with the thickness of 400 Å to 500 Å, then,
step 2, performing heat treatment to form a polysilicon hemispherical crystal gate layer so as to increase the surface area of the polysilicon gate;
step 3, preprocessing is carried out in a heat treatment furnace, ammonia (NH 3)/nitrogen (N2) plasma processing is carried out on the polysilicon hemispherical crystal gate layer, or Chemical Vapor Deposition (CVD) method is used for depositing silicon nitride (Si)3N4Or SiNx) Protective layer of silicon nitride (Si)3N4Or SiNx) The protective layer has a thickness of less than 50 Å to prevent subsequent deposition of aluminum oxide (Al)2O3) In the process step of the dielectric layer, polysilicon reacts with oxygen to form silicon oxide (SiO)2);
Step 4, placing the wafer after the steps 1 to 3 in a reaction chamber, and introducing the reaction chamberTrimethylaluminum (TMA) and ozone (O)3) Or water vapor (H)2O), chemically reacting trimethylaluminum with ozone or water vapor, the specific chemical reaction formula being:
then on silicon nitride (Si)3N4Or SiNx) Alumina (Al) was deposited to a thickness of 50 Å a on the protective layer2O3) A dielectric layer.
The above-mentioned prior pretreatment method can prevent deposition of alumina (Al)2O3) In the process step of the dielectric layer, polysilicon reacts with oxygen to form a silicon oxide layer (SiO)2) However, conventionally, silicon nitride (Si) is formed3N4Or SiNx) The pretreatment method of the protective layer, the pretreatment step and the subsequent alumina dielectric layer forming step are carried out in different equipment, and have the defects of difficult operation, long process flow, easy pollution, more used equipment and high manufacturing cost.
Disclosure of Invention
To overcome the existing formation of silicon nitride (Si)3N4Or SiNx) The present invention is proposed to solve the disadvantages of the pretreatment method of the protective layer.
The DRAM capacitor forming method according to the present invention includes
Step 1, etching to form DRAM capacitor holes;
step 2, forming SiO2An isolation layer;
step 3, carrying out pretreatment, finishing the wafers in the step 1 and the step 2, and forming silicon hemispherical grains (HSG) in a furnace;
step 4, performing nitrogen treatment on the surface of the HSG in an Atomic Layer Deposition (ALD) furnace or a reaction chamber to form SiNx;
step 5, ALD Al deposition in the same furnace as the pretreatment2O3;
And 6, depositing a polysilicon top electrode.
The method for pretreating an alumina atom deposition layer according to the present invention comprises the steps of:
step 1, depositing a polysilicon gate layer with the thickness of 400 Å to 500 Å, then,
step 2, performing heat treatment to form a polysilicon hemispherical crystal gate layer so as to increase the surface area of the polysilicon gate layer;
step 3, carrying out pretreatment, putting the wafer after completing the step 1 and the step 2 into the aluminum oxide (Al) to be deposited2O3) Atomic layerIn an alumina atomic layer deposition furnace, alumina (Al)2O3) Atomic layer deposition furnace introduction of NH3 or NO or N2O gas and argon (Ar) or helium (He) or nitrogen(N2) forming a silicon nitride (SiNx) protective layer with a thickness of 5 Å to 40 Å on the polysilicon hemi-hemispherical crystal gate layer at a temperature of 500 to 700 ℃ in a mixed gas atmosphere, wherein the surface nitriding process can also be performed by Remote Plasma Nitridation (RPN);
step 4, the wafer processed in step 3 is not treated with alumina (Al)2O3) Taking out the atomic layer deposition furnace, and directly introducing Trimethylaluminum (TMA) and ozone (O) into the aluminum oxide atomic layer deposition furnace3) Or water vapor (H)2O), mixing Trimethylaluminum (TMA) and ozone (O)3) Or water vapor (H)2O) and the specific chemical reaction formula is:
in silicon nitride (Si)3N4Or SiNx) Alumina (Al) was deposited to a thickness of 50 Å a on the protective layer2O3) A dielectric layer.
And the step 3 and the step 4 are carried out in the same aluminum oxide atomic layer deposition furnace.
Drawings
The objectives and other advantages of the invention will be better understood from the following description taken in conjunction with the accompanying drawings, which are a part of the specification, illustrate, together with the written description, the principles and features of the invention, and together with the description, show embodiments thereof which are representative of the principles and features of the invention. Like parts are designated by like reference numerals throughout the several views of the drawings, in which:
FIG. 1A is a schematic diagram of a conventional DRAM capacitor formation step 1, a DRAM capacitor hole etch formation step;
FIG. 1B is a schematic diagram of a DRAM capacitor formation step 1, a DRAM capacitor hole etch formation step, in accordance with the present invention;
FIG. 2A shows a conventional DRAM capacitor formation step 2, SiO2Schematic diagram of isolation layer formation step;
FIG. 2B is a DRAM capacitor formation step 2, SiO2Schematic diagram of isolation layer formation step;
FIG. 3A is a schematic diagram of a prior art DRAM capacitor formation step 3, silicon hemispherical grain (HSG) formation step in an oven;
FIG. 3B is a schematic diagram of the formation step 3 of silicon hemispherical grains (HSG) in an oven according to DRAM capacitor formation step of the present invention;
FIG. 4A is a schematic diagram of a prior art DRAM capacitor formation step 4, SiNx formation by nitrogen treatment of HSG surfaces in a furnace or CVD reactor;
FIG. 4B is a schematic diagram of the SiNx formation step of nitrogen treatment of HSG surfaces in an Atomic Layer Deposition (ALD) furnace or chamber in accordance with DRAM capacitor formation step 4 of the present invention;
FIG. 5A shows a prior art DRAM capacitor formation step 5 of depositing Atomic Layer Deposition (ALD) Al in an ALD furnace2O3A schematic diagram of the steps;
FIG. 5B shows a DRAM capacitor formation step 5 of ALD Al deposition in the same furnace as the pretreatment step2O3A schematic diagram of the steps;
FIG. 6A is a schematic diagram of a prior art DRAM capacitor formation step 6, a polysilicon top electrode deposition step;
FIG. 6B is a schematic diagram of the DRAM capacitor formation step 6, the step of depositing the polysilicon top electrode, in accordance with the present invention.
Description of the content indicated by reference numerals in the drawings:
1-SiO2 barrier layer (Isolation SiO 2);
2-storage junction polysilicon contact (Stroage node contact poly)
Detailed Description
[ example 1]
The pretreatment method of the aluminum oxide atom deposition layer according to one technical scheme of the invention comprises the following steps:
step 1, depositing a polysilicon gate layer with the thickness of 400 Å to 500 Å, then,
step 2, performing heat treatment to form polysilicon hemispherical crystals so as to increase the surface area of the polysilicon gate layer;
step 3, carrying out pretreatment, putting the wafer manufactured after the step 1 and the step 2 into a position to be deposited with aluminum oxide (Al)2O3) Atomic layer deposition furnace, alumina (Al)2O3) Introducing NH into atomic layer deposition furnace3Treating a mixed gas of gas and argon (Ar) or helium (He) at a temperature of 500 ℃ to 700 ℃ in a mixed gas atmosphere, preferably at 600 ℃, to form a silicon nitride (SiNx) layer having a thickness of 5 Å to 40 Å, preferably a thickness of 12 Å;
step 4, the wafer processed in the step 3 is not taken out of the aluminum oxide atomic layer deposition furnace,depositing aluminum oxide (Al) in the same aluminum oxide atomic layer deposition furnace2O3) Direct introduction of Trimethylaluminum (TMA) and water vapor (H) into an alumina atomic layer deposition furnace2O), and carrying out chemical reaction on trimethyl aluminum and water vapor, wherein the specific chemical reaction formula is as follows:
in silicon nitride (Si)3N4Or SiNx) protective layer with a thickness of 50 Å a of aluminum oxide (Al)2O3)。
According to the method, the step 3 and the step 4 are carried out in the same atomic layer deposition furnace, and a silicon nitride (SiNx) protective layer and aluminum oxide (Al) are sequentially deposited2O3) A dielectric layer.
[ example 2]
The pretreatment method of the alumina atom deposition layer according to another technical scheme of the invention comprises the following steps:
step 1, depositing a polysilicon gate layer with the thickness of 400 Å to 500 Å, then,
step 2, performing heat treatment to form a polysilicon hemispherical crystal gate layer so as to increase the surface area of the polysilicon gate layer;
step 3, carrying out pretreatment, putting the wafer into the aluminum oxide (Al) to be deposited after finishing the step 1 and the step 22O3) Atomic layer of alumina in an atomic layer deposition furnace, alumina (Al)2O3) Direct introduction of NH into atomic layer deposition furnaces3Treating a mixed gas of a gas and, for example, argon (Ar) or helium (He) at a temperature of 500 deg.C to 700 deg.C, preferably 600 deg.C, to form a silicon nitride (SiNx) layer having a thickness of 5 Å to 40 Å, preferably a silicon nitride (SiNx) layer having a thickness of 12 Å;
step 4, the wafer processed in the step 3 is not taken out of the aluminum oxide atomic layer deposition furnace, trimethyl aluminum (TMA) and ozone are directly introduced into the atomic layer deposition furnace, so that the trimethyl aluminum and the ozone are subjected to chemical reaction, and the specific chemical reaction formula is as follows:
in silicon nitride (Si)3N4Or SiNx) Alumina (Al) was deposited to a thickness of 50 Å a on the protective layer2O3)。
According to the method, the step 3 and the step 4 are carried out in the same atomic layer deposition furnace, and a silicon nitride (SiNx) protective layer and aluminum oxide (Al) are sequentially deposited2O3) A dielectric layer.
It will be appreciated by those skilled in the art that the present invention can be embodied in other specific forms without departing from the spirit or essential characteristics thereof. Therefore, in accordance with the overall teachings of the present invention, the illustrated examples and embodiments are intended to be illustrative rather than restrictive, and the invention is not to be limited to the details given herein. The scope of the invention is defined by the appended claims.