CN1767084A - Multi-layer chip ZnO varistor capable of reducing material cost - Google Patents

Multi-layer chip ZnO varistor capable of reducing material cost Download PDF

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CN1767084A
CN1767084A CN 200510048589 CN200510048589A CN1767084A CN 1767084 A CN1767084 A CN 1767084A CN 200510048589 CN200510048589 CN 200510048589 CN 200510048589 A CN200510048589 A CN 200510048589A CN 1767084 A CN1767084 A CN 1767084A
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zno
protective layer
multilayer chip
porcelain
layer
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CN100520990C (en
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吕呈祥
王兰义
杜辉
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HENAN JINGUAN WANGMA INFORMATION INDUSTRIAL Co Ltd
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HENAN JINGUAN WANGMA INFORMATION INDUSTRIAL Co Ltd
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Abstract

The invention discloses a multi-layer slice ZnO piezoresistor which is characterized in that the preserving layer of the inner structure of the multi-layer slice ZnO piezoresistor is the ceramic body which is formed by pure ZnO ceramic or ZnO and other oxidant; the active layer (effective layer) is bismuth series ZnO piezoresistor ceramic material or promethium series ZnO piezoresistor ceramic material. It also discloses a method for making the multi-layer slice ZnO piezoresistor which can reduce the material cost.

Description

A kind of multilayer chip ZnO varistor that reduces material cost
Technical field
The present invention relates to a kind of multilayer chip varistor, particularly relate to a kind of multilayer chip ZnO varistor and manufacture method thereof that reduces material cost.
Background technology
MLV MLV (multilayer chip varistor) adopts the sandwich construction of sheet capacitor (MLCC), piezo-resistance by a plurality of separation is formed in parallel, compare with the piezo-resistance of traditional single disk band lead-in wire, have advantages such as volume is little, through-current capacity is big, response speed is fast, direct surface mounts, the low pressureization and the miniaturization issues of piezo-resistance have successfully been solved, and the requirement of suitable surface mounting technology (SMT), therefore, MLV becomes the research focus and the future thrust of piezo-resistance.
As everyone knows, produce the effective layer in the internal structure that is of voltage-sensitive effect (being electrical property) in the multilayer chip varistor, protective layer can't produce voltage-sensitive effect, so protective layer can pressure-sensitive porcelain.And the material that existing protective layer adopted all the material with effective layer is identical, for bismuth is that pressure-sensitive porcelain of ZnO or praseodymium are the pressure-sensitive porcelain of ZnO.Owing to the material price costliness, cause the cost height of the multilayer chip ZnO varistor that produces.And, caused the waste of rare precious metal because protective layer uses and an effective layer identical materials can not produce voltage-sensitive effect.Therefore, existing technology exists: the material cost height, effectively use the noble metal rate low, deficiencies such as waste resource.
At present, thus still find no both at home and abroad and close the porcelain body that utilizes pure ZnO porcelain or ZnO and other oxide to form and replace the patent report of voltage-sensitive ceramic as the multilayer chip ZnO varistor of protective layer reduction material cost.
Summary of the invention
The object of the present invention is to provide the coating low and that help anti-creep plating insulating barrier of a kind of production cost to prepare the method for multilayer chip ZnO varistor.
For achieving the above object, the present invention has selected protective layer need not pressure-sensitive porcelain, and uses other material with voltage-sensitive ceramic contraction phase coupling.Because ZnO is in the general pressure-sensitive porcelain of ZnO about shared ratio 90% (percentage by weight), so ZnO is the optimal selection of this protective layer material.In addition, owing to add Bi 2O 3, Sb 2O 3Can reduce the sintering temperature of pure ZnO porcelain, thus sometimes can this be to add Bi in the protective layer material of material of main part with ZnO 2O 3Or Sb 2O 3
Purpose of the present invention is achieved by the following technical programs.
A kind of multilayer chip ZnO varistor that reduces material cost of the present invention; the multilayer chip ZnO varistor that a kind of production technology is routinely made; it is characterized in that the protective layer in the described multilayer chip ZnO varistor internal structure is the porcelain body of pure ZnO porcelain or ZnO and other oxide composition, described active layer (effectively layer) is that pressure-sensitive porcelain of ZnO or praseodymium are the pressure-sensitive porcelain of ZnO for bismuth.
In order to reduce the material cost of multilayer chip ZnO varistor, the protective layer in the described multilayer chip ZnO varistor internal structure is the porcelain that ZnO and other oxide are formed, and other oxide is Bi 2O 3, Sb 2O 3In one or both combinations.Other oxide proportion (percentage by weight) Bi in the protective layer porcelain wherein 2O 30.01 Sb~2%, 2O 30.01~3%.
A kind of above-mentioned manufacture method that reduces the multilayer chip ZnO varistor of material cost, it may further comprise the steps:
(1) by pressure-sensitive ceramic formula batching;
(2) material for preparing is added solvent (dimethylbenzene or ethanol), adhesive, the mixing of dispersant ball milling, it is become be casting slurry;
(3) the casting slurry curtain coating is made effective layer ceramic membrane band;
(4) mixture of forming with certain proportion and other oxide powder with pure ZnO powder or ZnO powder is an initiation material, repeating step (2) and the protective layer used ceramic membrane band of step (3) preparation; The ceramic membrane band is exerted pressure slightly, make ceramic protective layer;
(5) on the inner face of ceramic protective layer the printing in electrode;
(6) on interior electrode, cover effectively layer ceramic membrane band of one deck again, form effectively layer;
(7) the interior electrode of the interior malposition of electrode of printing and preceding printing on effective layer;
(8) repeating step (6) and step (7) reach the crust piece of designing requirement up to effective layer number, and are effectively covering one deck ceramic protective layer at least again above the layer, reach designing requirement up to the thickness that clings to piece;
(9) will cling to static pressure such as piece, cutting crust piece becomes green sheet;
(10) green sheet is heated binder removal;
(11) green compact behind the binder removal are burnt till in the temperature range of 950~1150.
(12) the type piezoresistor ceramics after will burning till adds the abrasive material ball milling in ball mill, eliminates piezo-resistance ceramics acute angle, carries out chamfer angle technique.
(13) the piezo-resistance ceramics after the chamfering is coated with termination electrode (palladium/silver).
(14) the piezo-resistance ceramics that will be coated with termination electrode carries out the silver ink firing processing.
Described step (1) is by pressure-sensitive ceramic formula batching, is that to add 3-7% (molar percentage) bismuth in the ZnO powder of 93-97% (molar percentage) be that powder additives is (mainly by Bi 2O 3, Sb 2O 3, MnCO 3, SiO 2, Cr 2O 3, Co 3O 4, Ni 2O 3In combine more than five kinds or five kinds arbitrarily) or to add 2-7% (molar percentage) praseodymium in the ZnO powder of 93-98% (molar percentage) be that powder additives is (mainly by Pr 6O 11, Co 3O 4, Cr 2O 3Deng composition).Described bismuth is that powder additives proportion in the ZnO porcelain is 3-7% (molar percentage), wherein Bi 2O 30.01 Sb~5%, 2O 30.5 MnCO~5%, 30.1 SiO~3%, 20.01 Cr~2%, 2O 30.01 Co~3%, 3O 40.01 Ni~2%, 2O 30.01~2% (molar percentage).Described praseodymium is that powder additives proportion in the ZnO porcelain is 2-8% (molar percentage), wherein Pr 6O 110.01 Co~5%, 3O 40.1 Cr~5%, 2O 30.01~3% (molar percentage).
Described step (3) is the uniform film band of thickness that the froth breaking curtain coating goes out 5-50 μ m.
Described step (4) is to add other oxide of 0.01~5% (percentage by weight) (mainly by Bi in pure ZnO powder or the ZnO powder 2O 3, Sb 2O 3In one or both combine) for initiation material, described other oxide proportion in the protective layer porcelain is 0.01~55% (percentage by weight), wherein Bi 2O 30.01 Sb~2%, 2O 30.01~3% (percentage by weight), repeating step (2) and the protective layer used ceramic membrane band of step (3) preparation; The ceramic membrane band is exerted pressure slightly, make protective layer used ceramic membrane band, and the ceramic membrane band is pressed in advance the protective layer of 3-20 times of single-layer ceramic film tape thickness.
Described step (6) is to cover the effective layer of one deck on palladium/Ag inner electrode in step (5), and pressurizes a little and form.
Advantage of the present invention is: the material cost of (1) general pressure-sensitive porcelain of ZnO is 2.5 times of pure ZnO porcelain; the gross thickness of general protective layer is more than 25% of type piezoresistor porcelain body thickness (not containing interior thickness of electrode), therefore can reduce at least 15% material cost.Porcelain body with pure ZnO porcelain or ZnO and other oxide composition prepares multilayer chip ZnO varistor as protective layer, is a kind of effective way that reduces the device material cost.(2) because voltage-sensitive ceramic is a semiconductive ceramic; so the plating phenomenon in electroplating process, occurs climbing; pure zinc oxide is an insulator; so lower protective layer is that the plating phenomenon can not appear climbing in the place of pure zinc oxide in electroplating process; so need only apply the insulating barrier of anti-creep plating in the pressure-sensitive porcelain body of chip side gets final product; thereby simplified production technology, and properties of product still keep previous level.The multilayer chip ZnO varistor of this structure helps the coating of anti-creep plating insulating barrier, thereby has simplified production technology.The pressure sensitive voltage of the varistor of (3) making can be adjusted arbitrarily between 3-120V, and non linear coefficient is greater than 20, and leakage current is less than 2 microamperes.It is little that this multilayer chip ZnO varistor has a volume, good temp characteristic, and the non linear coefficient height, cost is low, is applicable to advantages such as mounted on surface.
Description of drawings
Fig. 1 is a kind of schematic diagram that reduces the multilayer chip ZnO varistor of material cost of the present invention;
Fig. 2 is the flow chart of manufacture method of the present invention.
Embodiment
The present invention is further illustrated below in conjunction with the drawings and specific embodiments.
Embodiment one
According to formula table one, accurately take by weighing various materials, the material that weighs up is put in the agitating ball mill zirconium ball of the deionized water of 1-2 times of weight of material and 2-4 times weight of material, ball milling 6 hours.The material that ball milling is good is placed in the stainless steel disc in oven dry about 120 ℃ after 10 hours, the dimethylbenzene, the adhesive of 20-30% weight of material ratio, the dispersant of 0.1-1% weight of material ratio and the zirconium ball of 2-4 times of weight of material that add 40-60% weight of material ratio, ball milling made uniform and stable casting slurry in 24 hours, and to go out thickness be 25 microns effective layer ceramic membrane band to curtain coating then.Accurately take by weighing pure ZnO powder, going out thickness by above technology curtain coating is 50 microns protective layer used ceramic membrane band.Five layers of protective layer used ceramic membrane band pressurize a little and make the lower protective layer a that thickness is about 250 microns; on protective layer a, print electrode b in the alloy that weight ratio is 70% silver medal, 30% palladium; another layer of printing interior electrode again misplaces behind the lamination; until effective layer of c is 8 layers; effectively covering five layers of protective layer used ceramic membrane band on the layer then, pressurization makes the last protective layer a that thickness is about 250 microns a little.Pass through etc. and to cut out the green compact that are of a size of 1.0 * 0.5mm behind the sintering after the hydrostatic pressing, these green compact are placed on the special-purpose load bearing board put into stove, slowly heat up (30 ℃/hr) complete 350 ℃ of insulations 3 hours, after slowly heat up again (30 ℃/hr) to 550 ℃ of insulations 5 hours, be incubated 2 hours 11402 after having arranged glue, be coated with upper end electrode d then, obtain V 1mABe 8V, non linear coefficient is 20, and leakage current is 1.8 microamperes a multilayer chip ZnO varistor.The gross thickness of protective layer is in the present embodiment: 250 * 2=500 micron; Effectively the gross thickness of layer is: 25 * 8=200 micron; The gross thickness of type piezoresistor porcelain body is: the 500+200=700 micron; the gross thickness of protective layer is the type piezoresistor porcelain body thickness 500/700=5/7 of (not containing interior thickness of electrode); so; the material cost of considering the pressure-sensitive porcelain of ZnO is 2.5 times of pure ZnO porcelain, and the ratio of the low material cost of co-falling is in the present embodiment: 5/7 * 1.5/2.5 ≈ 42.8%.
Table one, embodiment one formula table
Name of material ZnO Bi 2O 3 Sb 2O 3 Ni 2O 3 SiO 2 Co 3O 4 Cr 2O 3 MnCO 3 Al 2O 3
Ratio (mole %) 94.99 0.5 1.0 1.0 0.5 1.0 0.5 0.5 0.01
Embodiment two
According to embodiment two formula tables, accurately take by weighing various materials, the material that weighs up is put in the agitating ball mill zirconium ball of the deionized water of 1-2 times of weight of material and 2-4 times weight of material, ball milling 6 hours.The material that ball milling is good is placed in the stainless steel disc in oven dry about 120 ℃ after 10 hours, the dimethylbenzene, the adhesive of 20-30% weight of material ratio, the dispersant of 0.1-1% weight of material ratio and the zirconium ball of 2-4 times of weight of material that add 40-60% weight of material ratio, ball milling made uniform and stable casting slurry in 24 hours, and to go out thickness be 25 microns effective layer ceramic membrane band to curtain coating then.Accurately take by weighing 95% (percentage by weight) ZnO powder, 2% (percentage by weight) Bi 2O 3And 3% (percentage by weight) Sb 2O 3, going out thickness by above technology curtain coating is 50 microns protective layer used ceramic membrane band.Five layers of protective layer used ceramic membrane band pressurize a little and make the lower protective layer a that thickness is about 250 microns; on protective layer a, print electrode b in the alloy that weight ratio is 70% silver medal, 30% palladium; another layer of printing interior electrode again misplaces behind the lamination; until effective layer of c is 8 layers; effectively covering five layers of protective layer used ceramic membrane band on the layer then, pressurization makes the last protective layer a that thickness is about 250 microns a little.Pass through etc. and to cut out the green compact that are of a size of 1.0 * 0.5mm behind the sintering after the hydrostatic pressing, these green compact are placed on the special-purpose load bearing board put into stove, slowly heat up (30 ℃/hr) to 350 ℃ of insulations 3 hours, after slowly heat up again (30 ℃/hr) to 550 ℃ of insulations 5 hours, be incubated 2 hours at 1140 ℃ after having arranged glue, be coated with upper end electrode d then, obtain V 1mABe 9V, non linear coefficient is 21, and leakage current is 1.9 microamperes a multilayer chip ZnO varistor.The gross thickness of protective layer is in the present embodiment: 250 * 2=500 micron; Effectively the gross thickness of layer is: 25 * 8=200 micron: the gross thickness of type piezoresistor porcelain body is: the 500+200=700 micron; the gross thickness of protective layer is the type piezoresistor porcelain body thickness 500/700=5/7 of (not containing interior thickness of electrode); so; the material cost of considering the pressure-sensitive porcelain of ZnO is 2.5 times of pure ZnO porcelain, and by 95% (percentage by weight) ZnO powder, 2% (percentage by weight) Bi 2O 3And 3% (percentage by weight) Sb 2O 3The price of the porcelain that mixes is that the multiple of pure ZnO porcelain is: (1 * 95%+10 * 2%+5 * 3%)/1=1.3, therefore, the ratio of the low material cost of co-falling is in the present embodiment: 5/7 * (2.5-1.3)/2.5 ≈ 34.3%.
Table two, embodiment two formula tables
Name of material ZnO Pr 6O 11 Co 3O 4 Cr 2O 3
Ratio (mole %) 97 0.5 2.0 0.5
Embodiment three
According to embodiment one formula table, accurately take by weighing various materials, the material that weighs up is put in the agitating ball mill zirconium ball of the deionized water of 1-2 times of weight of material and 2-4 times weight of material, ball milling 6 hours.The material that ball milling is good is placed in the stainless steel disc in oven dry about 120 ℃ after 10 hours, the dimethylbenzene, the adhesive of 20-30% weight of material ratio, the dispersant of 0.1-1% weight of material ratio and the zirconium ball of 2-4 times of weight of material that add 40-60% weight of material ratio, ball milling made uniform and stable casting slurry in 24 hours, and to go out thickness be 25 microns effective layer ceramic membrane band to curtain coating then.Accurately take by weighing 99.99% (percentage by weight) ZnO powder, 0.01% (percentage by weight) Bi 2O 3, going out thickness by above technology curtain coating is 50 microns protective layer used ceramic membrane band.Five layers of protective layer used ceramic membrane band pressurize a little and make the lower protective layer a that thickness is about 250 microns; on protective layer a, print electrode b in the alloy that weight ratio is 70% silver medal, 30% palladium; another layer of printing interior electrode again misplaces behind the lamination; until effective layer of c is 8 layers; effectively covering five layers of protective layer used ceramic membrane band on the layer then, pressurization makes the last protective layer a that thickness is about 250 microns a little.Pass through etc. and to cut out the green compact that are of a size of 1.0 * 0.5mm behind the sintering after the hydrostatic pressing, these green compact are placed on the special-purpose load bearing board put into stove, slowly heat up (30 ℃/hr) to 350 ℃ of insulations 3 hours, after slowly heat up again (30 ℃/hr) to 550 ℃ of insulations 5 hours, be incubated 2 hours at 1140 ℃ after having arranged glue, be coated with upper end electrode d then, obtain V 1mABe 8V, non linear coefficient is 20, and leakage current is 1.8 microamperes a multilayer chip ZnO varistor.The gross thickness of protective layer is in the present embodiment: 250 * 2=500 micron; Effectively the gross thickness of layer is: 25 * 8=200 micron; The gross thickness of type piezoresistor porcelain body is: 5,000 200=700 microns; the gross thickness of protective layer is the type piezoresistor porcelain body thickness 500/700=5/7 of (not containing interior thickness of electrode); so the material cost of considering the pressure-sensitive porcelain of ZnO is the Bi in 2.5 times of pure ZnO porcelain and the protective layer 2O 3Addition less (only being 0.01% percentage by weight) and price only be 10 times of ZnO, the ratio of the low material cost of co-falling is about in the present embodiment: 5/7 * 1.5/2.5 ≈ 42.8%.
Embodiment four
According to embodiment one formula table, accurately take by weighing various materials, the material that weighs up is put in the agitating ball mill zirconium ball of the deionized water of 1-2 times of weight of material and 2-4 times weight of material, ball milling 6 hours.The material that ball milling is good is placed in the stainless steel disc in oven dry about 120 ℃ after 10 hours, the dimethylbenzene, the adhesive of 20-30% weight of material ratio, the dispersant of 0.1-1% weight of material ratio and the zirconium ball of 2-4 times of weight of material that add 40-60% weight of material ratio, ball milling made uniform and stable casting slurry in 24 hours, and to go out thickness be 25 microns effective layer ceramic membrane band to curtain coating then.Accurately take by weighing 95% (percentage by weight) ZnO powder, 0.5% (percentage by weight) Bi 2O 3, going out thickness by above technology curtain coating is 50 microns protective layer used ceramic membrane band.Five layers of protective layer used ceramic membrane band pressurize a little and make the lower protective layer a that thickness is about 250 microns; on protective layer a, print electrode b in the alloy that weight ratio is 70% silver medal, 30% palladium; another layer of printing interior electrode again misplaces behind the lamination; until effective layer of c is 8 layers; effectively covering five layers of protective layer used ceramic membrane band on the layer then, pressurization makes the last protective layer a that thickness is about 250 microns a little.Pass through etc. and to cut out the green compact that are of a size of 1.0 * 0.5mm behind the sintering after the hydrostatic pressing, these green compact are placed on the special-purpose load bearing board put into stove, slowly heat up (30 ℃/hr) to 350 ℃ of insulations 3 hours, after slowly heat up again (30 ℃/hr) to 550 ℃ of insulations 5 hours, be incubated 2 hours at 1140 ℃ after having arranged glue, be coated with upper end electrode d then, obtain V 1mABe 8V, non linear coefficient is 20, and leakage current is 1.8 microamperes a multilayer chip ZnO varistor.The gross thickness of protective layer is in the present embodiment: 250 * 2=500 micron; Effectively the gross thickness of layer is: 25 * 8=200 micron; The gross thickness of type piezoresistor porcelain body is: the 500+200=700 micron; the gross thickness of protective layer is the type piezoresistor porcelain body thickness 500/700=5/7 of (not containing interior thickness of electrode); so the material cost of considering the pressure-sensitive porcelain of ZnO is the Bi in 2.5 times of pure ZnO porcelain and the protective layer 2O 3Addition less (only being 0.01% percentage by weight) and price only be 10 times of ZnO, the ratio of the low material cost of co-falling is about in the present embodiment: 5/7 * 1.5/2.5 ≈ 42.8%.
Embodiment five accurately takes by weighing various materials according to embodiment one formula table, the material that weighs up is put in the agitating ball mill zirconium ball of the deionized water of 1-2 times of weight of material and 2-4 times weight of material, ball milling 6 hours.The material that ball milling is good is placed in the stainless steel disc in oven dry about 120 ℃ after 10 hours, the dimethylbenzene, the adhesive of 20-30% weight of material ratio, the dispersant of 0.1-1% weight of material ratio and the zirconium ball of 2-4 times of weight of material that add 40-60% weight of material ratio, ball milling made uniform and stable casting slurry in 24 hours, and to go out thickness be 25 microns effective layer ceramic membrane band to curtain coating then.Accurately take by weighing 99.99% (percentage by weight) ZnO powder, 0.01% (percentage by weight) Sb 2O 3, going out thickness by above technology curtain coating is 50 microns protective layer used ceramic membrane band.Five layers of protective layer used ceramic membrane band pressurize a little and make the lower protective layer a that thickness is about 250 microns; on protective layer a, print electrode b in the alloy that weight ratio is 70% silver medal, 30% palladium; another layer of printing interior electrode again misplaces behind the lamination; until effective layer of c is 8 layers; effectively covering five layers of protective layer used ceramic membrane band on the layer then, pressurization makes the last protective layer a that thickness is about 250 microns a little.Pass through etc. and to cut out the green compact that are of a size of 1.0 * 0.5mm behind the sintering after the hydrostatic pressing, these green compact are placed on the special-purpose load bearing board put into stove, slowly heat up (30 ℃/hr) to 350 ℃ of insulations 3 hours, after slowly heat up again (30 ℃/hr) to 550 ℃ of insulations 5 hours, be incubated 2 hours at 1140 ℃ after having arranged glue, be coated with upper end electrode d then, obtain V 1mABe 8V, non linear coefficient is 20, and leakage current is 1.8 microamperes a multilayer chip ZnO varistor.The gross thickness of protective layer is in the present embodiment: 250 * 2=500 micron; Effectively the gross thickness of layer is: 25 * 8=200 micron; The gross thickness of type piezoresistor porcelain body is: the 500+200=700 micron; the gross thickness of protective layer is the type piezoresistor porcelain body thickness 500/700=5/7 of (containing interior thickness of electrode for a short time); so the material cost of considering the pressure-sensitive porcelain of ZnO is the Sb in 2.5 times of pure ZnO porcelain and the protective layer 2O 3Addition less (only being 0.01% percentage by weight) and price only be 10 times of ZnO, the ratio of the low material cost of co-falling is about in the present embodiment: 5/7 * 1.5/2.5 ≈ 42.8%.
Embodiment six
According to embodiment one formula table, accurately take by weighing various materials, the material that weighs up is put in the agitating ball mill zirconium ball of the deionized water of 1-2 times of weight of material and 2-4 times weight of material, ball milling 6 hours.The material that ball milling is good is placed in the stainless steel disc in oven dry about 120 ℃ after 10 hours, the dimethylbenzene, the adhesive of 20-30% weight of material ratio, the dispersant of 0.1-1% weight of material ratio and the zirconium ball of 2-4 times of weight of material that add 40-60% weight of material ratio, ball milling made uniform and stable casting slurry in 24 hours, and to go out thickness be 25 microns effective layer ceramic membrane band to curtain coating then.Accurately take by weighing 95% (percentage by weight) ZnO powder, 5% (percentage by weight) Sb 2O 3, going out thickness by above technology curtain coating is 50 microns protective layer used ceramic membrane band.Five layers of protective layer used ceramic membrane band pressurize a little and make the lower protective layer a that thickness is about 250 microns; on protective layer a, print electrode b in the alloy that weight ratio is 70% silver medal, 30% palladium; another layer of printing interior electrode again misplaces behind the lamination; until effective layer of c is 8 layers; effectively covering five layers of protective layer used ceramic membrane band on the layer then, pressurization makes the last protective layer a that thickness is about 250 microns a little.Pass through etc. and to cut out the green compact that are of a size of 1.0 * 0.5mm behind the sintering after the hydrostatic pressing, these green compact are placed on the special-purpose load bearing board put into stove, slowly heat up (30 ℃/hr) to 350 ℃ of insulations 3 hours, after slowly heat up again (30 ℃/hr) to 550 ℃ of insulations 5 hours, be incubated 2 hours at 1140 ℃ after having arranged glue, be coated with upper end electrode d then, obtain V 1mABe 8V, non linear coefficient is 20, and leakage current is 1.8 microamperes a multilayer chip ZnO varistor.The gross thickness of protective layer is in the present embodiment: 250 * 2=500 micron; Effectively the gross thickness of layer is: 25 * 8=200 micron; The gross thickness of type piezoresistor porcelain body is: the 500+200=700 micron; the gross thickness of protective layer is the type piezoresistor porcelain body thickness 500/700=5/7 of (not containing interior thickness of electrode); so the material cost of considering the pressure-sensitive porcelain of ZnO is the Sb in 2.5 times of pure ZnO porcelain and the protective layer 2O 3Addition less (only being 0.01% percentage by weight) and price only be 10 times of ZnO, the ratio of the low material cost of co-falling is about in the present embodiment: 5/7 * 1.5/2.5 ≈ 42.8%.
Embodiment seven
According to embodiment one formula table, accurately take by weighing various materials, the material that weighs up is put in the agitating ball mill zirconium ball of the deionized water of 1-2 times of weight of material and 2-4 times weight of material, ball milling 6 hours.The material that ball milling is good is placed in the stainless steel disc in oven dry about 120 ℃ after 10 hours, the dimethylbenzene, the adhesive of 20-30% weight of material ratio, the dispersant of 0.1-1% weight of material ratio and the zirconium ball of 2-4 times of weight of material that add 40-60% weight of material ratio, ball milling made uniform and stable casting slurry in 24 hours, and to go out thickness be 25 microns effective layer ceramic membrane band to curtain coating then.Accurately take by weighing 95% (percentage by weight) ZnO powder, 5% (percentage by weight) Bi 2O 3And 0.01% (percentage by weight) Sb 2O 3, going out thickness by above technology curtain coating is 50 microns protective layer used ceramic membrane band.Five layers of protective layer used ceramic membrane band pressurize a little and make the lower protective layer a that thickness is about 250 microns; on protective layer a, print electrode b in the alloy that weight ratio is 70% silver medal, 30% palladium; another layer of printing interior electrode again misplaces behind the lamination; until effective layer of c is 8 layers; effectively covering five layers of protective layer used ceramic membrane band on the layer then, pressurization makes the last protective layer a that thickness is about 250 microns a little.Pass through etc. and to cut out the green compact that are of a size of 1.0 * 0.5mm behind the sintering after the hydrostatic pressing, these green compact are placed on the special-purpose load bearing board put into stove, slowly heat up (30 ℃/hr) to 350 ℃ of insulations 3 hours, after slowly heat up again (30 ℃/hr) to 550 ℃ of insulations 5 hours, be incubated 2 hours at 1130 ℃ after having arranged glue, be coated with upper end electrode d then, obtain V 1mABe 8V, non linear coefficient is 21, and leakage current is 1.7 microamperes a multilayer chip ZnO varistor.The gross thickness of protective layer is in the present embodiment: 250 * 2=500 micron; Effectively the gross thickness of layer is: 25 * 8=200 micron; The gross thickness of type piezoresistor porcelain body is: the 500+200=700 micron; the gross thickness of protective layer is the type piezoresistor porcelain body thickness 500/700=5/7 of (not containing interior thickness of electrode); so; so; the material cost of considering the pressure-sensitive porcelain of ZnO is 2.5 times of pure ZnO porcelain, and by 98.99% (percentage by weight) ZnO powder, 1% (percentage by weight) Bi 2O 3And 0.01% (percentage by weight) Sb 2O 3The price of the porcelain that mixes is that the multiple of pure ZnO porcelain is: (1 * 98.99%+10 * 1%+5 * 0.01%)/1=1.09, therefore, the ratio of the low material cost of co-falling is in the present embodiment: 5/7 * (2.5-1.09)/2.5 ≈ 40.3%.

Claims (8)

1, a kind of multilayer chip ZnO varistor that reduces material cost; the multilayer chip ZnO varistor that a kind of components and parts of multilayer sheet type routinely production technology is made; wherein the active layer in the multilayer chip ZnO varistor internal structure is that pressure-sensitive porcelain of ZnO or praseodymium are the pressure-sensitive porcelain of ZnO for bismuth, it is characterized in that the protective layer in the multilayer chip ZnO varistor internal structure is pure ZnO porcelain.
2, a kind of multilayer chip ZnO varistor that reduces material cost according to claim 1 is characterized in that the protective layer in the described multilayer chip ZnO varistor internal structure is the porcelain that ZnO and other oxide are formed.
3, a kind of multilayer chip ZnO varistor that reduces material cost according to claim 1 and 2; it is characterized in that: the protective layer in the described multilayer chip ZnO varistor internal structure is the porcelain that ZnO and other oxide are formed, and other oxide here is Bi 2O 3, Sb 2O 3In a kind of.
4, a kind of multilayer chip ZnO varistor that reduces material cost according to claim 1 and 2; it is characterized in that the protective layer in the described multilayer chip ZnO varistor internal structure is the porcelain that ZnO and other oxide are formed, other oxide here is Bi 2O 3, Sb 2O 3Two kinds of combinations.
5, according to claim 1 or 3 described a kind of multilayer chip ZnO varistors that reduce material cost, it is characterized in that described other oxide proportion percentage by weight in the protective layer porcelain is Bi 2O 30.01~5%.
6, according to claim 1 or 3 described a kind of multilayer chip ZnO varistors that reduce material cost, it is characterized in that described other oxide proportion percentage by weight in the protective layer porcelain is Sb 2O 30.01~5%.
7, according to claim 1 or 4 described a kind of multilayer chip ZnO varistors that reduce material cost, it is characterized in that described other oxide proportion percentage by weight in the protective layer porcelain is Bi 2O 30.01 Sb~2%, 2O 30.01~3%.
8, a kind of multilayer chip ZnO varistor that reduces material cost according to claim 1 is characterized in that the preparation method may further comprise the steps: (1) is by pressure-sensitive ceramic formula batching; (2) material for preparing is added solvent xylene or ethanol, adhesive, the mixing of dispersant ball milling, it is become be casting slurry; (3) the casting slurry curtain coating is made effective layer ceramic membrane band: the mixture that (4) are formed with certain proportion and other oxide powder with pure ZnO powder or ZnO powder is an initiation material, repeating step (2) and the protective layer used ceramic membrane band of step (3) preparation; The ceramic membrane band is exerted pressure slightly, make ceramic protective layer; (5) on the inner face of ceramic protective layer the printing in electrode; (6) on interior electrode, cover the effective layer of one deck again and form effective layer with the ceramic membrane band; (7) the interior electrode of the interior malposition of electrode of printing and preceding printing on effective layer; (8) repeating step (6) and step (7) reach the crust piece of designing requirement up to effective layer number, and are effectively covering one deck ceramic protective layer at least again above the layer, reach designing requirement up to the thickness that clings to piece; (9) will cling to static pressure such as piece, the crust piece will be cut into green sheet; (10) green sheet is heated binder removal; (11) green compact behind the binder removal are burnt till in 950~1150 ℃ temperature range; (12) the type piezoresistor ceramics after will burning till adds the abrasive material ball milling in ball mill, eliminates piezo-resistance ceramics acute angle, carries out chamfer angle technique; (13) the piezo-resistance ceramics after the chamfering is coated with termination electrode palladium/silver; (14) the piezo-resistance ceramics that will be coated with termination electrode carries out the silver ink firing processing.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102682940A (en) * 2012-05-24 2012-09-19 成都顺康新科孵化有限公司 Preparation method of V2O3 current limiting element with multi-layer structure
CN110010320A (en) * 2015-11-27 2019-07-12 埃普科斯股份有限公司 Ceramic multilayer component and method for manufacturing ceramic multilayer component
CN112837877A (en) * 2020-12-24 2021-05-25 南阳金铭电子科技有限公司 Surface packaging treatment process for chip passive component

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102682940A (en) * 2012-05-24 2012-09-19 成都顺康新科孵化有限公司 Preparation method of V2O3 current limiting element with multi-layer structure
CN110010320A (en) * 2015-11-27 2019-07-12 埃普科斯股份有限公司 Ceramic multilayer component and method for manufacturing ceramic multilayer component
CN112837877A (en) * 2020-12-24 2021-05-25 南阳金铭电子科技有限公司 Surface packaging treatment process for chip passive component

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