CN1746955A - Display-device driving circuit suitable for inorganic electroluminescence (el) display device - Google Patents
Display-device driving circuit suitable for inorganic electroluminescence (el) display device Download PDFInfo
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- CN1746955A CN1746955A CN200510092798.8A CN200510092798A CN1746955A CN 1746955 A CN1746955 A CN 1746955A CN 200510092798 A CN200510092798 A CN 200510092798A CN 1746955 A CN1746955 A CN 1746955A
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Abstract
By including a circuit that, when receiving gradation data that indicates a gradation for making a luminescence element emit light, generates a driving voltage V<DRV>greater than or equal to a reference potential (ground potential) when a gradation indicated by the gradation data is greater than or equal to a predetermined threshold value, and that generates a driving voltage V<DRV>less than the reference potential (ground potential), when a gradation indicated by the gradation data is smaller than the predetermined threshold value, a driving voltage V<DRV>whose voltage value corresponds to a certain gradation for causing the luminescence element to emit light is created, and, by supplying the luminescence element with the driving voltage V<DRV>, the luminescence element is two-side driven and made to emit light. Accordingly, the lifetime of the element is extended.
Description
Technical field
The present invention relates to a kind of driving circuit of display device.The driving circuit that particularly relates to a kind of inorganic EL (EL) display device.
Background technology
As plate display device, known have inorganic EL (EL) display device.Inorganic EL display device constitutes and comprises: being parallel to each other on the inherent insulativity substrate of display surface connects the high dielectric film that multirow (row) the electrode wires Lrow that is provided with forms on row electrode lines Lrow; By middle layer, luminescent coating, the middle layer that is provided with on the high dielectric film, with the direction of row electrode lines Lrow quadrature on the inorganic EL emitter of extending and periodically being provided with in parallel to each other; And, multiple row (column) the electrode wires Lcol of the wire that on inorganic EL emitter, is provided with in parallel to each other.Row electrode lines Lrow is connected on the line driver 10, and row electrode wires Lcol is connected on the row driver 12.
Inorganic EL display device, available equivalent circuit shown in Figure 13 is represented.In multirow electrode wires Lrow, select 1 with line driver 10 successively, and selected row electrode lines Lrow is applied capable voltage Vrow.In addition, the corresponding half-tone information of each pixel that to row driver 12 input and selected row, comprises from external circuit, and, apply given modulation voltage Vm to each row electrode wires Lcol from row driver 12 according to this half-tone information.To the wireless EL emitter of selected row electrode lines Lrow institute each pixel of correspondence, apply the potential difference (PD) of capable voltage Vrow and Ge Lie electrode wires Lcol.Thereby, the inorganic EL emitter of each pixel on the selected row electrode lines Lrow, output luminous intensity and the corresponding light of this potential difference (PD).Then, implement above-mentioned control by each row of selecting successively to comprise in the inorganic EL display device, the display frame that can scan inorganic EL display device shows the image of 1 frame.
In the patent documentation 1, the driving circuit of each pixel of inorganic EL display device is disclosed.This driving circuit 50 as shown in figure 14, includes logical circuit 52, transistor 54～66, capacitor 68 and constitutes.Logical circuit 52 receives gradation data 70, and gradation data 70 is converted to the 72 back outputs of pulsewidth coding (PWM) signal.Transistor 54 is connected in series on capacitor 68 and the transistor 56.On the capacitor 68, be applied in ramp voltage V
RTransistor 56 becomes conducting state, the voltage V of the drain side of transistor 56 after receiving the pulse of pwm signal 72
HRemain threshold voltage V
TOn the other hand, under the situation of the pulse that does not have output pwm signal 72, transistor 56 becomes cut-off state, voltage V
HAlong with ramp voltage V
RChange.That is the big more voltage V of the pulsewidth of pwm signal 72,
HMore little, the pulsewidth of pwm signal 72 is got over small voltage V
HBig more.Transistor 64 constitutes source electrode and follows driving circuit.Voltage V
PPBe the AC power of sine wave, the output voltage V of driving circuit 50
OUT, be voltage V
HWith voltage V
PPThe voltage that multiplies each other.Each pixel of inorganic EL display device is according to imposing on the voltage Vrow of selected row electrode lines Lrow from line driver 10 and imposing on the output voltage V of row electrode wires Lcol from row driver 12
OUTPotential difference (PD) carry out luminous.Shown in Figure 15 A and Figure 15 B, imposing on the voltage Vrow of selected row electrode lines Lrow from line driver 10 and imposing on the output voltage V of row electrode wires Lcol from row driver 12
OUTPotential difference (PD) be maximum potential difference Δ V
MAXSituation under brightness the highest, be minimum level difference Δ V
MINSituation under brightness minimum.Have, what represent among Figure 15 A is voltage Vrow and output voltage V again
OUTOpposite polarity situation, what represent among Figure 15 B is voltage Vrow and output voltage V
OUTThe situation that polarity is identical.
In addition because the pressure drop that causes because of transistor 58,60, for the threshold voltage V of transistor 64,66
TThe threshold voltage V of the transistor 58,60 that equates
TAnd, so the output of driving circuit 50 does not have " dead band " (dead band).
Since in above-mentioned existing driving circuit, output voltage V
OUTTherefore be the voltage of 0 fixed～80V of polarity, be applied to voltage Vrow and output voltage V on the two ends of each pixel
OUTPotential difference (PD) also be in maximum potential difference Δ V
MAX～minimum level difference Δ V
MINAnd polarity is identical always.So, continue to apply in the one-sided type of drive of the fixing voltage of polarity, can produce this problem in the life-span that shortens EL element to EL element.
Have again, because the one-sided driving of usefulness fixed polarity is to output voltage V
OUTControl, therefore will be in output voltage V
OUTMaximal value and minimum value between possess necessary resolution, just need spended time in the control.For example, be with output voltage V
OUTIn the scope of 0～80V, control, just must generate as the pulsewidth of the pwm signal 72 of benchmark resolution with 256 grades with 256 grades resolution.Thereby, in the logical circuit 52, just must count 0～256 resolution and generate pwm signal, and, therefore be difficult to realize high speed control owing to need spended time in the counting with counter etc.
In addition, in the above-mentioned existing driving circuit 50, in output voltage V
OUTUnder the situation of any external changes such as middle adding surge, the radio-frequency component of external change can directly have influence on capacitor 68 by the stray capacitance C between the source electrode-grid of transistor 64.Thereby, have the problem of accumulating the influence that voltage is vulnerable to change of capacitor 68.
Summary of the invention
The present invention is a kind of driving circuit of display device, generate the gray scale corresponding driving voltage luminous with making light-emitting component, and, described driving voltage make light-emitting component luminous by being offered light-emitting component, it is characterized in that, comprise: receive the gradation data that expression makes the luminous gray scale of light-emitting component, the gray scale of representing when this gradation data is that given threshold value is when above, produce the above output voltage of earthing potential, the gray scale of representing when this gradation data produces the circuit of the output voltage lower than earthing potential than given threshold value hour.
Description of drawings
Fig. 1 is the figure of the structure of the driving circuit of the display device in the expression embodiments of the present invention.
Fig. 2 is the figure of the structure of the level shift circuit in the expression embodiments of the present invention.
Fig. 3 A and Fig. 3 B are the figure that the width modulation in the embodiments of the present invention is described.
Fig. 4 is the figure of the concrete example of the voltage shift circuit in the expression embodiments of the present invention.
The figure of Fig. 5 for the ramp voltage in the embodiments of the present invention is described.
The figure of Fig. 6 for the ramp voltage in the embodiments of the present invention is described.
Fig. 7 A and Fig. 7 B, the figure that describes for relation to pulse-width signal in the embodiments of the present invention and charging voltage.
Fig. 8 removes the figure of the concrete example of circuit for the dead band in the expression embodiments of the present invention.
The figure that Fig. 9 describes for the generation to the driving voltage in the embodiments of the present invention.
The figure that Figure 10 describes for two side drives to the light-emitting component in the embodiments of the present invention.
The figure that Figure 11 describes for two side drives to the light-emitting component in the embodiments of the present invention.
Figure 12 is the figure of the structure of the variation of the driving circuit of the display device in the expression embodiments of the present invention.
Figure 13 is the figure of the equivalent electrical circuit of expression display device in the past.
Figure 14 is the figure of the structure of the driving circuit of expression display device in the past.
Figure 15 A and Figure 15 B, the figure that describes for one-sided driving to the light-emitting component in the mode in the past.
Among the figure: 10-line driver, 12-row driver, 20-level shift circuit, the 20a-logical circuit, 20b-voltage shift circuit, circuit is removed in the 22-dead band, 24～41-transistor, the 50-driving circuit, 52-logical circuit, 54～66-transistor, the 68-capacitor, the 70-gradation data, 72-PWM signal, 100-driving circuit.
Embodiment
The driving circuit 100 of the display device in the embodiments of the present invention as shown in Figure 1, comprises level shift circuit 20, dead band removal circuit 22, transistor 24～29 and capacitor C1 and constitutes.
The driving circuit of existing display device for example is in one-sided voltage with this earth potential that connects of 0～80V and comes driven light-emitting element.Driving circuit 100 in the present embodiment, for example use-voltage that this earth potential that connects of 40V～40V is in positive and negative both sides comes driven light-emitting element.
Level shift circuit 20 as shown in Figure 2, comprises logical circuit 20a and voltage shift circuit 20b constitutes.This level shift circuit 20 is equivalent to pulse generating circuit.In addition, among the voltage shift circuit 20b, being supplied with from the outside has high-voltage power supply bias voltage AVDD, AVSS, low-tension supply bias voltage DVDD, DVSS, grid bias Vp, Vn.
Among the logical circuit 20a, the gradation data of the numeral of the luminous intensity of input expression EL element.Logical circuit 20a, receive gradation data after, generate as the N raceway groove signal or the P raceway groove signal that have with pulsewidth coding (PWM) signal of the corresponding pulsewidth of gradation data.N raceway groove signal or P raceway groove signal, big more for the gray scale of the luminous intensity of EL element, as to have wide more pulsewidth signal.At this moment, under the gray scale of expression gradation data is situation more than the given threshold value, generation has the P raceway groove signal that deducts the pairing pulsewidth of value after the threshold value from the gray scale of expression gradation data, and under the gray scale of the expression gradation data situation littler, generate the N raceway groove signal of the pairing pulsewidth of gray scale with expression gradation data than threshold value.In the present embodiment, setting the threshold to 1/2 of overall intensity, generate N raceway groove signal at gradation data under than 1/2 of overall intensity little situation, is generation P raceway groove signal under the situation of overall intensity 1/2 or more at gradation data.That is, logical circuit 20a switches output N raceway groove signal and P raceway groove signal according to gradation data.
For example, under the situation that overall intensity is represented with 0～225 gray scale, as shown in Figure 3A,, generate the N raceway groove signal that has with the proportional pulsewidth of gradation data if gradation data is below 127 gray scales.N raceway groove signal is generated as comparing the signal that has pulse on the minus side with reference potential (being earthing potential in the present embodiment).Shown in Fig. 3 B,, then generate the P raceway groove signal that has and from gradation data, deduct the proportional pulsewidth of value after 127 on the other hand if pwm signal is the above pulsewidths of 128 gray scales.P raceway groove signal is generated as comparing the signal that has pulse on the positive side with reference potential (being earthing potential in the present embodiment).At this moment, the pulsewidth of N raceway groove signal and P raceway groove signal is set equal to maximum pulse width (pulsewidth that is equivalent to 127 gray scales).
Logical circuit 20a according to gradation data, generates after any one party of N raceway groove signal and P raceway groove signal, exports to N raceway groove input terminal and the P raceway groove input terminal of voltage shift circuit 20b respectively.
Voltage shift circuit 20b will rise to high pressure from the P raceway groove signal and the N raceway groove signal of logical circuit 20a output.Owing to logical circuit 20a till, constitute by logical circuit, therefore P raceway groove signal and the N raceway groove signal of exporting from logical circuit 20a, for low-voltage (for example, 0～3.3V or ± 3.3V) pulse signal.Therefore, in voltage shift circuit 20b, for the high-tension circuit to back segment drives, with the P raceway groove signal of low-voltage and N raceway groove conversion of signals be high voltage (for example ± 40V).
Among Fig. 4, the example of expression voltage shift circuit 20b.Transistor 30～33, the booster circuit of formation P raceway groove signal.The drain electrode of transistor 31, be connected between drain electrode-source electrode by transistor 30 positive high-voltage power supply bias voltage AVDD go up (for example ,+40V), the source electrode of transistor 31 is connected on the low-tension supply bias voltage DVSS (for example, earthing potential).On the grid of the transistor 30 of P channel-type, be applied in positive grid bias Vp and bring into play function as current source.On the grid of the transistor 31 of N channel-type, be transfused to P raceway groove signal.Transistor 31, the pulse of P raceway groove signal rise during be in conducting state, pulse do not rise during be in by state.Therefore, the voltage of the drain terminal of transistor 31, the pulse of P raceway groove signal rise during be maintained negative low-tension supply bias voltage DVSS substantially, pulse do not rise during be maintained positive high-voltage power supply bias voltage AVDD substantially.
The source electrode of transistor 32 is connected on the positive high-voltage power supply bias voltage AVDD, is connected negative high-voltage power supply bias voltage AVSS between the drain electrode-source electrode of the drain electrode of transistor 32 by transistor 33 (for example ,-40V).On the grid of the transistor 33 of N channel-type, be applied in negative grid bias Vn and bring into play function as current source.On the grid of the transistor 32 of P channel-type, connect the drain electrode of transistor 31, the change in voltage of drain terminal is exported as P channel high-voltage signal.That is, by the booster circuit of transistor 30～33, the P raceway groove signal of 3.3V grade is transformed to ± export behind the pulse signal of 40V grade.
The source electrode of transistor 37 is connected on the negative high-voltage power supply bias voltage AVSS, is connected between the drain electrode-source electrode of the drain electrode of transistor 37 by transistor 36 on the positive high-voltage power supply bias voltage AVDD.On the grid of the transistor 36 of P channel-type, be applied in positive grid bias Vp and bring into play function as current source.On the grid of the transistor 37 of N channel-type, connect the drain electrode of transistor 34, the change in voltage of source terminal is used as the output of N channel high-voltage signal.That is, by the booster circuit of transistor 34～37, the N raceway groove signal of+3.3V grade is transformed to ± export behind the pulse signal of 40V grade.
That is, than threshold value under the situation of little (in the present embodiment, for 1/2 (128 gray scale) than whole 256 gray scales little), amplitude is ± pulse of 40V exported as N channel high-voltage signal by the pulsewidth with corresponding N raceway groove signal at gradation data; At gradation data is under the situation of (in the present embodiment, more than 1/2 (128 gray scale) for whole 256 gray scales) more than the threshold value, and amplitude is ± and the pulse of 40V exported as P channel high-voltage signal by the pulsewidth with corresponding P raceway groove signal.
P channel high-voltage signal and N channel high-voltage signal from level shift circuit 20 outputs are input to respectively in the grid of transistor 24 and 26.The source electrode of transistor 24 is connected on the ramp voltage VR (+), and the source electrode of transistor 26 is connected on the ramp voltage VR (-).In addition, connect the drain electrode of transistor 24 and the drain electrode of transistor 26, and tie point A is by capacitor C1 ground connection.
Ramp voltage VR (+), as shown in Figure 5, be synchronized to toward the moment of level shift circuit 20 input pwm signals, (for example from reference potential, earthing potential GND) rises and begin to boost, the time that is equivalent to the maximum pulse width of P raceway groove signal (P channel high-voltage signal) with usefulness (for example reaches maximum ramp voltage VRMAX, + 40V) mode is boosted with fixed speed.In addition, ramp voltage VR (-), as shown in Figure 6, be synchronized to toward the moment of level shift circuit 20 input pwm signals, (for example from reference potential, earthing potential GND) plays the beginning step-down, (for example ,-40V) mode is come with the fixed speed step-down to reach minimum ramp voltage VRMIN with the time of maximum pulse width that is equivalent to N raceway groove signal (N channel high-voltage signal).
Transistor 24 only is in conducting state during the pulse of P channel high-voltage signal output.In addition, transistor 26 only is in conducting state during the pulse of N channel high-voltage signal output.Therefore, under the situation of the pulse of output P channel high-voltage signal, shown in Fig. 7 A, capacitor C1 is equivalent to time of the pulsewidth of P channel high-voltage signal by ramp voltage VR (+) charging, and its charging voltage Vc is the value of corresponding pulsewidth.On the other hand, under the situation of the pulse of output N channel high-voltage signal, shown in Fig. 7 B, capacitor C1 is equivalent to time of the pulsewidth of N channel high-voltage signal by ramp voltage VR (-) charging, and its charging voltage Vc is the value of corresponding pulsewidth.
For example, at P raceway groove signal (P channel high-voltage signal) and N raceway groove signal (N channel high-voltage signal) respectively under the situation with the pulsewidth output of 128 gray scales (0～127), charging voltage Vc, for represent respectively with the resolution of 128 gray scales 0～40V or 0～-the corresponding magnitude of voltage of pulsewidth of the scope of 40V.
Circuit 22 is removed in the dead band, and the charging voltage Vc of capacitor C1 is received as output voltage, implements the removal in dead band.Among Fig. 8, the example of circuit 22 is removed in the expression dead band.
The drain electrode of transistor 38 is connected on the positive high-voltage power supply bias voltage AVDD, the source electrode of transistor 38, and the drain electrode-source electrode by transistor 39 is connected on the negative high-voltage power supply bias voltage AVSS.Be transfused to the charging voltage Vc of capacitor on the grid of transistor 38.In addition, on the grid of the transistor 39 of N channel-type, be applied in negative grid bias Vn and bring into play function as current source.
The drain electrode of transistor 41 is connected on the negative high-voltage power supply bias voltage AVSS, the source electrode of transistor 41, and the drain electrode-source electrode by transistor 40 is connected on the positive high-voltage power supply bias voltage AVDD.Be transfused to the charging voltage Vc of capacitor on the grid of transistor 41.In addition, on the grid of the transistor 40 of P channel-type, be applied in positive grid bias Vp and bring into play function as current source.
If charging potential Vc is positive potential, then under the effect of the transistor 41 that constitutes source follower, the variation of following charging voltage Vc, charging voltage Vc+ threshold voltage vt is used as the N raceway groove and removes the source electrode output of signal from transistor 41.On the other hand, if charging potential Vc is negative potential, then under the effect of the transistor 38 that constitutes source follower, the variation of following charging voltage Vc, charging voltage Vc-threshold voltage vt is used as the P raceway groove and removes the source electrode output of signal from transistor 38.
The N raceway groove is removed signal and is imported in the grid of transistor 28, and the P raceway groove is removed signal and is imported in the grid of transistor 29.The drain electrode of transistor 28 is connected on positive interchange (sine wave) the power supply Vsin (+), and the drain electrode of transistor 29 is connected on negative interchange (sine wave) the power supply Vsin (-).The source electrode of transistor 28 is connected with the source electrode of transistor 29, from the driving voltage V of this tie point output EL element
DRV
Here, make positive interchange (sine wave) power supply Vsin (+), as shown in Figure 9, for being minimum peak voltage with reference potential (for example, earthing potential GND), (for example ,+40V) being the sine wave AC of maximum peak voltage with positive high-voltage power supply bias voltage AVDD.In addition, interchange (sine wave) the power supply Vsin (-) that order is negative, as shown in Figure 9, for be maximum peak voltage with reference potential (for example, earthing potential GND), (for example ,-40V) being the sine wave AC of minimum peak voltage with the high-voltage power supply bias voltage AVSS that bears.
Transistor 29, according to the variation that the P raceway groove is removed signal, output is removed signal+threshold voltage vt, is the corresponding driving voltage V of charging voltage Vc with the P raceway groove
DRVOn the other hand, transistor 28, according to the variation that the N raceway groove is removed signal, output is removed signal-threshold voltage vt, is the corresponding driving voltage V of charging voltage Vc with the N raceway groove
DRV
Here, owing to the threshold voltage V of the pressure drop that causes because of transistor 28 by transistor 41
TCompensation, the pressure drop that causes because of transistor 29 is by the threshold voltage V of transistor 38
TCompensation, therefore, there be not " dead band " in the output of driving circuit 100.
Thereby, as shown in figure 10, impose on the voltage Vrow of row electrode lines Lrow and the driving voltage V that relative datum current potential (earthing potential) vibrates on positive and negative polarities
DRVPotential difference (PD), with Δ V
MINTo Δ V
MAXScope, be applied on the chosen EL element that is connected on the row electrode lines Lrow.By this potential difference (PD), light-emitting component is luminous with the luminous intensity corresponding to gradation data.On the other hand, as shown in figure 11, the driving voltage V that on positive and negative polarities, vibrates with relative datum current potential (earthing potential)
DRVPotential difference (PD), being applied in does not have on the selecteed EL element that is connected on the row electrode lines Lrow.Thereby, can make compared with the past can obviously prolongation of life-span of EL element.
In addition, owing to come controlling and driving voltage V with two side drives with both positive and negative polarity
DRV, therefore positive and negative only need possess the resolution littler than overall intensity in separately and get final product.For example, set the threshold under 1/2 the situation of overall intensity, only need possess 1/2 resolution in each polarity and get final product.Overall intensity is 256 gray scales, threshold value under its half 128 the situation, as long as positive side has the resolution that resolution, the minus side of 128 gray scales have 128 gray scales as embodiments of the present invention.Therefore, in logical circuit 20a, generate N raceway groove signal and P raceway groove signal gets final product, compared with the pastly can shorten the time that spends in the counting with the resolution of countings such as counter 0～127.Thereby, can realize the high speed of controlling.
Have again, at driving voltage V
DRVOn applied under the situation of any external changes such as surge, even transmit external change, also can remove the transistor 38,41 of circuit 22 by the dead band by the stray capacitance of transistor 28,29, external change is dwindled influence and degree that capacitor C1 causes.
In addition, driving circuit 100 as shown in figure 12, can comprise usefulness is reclaimed in the energy recovery that is used for that EL element is accumulated to the electric energy in the power supply diode D1, D2.Like this, as shown in Figure 9, T during the driving of following EL element
DRVPayback period between T
RCVIn, the energy recovery of accumulating in the EL element can be arrived among AC power Vsin (+) or the Vsin (-).At this moment, preferred driving circuit 100 possesses diode D3～D6 that the electric energy that is used for the high efficiente callback electric energy reclaims usefulness.For example, accumulated in the electric capacity of EL element under positive voltage (electric charge) situation, when electric energy reclaimed, this electric charge flowed into AC power Vsin (+) by diode D1.At this moment, though charge stored flows into AC power Vsin (+) too in the capacitor C 1, the terminal voltage Vc of capacitor C 1 is the voltage that exceeds the voltage between terminals of diode D3, D4 than AC power Vsin (+).Thereby the transistor 29 of P raceway groove is a cut-off state, can the high efficiente callback electric energy.Equally, accumulate in the electric capacity of EL element under the situation that negative voltage (electric charge) arranged, because of the effect of diode D5, D6, transistor 28 is a cut-off state, and electric energy is recovered among the AC power Vsin (-) efficiently.
Have again, in the present embodiment,, be not limited thereto though be that example is illustrated display device with inorganic EL display device.So long as utilize the display device that applies the element that voltage can be luminous by dipolar, all within applicable object scope of the present invention.Wherein, in this scope that applies voltage of inorganic EL display device is in display device about tens of V, by implementing two positive and negative side drives, in the life-span that prolongs light-emitting component, the effect that suppresses on the element that comprises in the driving circuit necessary withstand voltage etc. is remarkable.
As mentioned above, according to present embodiment,, can prolong the life-span of light-emitting component by light-emitting component being carried out two side drives with driving voltage with positive and negative polarities.In addition, use dipolar both sides type of drive, can realize the high speed of controlling by adopting.Have again, can dwindle the influence that the external change of driving voltage causes.
Claims (9)
1. the driving circuit of a display device generates the gray scale corresponding driving voltage luminous with making light-emitting component, and makes light-emitting component luminous by described driving voltage is offered light-emitting component, it is characterized in that, comprises following circuit:
Receive the gradation data that expression makes the luminous gray scale of light-emitting component,
The gray scale of representing when this gradation data is given threshold value when above, produces the above output voltage of earthing potential,
The gray scale of representing when this gradation data produces the circuit of the output voltage lower than earthing potential than described threshold value hour.
2. the driving circuit of display device according to claim 1 is characterized in that:
Described light-emitting component is the luminous element of luminous intensity that puts on the potential difference (PD) of the voltage on row electrode lines and the row electrode wires with correspondence,
When making light-emitting component luminous, row electrode lines has been applied the row electrode wires of the light-emitting component of the voltage different with earthing potential, apply the driving voltage corresponding with described output voltage.
3. the driving circuit of display device according to claim 2 is characterized in that:
Described light-emitting component is inorganic EL (EL) element.
4. the driving circuit of display device according to claim 1 is characterized in that:
Possess pulse generating circuit, the gray scale of representing when described gradation data is described threshold value when above, generates to have and the 1st signal that deducts the corresponding pulsewidth of value after the described threshold value from the gray scale that described gradation data is represented; The gray scale of representing when this gradation data generates the 2nd signal with corresponding pulsewidth of gray scale of representing with described gradation data than described threshold value hour,
And produce than with output voltage more than the corresponding earthing potential of pulsewidth of the 1st signal that generates with described pulse generating circuit or with the low output voltage of the corresponding earthing potential of pulsewidth with the 2nd signal of described pulse generating circuit generation.
5. the driving circuit of display device according to claim 4 is characterized in that:
Possess: the 1st transistor, be transfused to described the 1st signal on the grid, be applied in the positive ramp voltage that boosts to maximum ramp voltage in time from earthing potential on the source electrode;
The 2nd transistor is transfused to described the 2nd signal on the grid, be applied in the negative ramp voltage that is depressured to minimum ramp voltage in time from earthing potential on the source electrode,
And comprise: on described the 1st transistor drain and described the 2nd transistor drain is connected, this tie point is connected capacitor the end, be applied in the circuit of earthing potential on the other end of this capacitor.
6. the driving circuit of display device according to claim 5 is characterized in that:
Described the 1st transistor only is in conducting state in the time of the pulsewidth of described the 1st signal of correspondence,
Described the 2nd transistor only is in conducting state in the time of the pulsewidth of described the 2nd signal of correspondence.
7. the driving circuit of display device according to claim 1 is characterized in that:
Possess the dead band and remove circuit, it removes the dead band of described output voltage.
8. the driving circuit of display device according to claim 7 is characterized in that:
Circuit is removed in described dead band, possesses:
The transistor of N channel-type is applied in described output voltage on the grid, be applied in 1st supply voltage higher than earthing potential in the drain electrode, is applied in 2nd supply voltage lower than earthing potential on the source electrode,
The transistor of P channel-type is applied in described output voltage on the grid, be applied in described the 2nd supply voltage in the drain electrode, is applied in described the 1st supply voltage on the source electrode.
9. the driving circuit of display device according to claim 7 is characterized in that:
Possess pulse generating circuit, the gray scale of representing when described gradation data is given threshold value when above, generates to have and the 1st signal that deducts the corresponding pulsewidth of value after the described threshold value from the gray scale that described gradation data is represented; The gray scale of representing when this gradation data generates the 2nd signal with corresponding pulsewidth of gray scale of representing with described gradation data than described threshold value hour,
And produce than with output voltage more than the corresponding reference potential of pulsewidth of the 1st signal that generates with described pulse generating circuit or with the low output voltage of the corresponding reference potential of pulsewidth with the 2nd signal of described pulse generating circuit generation.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004258593A JP2006072225A (en) | 2004-09-06 | 2004-09-06 | Drive circuit of display device |
| JP2004258594 | 2004-09-06 | ||
| JP2004258593 | 2004-09-06 |
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|---|---|
| CN1746955A true CN1746955A (en) | 2006-03-15 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200510092798.8A Pending CN1746955A (en) | 2004-09-06 | 2005-08-25 | Display-device driving circuit suitable for inorganic electroluminescence (el) display device |
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| CN (1) | CN1746955A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102176298A (en) * | 2010-01-26 | 2011-09-07 | 上海科炎光电技术有限公司 | Matrix electroluminescent flat-panel display |
| CN102843123A (en) * | 2012-08-31 | 2012-12-26 | 电子科技大学 | High-voltage driving circuit |
-
2004
- 2004-09-06 JP JP2004258593A patent/JP2006072225A/en active Pending
-
2005
- 2005-08-25 CN CN200510092798.8A patent/CN1746955A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102176298A (en) * | 2010-01-26 | 2011-09-07 | 上海科炎光电技术有限公司 | Matrix electroluminescent flat-panel display |
| CN102843123A (en) * | 2012-08-31 | 2012-12-26 | 电子科技大学 | High-voltage driving circuit |
| CN102843123B (en) * | 2012-08-31 | 2015-09-09 | 电子科技大学 | A kind of high-voltage driving circuit |
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| Publication number | Publication date |
|---|---|
| JP2006072225A (en) | 2006-03-16 |
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