CN1737776A - Simulator chip and simulating method thereof - Google Patents

Simulator chip and simulating method thereof Download PDF

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Publication number
CN1737776A
CN1737776A CNA2005100292852A CN200510029285A CN1737776A CN 1737776 A CN1737776 A CN 1737776A CN A2005100292852 A CNA2005100292852 A CN A2005100292852A CN 200510029285 A CN200510029285 A CN 200510029285A CN 1737776 A CN1737776 A CN 1737776A
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microcontroller
bus
emulator
mode
chip
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CN100357909C (en
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潘松
岳卫杰
陈光胜
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Shanghai Hair Group Integated Circuit Co Ltd
Shanghai Haier Integrated Circuit Co Ltd
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Shanghai Hair Group Integated Circuit Co Ltd
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Abstract

This invention relates to one artificial chip, which comprises micro controller inside module and inside bus connected, wherein, the artificial chip is located with outside bus to connect outside circuit to micro controller inside module; the outside bus is connected to the inside bus ad mode switch device to switch outside bus ad inside bus with micro controller inside module.

Description

A kind of emulator chip and emulation mode thereof
Affiliated technical field
The present invention relates to the microcontroller field, particularly about a kind of emulator chip and emulation mode thereof.
Background technology
Along with deep-submicron CMOS (Complementary Metal-Oxide-SemiconductorTransistor, complementary metal oxide semiconductor (CMOS)) the continuous progress of integrated circuit production technology, at present technically can be integrated in the microcontroller kernel of complexity on the chip piece, leave enough silicon area simultaneously and be used to realize complicated storer and peripheral hardware logic, the method for designing and the framework that are used for high-end 32 and 64 bit CPUs in the past can effectively be used for the low price micro controller system now.Utilize these powerful and cheap microcontrollers, system-wide integrated level improves constantly.Hardware configuration can be carried out more complicated program efficiently, integrated more hardware capability.
In recent years, the development and application of microcontroller has obtained to popularize widely, and the development and application of microcontroller be unable to do without the emulator based on this microcontroller.Though what feature emulator should have and also have different views, the emulator of various microcontrollers all has some features: (1) must be designed based on certain micro controller frame; (2) possesses the repertoire that microcontroller chip can be realized; (3) possess real-time debug, the copying of certain microcontroller.
These features of the emulator chip of microcontroller have also been brought some essential defective and deficiencies: the framework of (1) emulator chip is based on the microcontroller of certain framework; (2) use of emulator needs the support of certain hardware and software; (3) the emulator chip area is greater than the microcontroller chip area, and the number of pins of emulator chip is greater than the number of pins of microcontroller chip; (4) emulator is mainly used in debugging and emulation, so the volume production of chip can be very not big.
There are a lot of companies to produce microcontroller now emulator is all arranged, as Microchips Inc. (Microchip), Motorola (Motorola), NEC (NEC), Hitachi (Hitachi), Sheng group (Holtek) etc.Though the microcontroller of these companies all has emulator basically, function also is of all kinds, and these emulators all are based on specific micro controller frame, so do not possess portability.
Design cycle is very important in the emulator chip system development of microcontroller fast, and software has indubitable critical role in computer system.The use of emulator systems is closely related with the specification interface between software programming and the hardware design, and this interface is exactly the instruction set of microcontroller.By the parallel input instruction in outside, make that chip can operate as normal and artificial debugging pattern.
Therefore need exploitation a kind of possess portable preferable, chip operation pattern and the fairly simple emulator chip system of debugging mode simultaneously.
Summary of the invention
The object of the present invention is to provide a kind of emulator chip, overcome prior art emulator structure and working method complexity, the deficiency of portable difference has realized real-time debug and real-time simulation to microcontroller more simply.
The present invention realizes by following technical method: a kind of emulator chip, comprise the microcontroller internal module, the internal bus that is attached thereto, this emulator chip also is provided with external bus peripheral circuit is linked to each other with the microcontroller internal module, this external bus links to each other with mode-changeover device with internal bus, and changeable external bus of this mode-changeover device and internal bus are connected with the microcontroller internal module.
Wherein, described mode-changeover device comprises the selector switch of Port Multiplier and this Port Multiplier of control, and the input end of Port Multiplier connects internal bus and external bus respectively, and the output terminal of Port Multiplier connects the microcontroller internal module.Selector switch is made up of d type flip flop, rest-set flip-flop sum counter, and D triggers output and links to each other with rest-set flip-flop with counter respectively, and counter output links to each other with rest-set flip-flop, and selector signal is imported by d type flip flop sum counter input end; Output terminal output by rest-set flip-flop.Selector switch control microcontroller internal clock generator makes microcontroller be in holding state or duty.
Described peripheral circuit is the circuit of the time-out of realizing emulator, breakpoint, single step run, comprises that also code translator with the expansion chip selection signal, realizes the emulator function of the microcontroller of multiple different model, and realizes many cover instruction set and difference in functionality module combinations.Peripheral circuit is by external bus monitoring microcontroller running status and preserve data.
Described internal bus is respectively home address, data, control bus; External bus is respectively external address, data, control bus.
Another object of the present invention is to provide a kind of emulation mode, to realize real-time debug and real-time simulation more simply to microcontroller.
Be to realize this purpose, the invention provides a kind of emulation mode of emulator chip, external bus is set on the microcontroller of internal bus peripheral circuit is linked to each other with the microcontroller internal module having; When using internal bus, emulator is operated in normal mode, its functional equivalent microcontroller; When using external bus, emulator is operated in debugging mode, can realize debug function.
Wherein, described debug function comprises breakpoint operation, single step run, function such as out of service.When debugging, can read, revise the reservoir value to internal storage.Internal storage comprises register and SRAM (Static Random Access Memory, static random-access memory) storage unit.
This method is understood the microcontroller running status by external bus and is revised the running status of microcontroller.When external bus requires that emulator chip is out of service to enter debugging mode, this moment microcontroller just at fill order's cycles per instruction, microcontroller will enter debugging mode after will finishing in the present instruction cycle.When requiring by external bus that emulator chip is out of service to enter debugging mode, microcontroller is being carried out the binary cycle instruction, and microcontroller will enter debugging mode after present instruction is complete.When requiring by external bus that emulator chip is out of service to enter debugging mode, microcontroller is responding interruption, and microcontroller enters debugging mode after respective interrupt is finished.
Emulator of the present invention is the breakpoint that possesses artificial debugging, single step, function such as out of service, and portable preferable, can satisfy the artificial debugging condition with a series of different products simultaneously.Real-time debug and real-time simulation have been realized more simply to microcontroller.The present invention adopts dual-bus structure to simplify the emulator chip structure, and does not also need complicated software support, has lowered cost, has very high use value for the development and application of chip.
Description of drawings
Fig. 1 is the synoptic diagram that emulator chip of the present invention system uses two groups of buses.
Fig. 2 is a decoder architecture synoptic diagram of the present invention.
Fig. 3 is that debugging mode enters/withdraw from the realization principle schematic.
Fig. 4 is the realization principle schematic that data are read.
Fig. 5 is the realization principle schematic that data write.
Embodiment
The invention provides a kind of emulator chip framework invention of microcontroller, adopt dual-bus structure, be respectively internal bus and external bus.Internal bus is used for normal microcontroller mode of operation, and external bus is used for the debugging mode of microcontroller.Can cooperate functions such as the continuous operation that realizes emulator, time-out, breakpoint, single step run by simple peripheral circuit, when moving continuously, its functional equivalent is in microcontroller chip, this emulator can be realized the copying with the microcontroller products of a series of different models, can support the microcontroller of multiple different model, have very strong extendability.
Dual bus of the present invention is respectively home address, data, control bus and external address, data, control bus.When using internal bus, emulator is operated in normal mode, its functional equivalent microcontroller; When using external bus, emulator is operated in debugging mode, can realize debug function, comprises the breakpoint operation, single step run, function such as out of service.When the debugging emulation device, can read internal storage and deposit, revise the reservoir value, internal storage comprises register and SRAM storage unit.Stop in real time, enter breakpoint stop, when single step is out of service, chip enters debugging mode, can be to the read-write operation of data register, to the modification of programmable counter PC and read etc., the user can understand the microcontroller running status and revise the running status of microcontroller by external bus.
When the user requires by external bus that emulator chip is out of service to enter debugging mode, this moment microcontroller just at fill order's cycles per instruction, microcontroller will enter debugging mode after will finishing in the present instruction cycle.
When the user required by external bus that emulator chip is out of service to enter debugging mode, microcontroller was being carried out the binary cycle instruction, and microcontroller will enter debugging mode after present instruction is complete.
When the user required by external bus that emulator chip is out of service to enter debugging mode, microcontroller was responding interruption, and microcontroller enters debugging mode after respective interrupt is finished.
The present invention can be applicable to the analogue system and the realization thereof of various types of microcontrollers, be purposes of simplicity of explanation, introduce the present invention with 8 RISC (Reduced Instruction Set Computer, Reduced Instruction Set Computer) for example in the following embodiments.
Emulator chip system below in conjunction with the accompanying drawing microcontroller of the present invention that to describe in detail with 8 RISC be example.
At first see also Fig. 1, Fig. 1 is the synoptic diagram that simulator framework is used two groups of buses, internal bus 1 comprises internal data bus 3, internal address bus 4 and Internal Control Bus IBC 5, and external bus 2 comprises external data bus 6, outer address bus 7 and external control bus 8.These buses are all received each module of microcontroller, use for normal mode of operation and debugging mode respectively.Microcontroller comprises that inner each module of internal bus 1 and microcontroller forms microcontroller together, can move continuously, and its functional equivalent is in microcontroller chip.And inner each module of external bus 6 and microcontroller links to each other and constitutes emulator, realizes comprising that breakpoint moves, single step run, debug function such as out of service.
As Fig. 2 is decoder architecture synoptic diagram of the present invention, because the emulator of microcontroller is based on certain micro controller frame, so a series of products of this micro controller frame have a lot of general character, but also has certain otherness simultaneously.Can realize emulator function as the emulator of the embodiment among Fig. 2, can expand according to user's demand simultaneously with the microcontroller of four kinds of a series of different models. Chip selection signal 11,12 is exported decoded signal 13,14,15,16 by 2 to 4 code translators, the enable signal of the corresponding different model microcontroller of difference, and these signals select to belong to the module of this microcontroller.Choose after all modules, each module is connected with the emulator of external bus with microcontroller by internal bus, makes it form the microcontroller simulator framework of specific model.Certainly in other embodiments of the invention can also be by the code translator of other types, make that emulator of the present invention can be corresponding more or the microcontroller of model.
As Fig. 3 is that debugging mode enters/withdraw from the realization principle schematic, selector switch in the mode-changeover device of present embodiment is made up of a d type flip flop 27, rest-set flip-flop 29 sum counters 28, wherein d type flip flop 27 has three input ports, be clock port CK, FPDP D, zero clearing port C, its output port Q links to each other with the reseting port R of counter 28 and rest-set flip-flop 29 respectively; Counter 28 links to each other with the port S that is provided with of rest-set flip-flop 29; Rest-set flip-flop 29 has output port Q.When debugging mode request signal 22 was high level, when being input to d type flip flop 27, through clock signal 23 synchronous (clock signal 23 has guaranteed the clock signal that present instruction is complete synchronously), output debugging mode enable signal 25 was a high level.Debugging mode enable signal 25 is input to rest-set flip-flop 29, make the output signal 26 of rest-set flip-flop 29 be low level, output signal 26 is control microcontroller internal clock generator signal out of service, thereby realized that microcontroller is in holding state, debugging mode enable signal 25 signs are in debugging mode at present simultaneously.Become low level and work as debugging mode request signal 22 from high level, ending request, then debugging mode enable signal 25 signals become low level at once.Because C end signal 24 is the designature and the reset signal of debugging mode enable signal 25,, make d type flip flop 27 output low levels so the C end signal 24 will become high level from low level this moment.When d type flip flop 27 output low levels, counter 28 is begun counting by input clock 21, when counting down to certain value, triggers rest-set flip-flop 29 and makes output signal 26 become high level, recovers the microcontroller normal mode of operation.
As Fig. 4 is the realization principle schematic that data are read.Each emulator enters debugging mode, comprises breakpoint, single step, pattern out of service, and emulator will read microcontroller internal work register, data-carrier store, programmable counter, stack pointer, stack content in real time.The enable signal that register reads, promptly control bus is selected by MUX, will export the enable signal that each register reads successively, and reads register value successively.During the reading of data storer, this enable signal also needs to cooperate the address signal on the address bus, the value of a reading of data storer of ability.
In Fig. 4, signal 31 reads enable signal for each register, and signal 32 is the gating signal of enable signal, the output of signal 33 for reading signal, signal 34 is the address signal of reading of data storer, and signal 35 outputs to the output signal of external data bus for register value.
As Fig. 5 is the realization principle schematic that data write.Under debugging mode, debug, need to revise data value memory or revise the PC value, can pass through external data bus, address bus and control bus required modification register value.Enter debugging mode, debugging mode control signal 51 is chosen by selector switch and is revised data-carrier store enable signal 52 or choose modification PC enable signal 53.If the modification data-carrier store enables external control bus 8 by Port Multiplier so, forbid Internal Control Bus IBC 5 simultaneously, output control bus 47; Enable external data bus 6, forbid internal data bus 3, output data bus 48; Enable outer address bus 7, forbid internal address bus 4, OPADD bus 49.The external data of revising PC value is merged into external data 56 by 44 low 5 and outer address bus 46, by the gating external data 56 of Port Multiplier, forbids internal data 50, and behind output data 54 write buffers, will cushioning afterwards, data 55 write the PC register.So just can realize revising data value memory or revise the PC value by external bus.
That more than introduces only is based on several preferred embodiment of the present invention, can not limit scope of the present invention with this.Any device of the present invention is done replacement, the combination, discrete of parts well know in the art, and the invention process step is done well know in the art being equal to change or replace and all do not exceed exposure of the present invention and protection domain.

Claims (16)

1, a kind of emulator chip, comprise the microcontroller internal module, the internal bus that is attached thereto, it is characterized in that this emulator chip also is provided with external bus peripheral circuit is linked to each other with the microcontroller internal module, this external bus links to each other with mode-changeover device with internal bus, and changeable external bus of this mode-changeover device and internal bus are connected with the microcontroller internal module.
2, emulator chip as claimed in claim 1, it is characterized in that described mode-changeover device comprises the selector switch of Port Multiplier and this Port Multiplier of control, the input end of Port Multiplier connects internal bus and external bus respectively, and the output terminal of Port Multiplier connects the microcontroller internal module.
3, emulator chip as claimed in claim 2, it is characterized in that described selector switch is made up of d type flip flop, rest-set flip-flop sum counter, D triggers output and links to each other with rest-set flip-flop with counter respectively, counter output links to each other with rest-set flip-flop, and selector signal is imported by d type flip flop sum counter input end; Output terminal output by rest-set flip-flop.
4, emulator chip as claimed in claim 3 is characterized in that described selector switch control microcontroller internal clock generator makes microcontroller be in holding state or duty.
5, emulator chip as claimed in claim 1 is characterized in that described peripheral circuit comprises that code translator with the expansion chip selection signal, realizes the emulator function of the microcontroller of multiple different model.
6, emulator chip as claimed in claim 1 is characterized in that described peripheral circuit comprises code translator with the expansion chip selection signal, realizes instruction set and the difference in functionality module combinations of overlapping more.
7, emulator chip as claimed in claim 1 is characterized in that described peripheral circuit is by external bus monitoring microcontroller running status and preserve data.
8, emulator chip as claimed in claim 1 is characterized in that described internal bus is respectively home address, data, control bus; External bus is respectively external address, data, control bus.
9, a kind of emulation mode of emulator chip is provided with external bus peripheral circuit is linked to each other with the microcontroller internal module having on the microcontroller of internal bus; When using internal bus, emulator is operated in normal mode, its functional equivalent microcontroller; When using external bus, emulator is operated in debugging mode, can realize debug function.
10, emulation mode as claimed in claim 9 is characterized in that described debug function comprises breakpoint operation, single step run, function such as out of service.
11, emulation mode as claimed in claim 9 is characterized in that can reading, revise memory value to internal storage when debugging.
12, emulation mode as claimed in claim 11 is characterized in that internal storage comprises register and SRAM storage unit.
13, emulation mode as claimed in claim 9 is characterized in that and can understand the microcontroller running status and revise the running status of microcontroller by external bus.
14, emulation mode as claimed in claim 9, when it is characterized in that entering debugging mode by external bus requirement emulator chip is out of service, microcontroller is just at fill order's cycles per instruction at this moment, and microcontroller will enter debugging mode after will finishing in the present instruction cycle.
15, emulation mode as claimed in claim 9, when it is characterized in that entering debugging mode by external bus requirement emulator chip is out of service, microcontroller is being carried out the binary cycle instruction, and microcontroller will enter debugging mode after present instruction is complete.
16, emulation mode as claimed in claim 9, when it is characterized in that entering debugging mode by external bus requirement emulator chip is out of service, microcontroller is responding interruption, and microcontroller enters debugging mode after respective interrupt is finished.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101458652B (en) * 2007-12-14 2012-01-25 上海海尔集成电路有限公司 Embedded on-line emulation debugging system for microcontroller
CN104063298A (en) * 2014-07-02 2014-09-24 南通国芯微电子有限公司 Single-chip microcomputer simulation chip and single-chip microcomputer simulation method
CN110901656A (en) * 2018-09-17 2020-03-24 长城汽车股份有限公司 Experimental design method and system for autonomous vehicle control

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2696561B1 (en) * 1992-10-02 1994-12-23 Sgs Thomson Microelectronics Micro-computer capable of operating in emulation mode with internal and external peripherals.
JP3943277B2 (en) * 1999-03-23 2007-07-11 セイコーエプソン株式会社 Microcomputer and electronic equipment
JP2002049504A (en) * 2000-08-03 2002-02-15 Sharp Corp System including flash memory, flash memory built-in lsi, and debugging system using them

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101458652B (en) * 2007-12-14 2012-01-25 上海海尔集成电路有限公司 Embedded on-line emulation debugging system for microcontroller
CN104063298A (en) * 2014-07-02 2014-09-24 南通国芯微电子有限公司 Single-chip microcomputer simulation chip and single-chip microcomputer simulation method
CN110901656A (en) * 2018-09-17 2020-03-24 长城汽车股份有限公司 Experimental design method and system for autonomous vehicle control
CN110901656B (en) * 2018-09-17 2022-02-22 长城汽车股份有限公司 Experimental design method and system for autonomous vehicle control

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