CN1731734A - Bridge station - Google Patents
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- CN1731734A CN1731734A CN 200410053459 CN200410053459A CN1731734A CN 1731734 A CN1731734 A CN 1731734A CN 200410053459 CN200410053459 CN 200410053459 CN 200410053459 A CN200410053459 A CN 200410053459A CN 1731734 A CN1731734 A CN 1731734A
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Abstract
Disclosed is a bridge station for connecting the first part and second part of an electronic device's bus which comprises: a first input-output module; a second input-output module connected with the second part for reading and writing; a first switch and a second switch connected between the first and second parts; a third switch which connects data wires of the bus's first part and the first input-output module; a forth switch which is connected to clock wires of the bus's first part; a controlling module, which is connected to the first input-output module, the second input-output module, the first, second, third and forth switch, for analyzing data/commands sent/received by the first or second input-output module, and generating control signals to the first, second, third and forth switch; router table which is connected with the control module.
Description
[technical field]
The relevant a kind of bridge station of the present invention, exactly, relate to a kind of connect the different rates bus the bridge station.
[background technology]
It is 98800314.7 Chinese patent in the patent No. of on January 12nd, 1998 application that prior art related to the present invention can be consulted Royal Philips Electronics Co., Ltd, and this patent has disclosed higher electronic installation of a kind of transmission rate and bridge station thereof.This electronic installation comprises: a plurality of stations; Interconnect these stations be used to exchange satisfy signaling protocol message and comprise first and second portion a bus; An and bridge station of interconnect this bus first and second portion, this electronic installation is utilizing after header signal sends the indication that first clock rate higher than the clock rate of header signal with send, arrange at least one station to send content signal with described first clock rate higher than header signal, can be connected to this bus via this first with this at least one station and substation that described first clock rate reception has the message of content signal, this bridge station is arranged between this first and the second portion by this header signal so that detect described indication, replace being used for content signal on the bus second portion with substituting a substitution signal being independent of this content signal, and between this first and second part, recover by signal to respond the signal that Indication message is finished, this header signal, substitution signal and the signal that recovers to pass through afterwards satisfy signaling protocol together with second clock speed (being low speed).
Technique scheme really can reach the purpose that increases electronic installation speed by the first and the second portion of bridge station connecting bus.But in this technical scheme, in the two-forty of content signal sent the time interval that may occur, this bridge station just isolated the first and the second portion of bus, as a low rate station that does not relate to the substitution signal of high rate data transmission.Therefore, when each that links to each other with bus first in this electronic installation stood with high rate communication, can't communicate by each station that the bridge station is connected with the bus second portion, be unfavorable in the electronic installation with the website of low rate communication and with the data communication between the website of high rate communication.
[summary of the invention]
The objective of the invention is to overcome above-mentioned defective, provide a kind of connection with two-forty operation bus and with the bus of low rate operation and bridge station that this two parts bus can different rates be intercomed mutually.
The objective of the invention is to be achieved through the following technical solutions: a kind of bridge station, be used to connect a kind of first and second portion of bus of electronic installation, this bridge station comprises:
A control module;
At least one is to first input/output module that described bus first reads and writes, and described first input/output module comprises a push-pull driver circuit at least;
At least one is to second input/output module that described bus second portion is read and write, and this second input/output module is connected in the second portion of described bus;
Be connected in first switch and second switch between described bus first and the second portion;
The 3rd switch and the 4th switch, the output of push-pull driver circuit is connected to by the 3rd switch on the data conductor of described bus first in described first input/output module, and described first input/output module is connected in the described bus first on the clock lead by the 4th switch;
At least one route device is used to deposit the address information that is connected in a plurality of stations on the described bus;
Described control module links to each other with described first input/output module, second input/output module, first switch, second switch, the 3rd switch, the 4th switch and route device respectively, analyzes and produce the control signal that first switch, second switch, the 3rd switch and the 4th switch are controlled in order to data or order to first input/output module or the second input/output module transmission/reception;
This bridge station also comprises a data buffer device, in order to cushion from first input/output module to second input/output module or the data message from second input/output module to first input/output module.
Described bridge station has first mode of operation and second mode of operation, under first mode of operation, the conducting simultaneously of described first switch and second switch, described the 3rd switch and the 4th switch disconnect, under second mode of operation, the conducting simultaneously of described the 3rd switch and the 4th switch, described first switch and second switch disconnect.
Described first input/output module can also comprise another push-pull driver circuit, and the output of this push-pull driver circuit is connected in the described bus first on the clock lead by described the 4th switch.
Described second input/output module is opened the data conductor that output circuit Lou is connected in described bus second portion by one, drives Lou output circuit by another and is connected in clock lead in the described bus second portion.
Described first switch and second switch are the line switching of a pair of while conducting or disconnection, can be constituted or be made of pair of NMOS transistors by transmission gate, the grid of described transmission gate Enable Pin or described nmos pass transistor links to each other with described control unit output.
Described the 3rd switch and the 4th switch are the line switching of a pair of while conducting or disconnection, are made of transmission gate, and this transmission gate Enable Pin links to each other with described control unit output.
When first mode of operation, first input/output module at described bridge station is in disabled state.
Compared to prior art, the present invention makes two parts that H-IO module, L-IO module correspondingly are linked into bus is set in the bridge station by two pairs of switches are set, and by routing table and buffering area are set in the bridge station, make and utilize the station of moving with two-forty in the electronic installation of the present invention to intercom mutually, improved the overall performance of this electronic installation with station with the low rate operation.
[description of drawings]
Fig. 1 is the structure chart that utilizes the electronic installation at bridge of the present invention station.
Fig. 2 is the structure chart at bridge of the present invention station.
Fig. 3 is the signal timing diagram when each station enters into second mode of operation by first mode of operation in first communication subsystem of electronic installation.
Fig. 4-a and Fig. 4-b be utilize the station owner in first communication subsystem in the electronic installation at bridge of the present invention station moving with the second communication subsystem in the station carry out the data flow figure of data transmit-receive.
Fig. 5-a and Fig. 5-b be utilize the station owner in the second communication subsystem in the electronic installation at bridge of the present invention station moving with first communication subsystem in the station carry out the data flow figure of data transmit-receive.
Below with reference to accompanying drawing to bridge of the present invention station and utilize electronic installation of the present invention to describe.
[embodiment]
Fig. 1 has shown a kind of electronic installation that utilizes bridge of the present invention station, and this electronic installation has communication bus 10a, the b that is made of 10a of first and second portion 10b.On the communication bus of each part, connecting the station that several communicate by this communication bus: 11a, 12a, 13b, 14b, 15c, 16c.Bridge station 17 links to each other with this two parts communication bus, is responsible for two-part communication bus is linked up.
Each part of bus 10a, b all comprises clock signal lead SCL, a SCLH and data signal conductor SDA, a SDAH, and all these signal conductors all pull-up resistor Rp by separately are connected to corresponding electrical source voltage Vdd1, Vdd2.For each station, the signal on clock signal lead SCL, the SCLH is coupled to the clock input of an input filter 115x-165x (x is one of a, b, c) as each station; Signal on data signal conductor SDA, the SDAH is coupled to another one input filter 114x-164x, as the data input at each station.
According to the difference of each station drive clock signal conductor SCL, SCLH or data signal conductor SDA, SDAH mode, the station 11a-16c that is connected on communication bus 10a, the b is divided into three types of A, B, C.Wherein stand 11a, 12a belongs to the category-A station, and the 13b that stands, 14b belong to the category-B station, and the 15c that stands, 16c belong to the C class.Part by station 11a-14b that belongs to category-A and category-B and bridge station 17 has constituted first communication subsystem, it is corresponding to the 10a of first of communication bus 10a, b, and each station in first communication subsystem is connected respectively to clock signal lead SCLH and data signal conductor SDAH; By the second communication subsystem that the other part at C class station and bridge station 17 constitutes, corresponding to the second portion 10b of communication bus 10a, b, each station in the second communication subsystem is connected respectively to clock signal lead SCL and data signal conductor SDA.
Category-A station 11a and 12a are all by being connected with data signal conductor SDAH with first push-pull cascade that a nmos pass transistor (110a, 120a) constitutes by a PMOS transistor (111a, 121a), by being connected with clock signal lead SCLH with second push-pull cascade that a nmos pass transistor (112a, 122a) constitutes by a PMOS transistor (113a, 123a), this first push-pull cascade and second push-pull cascade are respectively applied for driving data signal conductor SDAH and clock signal lead SCLH.Here said PMOS transistor and nmos pass transistor, have respectively between power supply and signal conductor, and can conducting between signal conductor and the signal ground Vss or the raceway groove that ends, and control PMOS pipe and the road conducting of NMOS pipe trench or end are their grid levels separately.
Compare with the category-A station, first push-pull cascade that category- B station 13b and 14b only are made of a PMOS transistor (131b, 141b) and a nmos pass transistor (130b, 140b), be used for driving data signal conductor SDAH, and be not used in second push-pull cascade of drive clock signal conductor SCLH, thereby the clock signal of category- B station 13b and 14b can only directly be obtained from clock signal lead SCLH.
By being made of transistor (150c, 160c) and pull-up resistor Rp one of C class station 15c and 16c opens to export with Louing and is connected with data signal conductor SDA, with driving data signal conductor SDA.The C class station that has as 15c, has another that be made of transistor 152c and pull-up resistor Rp and opens Lou output, is used for drive clock signal conductor SCL; And for other C class station, as 16c, then choose wantonly in order to the transistor 162c that drives SCL.The transistor that above-mentioned formation is opened Lou output is a nmos pass transistor, and it is connected between signal conductor (SDA or SCL) and the signal ground Vss, has a raceway groove that can be in conducting or cut-off state by the control of grid level.
Fig. 2 has represented the detailed structure at bridge station 17.Bridge station 17 comprises following components: first input/output module 170 that the communication bus 10a of first is read and write is called H-IO module 170 in the present embodiment; Second input/output module 175 that second portion communication line 10b is read and write is referred to as L-IO module 175 in the embodiment of the invention; Two pairs of line switchings: first K switch 1, second switch K2 and the 3rd switch k3, the 4th switch k4; A control unit 171; A data buffer zone H-L Buffer172 and a data buffer zone L-H Buffer173 by L-IO module 175 to H-IO modules 170 by H-IO module 170 to L-IO modules 175; And routing table 174.
The H-IO module 170 at bridge station 17, its structure is similar to station 11a, 12a to function: the data signal conductor SDAH of the bus 10a of first is coupled to an input filter 1704 through the 3rd K switch 3, as the data input of H-IO module 170; Clock signal lead SCLH is coupled to another input filter 1705 through the 4th K switch 4, as the clock input of H-IO module 170.In addition, H-IO module 170 is also by by a PMOS transistor 1701 and first push-pull cascade that nmos pass transistor 1700 constitutes, and the data signal conductor SDAH that is connected to the bus 10a of first through the 3rd K switch 3 is to drive this data signal conductor SDAH; By by a PMOS transistor 1703 and second push-pull cascade that nmos pass transistor 1702 constitutes, the clock signal lead SCLH that is connected to the bus 10a of first through the 4th K switch 4 is to drive this clock signal lead SCLH; Drive the clock signal lead SCLH of 10a.Wherein said PMOS transistor and nmos pass transistor are connected between power supply Vdd1 and the signal ground Vss by the mode of series connection, and they have the raceway groove by the control of grid level separately.
The L-IO module 175 at bridge station 17, its structure is similar to station 15c to function: the data signal conductor SDA of second portion bus 10b is coupled to input filter 1754, as the data input of L-IO module 175; Clock signal lead SCL is coupled to input filter 1755, as the clock input of L-IO module 175.In addition, the L-IO module also is connected to the data signal conductor SDA of second portion bus 10b to drive this data signal conductor SDA by the output of opening Lou that is made of transistor 1750 and pull-up resistor Rp; Open Lou by what constitute that output is connected the clock signal lead of second portion bus 10b to drive this clock signal lead SCL by transistor 1752 and pull-up resistor Rp.
First K switch 1 and second switch K2 are the line switchings of a pair of while conducting or disconnection, and they are connected between two parts of communication bus 10a, b: wherein K1 is connected between data signal conductor SDAH, the SDA of 10a, b; K2 is connected between clock signal lead SCLH, the SCL of 10a, b.K1/K2 can be made of transmission gate, and the Enable Pin of transmission gate is connected in the output of control module 171, and at this moment electrical source voltage Vdd1, the Vdd2 on two parts communication bus should equate, to avoid in the generation pressure drop of transmission gate two ends.K1/K2 also can be realized by other circuit structure: be connected in 10a, leak level and be connected in pair of NMOS transistors on the 10b and (suppose Vdd2＞Vdd1) such as source class and substrate, the raceway groove that nmos pass transistor has under grid level control conducting or ends, the grid level of nmos pass transistor is linked in the output of control module 171.At this moment, two-part communication bus can adopt different electrical source voltages, gets 3.3V such as Vdd1, and Vdd2 gets 5V.
The 3rd K switch 3 and the 4th K switch 4 are another line switchings to while conducting or disconnection, in order to connect the communication bus 10a that recommends output and first of H-IO module.K3 is connected between the data signal conductor SDAH of the first push-pull cascade output of H- IO module 170 and 10a; K4 is connected between the clock signal lead SCLH of the second push-pull cascade output of H-IO module 170 and 10a.K3/K4 is made of transmission gate, and this is because first and second push-pull cascades of H-IO module 170 have the electrical source voltage Vdd1 identical with the bus 10a of first.The Enable Pin of transmission gate is connected in another output of control module 171.
H-L Buffer172 and L-H Buffer173 are a pair of buffering areas, in order to buffering from H-IO module 170 to L-IO modules 175 or from the data of L-IO module 175 to H-IO modules 170.They both can only hold one is the data block of unit with the bag, also can hold the formation that is made of a plurality of packets.
Routing table 174 is fritter memory blocks, is used to deposit the address information that is connected to the device on two parts communication bus 10a, the b.Routing table 174 is divided into two in H district and L district, and wherein the H district is specifically designed to the address information of depositing all stations that are connected to the communication bus 10a of first, and the L district is specifically designed to the address information of depositing all stations that are connected to second portion communication bus 10b.The information of routing table 174 is write by L-IO module 175 by some stations normally after bus 10a, b power on; And, not changing as long as be connected in the address information at the station on the bus 10a b, routing table 174 does not just need to upgrade.
In operation, bridge station 17 can be operated under first and second mode of operations.In first mode of operation, the control module 171 control switch K1/K2 conductings at bridge station 17, K switch 3/K4 disconnects, and forbidden energy H-IO module 170.The conducting of first K switch 1 and second switch K2 couples together the two-part data signal conductor SDAH of communication bus 10a, b, SDA and clock signal lead SCLH, SCL respectively.At this moment data on the 10a and clock signal can be sent on the 10b by first K switch 1 and second switch K2, and vice versa.If K1/K2 adopts the structure of nmos pass transistor, can also realize that 10a, b two parts are in the conversion between the signal under different electrical power electromotive force Vdd1, the Vdd2.The disconnection of the 3rd K switch 3 and the 4th K switch 4 is that the signal on bus 10a, the b produces and disturbs under 170 pairs first mode of operations of H-IO module.And the purpose of forbidden energy H-IO module 170 mainly is to consider in order to save power consumption.In first mode of operation, L-IO module 175 remains operating state, in order to bridge station 17 is carried out the read-write (as filling in routing table 174) of self information.In first mode of operation, H-L Buffer172 and L-H Buffer173 are in off position usually.
In second mode of operation, control module 171 control first K switch 1 and the second switch K2 at bridge station 17 disconnect, the 3rd K switch 3 and 4 conductings of the 4th K switch, and activate H-IO module 170.At this moment two parts of bus 10a, b are separated and come, and data signal conductor SDAH and the clock signal lead SCLH that drives on the bus 10a of first exported via recommending of H-IO module 170 respectively in bridge station 17; Lou export data signal conductor SDA and the clock signal lead SCL that drives on the second portion bus 10b by opening of L-IO module 175.In second mode of operation, the H-L Buffer172 of 17 inside, bridge station and L-H Buffer173 and routing table 174 are in running order, come the collaborative exchange of finishing information between bus 10a of first and the second portion bus 10b.
Correspondingly, apparatus of the present invention have the first and second two kinds of mode of operations.Under first mode of operation, be connected to all station 11a-16c of communication bus 10a, b, and the L-IO module 175 at bridge station 17, communicate with a kind of lower speed.A most typical example of the communication protocol that first mode of operation is adopted is exactly the I2C agreement of Philips, this protocol description is being published in 1994 by the Philips semiconductor, in " databook IC20: based on the 80C51 of 8 bit microprocessors " on the 1141-1159 page or leaf, the present invention is that set forth on the basis with the I2C agreement just in the subsequent descriptions first mode of operation communication process.Under second mode of operation, be connected to the bus 10a of first belong to first communication subsystem each station communicate with a kind of higher speed, at this moment they will adopt a kind of agreement that is different from I2C fully to communicate; Still keep with I2C agreement and communicate and be connected to each station that second portion bus 10b belongs to the second communication subsystem than low rate.Two IO module H-IO modules 170 at bridge station 17, L-IO module 175, under second mode of operation, insert bus 10a of first and second portion bus 10b respectively, and according to the speed of the bus that inserts separately, with at a high speed and the agreement and the corresponding communication subsystem of low speed communicate.The speed of first mode data transmission is usually less than 400k bit/s, so claim that also first mode of operation is a low-speed mode; The speed of second mode data transmission then may be raised to 16M bit/s, and promptly the 400k bit/s far above first mode of operation also remains on more than the 1M bit/s at least, claims that also second mode of operation is a fast mode.
Under first mode of operation, be connected the 11a-14b that respectively stands on the bus 10a of first, PMOS transistor 111a in their first push-pull cascade, 121a, 131b, 141b are in off state all the time, and for category-A station 11a, 12a, PMOS transistor 113a in their second push-pull cascade and 123a also are in off state all the time.The H-IO module 170 of 17 inside, bridge station is by forbidden energy, and L-IO module 175 keeps operating state.Like this, each 11a-16c that stands, and bridge station 17 (L-IO) all drives clock signal lead SCLH, SCL and data signal conductor SDAH, SDA under first mode of operation by having the level output of opening Lou that is made of nmos pass transistor and bus pull-up resistor Rp.Under this pattern, first K switch 1 and the second switch K2 of inside, bridge station are in closure state, make the conducting of NMOS pipe as any station, thereby when making signal conductor SDAH, the SDA, SCLH, the SCL that link to each other with this NMOS pipe be pulled to logic low Vss, bus 10a, b other parts signal conductor SDAH, SDA, the current potential of SCLH, SCL of correspondence with it also will be pulled down to Vss.Have only when the nmos pass transistor of each station connection signal conductor and Vss all is in off state, the current potential of lead just is pulled to corresponding power supply potential Vdd1, Vdd2 by pull-up resistor Rp.
In first mode of operation, the L-IO module 175 at stand 11a-16c and bridge station 17 utilizes the I2C agreement to communicate.The detailed description of relevant I2C agreement can be with reference to the databook of Philips.Briefly, this agreement is from the static state of bus, and wherein all signal conductor SDA, SDAH, SCL, SCLH are corresponding power supply potential Vdd1, Vdd2.A station (for example 12a) of wishing to begin to communicate by letter is by being pulled to data signal conductor SDA, SDAH logic low Vss (by making the raceway groove conducting of nmos pass transistor 120a), keeping clock signal lead SCL, SCLH simultaneously is logic high Vdd1, Vdd2 (disconnecting by the raceway groove that makes nmos pass transistor 122a), forms a beginning condition S.Then, the 12a that stands attempts to produce a series of clock signal pulses and data signal levels by making the transistor 120a, 122a conducting or the not conducting that are connected between bus and the logic low Vss.Represent that by making clock signal lead SCL, SCLH pull to logic high Vdd1, Vdd2 data are effective.Other each station and bridge station, can come the delayed clock pulse by keeping the clock signal lead to be pulled to logic low Vss (utilizing transistor 112a, 152c, 162c, 1752 to connect clock signal lead SCL, SCLH to logic low Vss), this makes other each station to use up needs many time deal with data.In first mode of operation, no matter nmos pass transistor conducting or whether end, the PMOS transistor at each station is in cut-off state all the time.
The station 12a (being called " main website ") that hope begins to communicate by letter, after beginning condition S is provided, whether the address (address that can comprise the bridge station) that " subordinate " that provide hope to communicate by letter with it that continues stood and expression main website or slave station be to a bit (read/write bit) data of bus write data.The L-IO module 175 at each station 11a-16c and bridge station 17 receives data-signal through input filter from bus 10a, b, and input filter can be removed the noise that resembles spiking one class.The L-IO module 175 at each station 11a-16c and bridge station 17 determines whether the signal that receives comprises its address and whether need to read or write signal bus, thereby begins to participate in communication.
Then, perhaps the 12a of main website or other slave station (one of the 11a-16c that stands, or bridge station 17) of being addressed to by main website provide data to bus 10a, b.After the exchange of finishing this one piece of data, the 12a of main website can send a more NEW BEGINNING condition (Sr), and address and a read/write bit succeeded by another slave station are used for the exchange of another segment data.This process can repeat repeatedly, and to the last the 12a of main website has produced a stop condition P, the end of expression data communication and the preparation of arbitration next time.The generation of stop condition P is when keeping logic high Vdd1, Vdd2 by the current potential as clock signal conductor SCL, SCLH, to make data signal conductor SDA, SDAH move logic high Vdd1, Vdd2 to from logic low Vss and produce.
In the I2C agreement, data are that unit transmits with 8 bits.After per 8 bits, follow an acknowledgement bit.The L-IO module 175 that receives station 11a-16c, the bridge station 17 of data can be by during being used for the clock signal pulse of acknowledgement bit, makes the current potential of data signal conductor SDA, SDAH pull to logic low Vss and confirm to receive.If during being used for the clock signal pulse of acknowledgement bit, data signal conductor SDA, SDAH remain logic high Vdd1, Vdd2, represent that then receiving station do not receive that this data cell maybe can not handle it.At this moment, the station that sends data should attempt retransmitting this data cell or interrupt transmission.
Stand 11a-16c and bridge station 17 by produce a beginning condition and the order data attempt to become main website.If a such station notices that busy (the beginning condition sends for bus 10a, b, and stop condition does not also send), then it will be waited for up to bus 10a, b free time, and this makes possible two or more station 11a-16c or bridge station 17 produce a beginning condition in the identical substantially time.Be head it off, the current potential of stand 11a-16c and bridge station 17 monitoring data signal conductor SDA, SDAH.If make its nmos pass transistor (110a, 120a at station 11a-16c, bridge station 17 ... 160c, 1750) not conducting is so that the current potential of data signal conductor when pulling to logic high Vdd1, Vdd2, in the when clock in office (except the affirmation), the current potential that detects data signal conductor is pulled to logic low Vss, and the 11a-16c that then stands, bridge station 17 are concluded must have another station 11a-16c, bridge station 17 also to attempt to become main website and stop to send after next stop condition (unless if be addressed certainly).This processing is arbitration, and the station 11a-16c that stops to send, bridge station 17 are called as and lose arbitration.
In second mode of operation, be connected to PMOS transistor (111a, 121a, 131b, the 141b) state of resuming work in first push-pull cascade of the 11a-14b that respectively stands on the bus 10a of first; The state of also resuming work of PMOS transistor 113a, the 123a in second push-pull cascade of category-A station 11a and 12a simultaneously.The H-IO module 170 at bridge station 17 is activated.Form contrast with the level output of opening Lou that constitutes by nmos pass transistor and pull-up resistor Rp under first pattern, the push-pull cascade output that is formed by PMOS transistor and nmos pass transistor can produce the much higher signal of speed on data signal conductor SDAH and clock signal lead SCLH, this just makes that transmission speed is faster.Allow to use and recommend driving, be because any two stations in first communication subsystem under second mode of operation are appointed: cannot carry out write operation to clock signal lead SCLH or data signal conductor SDAH simultaneously, conflict to avoid on bus, producing, and this point is to arrange to realize by a station (management station) that is in leading position in first communication subsystem.In second mode of operation, bridge station 17 disconnects first K switch 1 and second switch K2, with bus 10a, the b that separates first and second parts; Make the 3rd K switch 3 and the 4th K switch 4 closures simultaneously, thereby H-IO module 170 can be read and write the bus 10a of first.Like this, by category-A station, category-B station, and first communication subsystem of H-IO module 170 formations at bridge station 17, can utilize fast mode (16M bit/s) to communicate; Meanwhile, the second communication subsystem by the L-IO module 175 at C class station and bridge station 17 constitutes still maintains the operating state of low-speed mode, and utilizes the I2C agreement to communicate.The exchange of data with different rate between two communication subsystems is finished at 17 at bridge station when needed.
Signal transmission figure when Fig. 3 represents that respectively standing in of first communication subsystem enters into second mode of operation by first mode of operation on the bus 10a of first.Before moment tH, the transmission of information is carried out with first mode of operation (conventional I2C): hope is with the station of fast mode exchange message, as the 12a that stands, after a beginning condition S, before the t0, utilize bus 10a, b to send specific 8 bit address 00001000 (also claiming the main frame sign indicating number) and prepare constantly for entering fast mode.This address is as the arbitration mode of I2C, because this specific address has than conventional I2C address value of " low " (conventional I2C address has " 1 " at least in four initial bits) all, therefore on bus 10a, b, if other station 11a-16c is arranged, send the address that is used for conventional I2C simultaneously, then they will usually lose arbitration.This will allow the station 12a of transmission main frame sign indicating number 00001000 to obtain the triumph of arbitration.The 9th acknowledgement bit behind main frame sign indicating number address, all stations are not done and are replied.Next, since moment t0, between the tH constantly, the station (12a) of winning the arbitration of main frame sign indicating number is put into it self 8 I2C addresses (wherein the 8th is arbitrary value) on bus 10a, the b and transmits again.The address of extended mode is also supported in this address.The response bits of this back, address does not need to reply.During this period of time, all stations that are connected on bus 10a, the b still are operated under first pattern, also can both receive this address signal of 8.By said process, all station 11a-16c, 17 receive the main frame sign indicating number, know next to be about to enter fast mode, and receive an I2C address, just know by which station application to enter fast mode.If the station more than is arranged, as 11a and 12a, produce the beginning condition in the identical substantially moment, and send the main frame sign indicating number, then after they obtain the triumph of main frame sign indicating number arbitration with identical step, t0 to tH constantly between, their address also will be arbitrated on bus 10a, b once more, up at tH constantly, has and only have a station, as 12a, can finally win the arbitration of main frame sign indicating number and himself address.Dominating role is played in first communication subsystem under second mode of operation usually in such station, is referred to as management station.
At tH constantly, when clock signal conductor SCLH, SCL are pulled to logic high Vdd1, Vdd2 via pull-up resistor Rp once more, each station of first communication subsystem and the operating state that the bridge station enters fast mode with switching, and each station of second communication subsystem still maintains the operating state of low-speed mode.
The station that initiation enters fast mode all is the category-A station usually, as 11a, 12a, and the category-B station, as 13b, 14b, because do not possess the ability of drive clock signal conductor,, thereby can not become management station so the category-B station can not initiate to enter the process of fast mode in the mode of main website usually.Consider from the complexity of simplifying the bridge station, fast mode can initiatively not initiated to enter usually in bridge station 17, thereby can not become management station yet, it only is responsible for being operated in first communication subsystem under the fast mode and is operated in information mutual communication between the second communication subsystem under the low-speed mode.If but bridge station 17 itself is connected to a processor with independent data disposal ability, as other category-A station, then bridge station 17 also can initiatively initiate to enter fast mode and become management station.If like this, the process that bridge station application enters fast mode is: at first sending the address at main frame sign indicating number and bridge station 17 self on bus 10a, b by L-IO module 175 (at this moment H-IO module 170 is by forbidden energy) under first mode of operation.After bus arbitration is won at bridge station 17, switch to second mode of operation constantly at tH.Afterwards, the bridge station is respectively by H-IO170 and L-IO module 175, and high-speed data that processor is provided and low speed data are put into respectively in corresponding first, second communication subsystem and exchange.Meanwhile, the control module 171 of inside, bridge station, H-L Buffer172, L-H Buffer173 and routing table 174 are still in order to finish from first exchange to second communication subsystem data.For each station of first communication subsystem, H-IO module 170 at this moment is equivalent to the management station in first communication subsystem.
Initiation enters the station such as the 12a of fast mode, after the arbitration that obtains main frame sign indicating number and himself I2C address, becomes the management station of first communication subsystem under the fast mode.The 12a of management station is responsible for the 11a that respectively stands, 13b in first communication subsystem, 14b, H-IO module 170 are managed, and makes them can use the data signal conductor SDAH swap data of the bus 10a of first in turn.Simultaneously, management station also will be responsible for the high-speed clock pulse signal on the drive clock signal conductor SCLH, as the synchronised clock at each station in first communication subsystem.
With the station 11a-14c, 170 (H-IO) that fast mode communicates, adopted a kind of communication protocol of the I2C of being different from agreement, will this communication protocol be described by a specific embodiment below.
Under fast mode, the exchange of data is normally carried out with the form of packet one by one.Before transfer data packets, also need a token packet, in order to the direction that shows that packet transmits; And after packet sends end, need the response packet of shaking hands to confirm the correctness of Data Receiving.In addition, also have some control (permission) that is used for administrative purposes bags and state bag etc.Each bag all includes following some optional fields usually: identification field, in order to the type that shows that bag is affiliated; Address field is in order to the address, point of destination that shows that this bag transmits; Control field is comprising some control informations; Data field is comprising active data load or state information etc.; Check field, in order to the correctness of content of bag is verified, or the like.
According to the various combination at the station that participates in data communication, the detailed process of data communication is also different, is broadly divided into following a few class: the data communication process at management station and non-management station in first communication subsystem; Data communication process between interior two the non-management stations of first communication subsystem; Data communication process between a station of first communication subsystem and the station of second communication subsystem; Data communication process between two stations of second communication subsystem.Wherein, data communication process in first communication subsystem between the data communication process at management station and non-management station, interior two the non-management stations of first communication subsystem and the data communication process between two stations of second communication subsystem be not owing to need the bridge station to transmit data message, be not described in detail in this, only the data communication process between the station of station of first communication subsystem and second communication subsystem described here.
By preceding described, in second mode of operation, the exchanges data between first communication subsystem and two stations of second communication subsystem is responsible at bridge station 17, and its process is shown in Fig. 4-a, Fig. 4-b, Fig. 5-a and Fig. 5-b.Suppose that management station is 12a, Fig. 4-a is the data flow figure that the station (as 11a) of one first communication subsystem sends data to the station (as 15c) of a second communication subsystem; Fig. 4-b then receives the data flow figure of data, the direction that on behalf of data, the direction of arrow transmit for station 11a slave station 15c.
The flow process that the 11a that stands sends data to station 15c is:
(1) 11a that stands waits for that the 12a of management station issues its a permission bag, just can use the bus 10a of fast mode to send data;
(2) stand that to send address, a point of destination be the token packet of the OUT type of 15c to 11a.The H-IO module 170 at bridge station 17 receives that an OUT token packet just gives control module 171 with its destination address and search routing table 174.If control module 171 finds that the destination address of this OUT token is positioned at the L district of routing table 174, expression has data to transmit by bridge station 17, will notify H-IO module 170 to prepare to receive the packet that (3) step sent; Otherwise if the destination address of OUT token is positioned at the H district of routing table 174, the expression data do not need to transmit, and H-IO module 170 can not produce any response to the packet in (3) step.Because the destination address of OUT token is not that bridge station 17 is own, so the arrow among the figure dots, the back together.
(3) 11a that stands sends packet.The address of 15c is positioned at the L district of routing table 174 because stand, and according to the judgement in (2) step, H-IO module 170 receives this packet;
When (4) receiving packet, H-IO module 170 can be verified the correctness of this packet, and be checked the state of H-L Buffer172 by control module 171.If packet transmits mistake or H-L Buffer172 is in saturation condition, then control module can be notified H-IO module 170 to send one and deny response packet, so that station 11a retransmits this packet after a while.Have only when packet when correct and H-LBuffer172 has remaining space to hold this packet, control module 171 just can notify H-IO module 170 to beam back an affirmation response packet, packet is placed into H-L Buffer172 buffering together with its destination address information then, waits for and mails to point of destination 15c by L-IO module 175 after a while;
(5) 11a that stands receives and denies response packet, retransmits previous packet again after a period of time of will delaying time, to avoid producing serious congestion on H-L Buffer172; The 11a that stands receives and confirms after the bag, can repeat for (2)-(4) step and continue to send packet.11a no longer includes data to be sent if stand, and just carries out for (6) step;
(6) stand 11a transmission permission end packet to the 12a of management station, the 12a of management station just can go to satisfy the data transfer needs at other station;
(7) L-IO module 175 detects H-L Buffer172 packet to be sent, will mail to their points of destination separately to the packet among the H-L Buffer172 according to the agreement of I2C.After data sent and finish, corresponding memory block just was cleared among the H-L Buffer172.In (7) step, it is in the process that the I2C data send that four-headed arrow is represented to reply, and per 8 responses once.
The flow process that the 11a slave station 15c that stands receives data is:
(1) 11a that stands waits for that the 12a of management station issues its permission bag, thereby brings into use bus 10a;
(2) stand that to send address, a point of destination be the token packet of the IN type of 15c to 11a.The H-IO module 170 at bridge station 17 is received an IN token packet, just gives control module 171 with its destination address and searches routing table 174.If control module 171 finds that the destination address of IN token is positioned at the L district of routing table 174, expression has data to transmit by bridge station 17, will notify H-IO module 170 to carry out for (3) step; Otherwise if the destination address of IN token is positioned at the H district of routing table 174, any response is not done at (3) fore-and-aft gangway station 17;
(3) control module is checked the state of L-H Buffer173, if L-H Buffer173 also has enough vacant next packets that holds, H-IO module 170 will send one and wait for bag to station 11a, and notice station 11a waits for a period of time; If L-H Buffer173 is in saturation condition, H-IO module 170 can directly send one and deny response packet, tells station 11a to be in busy condition when propons station 17.Send and wait for that bag is slowly to wait for fear of station 11a to retransmit token packet less than packet, because the speed of I2C reading of data causes it to spend much more time than fast mode;
(4) when sending the wait bag, control module 171 can notice L-IO modules 175 utilize I2C agreement slave station 15c to go up reading of data.These data come the address information of source station to be temporarily stored among the L-HBuffer173 together with it;
(5) H-IO module 170 detects the data of collecting in (4) step to be sent among the L-H Buffer173, these data will be bound into packet, and mails to station 11a;
(6) 11a that stands verifies the data that receive, if correctly just send the affirmation response packets to bridge station 17; Otherwise just send and deny response packet;
(7) the 11a packet as required of standing receives correctness, can circulate carry out (2), (5), (6) step read new packet or require bridge station 17 to retransmit previous packet from the bridge station.As long as before the data of (4) step collection do not run through, and the address, point of destination of IN token is constant, circulation just can be skipped (3), (4) step once more; Otherwise 11a just must carry out for (2)-(6) step just can read new packet.Have only after station 11a sends an affirmation response packet, bridge station 17 just can be removed the data that are identified from L-H Buffer173;
(8) stand 11a transmission permission end packet to the 12a of management station, the end of expression data read process.
Fig. 5-a is the data flow figure that the station 15c of a second communication subsystem initiatively sends data to the station 11a of one first communication subsystem; Fig. 5-b then is the data flow figure of station 15c slave station 11a reading of data.Suppose that management station still is 12a, the direction that the direction representative data of arrow transmits.
The flow process that the 15c that stands sends data to station 11a is:
(1) 15c that stands produces a beginning condition S according to the requirement of I2C agreement on bus 10b, wishes the address of the slave station (11a) of communication and bit (read/write bit) data that a bit representation station 15c will carry out write operation to bus 10b with it succeeded by its.The control module 171 at bridge station 17 is according to slave station address search routing table 174, and checks the state of L-H Buffer173 simultaneously.If the address of slave station is positioned at the H district (showing that this is once via the data transfer procedure at bridge station) of routing table 174, and L-H Buffer173 has enough spaces to hold data, and the L-IO module 175 at bridge station 17 will produce answer signal to this address in the response bits behind the read/write bit.Next, bridge station 17 can receive the data of being sent by station 15c successively, and they are temporarily stored among the L-H Buffer173; If the address of slave station is positioned at the L district (showing that this is the data communication of second communication subsystem inside) of routing table 174, or L-HBuffer173 is in saturation condition, bridge station 17 can not produce any answer signal to the data of this address and back, any data of yet can the 15c of receiving station not sending;
(2) after the I2C Data Receiving finished, bridge station 17 was waited for and is issued its permission bag by the 12a of management station, thereby makes H-IO module 170 can use the bus 10a of fast mode;
(3) the H-IO module 170 at bridge station 17 token packet of sending the OUT type 11a that arrives at a station, notice station 11a prepares to receive data;
(4) the H-IO module 170 at bridge station 17 is bound into packet with the data among the L-H Buffer173 and is sent by bus 10a, and the 11a that stands receives this packet and the correctness of packet content is verified;
(5) if the content of packet is correctly received, the 11a that stands just issues 17 1 at bridge station and confirms response packet; Otherwise the 11a that stands just sends one and denies response packet;
(6) the bridge station is to confirm response packet or deny response packet according to what receive, judges whether to carry out once more (3)-(5) step to retransmit a last packet.Have only when the bridge station and receive the affirmation response packet, the data message that is identified among the L-H Buffer173 just can be removed.If there is more than one packets need to send among the L-H Buffer173, then (3)-(5) step of bridge station repetition sends these packets successively;
(7) related data among the L-H Buffer173 sends and finishes, and the bridge station sends the permission end packet to the 12a of management station, no longer takies bus 10a.
The flow process that the 15c slave station 11a that stands receives data is:
(1) 15c that stands produces a beginning condition S according to the requirement of I2C agreement on bus 10b, wishes the address of the slave station (11a) of communication with it and bit representation station 15c bit (read/write bit) data with read bus 10b succeeded by its.The control module 171 at bridge station 17 is according to slave station address search routing table 174, and check the state of H-L Buffer172 simultaneously: if the address of slave station is positioned at the H district (showing that this is once via the DRP data reception process at bridge station) of routing table 174, and H-L Buffer172 has enough spaces to hold data, and the L-IO module 175 at bridge station 17 will produce answer signal to this address in the response bits behind the read/write bit; Otherwise, if the address of slave station is positioned at the L district (showing that this is the data communication of second communication subsystem inside) of routing table 174, or H-L Buffer172 is in saturation condition, and the L-IO module 175 at bridge station 17 just can not produce answer signal to this address, also can not carry out follow-up all steps.After the bridge station had produced an answer signal to the slave station address, the L-IO module 175 at bridge station 17 was that logic low (utilizing nmos pass transistor 1752 to connect SCL to logic low Vss) makes bus 10b be in quiet and busy condition by the clock signal lead SCL that keeps second portion bus 10b.At this moment the 15c that stands also will keep wait state, until have the I2C data to transmit once more on (8) the step 10b;
(2) bridge station 17 is waited for and is issued its permission bag by the 12a of management station, thereby makes its H-IO module 170 can use the bus 10a of fast mode;
(3) the H-IO module 170 at bridge station 17 token packet of sending an IN type is given station 11a, and notice station 11a can send data;
(4) 11a that stands sends the H-IO module 170 of a packet to bridge station 17, and H-IO module 170 these packets of reception at bridge station 17 are also verified the correctness of packet content;
(5) if the content of packet is correctly received, the H-IO module 170 at bridge station 17 is just put into the packet of receiving among the H-L Buffer172, and issues one of station 11a and confirm response packet; Otherwise the H-IO module 170 at bridge station 17 just abandons this packet, and issues one of the 11a in station and deny response packet;
(6) bridge station 17 is according to the correctness that packet receives, and whether select needed to carry out once more (3)-(5) step to receive previous packet again; If the H-L Buffer172 at bridge station 17 has enough vacant, it also can select to carry out (3)-(5) step to receive new packet;
(7) bridge station 17 no longer receives packet, just sends the permission end packet to management station, to discharge bus 10a;
(8) the L-IO module 175 at bridge station 17 is recovered the operating state (even nmos pass transistor 1752 is in off-state) of the clock signal lead SCL of bus 10b, afterwards, related data among the H-L Buffer will transmit the 15c that arrives at a station through bus 10b according to the form of I2C agreement: in this step, the 15c that stands does not need to resend beginning condition and slave station address, directly receives the I2C data but can follow the state in (1) step.
The terminal procedure of second mode of operation is: the management station by first communication subsystem sends a special mode switch order (a special controlling packet) on high-speed bus 10a, afterwards at synchronization, each station of first communication subsystem and bridge station are switched to low-speed mode jointly by the operating state of fast mode operating state.First K switch 1 at bridge station 17 and second switch K2 closure, the signal on the bus 10a of first can pass on the second portion bus 10b.Entered the stop condition of an I2C agreement of station (being the management station under the fast mode) transmission of fast mode at last by initiation originally, all station 11a-16c, bridge station 17 that it will be connected on bus 10a, the b are discerned.Stop condition is received at each station, just can utilize bus 10a, b to carry out I2C once more and communicate by letter, or the initiation process that enters fast mode once more.
Claims (8)
1. bridge station is used to connect a kind of first and second portion of bus of electronic installation, it is characterized in that this bridge station comprises:
A control module;
At least one is to first input/output module that described bus first reads and writes, and described first input/output module comprises a push-pull driver circuit at least;
At least one is to second input/output module that described bus second portion is read and write, and this second input/output module is connected in the second portion of described bus;
Be connected in first switch and second switch between described bus first and the second portion;
The 3rd switch and the 4th switch, the output of push-pull driver circuit is connected to by the 3rd switch on the data conductor of described bus first in described first input/output module, and described first input/output module is connected in the described bus first on the clock lead by the 4th switch;
At least one route device is used to deposit the address information that is connected in a plurality of stations on the described bus;
Described control module links to each other with described first input/output module, second input/output module, first switch, second switch, the 3rd switch, the 4th switch and route device respectively, analyzes and produce the control signal that first switch, second switch, the 3rd switch and the 4th switch are controlled in order to data or order to first input/output module or the second input/output module transmission/reception;
2. bridge as claimed in claim 1 station is characterized in that: this bridge station also comprises a data buffer device, in order to cushion from first input/output module to second input/output module or the data message from second input/output module to first input/output module.
3. bridge as claimed in claim 1 or 2 station, it is characterized in that: described bridge station has first mode of operation and second mode of operation, under first mode of operation, the conducting simultaneously of described first switch and second switch, described the 3rd switch and the 4th switch disconnect, under second mode of operation, the conducting simultaneously of described the 3rd switch and the 4th switch, described first switch and second switch disconnect.
4. bridge as claimed in claim 3 station is characterized in that: described first input/output module can also comprise another push-pull driver circuit, and the output of this push-pull driver circuit is connected in the described bus first on the clock lead by described the 4th switch.
5. bridge as claimed in claim 4 station, it is characterized in that: described second input/output module is opened the data conductor that output circuit Lou is connected in described bus second portion by one, drives Lou output circuit by another and is connected in clock lead in the described bus second portion.
6. as claim 4 or 5 described bridge stations, it is characterized in that: described first switch and second switch are the line switching of a pair of while conducting or disconnection, can be constituted or be made of pair of NMOS transistors by transmission gate, the grid of described transmission gate Enable Pin or described nmos pass transistor links to each other with described control unit output.
7. a kind of electronic installation as claimed in claim 6 is characterized in that: described the 3rd switch and the 4th switch are the line switching of a pair of while conducting or disconnection, are made of transmission gate, and this transmission gate Enable Pin links to each other with described control unit output.
8. bridge as claimed in claim 7 station is characterized in that: when first mode of operation, first input/output module at described bridge station is in disabled state.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410053459 CN1731734A (en) | 2004-08-05 | 2004-08-05 | Bridge station |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410053459 CN1731734A (en) | 2004-08-05 | 2004-08-05 | Bridge station |
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| Publication Number | Publication Date |
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| CN1731734A true CN1731734A (en) | 2006-02-08 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200410053459 Pending CN1731734A (en) | 2004-08-05 | 2004-08-05 | Bridge station |
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| CN (1) | CN1731734A (en) |
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