CN1728360A - Method for reducing inverse narrow-channel effect of mini size part - Google Patents
Method for reducing inverse narrow-channel effect of mini size part Download PDFInfo
- Publication number
- CN1728360A CN1728360A CN 200410053290 CN200410053290A CN1728360A CN 1728360 A CN1728360 A CN 1728360A CN 200410053290 CN200410053290 CN 200410053290 CN 200410053290 A CN200410053290 A CN 200410053290A CN 1728360 A CN1728360 A CN 1728360A
- Authority
- CN
- China
- Prior art keywords
- halo
- narrow
- angle
- effect
- rnce
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Semiconductor Memories (AREA)
- Element Separation (AREA)
Abstract
The method increases angle of Halo injection to 35 - 45 degrees. Under precondition of ensuring unchanged general characteristics of parts, the invention restrains RNCE, improves characteristics of narrow-channel part and hot carrier's effect of part, increases carrier mobility, reduces parasitic junction capacitance to raise speed of parts. The invention is applicable to technique for manufacturing semiconductor device, especially for device in small size.
Description
Technical field
The present invention relates to the production process of semiconductor device method, particularly relate to a kind of method that reduces the small size device reversed narrow-path effect.
Background technology
Reversed narrow-path effect (RNCE) is meant under STI (shallow trench isolation shallow trench isolation from) isolation technology, the threshold voltage of device with channel width reduce and the effect of successively decreasing.This effect is one of key factor of restriction small size device application, for example in static RAM (SRAM) element circuit, most devices all is narrow raceway groove, because the decay of threshold voltage, sometimes have to adopt special cell channel to inject, this not only needs to increase mask plate, makes process complications, and has increased cost of manufacture.
In order to reduce RNCE, currently used measure is to improve STI top fillet.Though this method is effective, owing to influence the STI edge current leakage simultaneously, thus must on injecting, ion be optimized again, with the distribution of further improvement threshold voltage.
Summary of the invention
The technical problem to be solved in the present invention provides a kind of method that reduces the small size device reversed narrow-path effect, guaranteeing under the constant prerequisite of general device property, suppress RNCE, improve narrow ditch device property, increase carrier mobility simultaneously, reduce parasitic junction capacitance, improve device speed, and improve the hot carrier's effect of device.
For solving the problems of the technologies described above, the method that reduces the small size device reversed narrow-path effect of the present invention is, improves the angle that bag shape (Halo) injects, and the angle that Halo injects is that 30 degree are to 45 degree.
It is in order to reduce short-channel effect, ion injection that done and the channel doping homotype after the grid etching that Halo injects.If implant angle is increased to 30 degree from 10 degree of routine, the Halo of high angle inject make impurity more effectively from the Width of narrow ditch device to channel doping, increase the gap of narrow ditch and the average impurity level of wide ditch, thereby improve RNCE.
The present invention is by the increase of Halo implant angle, just can reach the purpose of keeping the proper device threshold voltage with lower Halo implantation dosage, this makes that LDD (low doping source leakage) knot is darker, and junction capacitance reduces, and improves simultaneously because the caused device property of hot carrier's effect is degenerated.
The adjustment of the present invention by Halo is injected improves RNCE, improves the speed of device, and increases the reliability of device.Changed the single mode of optimizing RNCE by the STI pattern, made device optimization more effectively with quick.Can save simultaneously and be used for the mask plate that the unit ion injects, simplify technological process, save cost.
Embodiment
The main performance of RNCE is threshold voltage the reducing and reduce with channel width of device.The method that reduces the small size device reversed narrow-path effect of the present invention is that the angle that raising Halo injects, the angle that Halo injects are that 30 degree are to 45 degree.
By improving the angle that Halo injects, make the wide raceway groove of narrow ditch channel ratio that higher doping content be arranged, thus the uniformity that improvement threshold voltage distributes with channel width.It all is to be divided into four times to carry out usually that Halo injects, and silicon chip all revolves and turn 90 degrees after each the injection, thus inject not only at length direction at every turn, and at Width raceway groove is mixed.By increasing implant angle, make it more effective to the doping of raceway groove at Width, and compare with wide raceway groove, narrow raceway groove has more doping to inject from Halo, the average doping content of narrow like this raceway groove is than wide raceway groove height, reduces the decline of the narrow ditch device threshold voltage that caused by RNCE effectively.
Below by a specific embodiment the present invention is described in further detail.
If the condition that existing Halo ion injects is B3.0e13_15/10Q^45, along with reducing of channel width, the mean boron concentrations in the raceway groove increases, but recruitment is limited.Change the condition that the Halo ion injects into B3.0e13_15/30Q^45 now according to method of the present invention, the wide raceway groove of concentration ratio of boron can have greatly increased in the narrow raceway groove, and such boron distribution makes the threshold voltage of narrow ditch device compare wide ditch and is greatly improved.That is to say that when the Halo implant angle is 30 when spending, the threshold voltage attenuation of narrow ditch device is 10 much smaller when spending than implant angle.Therefore, when adopting bigger Halo implant angle, RNCE effectively can take effect.
For wide ditch short channel device, along with the increase of Halo implant angle, because the increase of channel doping concentration only needs less Halo dosage can reach target.Like this, can increase the channel carrier mobility, and improve hot carrier's effect.
In the conventional STI isolation technology, small size device in channel width hour, threshold voltage has bigger reducing (roll-off), makes the electric leakage of circuit have greatly increased.The present invention reduces implantation dosage by increasing the angle that Halo injects, and is guaranteeing under the constant prerequisite of general device property, suppress RNCE, improve narrow ditch device property, increase carrier mobility simultaneously, reduce parasitic junction capacitance, improve device speed, and improve the hot carrier's effect of device.
Implement the present invention, need not to increase new mask plate, just adjust dosage and angle that the Halo ion injects, be increased to 30 degree as NMOS Halo angle from 10 degree, dosage reduces 30%, is guaranteeing to improve RNCE under the constant situation of proper device characteristic, increase carrier mobility, reduce hot carrier's effect.
For example: original Halo injection condition B3.0e13_15/10Q^45 can be optimized for new Halo injection condition B2.0e13_15/30Q^45, both can guarantee that wide ditch device property was constant, can reduce the narrow ditch device threshold voltage decline that RNCE causes again.
Also the Halo angle 45 degree can be increased to from 10 degree in the above embodiments, identical technique effect can be reached equally.
Claims (1)
1. method that reduces the small size device reversed narrow-path effect is characterized in that: improve the angle that Halo injects, the angle that Halo injects is that 30 degree are to 45 degree.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 200410053290 CN1728360A (en) | 2004-07-29 | 2004-07-29 | Method for reducing inverse narrow-channel effect of mini size part |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 200410053290 CN1728360A (en) | 2004-07-29 | 2004-07-29 | Method for reducing inverse narrow-channel effect of mini size part |
Publications (1)
Publication Number | Publication Date |
---|---|
CN1728360A true CN1728360A (en) | 2006-02-01 |
Family
ID=35927521
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN 200410053290 Pending CN1728360A (en) | 2004-07-29 | 2004-07-29 | Method for reducing inverse narrow-channel effect of mini size part |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN1728360A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101728263B (en) * | 2008-10-24 | 2011-07-06 | 中芯国际集成电路制造(上海)有限公司 | Method for controlling source/drain junction capacitance and method for forming PMOS transistor |
CN102194868A (en) * | 2010-03-16 | 2011-09-21 | 北京大学 | Anti-irradiation metal oxide semiconductor (MOS) device with Halo structure and preparation method thereof |
CN105244260A (en) * | 2015-10-26 | 2016-01-13 | 武汉新芯集成电路制造有限公司 | Semiconductor structure and preparation method |
-
2004
- 2004-07-29 CN CN 200410053290 patent/CN1728360A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101728263B (en) * | 2008-10-24 | 2011-07-06 | 中芯国际集成电路制造(上海)有限公司 | Method for controlling source/drain junction capacitance and method for forming PMOS transistor |
CN102194868A (en) * | 2010-03-16 | 2011-09-21 | 北京大学 | Anti-irradiation metal oxide semiconductor (MOS) device with Halo structure and preparation method thereof |
CN102194868B (en) * | 2010-03-16 | 2013-08-07 | 北京大学 | Anti-irradiation metal oxide semiconductor (MOS) device with Halo structure |
CN105244260A (en) * | 2015-10-26 | 2016-01-13 | 武汉新芯集成电路制造有限公司 | Semiconductor structure and preparation method |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4708563B2 (en) | Method for reducing the effective channel length of a lightly doped drain transistor and method for forming a transistor | |
US5793088A (en) | Structure for controlling threshold voltage of MOSFET | |
US6091118A (en) | Semiconductor device having reduced overlap capacitance and method of manufacture thereof | |
KR20000069811A (en) | Well boosting threshold voltage rollup | |
US5536959A (en) | Self-aligned charge screen (SACS) field effect transistors and methods | |
EP0670604B1 (en) | MOS thin-film transistors with a drain offset region | |
CN1138748A (en) | Method for forming semiconductor device having shallow junction and low sheet resistance | |
CN109830538A (en) | LDMOS device and its manufacturing method | |
CN1728360A (en) | Method for reducing inverse narrow-channel effect of mini size part | |
US20150155382A1 (en) | Well Implant Through Dummy Gate Oxide In Gate-Last Process | |
CN1319880A (en) | Reduction of iverse short channel effect | |
KR20070071052A (en) | Ldmosfet for rf power amplifiers and method for manufacturing the same | |
RU2477904C1 (en) | Transistor with metal-oxide-semiconductor structure on silicon-on-insulator substrate | |
CN100342506C (en) | High operation voltage double spreading drain MOS device using twice ion injection | |
CN102891088A (en) | Method for manufacturing vertical double diffusion metal oxide semiconductor field effect transistor device | |
CN101609841A (en) | A kind of metal-oxide semiconductor (MOS) (MOS) transistor arrangement and manufacture method thereof | |
US6809016B1 (en) | Diffusion stop implants to suppress as punch-through in SiGe | |
CN101452853B (en) | MOS transistor forming method | |
JP3895110B2 (en) | Method for manufacturing body region of vertical MOS transistor device with reduced intrinsic switch-on resistance | |
CN1136613C (en) | Semiconductor device and its manufacturing method | |
CN102446769B (en) | Method used for reducing resistance of polysilicon gate in carbon auxiliary injection technological process | |
CN1056471C (en) | Method for making complementary MOS field-effect transistor | |
KR20010039227A (en) | Thin film transistor and fabricating mathod thereof | |
US6274915B1 (en) | Method of improving MOS device performance by controlling degree of depletion in the gate electrode | |
KR100233400B1 (en) | Method for source/drain distribution implantion |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
WD01 | Invention patent application deemed withdrawn after publication |