CN1728109A - Method for expanding addressing space of program memory in byte (16H) based on HCS-51 architecture - Google Patents
Method for expanding addressing space of program memory in byte (16H) based on HCS-51 architecture Download PDFInfo
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Abstract
A method for expanding addressing space of 16M byte program storage based on MCS-51 structure includes dividing program storage space of 16M into 256 segments, deciding segment address by 8 bit program address, containing 64K byte space by each segment and using 8 bit and low 8 bit program address to decide address in segment to increase addressing space from 64K byte to 16M byte with condition of no bus increase and command system remained unchanged for enabling microprocessor based on MCS-51 structure to operate algorithm with very complicated program.
Description
Technical field
The present invention relates to a kind of 16M byte program memory addressing space extending method, can be applicable to single chip microcontroller, also can be applicable to fields such as other microcontroller, microprocessor based on 8051 instruction systems based on the MCS-51 framework.
Background technology
Program storage (Code Memory) is the one section space that is used for depositing the user instruction program, and microcontroller or microprocessor pass through to carry out these instruction repertories, thereby realizes and finish certain special function and task.
Microprocessor based on Intel MCS-51 framework has 16 bit address buses, program memory space that can addressing 64K byte.According to the specific needs and the function corresponding requirement of system, the space of this 64K byte generally comprises program primary module and many submodule and stage casing submodules of calling.For containing algorithm and complexity thereof, the huge system of procedure quantity, master routine might comprise many submodules, also possible nested other submodules of submodule, because algorithm is very complicated, so the capacity of each submodule is also very likely very huge, such as digital image processing system, Digital Image Processing itself just contains the algorithm of magnanimity, and every kind of algorithm may be very complicated, if this system also comprises functions such as knowledge-base management, knowledge self study, the program memory space of 64K byte will can not satisfy the demand of this type systematic far away so.Again owing to the microcontroller based on Intel MCS-51 framework is to use a class processor very widely, use with a long history, abundant third party's support software and emulation tool are arranged, by numerous slip-stick artists are familiar with, therefore if can not increase under the situation of address bus again neither changing order set, the addressing space of expanding program storer will improve the performance of 8051 framework microcontrollers greatly to the 16M byte.
Summary of the invention
The object of the present invention is to provide a kind of program storage addressing space extending method based on the MCS-51 framework, do not increase at address bus, under the constant situation of whole instruction system, the external program memory addressing space extends to the 16M byte from the 64K byte, thereby makes the microcontroller based on the MCS-51 framework can move the extremely complicated program of big quantity algorithm.
For achieving the above object, design of the present invention is as follows:
Realize addressing capability, do not revise the instruction set compatible mutually, and adopt the auxiliary design method that program storage is carried out segmentation with standard 8051 based on the 16M byte program storer of MCS-51 framework.The program's memory space that is about to addressable 16M byte is divided into 256 sections, and sector address has 256 sector addresses by the decision of high eight-bit program address.The program addressing space that the 64K byte is arranged in each section is by eight and the interior address of low eight program addresses decision section in the program address.Program address register PROGA (Program Address) is designed to by sector address and hangs down 24 bit address that 16 bit address are formed, and makes it to visit the program's memory space of 16M byte; Program pointer counter PROGRAM_COUNTER (Program Counter) keeps low 16 bit address constant.
According to above-mentioned design, the present invention adopts following technical proposals:
A kind of 16M byte program memory addressing space extending method based on the MCS-51 framework, based on 8051 systems, it is characterized in that adopting the method for time-sharing multiplex, program storage is carried out the segmentation Aided Design, the program's memory space of addressable 16M byte is divided into 256 sections, sector address is determined by the high eight-bit program address, have 256 sector addresses, the program addressing space that the 64K byte is arranged in each section, by eight and the interior address of low eight program addresses decision section in the program address, under the situation that address bus does not increase and whole instruction system is constant, the external program memory addressing space is extended to the 16M byte from the 64K byte;
Its concrete steps are:
A. set sector address special function register ROM_DUAN, determine the high eight-bit program address;
B. condition that produces according to sector address and situation is different, following four kinds of situations is considered in the generation of high eight-bit program address in the extended operation of program storage addressing space, and set coherent signal:
(a) sector address that directly provides of user;
(b) sector address of returning after the interruption/call operation;
(c) sector address is from increasing;
(d) sector address after the relative redirect;
C. program pointer counter PROGRAM_COUNTER's determines;
D. program address register PROGA's determines.
Above-mentioned setting sector address special function register ROM_DUAN method is:
The address of determining sector address special function register ROM_DUAN is FFH, and size is 8, the interior content decision of register thus of the high eight-bit address of program storage 16M byte addressing space.
After the system reset, the value of ROM_DUAN is #00H; Its value can also be upgraded automatically by system except can being defined voluntarily by the user, determines the high eight-bit of next bar instruction address.
The concrete steps that above-mentioned four kinds of situations according to the sector address generation are divided into phasing pass signal are:
A) register and the signal relevant with User Defined sector address content:
REG_RESULT: the sector address content eight bit register that the user defines voluntarily;
ROM_DUAN_WRITE: to sector address special function register ROM_DUAN carry out write operation with imitating signal (low level is effective);
When the ROM_DUAN_WRITE signal is low level, the value section of writing of REG_RESULT
In the special function register ROM_DUAN of address.
B) two by 8 bit data that eject in the storehouse:
XRAMDI: from the sector address content of external data memory storehouse ejection;
SOURCE_DI: the sector address content of data-carrier store storehouse ejection internally;
When the ISP_INUSE signal is " 1 ", the value of SOURCE_DI sends intermediate variable register ROM_DUAN_RET earlier at C1P3, the high eight-bit of earlier temporary 24 program addresses is passed to sector address special function register ROM_DUAN at CLP2 by the ROM_DUAN_RET register; When the ISP_INUSE signal is " 0 ", the value of XRAMDI sends intermediate variable register ROM_DUAN_RET earlier at C2P2, the most-significant byte of earlier temporary 24 program addresses is passed to sector address special function register ROM_DUAN at CLP2 by the ROM_DUAN_RET register.
ISP_INUSE is one and judges signal that value is, represents that storehouse is on the internal data memory at 1 o'clock; Value is 0 o'clock, and the expression storehouse is on the external data memory.
C) ROM_0: the user can't visit, and by the value that hardware produces automatically, in store sector address is from increasing a later value;
When procedure order is carried out (no redirect and call situation), during the section of striding situation, both when the currency of program pointer counter PROGRAM_COUNTER is #0FFFFH, and when the value of next program address register NEXT_PROGRAM_ADDR is #0000H, the value of ROM_0 is composed to sector address special function register ROM_DUAN, forms new program address register PROGA high eight-bit value.
D) ROM_1: the user can't visit, and by the value that hardware produces automatically, in store sector address is from subtracting a later value;
After program was carried out relative jump instruction, if the situation of the section of striding has taken place, when promptly program pointer had pointed to next section or a last section, the sector address special function register can upgrade automatically.If redirect downwards, the value of ROM_0 is composed to ROM_DUAN so; If upwards redirect, the value of ROM_1 is composed to ROM_DUAN so.
Said procedure determines that the concrete steps of pointer counter PROGRAM_COUNTER are:
16 program pointer counter PROGRAM_COUNTER are made up of next program address register NEXT_PROGRAM_ADDR.
The concrete steps of above-mentioned definite program address register PROGA are:
24 program address register PROGA are made up of sector address special function register ROM_DUAN and next program address register NEXT_PROGRAM_ADDR.
Program address register PROGA is except that carrying out the MOVCS instruction, and back sixteen bit address is all identical with program pointer register PROGRAM_COUNTER; When carrying out such as MOVC A, @A+PC or MOVC A, in the process of @A+DPTR instruction, the value of PROGRAM_COUNTER register is constant all the time, and the content changing of PROGA register is to form by 8 sector addresses and 16 (A+PC) or (A+DPTR), makes the microcontroller can be from the address reading of data assignment upgraded to totalizer A.
The step that specifically is provided with of above-mentioned REG_RESULT register is:
The value of 8 REG_RESULT registers comes from 8 program storage input data register PROGDI, and the content of PROGDI is made up of 8 bit data of external program memory data line output, the content of the sector address of existing user oneself definition.PROGDI links to each other with PORT0I, and PORT0I is 8 bit data input ports of microcontroller, and it can be connected on the external program memory DOL Data Output Line.
The step that specifically is provided with of above-mentioned ROM_DUAN_WRITE signal wire is:
1 ROM_DUAN_WRITE signal is write enable signal SFR_WRITE_EN[27 by 1 special function register] decision; When the value of 8 destination address register DESTIN_ADDR is #7FH, SFR_WRITE_EN[27] by zero setting, when the value of DESTIN_ADDR is other any values, SFR_WRITE_EN[27] put one; The value of DESTIN_ADDR is by 8 program storage input data register PROGDI decision, and PROGDI is connected on the PORT0I, and PORT0I is 8 bit data input ports of microcontroller, and it can be connected on the external program memory DOL Data Output Line.
The step that specifically is provided with of above-mentioned XRAMDI and SOURCE_DI register is:
After the RET/RETI instruction was carried out, last protected on-the-spot high eight-bit address will be ejected from storehouse, and the content of preserving among the XRAMDI is the data that eject in the external data memory storehouse; The content of preserving among the SOURCE_DI is the data of the interior ejection of data-carrier store storehouse internally.
The value of 8 XRAMDI determines that by PORT0I PORT0I is 8 bit data input ports of microcontroller, and it can be connected on the external data memory DOL Data Output Line; The DOL Data Output Line of 8 SOURCE_DI and internal data memory connects together.
The step that specifically is provided with of above-mentioned ROM_0 and ROM_1 register is:
Sector address special function register ROM_DUAN content adds a later value and composes to eight bit register ROM_0; Sector address special function register ROM_DUAN content subtracts a later value and composes to eight bit register ROM_1.
The step that specifically is provided with of above-mentioned next program address register NEXT_PROGROM_ADDR is:
The operational code of 16 in store next bar instructions of next program address register NEXT_PROGRAM_ADDR or low 16 bit address of operand.
The method to set up of above-mentioned data pointer special function register DPTR is:
16 bit data pointer special function register DPTR are made up of 8 DPL registers and 8 DPH registers.
The address of determining special function register DPL is 82H, and size is 8, the interior content decision of register thus of low eight bit address of program storage 16M byte addressing space.
The address of determining special function register DPH is 83H, and size is 8, the interior content decision of register thus of centre eight bit address of program storage 16M byte addressing space.
After the system reset, the value of DPL and DPH is #00H; Their value can also be upgraded automatically by system except can being defined voluntarily by the user.
The present invention compared with prior art, have following conspicuous outstanding substantive distinguishing features and remarkable advantage: the present invention is based on 8051 systems, adopt the method for time-sharing multiplex, do not increase at address bus, under the constant situation of whole instruction system, the external program memory addressing space extends to the 16M byte from the 64K byte, thereby makes the microcontroller based on the MCS-51 framework can move the extremely complicated program of big quantity algorithm.This 16M byte program memory addressing space extending method can be applicable to the single chip microcontroller based on 8051 instruction systems, also can be applicable to fields such as other microcontroller, microprocessor.
Description of drawings
Fig. 1 is the program storage structure that 16M byte program memory addressing space extending method adopts.
Fig. 2 is a time-sharing multiplex bus method synoptic diagram.
Fig. 3 is the elementary instruction sequential chart.
Fig. 4 is a sector address MUX synoptic diagram.
Fig. 5 is MOV 0FFH, the sequential chart of #0AH instruction.
Fig. 6 is the sequential chart of LJMP instruction.
Fig. 7 is the intersegmental jump instruction sequential chart that aligns mutually.
Fig. 8 is intersegmental negative relatively jump instruction sequential chart.
Fig. 9 is that the instruction section of striding is carried out sequential chart in proper order.
Figure 10 is link order (internal data memory storehouse) sequential chart.
Figure 11 is link order (external data memory storehouse) sequential chart.
Embodiment
Details are as follows for a preferred embodiment of the present invention:
This 16M byte program memory addressing space extending method based on the MCS-51 framework adopts following program storage structure (see figure 1)
● program address (PROGRAM ADDRESS): the specific address of program storage internal element, totally 24, the program memory space of addressable 16M byte.
● programmable counter (PROGRAM COUNTER): program memory space is divided into 256 sections virtually, the space size of each section is the 64K byte, totally 16 of program pointers are the addresses of each intersegmental part unit, and its value low 16 bit address with the program address usually is identical.
● sector address (BLOCK ADDRESS): program memory space is waited to be divided into 256 sections virtually, and each section all has an address, is called sector address, and totally 8, from 00H to FFH, its value is identical with the high eight-bit address of program address.
From this program storage structure as can be seen, program memory space is waited to be divided into 256 sections virtually, and the size of each section is the 64K byte, has so just formed the addressing space of 16M byte.Thereby expanded the capacity of program storage greatly, made microcontroller can move the extremely complicated program of big quantity algorithm based on the MCS-51 framework.For the figure place that keeps address bus is consistent with standard 8051, the present invention has adopted the method (see figure 2) of time-sharing multiplex address bus:
● the PORT0 mouth: one group of 8 I/O mouth of microcontroller, its timesharing transmits the least-significant byte address and the 8 bit data signals of 24 program addresses.
● the PORT2 mouth: one group of 8 I/O mouth of microcontroller, its timesharing transmits the most-significant byte address of 24 program addresses, i.e. centre 8 bit address of sector address and 24 program addresses.
● latch 1 (LATCH_1): the least-significant byte address of these 24 program addresses of latches.
● latch 2 (LATCH_2): the most-significant byte address of these 24 program addresses of latches.
● address latch enable signal (ALE): when the address latch signal was effective, the least-significant byte of 24 program addresses and most-significant byte were latching to latch 1 and latch 2 respectively.
● program storage is selected enable signal (NPSEN): NPSEN is the external program memory read strobe signal, and low level is effective.
As can be seen from Figure 2, when ale signal is effective, latch 1 and latch 2 latch the least-significant byte and the most-significant byte of 24 program addresses respectively, in next system clock cycle, ale signal is invalid, 8 of the centres of 24 program addresses directly export in the middle of the external program memory on the 8 bit address signal wires from the PORT2 mouth, have realized the expansion in the 16M byte program memory addressing space of standard 8051 with the method for this time-sharing multiplex address bus.Its basic sequential is seen Fig. 3:
● system clock (CLK): the frequency of operation when system moves.
● the machine cycle (MACHINE CYCLE): the machine cycle was made up of four clock period, M the clock period of CNPM representative in N machine cycle.
● operational code (OPCODE): i.e. the machine code of program, form by binary number.
As can be seen from Figure 3, on timing Design, it is constant that the high-low level of NPSEN signal is all kept a clock period, the high level lasting time of NPSEN signal is the twice of ALE high level lasting time, like this before NPSEN signal low level is read the significant instant arrival, the ALE falling edge has sufficient time to latch high eight-bit address information and low eight bit address information, and keeps the stable of this information.In case eight bit address just can form 24 correct bit instruction address informations in providing.Because of external program memory has internal delay time, behind NPSEN gating external program memory, reading of instruction also needs one section than the long time (time for reading of different external program memories is different, generally at 100ns).So as long as can export effective address information in the Ts time (address Time Created), and remain unchanged in the Th time (low address hold time), the instruction of then reading from external program memory is exactly the instruction of current address.Under the effective situation of NPSEN low level, just can correctly read the content in this address information like this.
The PORT0 mouth sends the low eight bit address information of this instruction address when CLP3, when CLP4 (when the NPSEN low level is effective), read in the operational code of external memory storage by the PORT2 mouth.The PORT2 mouth when CLP3 and CLP4, send respectively this instruction address the high eight-bit address information and in eight bit address information.Wherein low eight bit address information and high eight-bit address information latch when the ALE negative edge.
Specific implementation method is:
Segment address register ROM_DUAN of definition in the special function register (SFR) that standard 8051 keeps, the address is FFH.
Segment address register ROM_DUAN is defined as follows:
| Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
ROM_DUAN address: FFH
The operation that writes sector address for the user be mainly used in carry out call or jump instruction before.The user wants the specified section address contents to carry out write operation to this special function register.And call or the operation of redirect can be finished by hardware circuit for outside 16MB program's memory space is intersegmental.
Program is returned the 0th section after the system reset, and sector address is 00H.Call or during jump instruction when carrying out, the user can make whole write operation to this sector address special function register of 8, data after writing are kept in the register of ROM_DUAN_TP by name, unless sector address is carried out write operation again, otherwise the sector address in this ROM_DUAN_TP register remains unchanged.
(1) scheme of 16M byte program memory addressing space extending method:
Because 16M byte program storer is divided into 256 sections, design of each section and standard 8051 basically identicals seem particularly important so how to design the sequential relationship of sector address MUX (see figure 4).The source of sector address is except that the sector address that reset back acquiescence sector address 00H and user write, and also has numerous sector addresses to select the source, mainly takes in from the following aspects when design:
A. behind the Program reset, the default value of segment address register is 00H;
B. when interrupting taking place, program will forward to interrupts the entry address.Because it is the 00H section that the interruption entry address is all reprinted at the 0th section, so the content of segment address register will be written as 00H again;
C. after carrying out the RET/RETI instruction, for the assurance program can correctly be returned, the former high eight-bit address that is pressed into storehouse also will write back in the segment address register;
D. when carrying out call instruction, in the end during the 3rd of a machine cycle the timeticks, the program address jumps to the subroutine entry address (entry address is in this section or in other section) that will call, and promptly sector address will be updated to the high eight-bit address of subroutine entry address.Before the subroutine entry address is jumped in the address pointer commentaries on classics, carry out push operation, the high eight-bit sector address that at this moment is pressed into should be the address of this section master routine, promptly is to jump to the subprogram segment entry address sector address that does not have renewal before.
E. when carrying out relative jump instruction, program pointer might jump to next section or a last section space is gone, so the content of sector address will be upgraded, promptly sector address adds an operation automatically or subtracts an operation.
F. procedure order is carried out certain section section tail, and when not carrying out redirect or call instruction, sector address should add one automatically, enters next section space, and this moment, program pointer also was updated to #0000H.
Sector address that produces and program pointer be 24 bit address of configuration program address (PROGA) together, externally carry out addressing operation in the program storage.
(2) dependent instruction sequential chart:
A. the direct define program of user address
1. sector address defines (see figure 5):
Because the address of segment address register is FFH, be MOV 0FFH so give the assembly language of sector address assignment, #0AH, #OAH are sector address, corresponding machine code is 75 FF 0A.Machine code in PORT0 mouth timesharing ground convey program address least-significant byte and the appropriate address unit; Eight of the high eight-bit of convey program address, PORT2 mouth timesharing ground and centres.
In last clock period of a last instruction, the PORT0 mouth is read the operational code (OPCODE) ' 75 ' of next bar instruction; At the CLP1 of this instruction, count #0AH immediately and be sent in the REG_RESULT register; CLP4 in this instruction, it is last clock period, special function register is with imitating the 27th SFR_WRITE_EN[27 of signal] put ' 1 ', and compose immediately and give sector address write signal (ROM_DUAN_WRITE), be effective, the interior value of REG_RESULT register this moment is composed to the ROM_DUAN_TP register temporary.
If next bar instruction of looking ahead in last clock period of this instruction is long jump/long call instruction, then the value in the ROM_DUAN_TP register is given segment address register ROM_DUAN in the performance period end assignment of next bar instruction; If next bar instruction of looking ahead in last clock period of this instruction is not this two classes instruction, then the value in the ROM_DUAN_TP register remains unchanged, but assignment is not given segment address register ROM_DUAN.
2. program pointer is determined (see figure 6)
Long jump/length is called the instruction of two classes and is followed behind the segment address register assignment directive, can determine program pointer, be that previous segment address register assignment has been determined sector address, and the address in the 64K byte space section can be determined in long jump/long call instruction, thereby determine the whole procedure specific address.
02 BA 44 is machine codes of assembly language LJMP ADDRESS_0 on the PORT0 mouth, the 02nd, and operational code, BA 44 is specific address values of ADDRESS; At this instruction CLP2, the ROM_DUAN_TP register is composed user-defined sector address value to ROM_DUAN, and that keep in the NEXT_PROGRAM_ADDR register simultaneously is the program pointer value #0BA44H of next bar instruction; At this instruction CLP3, program address register PROGA value is updated to 0ABA44H; At last clock period CLP4 of this instruction, the PORT0 mouth is read the operational code of next bar instruction from program storage 0ABA44 address.
B. intersegmental relative jump instruction
1. positive redirect (see figure 7)
Fig. 7 is instruction CJNE A, #0FFH, the sequential chart of ADDRESS_1 (machine code is B4 FF 78), value in the totalizer A is #66H, be not equal to and count #FFH immediately, so this relative jump instruction meeting is performed, the relative quantity of redirect is 78H, because this relative displacement most significant digit is 0, so be positive redirect.
In last clock period of a last instruction, PORT0 reads the operational code B4 of this instruction in the program storage 17FFFB address; At the rising edge of this instruction CLP2, the value of ROM_0 register (sector address adds) is composed to segment address register ROM_DUAN, and the NEXT_PROGRAM_ADDR register obtains the program pointer value 0076 of next bar instruction; At this instruction CLP3, program address register PROGA obtains the specific address 180076 of next bar instruction operation code, has realized intersegmental positive redirect; At last clock period CLP4 of this instruction, the PORT0 mouth is read the operational code that next bar instructs in program storage 180076 addresses.
2. negative redirect (see figure 8)
Fig. 8 is JB 0D7H, the sequential chart of ADDRESS_2 (machine code is 20D781) instruction, 0D7H is an addressable address, its content is 0, so this instruction can be performed, the 81st, relative redirect side-play amount, its most significant digit are 1, so be negative redirect.
In last clock period of a last instruction, the operational code 20 of this instruction on PORT0 mouth read-in programme storer 150064 addresses; At the rising edge of this instruction CLP2, the value of ROM_1 register (sector address subtracts) is composed to segment address register ROM_DUAN, and the NEXT_PROGRAM_ADDR register obtains next program pointer value FFE8; At this instruction CLP3, program address register is updated to 14FFE8, has realized intersegmental negative redirect; At this instruction CLP4, i.e. last clock period, the PORT0 mouth is read the operational code of next bar instruction from program storage 14FFE8 address.
C. the section of striding order is carried out (see figure 9)
Fig. 9 is MOV P1, the sequential chart of 0D0H (machine code is 85 D0 90) instruction, the 90th, the address of P1 mouth.
In last clock period of a last instruction, the PORT0 mouth is read the operational code 85 of this instruction from program storage 16FFFE address; At this instruction C1P2, the address that the NEXT_PROGRAM_ADDR register obtains next bar program pointer is 0000, because this instruction does not also execute, so ROM_0 register (sector address adds) assignment is given segment address register ROM_DUAN; At this instruction C1P3, program address register is updated to 170000; At this instruction C1P4, the PORT0 mouth continues from program storage 170000 addresses read operation and counts D0, has realized the seamless continuity of program storage 16M byte space.
D. call link order
1. internal data memory storehouse (see figure 10)
Figure 10 is the sequential chart of RET (machine code is 22) instruction.This instruction is the last item instruction of certain subroutine that is called, and before jumping to this subroutine, 24 program addresses (AA5569) are pressed into the internal data memory storehouse.
In last clock period of a last instruction, the PORT0 mouth is read the operational code 22 of this instruction from program storage AA889A address; At this instruction C1P3, be pressed into the program address most significant digit of storehouse, i.e. sector address AA data-carrier store ejection internally is sent to the SOURCE_DI register, and sends the ROM_DUAN_RET register at once to; At this instruction C2P1, be pressed into middle eight the 55 data-carrier store ejections internally in program address of storehouse, be sent to the SOURCE_DI register; At this instruction C2P2, originally in the SOURCE_DI register in the middle of the temporary program address eight 55 arrived NEXT_PROGRAM_ADDR register high eight-bit by assignment; At this instruction C2P3, program counter register is updated to 559B; At this instruction CLP1, be pressed into low eight the 69 data-carrier store ejections internally in program address of storehouse, be sent to the SOURCE_DI register; At this instruction CLP2, originally in the SOURCE_DI register temporary program address low eight 69 by assignment to low eight of NEXT_PROGRAM_ADDR register, and in the simultaneously original ROM_DUAN_RET register temporary sector address value AA by assignment in segment address register ROM_DUAN; At this instruction CLP3, the value of program counter register is updated to 5569, and program address register is updated to AA5569, and this address is exactly the address (protected scene) of master routine before calling this subroutine; In this last clock period of instruction, i.e. CLP4, the PORT0 mouth is read next bar instruction operation code from program storage AA5569 address, has successfully realized on-the-spot recovery.
2. external data memory storehouse (seeing Figure 11)
Figure 11 is the sequential chart of RET (machine code is 22) instruction.This instruction is the last item instruction of certain subroutine that is called, and before jumping to this subroutine, 24 program addresses (00018F) are pressed into the external data memory storehouse.
In last clock period of a last instruction, the PORT0 mouth is read the operational code 22 of this instruction from program storage 556678 addresses; At this instruction C2P1,24 the program address most-significant bytes 00 that are pressed into the external data memory storehouse eject, and are sent to the XRAMDI register; At this instruction C2P2, sector address temporary in the XRAMDI register is sent to the ROM_DUAN_RET register; At this instruction C3P1, eject middle 8 01 of 24 program addresses that are pressed into the external data memory storehouse, delivers to the XRAMDI register; At this instruction C3P2, the XRAMDI register value is admitted to the NEXT_PROGRAM_ADDR register; At this instruction C3P3, program counter register PROGRAM_COUNTER most-significant byte is updated to 01; At this instruction CLP1,24 program address least-significant byte data 8F that are pressed into the external data memory storehouse eject, and are sent to the XRAMDI register; At this instruction CLP2, the value of XRAMDI register is sent to the least-significant byte of NEXT_PROGRAM_ADDR register, and the most-significant byte address that is temporarily stored in the ROM_DUAN_RET register is admitted to segment address register ROM_DUAN; At this instruction CLP3, program counter register PROGRAM_COUNTER least-significant byte is updated to 8F, and the program address is updated to 00018F; In last clock period of this instruction, i.e. CLP4, PORT0 mouth read the operational code of next bar instruction from program storage 00018F address.
Claims (11)
1. 16M byte program memory addressing space extending method based on the MCS-51 framework, based on 8051 systems, it is characterized in that: the method that adopts time-sharing multiplex, program storage is carried out the segmentation Aided Design, the program's memory space of addressable 16M byte is divided into 256 sections, sector address is determined by the high eight-bit program address, have 256 sector addresses, the program addressing space that the 64K byte is arranged in each section, by eight and the interior address of low eight program addresses decision section in the program address, under the situation that address bus does not increase and whole instruction system is constant, make the external program memory addressing space extend to the 16M byte from the 64K byte;
Its concrete steps are:
A. set sector address special function register ROM_DUAN, determine the high eight-bit program address;
B. condition that produces according to sector address and situation is different, following four kinds of situations is considered in the generation of high eight-bit program address in the extended operation of program storage addressing space, and set coherent signal:
(a) sector address that directly provides of user;
(b) sector address of returning after the interruption/call operation;
(c) sector address is from increasing;
(d) sector address after the relative redirect;
C. program pointer counter PROGRAM_COUNTER's determines;
D. program address register PROGA's determines.
2. the 16M byte program memory addressing space extending method based on the MCS-51 framework according to claim 1, the method that it is characterized in that described setting sector address special function register ROM_DUAN is: the address of determining sector address special function register ROM_DUAN is FFH, size is 8, the interior content decision of register thus of the high eight-bit address of program storage 16M byte addressing space;
After the system reset, the value of ROM_DUAN is #00H; Its value can also be upgraded automatically by system except can being defined voluntarily by the user, determines the high eight-bit of next bar instruction address.
3. the 16M byte program memory addressing space extending method based on the MSC-51 framework according to claim 1 is characterized in that described four kinds of situations that produce according to sector address divide into the concrete steps that phasing closes signal and be:
A.REG_RESULT: the sector address content eight bit register that the user defines voluntarily;
ROM_DUAN_WRITE: to sector address special function register ROM_DUAN carry out write operation with imitating signal (low level is effective);
When the ROM_DUAN_WRITE signal was low level, the value of REG_RESULT write in the sector address special function register ROM_DUAN;
B. two by 8 bit data that eject in the storehouse:
XRAMDI: from the sector address content of external data memory storehouse ejection;
SOURCE_DI: the sector address content of data-carrier store storehouse ejection internally;
When the ISP_INUSE signal is " 1 ", the value of SOURCE_DI sends intermediate variable register ROM_DUAN_RET earlier at C1P3, the high eight-bit of earlier temporary 24 program addresses is passed to sector address special function register ROM_DUAN at CLP2 by the ROM_DUAN_RET register; When the ISP_INUSE signal is " 0 ", the value of XRAMDI sends intermediate variable register ROM_DUAN_RET earlier at C2P2, the most-significant byte of earlier temporary 24 program addresses is passed to sector address special function register ROM_DUAN at CLP2 by the ROM_DUAN_RET register.
ISP_INUSE is one and judges signal that value is, represents that storehouse is on the internal data memory at 1 o'clock; Value is 0 o'clock, and the expression storehouse is on the external data memory;
C.ROM_0: the user can't visit, by the automatic value that produces of hardware, in store sector address is carried out (no redirect and call situation) from increasing a later worthwhile procedure order, during the section of striding situation, both when the currency of program pointer counter PROGRAM_COUNTER is #0FFFFH, and when the value of next program address register NEXT_PROGRAM_ADDR is #0000H, the value of ROM_0 is composed to sector address special function register ROM_DUAN, forms new program address register PROGA high eight-bit value;
D.ROM_1: the user can't visit, by the automatic value that produces of hardware, in store sector address is after subtracting a later worthwhile program and carrying out relative jump instruction, if the situation of the section of striding has taken place, be program pointer when having pointed to next section or a last section, the sector address special function register can upgrade automatically.If redirect downwards, the value of ROM_0 is composed to ROM_DUAN so; If upwards redirect, the value of ROM_1 is composed to ROM_DUAN so.
4. the 16M byte program memory addressing space extending method based on the MCS-51 framework according to claim 1 is characterized in that the concrete steps of described definite program pointer counter PROGRAM_COUNTER are:
16 program pointer counter PROGRAM_COUNTER are made up of next program address register NEXT_PROGRAM_ADDR.
5. the 16M byte program memory addressing space extending method based on the MCS-51 framework according to claim 1 is characterized in that the concrete steps of described definite program address register PROGA are:
24 program address register PROGA are by the sector address special function register ROM_DUAN and the next one
Program address register NEXT_PROGRAM_ADDR forms;
Program address register PROGA is except that carrying out the MOVCS instruction, and back sixteen bit address is all identical with program pointer register PROGRAM_COUNTER; When carrying out such as MOVC A, @A+PC or MOVC A, in the process of @A+DPTR instruction, the value of PROGRAM_COUNTER register is constant all the time, and the content changing of PROGA register is to form by 8 sector addresses and 16 (A+PC) or (A+DPTR), makes the microcontroller can be from the address reading of data assignment upgraded to totalizer A.
6. the 16M byte program memory addressing space extending method based on the MCS-51 framework according to claim 3 is characterized in that the step that specifically is provided with of described REG_RESULT register is:
The value of 8 REG_RESULT registers comes from 8 program storage input data register PROGDI, and the content of PROGDI is made up of 8 bit data of external program memory data line output, the content of the sector address of existing user oneself definition.PROGDI links to each other with PORT0I, and PORT0I is 8 bit data input ports of microcontroller, and it can be connected on the external program memory DOL Data Output Line.
7. the 16M byte program memory addressing space extending method based on the MCS-51 framework according to claim 3 is characterized in that the step of the concrete setting of described ROM_DUAN_WRITE signal wire is:
1 ROM_DUAN_WRITE signal is write enable signal SFR_WRITE_EN[27 by 1 special function register] decision; When the value of 8 destination address register DESTIN_ADDR is #7FH, SFR_WRITE_EN[27] by zero setting, when the value of DESTIN_ADDR is other any values, SFR_WRITE_EN[27] put one; The value of DESTIN_ADDR is by 8 program storage input data register PROGDI decision, and PROGDI is connected on the PORT0I, and PORT0I is 8 bit data input ports of microcontroller, and it can be connected on the external program memory DOL Data Output Line.
8. the 16M byte program memory addressing space extending method based on the MCS-51 framework according to claim 3 is characterized in that the step that specifically is provided with of described XRAMDI and SOURCE_DI register is:
After the RET/RETI instruction was carried out, last protected on-the-spot high eight-bit address will be ejected from storehouse, and the content of preserving among the XRAMDI is the data that eject in the external data memory storehouse; The content of preserving among the SOURCE_DI is the data of the interior ejection of data-carrier store storehouse internally;
The value of 8 XRAMDI determines that by PORT0I PORT0I is 8 bit data input ports of microcontroller, and it can be connected on the external data memory DOL Data Output Line; The DOL Data Output Line of 8 SOURCE_DI and internal data memory connects together.
9. the 16M byte program memory addressing space extending method based on the MCS-51 framework according to claim 3, it is characterized in that the step that specifically is provided with of described ROM_0 and ROM_1 register is: sector address special function register ROM_DUAN content adds a later value and composes to eight bit register ROM_0; Sector address special function register ROM_DUAN content subtracts a later value and composes to eight bit register ROM_1.
10. the 16M byte program memory addressing space extending method based on the MCS-51 framework according to claim 3 is characterized in that the step that specifically is provided with of described next program address register NEXT_PROGRAM_ADDR is:
The operational code of 16 in store next bar instructions of next program address register NEXT_PROGRAM_ADDR or low 16 bit address of operand.
11. the 16M byte program memory addressing space extending method based on the MCS-51 framework according to claim 5 is characterized in that the method to set up of described data pointer special function register DPTR is:
16 bit data pointer special function register DPTR are made up of 8 DPL registers and 8 DPH registers;
The address of determining special function register DPL is 82H, and size is 8, the interior content decision of register thus of low eight bit address of program storage 16M byte addressing space;
The address of determining special function register DPH is 83H, and size is 8, the interior content decision of register thus of centre eight bit address of program storage 16M byte addressing space;
After the system reset, the value of DPL and DPH is #00H; Their value can also be upgraded automatically by system except can being defined voluntarily by the user.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102193776A (en) * | 2010-03-10 | 2011-09-21 | 上海海尔集成电路有限公司 | Method for processing skip instruction and microcontroller |
| CN101488119B (en) * | 2009-03-03 | 2012-02-29 | 华为技术有限公司 | Address interpretation method, apparatus and single-board |
| CN103389893A (en) * | 2013-07-09 | 2013-11-13 | 福州瑞芯微电子有限公司 | Read-write method and device for configuration register |
| CN106469118A (en) * | 2015-08-19 | 2017-03-01 | 深圳市博巨兴实业发展有限公司 | A kind of memorizer Memory Allocation access method and device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR100272622B1 (en) * | 1991-05-08 | 2000-11-15 | 가나이 쓰도무 | Data processing device |
| US5426769A (en) * | 1993-08-26 | 1995-06-20 | Metalink Corp. | System and method for producing input/output expansion for single chip microcomputers |
| RU2110833C1 (en) * | 1996-05-30 | 1998-05-10 | Курский государственный технический университет | In-circuit emulator |
| CN1128413C (en) * | 1999-12-13 | 2003-11-19 | 凌阳科技股份有限公司 | Extendible time-sharing bus structure |
| CN1619506A (en) * | 2003-11-17 | 2005-05-25 | 宏亿国际股份有限公司 | System of recombination storage address line and data line and its method |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101488119B (en) * | 2009-03-03 | 2012-02-29 | 华为技术有限公司 | Address interpretation method, apparatus and single-board |
| CN102193776A (en) * | 2010-03-10 | 2011-09-21 | 上海海尔集成电路有限公司 | Method for processing skip instruction and microcontroller |
| CN102193776B (en) * | 2010-03-10 | 2014-06-18 | 上海海尔集成电路有限公司 | Method for processing skip instruction and microcontroller |
| CN103389893A (en) * | 2013-07-09 | 2013-11-13 | 福州瑞芯微电子有限公司 | Read-write method and device for configuration register |
| CN103389893B (en) * | 2013-07-09 | 2016-01-13 | 福州瑞芯微电子股份有限公司 | A kind of configuration register reading/writing method and device |
| CN106469118A (en) * | 2015-08-19 | 2017-03-01 | 深圳市博巨兴实业发展有限公司 | A kind of memorizer Memory Allocation access method and device |
| CN106469118B (en) * | 2015-08-19 | 2019-08-13 | 深圳市博巨兴实业发展有限公司 | A kind of memory Memory Allocation access method and device |
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