CN1719609A - Metallized silicon chip with antistantic diode - Google Patents
Metallized silicon chip with antistantic diode Download PDFInfo
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- CN1719609A CN1719609A CNA2005100870068A CN200510087006A CN1719609A CN 1719609 A CN1719609 A CN 1719609A CN A2005100870068 A CNA2005100870068 A CN A2005100870068A CN 200510087006 A CN200510087006 A CN 200510087006A CN 1719609 A CN1719609 A CN 1719609A
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- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 216
- 239000010703 silicon Substances 0.000 title claims abstract description 216
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 214
- 238000001465 metallisation Methods 0.000 claims description 178
- 230000004888 barrier function Effects 0.000 claims description 102
- 229920002120 photoresistant polymer Polymers 0.000 claims description 33
- 239000000758 substrate Substances 0.000 claims description 31
- 229910052751 metal Inorganic materials 0.000 claims description 30
- 239000002184 metal Substances 0.000 claims description 30
- 238000004519 manufacturing process Methods 0.000 claims description 17
- 238000009413 insulation Methods 0.000 claims description 14
- 238000005530 etching Methods 0.000 claims description 11
- 229910000679 solder Inorganic materials 0.000 abstract 1
- 238000000034 method Methods 0.000 description 22
- 241000218202 Coptis Species 0.000 description 5
- 235000002991 Coptis groenlandica Nutrition 0.000 description 5
- 229910002601 GaN Inorganic materials 0.000 description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 4
- 238000010923 batch production Methods 0.000 description 4
- 238000005538 encapsulation Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 150000003376 silicon Chemical class 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 239000000945 filler Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 241000196324 Embryophyta Species 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000010009 beating Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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Abstract
This invention discloses several kinds of different structured and metallized silicon chips with anti-static diode and a LED through-hole inverted-lock solder chip with an anti-static diode (The LED chip is soldered on the metallized silicon chip in invented lock). The structure includes: the insulating silicon chip has a first surface with an anti-static diode selected from the following: PN, NPN, gate, gateless and their combination. The two electrodes of the first surface of the silicon chip are connected with two electrodes of the anti-static diode separately.
Description
Technical field
The present invention discloses metallization silicon that has antistatic diode (ESD diode) and the LED through hole back-off core wire sheet that has the antistatic diode, reaches production technology and technology cheaply.The invention provides the concrete embodiment that the IC device on LED and the silicon wafer is integrated.Belong to the semiconductor electronic technical field.
Background technology
Large power semiconductor LED has the huge future that replaces incandescent lamp, still, at first wants the problem in technical solution and the production, and subject matter comprises, is that the radiating efficiency of gallium nitride based LED of growth substrates is low with the sapphire.For this reason, gallium nitride based LED back-off core wire sheet is suggested: the galliumnitride base LED chip back-off is welded in silicon and supports on the substrate chip, thereby silicon supports that two routing pads on the substrate chip are to beat gold thread during for encapsulation to be connected with extraneous power supply.But, gold thread can cause integrity problem, the shared space of gold thread has increased the thickness of the encapsulation base of LED back-off core wire sheet, and gold thread makes the fluorescent material of coating uniform thickness become difficult, and the consistency of colour temperature partly depends on the uniformity of the thickness of fluorescent material.For addressing the above problem Chinese patent application (application number: 200510079706.2) invented new LED through hole back-off core wire sheet (being that the led chip back-off is welded on the metallization silicon) and reached production technology and technology cheaply.Anti-static ability is a basic demand to gallium nitride based LED back-off core wire sheet, and for solving the antistatic problem, industrial employing is an antistatic diode and the LED back-off core wire sheet method that is packaged together in parallel.But this method increases cost, increases the quantity of beating gold thread, increases the area that takies.
The LED through hole back-off core wire sheet that therefore, need have high anti-static ability.
Summary of the invention
The present invention discloses several LED through hole back-off core wire sheets that have the metallization silicon that has the antistatic diode of different structure and have the antistatic diode (being that the led chip back-off is welded on the metallization silicon).The structure of metallization silicon that has the antistatic diode is as follows: the first surface of the silicon of insulation has the antistatic diode, the type of this antistatic diode is to select from following type: PN, NPN, door (gate) (as Fig. 2 c) arranged, do not have door (as Fig. 2 a, 2b, 2d, 2e), and their combination, etc.Each face at the silicon that insulate has two electrodes respectively, two mutual electric insulations of electrode on same one side.Two electrodes of first electrically connect with two electrodes of antistatic diode respectively.Simultaneously, first two electrodes electrically connect by two electrodes of through hole/metal filled up plug and second respectively.The position of two electrodes of first and shape match with the position and the shape of two electrodes that will bonding led chip thereon, the position of two electrodes of second and shape with will bonding the position and the shape of two electrodes on thereon heat sink match.
It is as follows that manufacturing has the concrete embodiment of processing step of metallization silicon of antistatic diode: support the precalculated position on first of substrate wafer at silicon, by mask/injection technology, form the antistatic diode, the type of antistatic diode comprises, but be not limited to: NPN, PN has door, there is not door, and their combination.Support the stacked conductive metal layer in two sides of substrate wafer at silicon.Support at silicon on first the metal level of substrate wafer, form one group one group electrode at preposition, every group of electrode comprises two electrodes: first electrode and second electrode, its position and shape match with the P electrode of follow-up bonding led chip thereon and the position and the shape of N electrode respectively.First and second electrodes electrically connect with two electrodes of antistatic diode respectively.Support at silicon on second the metal level of substrate wafer, form one group one group electrode at preposition, every group of electrode comprises two electrodes: third electrode and the 4th electrode, its position and shape match with the position and the shape of follow-up stacked two heat sink electrodes thereon respectively.Support the position of second third and fourth electrode of substrate wafer to match with the position of first first and second electrodes supporting substrate wafer respectively.On the preposition of silicon support substrate wafer, form through hole (throughhole), stacked conducting metal filler plug in through hole, described conducting metal filler plug connects the electrode at through hole two ends, promptly first electrode is connected with third electrode, second electrode is connected with the 4th electrode, therefore, an electrode of antistatic diode is electrically connected with first electrode and third electrode, and another electrode of antistatic diode is electrically connected with second electrode and the 4th electrode.
A concrete application example that has the metallization silicon of antistatic diode: the LED through hole back-off core wire sheet that has the antistatic diode.Preposition on first metal level of metallization silicon wafer, the bonding LED wafer, make the P electrode of each led chip on the LED wafer and N electrode respectively with the metallization silicon wafer on first first electrode and second electrode of each metallization silicon be bonded together.The metallization silicon wafer is cut into pieces the metallization silicon, make each metallization comprise back-off weldering led chip thereon on silicon, form the LED through hole back-off core wire sheet that has the antistatic diode.Small pieces metallization silicon can have the size and dimension identical with led chip, also can have greater than the size of led chip and different shapes.The quantity that connects the through hole/metal filled up plug of the pair of electrodes on the metallization silicon two sides is scheduled to.Each through hole/metal filled up plug has predetermined sectional area.The advantage that adopts through hole/metal filled up plug a plurality of or that sectional area is bigger to connect the pair of electrodes on the metallization silicon two sides is: (1) further improves the thermal conductivity of supporting substrate chip; (2) reduce resistance, thereby reduce the heat that produces, reduce voltage.The present invention also discloses the technology that several different manufacturings have the LED through hole back-off core wire sheet of antistatic diode.
The metallization silicon that has the antistatic diode that the present invention discloses, can be applied to other need have
The semiconductor chip and the device of the metallization silicon of antistatic diode.
Purpose of the present invention and every effect that can reach are as follows:
(1) the purpose of this invention is to provide the metallization silicon that has the antistatic diode.
(2) the purpose of this invention is to provide the process that low-cost batch production has the metallization silicon of antistatic diode.
(3) the purpose of this invention is to provide the LED through hole back-off core wire sheet that has the antistatic diode.
(4) the purpose of this invention is to provide the process that low-cost batch production has the LED through hole back-off core wire sheet of antistatic diode.
(5) the invention provides the concrete embodiment that the IC device on LED and the silicon wafer is integrated.
The present invention and its feature and benefit will better be showed in the following detailed description.
Description of drawings
Fig. 1 a and Fig. 1 b show two examples of LED through hole back-off core wire sheet formerly.
Fig. 2 a shows a concrete embodiment of the metallization silicon of the antistatic diode that has naked NPN type.
Fig. 2 b shows of metallization silicon of the antistatic diode have the NPN type that comprises insulating barrier
Concrete embodiment.
Fig. 2 c shows a concrete embodiment of the metallization silicon of the antistatic diode that has the NPN type that comprises door (gate) and insulating barrier.
Fig. 2 d shows a concrete embodiment of the metallization silicon of the antistatic diode that has naked PN type.
Fig. 2 e shows a concrete embodiment of the metallization silicon of the antistatic diode that has the PN type that comprises insulating barrier.
Fig. 3 a shows the concrete embodiment of production technology of the metallization silicon of the antistatic diode have the NPN type that comprises insulating barrier to Fig. 3 e.
Fig. 4 a shows the concrete embodiment of production technology of the metallization silicon of the antistatic diode have the PN type that comprises insulating barrier to Fig. 4 e.
Fig. 5 a and Fig. 5 b show that respectively different having comprises that the metallization silicon of antistatic diode of the NPN type of insulating barrier is applied to the concrete embodiment of led chip, and wherein, the antistatic diode is positioned at the one side of metallization silicon and led chip bonding.
Fig. 5 c and Fig. 5 d show that respectively different having comprises that the metallization silicon of antistatic diode of the PN type of insulating barrier is applied to the concrete embodiment of led chip, and wherein, the antistatic diode is positioned at the one side of metallization silicon and led chip bonding.
Fig. 6 a and Fig. 6 b show that respectively different having comprises that the metallization silicon of antistatic diode of the NPN type of insulating barrier is applied to the concrete embodiment of led chip, wherein, the antistatic diode be positioned at the bonding face of metallization silicon and led chip away from one side.
Fig. 6 c and Fig. 6 d show that respectively different having comprises that the metallization silicon of antistatic diode of the PN type of insulating barrier is applied to the concrete embodiment of led chip, wherein, the antistatic diode be positioned at the bonding face of metallization silicon and led chip away from one side.
Fig. 6 e and Fig. 6 f show the antistatic diode equivalent circuit diagram in parallel with led chip of NPN and PN type respectively.
Fig. 7 shows that low-cost batch production of the present invention has first concrete embodiment of technology of LED through hole back-off core wire sheet of the antistatic diode of the NPN type that comprises insulating barrier.
Fig. 8 shows that low-cost batch production of the present invention has second concrete embodiment of technology of LED through hole back-off core wire sheet of the antistatic diode of the NPN type that comprises insulating barrier.
The detailed description of concrete embodiment and invention
Though specific embodiment of the present invention will be described below, following description just illustrates principle of the present invention, rather than limits the invention to the description of following specific embodiment.
Note following:
(1) Fig. 3 and Fig. 4 show respectively has the production technology of metallization silicon of antistatic diode of the NPN that comprises insulating barrier and PN type and the production of the metallization chip that has the antistatic diode that technology can be applied to other, for example, the metallization silicon that has the antistatic diode of naked NPN type, the metallization silicon that has the antistatic diode of naked PN type has the metallization silicon of the antistatic NPN diode that comprises door (gate) and insulating barrier.
(2) Fig. 7 and Fig. 8 show respectively has the production technology of LED through hole back-off core wire sheet of antistatic diode of the NPN that comprises insulating barrier and PN type and the production of the LED through hole back-off core wire sheet that has the antistatic diode that technology can be applied to other, for example, the LED through hole back-off core wire sheet that has the antistatic diode of naked NPN type, the LED through hole back-off core wire sheet that has the antistatic diode of naked PN type has the LED through hole back-off core wire sheet of the antistatic diode of the NPN type that comprises door (gate) and insulating barrier.
(3) the invention provides the concrete embodiment that the IC device on LED and the silicon wafer is integrated.
Fig. 1 a shows first concrete embodiment of LED through hole back-off core wire sheet formerly.LED through hole back-off core wire sheet 100 comprises led chip 101 and silicon support substrate chip 107.The electrode 102 of led chip 101 respectively with silicon supports first and second electrodes 108 substrate chip 107 on 106 be connected by bonding dish 103 with 105 with 104.Bonding dish 103 and 105 includes, but are not limited to: eutectic bonding (eutecticbonding), plant gold ball bond (gold stud bump), and conductive adhesive, etc.Electrode 108 and 106 is mutual electric insulations.First and second electrodes 108 and 106 respectively by through hole/metal filled up plug 109 and 112 and silicon support third and fourth electrode 110 and 111 on second of substrate chip 107 to electrically connect.
Fig. 1 b shows second concrete embodiment of LED through hole back-off core wire sheet formerly.Second concrete embodiment is identical with first concrete embodiment basically.Difference is: in second concrete embodiment, silicon supports the size of substrate chip 122 greater than led chip 121; The quantity of the through hole/metal filled up plug 123 in second concrete embodiment is greater than 1.
Fig. 2 a shows first concrete embodiment of the metallization silicon of the antistatic diode that has the NPN type, promptly has the metallization silicon 200 of the antistatic diode of naked NPN type.The antistatic diode that has naked NPN type in the metallization first of silicon 200, this diode comprise two n- quadrants 202 and 204 that separated by P zone 203.First and second electrodes 201 and 205 on first electrically connect with two n- quadrants 202 and 204 respectively.First and second electrodes 201 and 205 respectively by through hole/metal filled up plug 206 and 208 and metallization second of chip 200 on third and fourth electrode 207 and 209 electrically connect.Therefore, first electrode 201, n-quadrant 202, through hole/metal filled up plug 206 and third electrode 207 electrically connect.Second electrode 205, n-quadrant 204, through hole/metal filled up plug 208 and the 4th electrode 209 electrically connect.First and second electrodes 201 and 205 electric insulations, third and fourth electrode 207 and 209 electric insulations.
Fig. 2 b shows second concrete embodiment of the metallization silicon of the antistatic diode that has the NPN type, promptly has the metallization silicon 210 of the antistatic diode of the NPN type that comprises insulating barrier.First the concrete embodiment with Fig. 2 a is identical basically for second concrete embodiment.Difference is: in second concrete embodiment, insulating barrier 211 covers whole P zone 203 and part n-quadrant 202 and part n-quadrant 204.First and second electrodes 201 and 205 on first cover the part of insulating barrier 211 respectively.
Fig. 2 c shows the 3rd concrete embodiment of the metallization silicon of the antistatic diode that has the NPN type, promptly has the metallization silicon 220 of the antistatic diode of the NPN type that comprises door (gate) and insulating barrier.First the concrete embodiment with Fig. 2 a is identical basically for the 3rd concrete embodiment.Difference is: insulating barrier 221 covers P zone 203 and part n-quadrant 202 and part n-quadrant 204, and door (gate) 222 is laminated on the insulating barrier 221, and insulating barrier 223 is laminated on the door 222.Insulating barrier 223 has predetermined shape and size, makes 205 insulation of door 222 and second electrode to make door 222 and first electrode 201 electrically connect.
Fig. 2 d shows first concrete embodiment of the metallization silicon of the antistatic diode that has the PN type, promptly has the metallization silicon 230 of the antistatic diode of naked PN type.The antistatic diode that has naked PN type on first of metallization silicon 230, the diode of this PN type comprise P zone 232 and n-quadrant 231.First and second electrodes 201 and 205 on first electrically connect with n-quadrant 231 and P zone 232 respectively.First and second electrodes 201 and 205 respectively by through hole/metal filled up plug 206 and 208 and metallization second of silicon 230 on third and fourth electrode 207 and 209 electrically connect.Therefore, first electrode 201, n-quadrant 231, through hole/metal filled up plug 206 and third electrode 207 electrically connect.Second electrode 205, P zone 232, through hole/metal filled up plug 208 and the 4th electrode 209 electrically connect.First and second electrodes 201 and 205 electric insulations, third and fourth electrode 207 and 209 electric insulations.
Fig. 2 e shows second concrete embodiment of the metallization silicon of the antistatic diode that has the PN type, promptly has the metallization silicon 240 of the antistatic diode of the PN type that comprises insulating barrier.First the concrete embodiment with Fig. 2 d is identical basically for second concrete embodiment.Difference is: in second concrete embodiment, and insulating barrier 242 cover part P zone 243 and part n-quadrant 241.First and second electrodes 201 and 205 on first cover the part of insulating barrier 242 respectively.
Fig. 3 shows the concrete embodiment of production technology of the metallization silicon of the diode that has an antistatic NPN type that comprises insulating barrier of the present invention.Same technology can be applied to produce the metallization silicon of other the antistatic diode that has the NPN type.
Fig. 3 a shows processing step one: stacked photoresist on first of silicon support substrate wafer 301, etching photoresist makes becomes predetermined figure 302 and 303, injects the P type and mixes, and forms P zone 304.Stripping photoresist 302 and 303.
Fig. 3 b shows processing step two: stacked again photoresist on first of silicon support substrate wafer 301, etching photoresist makes becomes predetermined figure 311,312 and 313.Inject the N type and mix, form n-quadrant 310 and 314.N- quadrant 310 and 314 is respectively in the both sides in P zone 304.
Fig. 3 c shows processing step three: stripping photoresist 311,312 and 313.So far, the silicon wafer that has the antistatic diode of naked NPN type is made, if this silicon wafer is continued to carry out metallization, then obtains having the metallization silicon wafer of the antistatic diode of naked NPN type.
Fig. 3 d shows processing step four: stacked again photoresist on first of silicon support substrate wafer, etching photoresist makes becomes predetermined figure 322 and 323.Stacked insulating barrier 321.Insulating barrier 321 covers whole P zone 304 and part n-quadrant 310 and part n-quadrant 314. Stripping photoresist 322 and 323.
Fig. 3 e shows processing step five: stacked first and second electrodes 330 and 333 on first of silicon support substrate wafer, stacked third and fourth electrode 332 and 335 on second.First electrode 330 and n-quadrant 310 electrically connect and cover the part of insulating barrier 321.Second electrode 333 and n-quadrant 314 electrically connect and cover the part of insulating barrier 321.Form through hole/metal filled up plug 331 and 334.Through hole/metal filled up plug 331 connects first electrode 330 and third electrode 332; Through hole/metal filled up plug 334 connects second electrode 333 and the 4th electrode 335.
Notice that (1) insulating barrier 321 is dispensable, when not having insulating barrier 321, first and second electrodes 330 and 333 do not electrically connect with P zone 304; (2) can continue to implement following technology: laminate door on insulating barrier 321 (gate), go up stacked second insulating barrier (not having the show gate (gate) and second insulating barrier among Fig. 3) at door (gate).First electrode 330 and door (gate) and n-quadrant 310 electrically connect and cover the part of second insulating barrier.Second electrode 333 and n-quadrant 314 electrically connect and cover the part of second insulating barrier, but with door (gate) and regional 304 electric insulations of P.So far, the silicon wafer that has the antistatic diode of the NPN type that comprises door (gate) and insulating barrier is made, if this silicon wafer is continued to carry out metallization, then obtains having the metallization silicon wafer of the antistatic diode of the NPN type that comprises door (gate) and insulating barrier.
Fig. 4 a shows processing step one: stacked photoresist on first of silicon support substrate wafer 401, etching photoresist makes becomes predetermined figure 402 and 403, injects the P type and mixes, and forms P zone 404.Stripping photoresist 402 and 403.
Fig. 4 b shows processing step two: stacked again photoresist on first of silicon support substrate wafer 401, etching photoresist makes becomes predetermined figure 411 and 412.Inject the N type and mix, form n-quadrant 410.
Fig. 4 c shows processing step three: stripping photoresist 411 and 412.So far, the silicon wafer that has the antistatic diode of naked PN type is made, if this silicon wafer is continued to carry out metallization, then obtains having the metallization silicon wafer of the antistatic diode of naked PN type.
Fig. 4 d shows processing step four: stacked again photoresist on first of silicon support substrate wafer, etching photoresist makes becomes predetermined figure 422 and 423.Stacked insulating barrier 421.Insulating barrier 421 cover part P zone 404 and part n-quadrant 410. Stripping photoresist 422 and 423.
Fig. 4 e shows processing step five: stacked first and second electrodes 430 and 433 on first of silicon support substrate wafer, stacked third and fourth electrode 432 and 435 on second.First electrode 430 and n-quadrant 410 electrically connect and cover the part of insulating barrier 421.Second electrode 433 and P zone 404 electrically connect and cover the part of insulating barrier 421.Form through hole/metal filled up plug 431 and 434.Through hole/metal filled up plug 431 connects first electrode 430 and third electrode 432; Through hole/metal filled up plug 434 connects second electrode 433 and the 4th electrode 435.
Notice that insulating barrier 421 is dispensable, when not having insulating barrier 421, first and second electrodes 430 and 433 are wanted mutual electric insulation.
Fig. 5 shows that the metallization silicon that has the antistatic diode of the present invention is applied to four concrete embodiments of LED back-off core wire sheet.Same structure can be applied to other metallization silicon that has the antistatic diode and other semiconductor back-off core wire sheet.
Fig. 5 a shows that the metallization silicon that has the antistatic diode of the NPN type that comprises insulating barrier of the present invention is applied to first concrete embodiment of led chip.Led chip 501 has two electrodes 502 and 503.The metallization silicon 511 that has the antistatic diode of the NPN type that comprises insulating barrier has first and second electrodes 512 and 513.These two electrodes respectively with two electrodes 502 and 503 bondings of led chip 501.The metallization silicon 511 that has an antistatic diode of the NPN type that comprises insulating barrier has the structure identical with the metallization silicon 210 of Fig. 2 b.
In this concrete embodiment, metallization silicon 511 is of similar shape and size with led chip 501.
Fig. 5 b shows that the metallization silicon that has the antistatic diode of the NPN type that comprises insulating barrier of the present invention is applied to second concrete embodiment of led chip.Led chip 521 has two electrodes 522 and 523, these two electrodes respectively with the metallization silicon 531 first and second electrodes 532 and 533 bondings.In this concrete embodiment, the size of metallization silicon 531 is greater than led chip 521, and both promptly can be of similar shape, and also can have shape inequality.The structure of metallization silicon 531 is identical with the metallization silicon 210 of Fig. 2 b.
Notice that though the metallization silicon that Fig. 5 a and Fig. 5 b show has the antistatic diode of the NPN type that comprises insulating barrier, the metallization silicon also can have the antistatic diode of other NPN type.The antistatic diode of other NPN type includes, but not limited to have the antistatic diode of naked NPN type, has the antistatic diode of the NPN type that comprises door (gate) and insulating barrier, etc.
Fig. 5 c shows that the metallization silicon that has the antistatic diode of the PN type that comprises insulating barrier of the present invention is applied to first concrete embodiment of led chip.Led chip 541 has two electrodes 542 and 543.The metallization silicon 551 that has the antistatic diode of the PN type that comprises insulating barrier has first and second electrodes 552 and 553.These two electrodes respectively with two electrodes 542 and 543 bondings of led chip 541.In this concrete embodiment, metallization silicon 551 is of similar shape and size with led chip 541.Metallization silicon 551 has the structure identical with the metallization silicon 240 of Fig. 2 e.
Fig. 5 d shows that the metallization silicon that has the antistatic diode of the PN type that comprises insulating barrier of the present invention is applied to second concrete embodiment of led chip.Led chip 561 has two electrodes 562 and 563.The metallization silicon 571 that has the antistatic diode of the PN type that comprises insulating barrier has first and second electrodes 572 and 573.First and second electrodes 572 and 573 of metallization silicon 571 respectively with two electrodes 562 and 563 bondings of led chip 561.In this concrete embodiment, the size of metallization silicon 571 is greater than led chip 561, and both promptly can be of similar shape, and also can have shape inequality.Metallization silicon 571 has the structure identical with the metallization silicon 240 of Fig. 2 e.
Notice that though the metallization silicon that Fig. 5 c and Fig. 5 d show has the antistatic diode of the PN type that comprises insulating barrier, the metallization silicon also can have the antistatic diode of other PN type.The antistatic diode of other PN type includes, but not limited to the antistatic diode of naked PN type, etc.
Fig. 6 a shows that the metallization silicon that has the antistatic diode of the NPN type that comprises insulating barrier of the present invention is applied to the 3rd concrete embodiment of led chip.Led chip 601 has two electrodes 602 and 603.First mask of metallization silicon 611 that has the antistatic diode of the NPN type that comprises insulating barrier has first and second electrodes 612 and 613.These two electrodes respectively with two electrodes 602 and 603 bondings of led chip 601.Second mask of metallization silicon 611 has third and fourth electrode 615 and 616.The antistatic diode 614 that comprises the NPN type of insulating barrier is positioned on second of metallization silicon 611.Third and fourth electrode 615 and 616 electrically connects with two n- quadrants 617 and 618 of antistatic diode 614 respectively.
The metallization silicon 611 that has an antistatic diode of the NPN type that comprises insulating barrier has the structure identical with the metallization silicon 210 of Fig. 2 b.In this concrete embodiment, metallization silicon 611 is of similar shape and size with led chip 601.
Fig. 6 b shows that the metallization silicon that has the antistatic diode of the NPN type that comprises insulating barrier of the present invention is applied to the 4th concrete embodiment of led chip.Led chip 621 has two electrodes 622 and 623, these two electrodes respectively with the metallization silicon 631 first and second electrodes 632 and 633 bondings.Second mask of metallization silicon 631 has third and fourth electrode 635 and 636.The antistatic diode 634 that comprises the NPN type of insulating barrier is positioned on second of metallization silicon 631.Third and fourth electrode 635 and 636 electrically connects with two n- quadrants 637 and 638 of antistatic diode 634 respectively.
In this concrete embodiment, the size of metallization silicon 631 is greater than led chip 621, and both promptly can be of similar shape, and also can have shape inequality.The structure of metallization silicon 631 is identical with the metallization silicon 210 of Fig. 2 b.
Notice that though the metallization silicon that Fig. 6 a and Fig. 6 b show has the antistatic diode of the NPN type that comprises insulating barrier, the metallization silicon also can have the antistatic diode of other NPN type.The antistatic diode of other NPN type includes, but not limited to have the antistatic diode of naked NPN type, has the antistatic diode of the NPN type that comprises door (gate) and insulating barrier, etc.
Fig. 6 c shows that the metallization silicon that has the antistatic diode of the PN type that comprises insulating barrier of the present invention is applied to the 3rd concrete embodiment of led chip.Led chip 641 has two electrodes 642 and 643.The metallization silicon 651 that has the antistatic diode of the PN type that comprises insulating barrier has first and second electrodes 652 and 653.These two electrodes respectively with two electrodes 642 and 643 bondings of led chip 641.Second mask of metallization silicon 651 has third and fourth electrode 655 and 656.The antistatic diode 654 that comprises the PN type of insulating barrier is positioned on second of metallization silicon 651.Third and fourth electrode 655 and 656 electrically connects with the N of antistatic diode 654 and P zone 657 and 658 respectively.
In this concrete embodiment, metallization silicon 651 is of similar shape and size with led chip 641.Metallization silicon 651 has the structure identical with the metallization silicon 240 of Fig. 2 e.
Fig. 6 d shows that the metallization silicon that has the antistatic diode of the PN type that comprises insulating barrier of the present invention is applied to the 4th concrete embodiment of led chip.Led chip 661 has two electrodes 662 and 663.The metallization silicon 671 that has the antistatic diode of the PN type that comprises insulating barrier has first and second electrodes 672 and 673.First and second electrodes 672 and 673 of metallization silicon 671 respectively with two electrodes 662 and 663 bondings of led chip 661.Second mask of metallization silicon 671 has third and fourth electrode 675 and 676.The antistatic diode 674 that comprises the PN type of insulating barrier is positioned on second of metallization silicon 671.Third and fourth electrode 675 and 676 electrically connects with the N of antistatic diode 674 and P zone 677 and 678 respectively.
In this concrete embodiment, the size of metallization silicon 671 is greater than led chip 661, and both promptly can be of similar shape, and also can have shape inequality.Metallization silicon 671 has the structure identical with the metallization silicon 240 of Fig. 2 e.
Notice that though the metallization silicon that Fig. 6 c and Fig. 6 d show has the antistatic diode of the PN type that comprises insulating barrier, the metallization silicon also can have the antistatic diode of other PN type.The antistatic diode of other PN type includes, but not limited to the antistatic diode of naked PN type, etc.
The equivalent electric circuit that the antistatic diode 682 that Fig. 6 e shows the NPN type and led chip 681 are in parallel.The metallization silicon of led chip that is bonded together that Fig. 6 a and Fig. 6 b show and the antistatic diode that has the NPN type that comprises insulating barrier constitutes parallel circuits, and its equivalent electric circuit is by shown in Fig. 6 e.
The equivalent electric circuit that the antistatic diode 692 that Fig. 6 f shows the PN type and led chip 691 are in parallel.The metallization silicon of led chip that is bonded together that Fig. 6 c and Fig. 6 d show and the antistatic diode that has the PN type that comprises insulating barrier constitutes parallel circuits, and its equivalent electric circuit is by shown in Fig. 6 f.
Notice that the equivalent electric circuit that Fig. 6 e and Fig. 6 f show is applicable to led chip respectively and has the PNP that comprises other and the metallization silicon of the antistatic diode of PN type.The antistatic diode of other PNP and PN type includes, but not limited to the antistatic diode of naked NPN type, comprises the antistatic diode of the NPN type of door (gate) and insulating barrier, the antistatic diode of naked PN type, etc.
Fig. 7 a shows that production of the present invention has first concrete embodiment of technological process of the LED through hole back-off core wire sheet of antistatic diode.
Technological process 700: support at silicon on first of substrate wafer to form the ESD diode on the position corresponding with each led chip on the LED epitaxial wafer.The type of ESD diode includes, but not limited to the NPN type, the PN type.Each type includes, but not limited to naked NPN type, and naked PN type comprises the NPN type of insulating barrier, comprises the PN type of insulating barrier, comprises the NPN type of door (gate) and insulating barrier.The technological process that forms the ESD diode includes, but not limited to the technological process of the present invention that Fig. 3 shows, the technological process of the present invention that Fig. 4 shows.
Technological process 701: on first and second of silicon support substrate wafer, form one group one group electrode, promptly form the metallization silicon wafer.Every group of electrode comprises the electrode of two mutual insulatings.Every group of electrode on first is corresponding with the position of two electrodes of each corresponding led chip on the LED epitaxial wafer of follow-up bonding respectively.Every group of electrode on second respectively with when encapsulation follow-up bonding the position of each two heat sink electrode corresponding.Each electrode on first is coupled to an electrode by through hole/metal filled up plug with second upward corresponding electrode.Two electrodes of every group of electrode on described first link with two electrodes of corresponding each ESD diode respectively.
Technological process 702: bonding LED epitaxial wafer and metallization silicon wafer, two electrodes of each group in the metallization first of silicon wafer respectively with the LED epitaxial wafer on corresponding two electrode bondings of each led chip, form bonding LED/metallization silicon wafer.
Technological process 703: bonding LED/metallization silicon wafer is cut into the single LED through hole back-off core wire sheet that has the antistatic diode, and the size and dimension of metallization silicon is identical with led chip.
Fig. 7 b shows the sectional view of bonding LED of the present invention/metallization silicon wafer.Only show two led chips among the figure, LED1 chip 721 and LED2 chip 725.Metallization silicon wafer 720 has two electrodes 726 and 729 in two electrodes 722 and 724 corresponding positions with LED1 chip 721.Electrode 722 and 724 respectively with electrode 726 and 729 bondings.Electrode 726 and 729 respectively with metallization second of silicon wafer 720 on electrode 728 and 730 electrically connect by through hole/metal filled up plug 727 and 731.NPN antistatic diode 723 is between electrode 726 and 729, and two n-quadrants of NPN antistatic diode 723 electrically connect with electrode 726 and 729 respectively.
Notice that NPN antistatic diode also can be between electrode 728 and 730, two n-quadrants of NPN antistatic diode electrically connect with electrode 728 and 730 respectively.First concrete embodiment of the technological process that Fig. 7 shows also is applicable to led chip and has the PNP that comprises other and the metallization silicon of the antistatic diode of PN type.The antistatic diode of other PNP and PN type includes, but not limited to the antistatic diode of naked NPN type, comprises the antistatic diode of the NPN type of door (gate) and insulating barrier, the antistatic diode of naked PN type, etc.
Fig. 8 a shows that production of the present invention has second concrete embodiment of technological process of the LED through hole back-off core wire sheet of antistatic diode.
Technological process 800: on position corresponding on first of silicon support substrate wafer, form the ESD diode with each led chip.The type of ESD diode includes, but not limited to the NPN type, the PN type.Each type includes, but not limited to naked NPN type, and naked PN type comprises the NPN type of insulating barrier, comprises the PN type of insulating barrier, comprises the NPN type of door (gate) and insulating barrier.The technological process that forms the ESD diode includes, but not limited to the technological process of the present invention that Fig. 3 shows, the technological process of the present invention that Fig. 4 shows.
Technological process 801: on first and second of silicon support substrate wafer, form one group one group electrode, promptly form the metallization silicon wafer.Every group of electrode comprises the electrode of two mutual insulatings.Every group of electrode on first is corresponding with the position of two electrodes of each led chip of follow-up bonding respectively.Every group of electrode on second respectively with when encapsulation follow-up bonding the position of each two heat sink electrode corresponding.Each electrode on first is coupled to an electrode by through hole/metal filled up plug with second upward corresponding electrode.Two electrodes of every group of electrode on described first link with two electrodes of corresponding each ESD diode respectively.
Technological process 802: the preposition of each led chip of bonding to the metallization silicon wafer respectively, two electrodes of each group in the metallization first of silicon wafer respectively with corresponding two electrode bondings of each led chip, form bonding LED chip/metallization silicon wafer.
Technological process 803: bonding LED chip/metallization silicon wafer is cut into the single LED through hole back-off core wire sheet that has the antistatic diode along line of cut 832, the size of metallization silicon is greater than led chip, the shape of metallization silicon promptly can be with led chip identical, also can be different.
Fig. 8 b shows the sectional view of bonding LED of the present invention/metallization silicon wafer.Only show two led chips among the figure, LED1 chip 821 and LED2 chip 825.Metallization silicon wafer 820 has two electrodes 826 and 829 in two electrodes 822 and 824 corresponding positions with LED1 chip 821.Electrode 822 and 824 respectively with electrode 826 and 829 bondings.Electrode 826 and 829 respectively with metallization second of silicon wafer 820 on electrode 828 and 830 electrically connect by through hole/metal filled up plug 827 and 831.The NPN antistatic diode 823 that comprises insulating barrier comprises that two n-quadrants of the NPN antistatic diode 823 of insulating barrier electrically connect with electrode 826 and 829 respectively between electrode 826 and 829.
Notice that NPN antistatic diode also can be between electrode 828 and 830, two n-quadrants of NPN antistatic diode electrically connect with electrode 828 and 830 respectively.Second concrete embodiment of the technological process that Fig. 8 shows also is applicable to led chip and has the PNP that comprises other and the metallization silicon of the antistatic diode of PN type.The antistatic diode of other PNP and PN type includes, but not limited to the antistatic diode of naked NPN type, comprises the antistatic diode of the NPN type of door (gate) and insulating barrier, the antistatic diode of naked PN type, etc.
Top concrete description does not limit the scope of the invention, and only provides some specific illustrations of the present invention.Therefore covering scope of the present invention should be determined by claim and their legal equivalents, rather than by above-mentioned specific detailed description and embodiment decision.
Claims (10)
1. metallization silicon that has antistatic diode (ESD diode) includes, but are not limited to:
The metallization silicon; Wherein, have first electrode and second electrode, described first electrode and the mutual electric insulation of second electrode on first of described metallization silicon; Wherein, have third electrode and the 4th electrode, described third electrode and the mutual electric insulation of the 4th electrode on second of described metallization silicon; Wherein, first electrode on first of described metallization silicon and second electrode are electrically connected with third electrode and the 4th electrode on second by through hole/metal filled up plug respectively;
The antistatic diode; Wherein, described antistatic diode is between first and second of metallization silicon.
2. the metallization silicon that has the antistatic diode of claim 1, wherein, described antistatic diode comprises, but be not limited to, the antistatic diode of naked NPN type, the antistatic diode of naked PN type comprises the antistatic diode of the NPN type of insulating barrier, the antistatic diode that comprises the PN type of insulating barrier comprises the antistatic diode of the NPN type of door (gate) and insulating barrier.
3. the metallization silicon that has the antistatic diode of claim 2, wherein, two n-quadrants of the antistatic diode of described naked NPN type are electrically connected with two electrodes on the same one side of described metallization silicon respectively; Wherein, two n-quadrants of the antistatic diode of the described NPN type that comprises insulating barrier are electrically connected with two electrodes on the same one side of described metallization silicon respectively; Wherein, two n-quadrants of the antistatic diode of the described NPN type that comprises door (gate) and insulating barrier are electrically connected with two electrodes on the same one side of described metallization silicon respectively; Wherein, the n-quadrant of the antistatic diode of described naked PN type and P zone are electrically connected with two electrodes on the same one side of described metallization silicon respectively; Wherein, the n-quadrant of the antistatic diode of the described PN type that comprises insulating barrier and P zone are electrically connected with two electrodes on the same one side of described metallization silicon respectively.
4. LED through hole back-off core wire sheet that has the antistatic diode includes, but are not limited to:
The metallization silicon; Wherein, have first electrode and second electrode, described first electrode and the mutual electric insulation of second electrode on first of described metallization silicon; Wherein, have third electrode and the 4th electrode, described third electrode and the mutual electric insulation of the 4th electrode on second of described metallization silicon; Wherein, first electrode on first of described metallization silicon and second electrode are electrically connected with third electrode and the 4th electrode on second by through hole/metal filled up plug respectively;
The antistatic diode; Wherein, described antistatic diode is between first and second of metallization silicon;
Led chip; Wherein, two of described led chip electrodes are electrically connected with first electrode and second electrode on first of described metallization silicon respectively.
5. the LED through hole back-off core wire sheet that has the antistatic diode of claim 4, wherein, described antistatic diode comprises, but be not limited to, the antistatic diode of naked NPN type, the antistatic diode of naked PN type comprises the antistatic diode of the NPN type of insulating barrier, the antistatic diode that comprises the PN type of insulating barrier comprises the antistatic diode of the NPN type of door (gate) and insulating barrier.
6. the LED through hole back-off core wire sheet that has the antistatic diode of claim 5, wherein, two n-quadrants of the antistatic diode of described naked NPN type are electrically connected with two electrodes on the same one side of described metallization silicon respectively; Wherein, two n-quadrants of the antistatic diode of the described NPN type that comprises insulating barrier are electrically connected with two electrodes on the same one side of described metallization silicon respectively; Wherein, two n-quadrants of the antistatic diode of the described NPN type that comprises door (gate) and insulating barrier are electrically connected with two electrodes on the same one side of described metallization silicon respectively; Wherein, the n-quadrant of the antistatic diode of described naked PN type and P zone are electrically connected with two electrodes on the same one side of described metallization silicon respectively; Wherein, the n-quadrant of the antistatic diode of the described PN type that comprises insulating barrier and P zone are electrically connected with two electrodes on the same one side of described metallization silicon respectively.
7. the LED through hole back-off core wire sheet that has the antistatic diode of claim 4, wherein, the position of described antistatic diode is to select from one group of position; Described one group of position includes, but not limited to metallize between first electrode and second electrode on first of silicon, between the third electrode and the 4th electrode on second of the metallization silicon.
8. a manufacturing has the technology of the metallization silicon of antistatic diode, includes, but are not limited to:
Processing step one: stacked photoresist on first of silicon support substrate wafer, the described photoresist of etching makes becomes predetermined figure, injects the P type and mixes, and forms the P zone, peels off described photoresist;
Processing step two: stacked again photoresist on first of described silicon support substrate wafer, the described photoresist of etching makes becomes predetermined figure, injects the N type and mixes, and forms the n-quadrant;
Processing step three: peel off described photoresist;
Processing step four: the described silicon that metallizes is supported substrate wafer, forms the metallization silicon wafer that has the antistatic diode; Cut the described metallization silicon wafer that has the antistatic diode and become the metallization silicon that has the antistatic diode.
9. the manufacturing of claim 8 has the technology of the metallization silicon of antistatic diode, further comprises:
After carrying out described processing step three, carry out processing step five: stacked again photoresist on first of described silicon support substrate wafer, the described photoresist of etching makes becomes predetermined figure, stacked insulating barrier; Wherein, for the antistatic diode of NPN type, described insulating barrier covers whole P zone and part n-quadrant; Wherein, for the antistatic diode of PN type, described insulating barrier cover part P zone and part n-quadrant; Peel off described photoresist; Carry out described processing step four then.
10. the manufacturing of claim 9 has the technology of the metallization silicon of antistatic diode, further comprises:
After carrying out described processing step five, carry out processing step six: stacked again photoresist, the described photoresist of etching makes becomes predetermined figure, laminate door on described insulating barrier (gate); Peel off described photoresist; Stacked again photoresist, the described photoresist of etching makes becomes predetermined figure, goes up stacked second insulating barrier at described door (gate); Peel off described photoresist; Carry out described processing step four then.
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| CNB2005100870068A CN1329988C (en) | 2005-07-22 | 2005-07-22 | Metallized silicon chip with antistantic diode |
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| CN100446288C (en) * | 2006-08-01 | 2008-12-24 | 金芃 | Semiconductor chip or device with vertical structure through-hole |
| CN100452460C (en) * | 2006-05-29 | 2009-01-14 | 金芃 | Through-hole ventical structure semiconductor chip and device |
| CN100459195C (en) * | 2006-03-23 | 2009-02-04 | 财团法人工业技术研究院 | Illuminator packaging structural capable of preventing electrostatic damaged and manufacturing method therefor |
| CN102544274A (en) * | 2010-12-16 | 2012-07-04 | Lg伊诺特有限公司 | Wafer substrate bonding structure, light emitting device and method for manufacturing the same |
| CN106981563A (en) * | 2017-05-16 | 2017-07-25 | 广东工业大学 | A kind of power-type uv-LED device |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11168235A (en) * | 1997-12-05 | 1999-06-22 | Toyoda Gosei Co Ltd | Light emitting diode |
| JP2003304003A (en) * | 2002-04-08 | 2003-10-24 | Citizen Electronics Co Ltd | Surface-mounted led and manufacturing method therefor |
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2005
- 2005-07-22 CN CNB2005100870068A patent/CN1329988C/en not_active Expired - Fee Related
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN100459195C (en) * | 2006-03-23 | 2009-02-04 | 财团法人工业技术研究院 | Illuminator packaging structural capable of preventing electrostatic damaged and manufacturing method therefor |
| CN100452460C (en) * | 2006-05-29 | 2009-01-14 | 金芃 | Through-hole ventical structure semiconductor chip and device |
| CN100446288C (en) * | 2006-08-01 | 2008-12-24 | 金芃 | Semiconductor chip or device with vertical structure through-hole |
| CN102544274A (en) * | 2010-12-16 | 2012-07-04 | Lg伊诺特有限公司 | Wafer substrate bonding structure, light emitting device and method for manufacturing the same |
| CN102544274B (en) * | 2010-12-16 | 2015-02-25 | Lg伊诺特有限公司 | Wafer substrate bonding structure, light emitting device and method for manufacturing the same |
| US8987920B2 (en) | 2010-12-16 | 2015-03-24 | Lg Innotek Co., Ltd. | Wafer substrate bonding structure and light emitting device comprising the same |
| CN106981563A (en) * | 2017-05-16 | 2017-07-25 | 广东工业大学 | A kind of power-type uv-LED device |
| CN106981563B (en) * | 2017-05-16 | 2023-11-14 | 广东工业大学 | Power type ultraviolet LED device |
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| CN1329988C (en) | 2007-08-01 |
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