CN1707946A - Frquency regulating loop for active resistance-capacitance wave filter and method thereof - Google Patents
Frquency regulating loop for active resistance-capacitance wave filter and method thereof Download PDFInfo
- Publication number
- CN1707946A CN1707946A CN 200410045287 CN200410045287A CN1707946A CN 1707946 A CN1707946 A CN 1707946A CN 200410045287 CN200410045287 CN 200410045287 CN 200410045287 A CN200410045287 A CN 200410045287A CN 1707946 A CN1707946 A CN 1707946A
- Authority
- CN
- China
- Prior art keywords
- frequency
- loop
- adjusted
- capacitive filter
- resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Networks Using Active Elements (AREA)
Abstract
The present invention is regulating circuit for regulating the cut-off frequency of active RC filter. In the active RC filter, the equivalent capacitance and the equivalent resistance are two cut-off frequency determining factors, so that the regulating circuit regulates the cut-off frequency through changing the equivalent resistance. Once the equivalent resistance is regulated, the time constant of the circuit is measured and compared with the preset period to make the cut-off frequency of the filter reach default value. Because of the operation environment of the elements inside the regulating circuit is equivalent to that of the active RC filter, rather high regulation precision may be reached.
Description
Technical field
The present invention particularly can regulate and control (continuous tuning) and the frequency adjustment loop that compensates (compensation) filter cutoff frequency relevant for a kind of continuously relevant for a kind of analog filter circuit.
Background technology
Filter is a unit common and important in the signal processing system, and its effect is that unwanted frequency band signals is eliminated, to be used for keeping or amplifying the frequency band signals of needs.In advanced integrated circuit manufacture process, it is a common trend that filter is integrated into chip.But because integrated circuit manufacture process has the factor that can't grasp too much, make the circuit element of making (as resistance, electric capacity) characteristic can't hundred-percently reach perfect condition, and the result of the long-pending bodyization of circuit also allows the circuit element characteristic change along with the variation of environment for use and time easily, especially along with the progress of constantly developing of portable communications system, make same group of Circuits System might be applied in any environment, therefore this all problem allows the cut-off frequency of filter just break away from original default value easily, how to compensate to make cut-off frequency can maintain set point muchly just to have become important key on communication system signal processing today.
The cut-off frequency of filter and its time constant (time constant; Reciprocal proportional (being f=1/2 π τ) τ), in active resistance capacitive filter, time constant is the product of resistance and capacitance, i.e. τ=R * C.Therefore, during as if equivalent resistance in the effective control filters circuit of energy or equivalent capacitance value, then also just cut-off frequency can be adjusted to a requirements.Utilize this notion, can be chosen in general resistor ﹠ capacitor filter and add an adjustment loop, when the cut-off frequency of filter when drift takes place in original default value, this adjusts loop can adjust equivalent resistance or equivalent capacitance value in the filter immediately, and cut-off frequency is recalled to default value.Fig. 1 is the adjustment loop schematic diagram of this kind method, and under normal circumstances input signal enters resistor ﹠ capacitor filter 110 via circuit 112, through after the processing of resistor ﹠ capacitor filter 110, produces output signal from circuit 114.When adjusting time constant that the loop detects resistor ﹠ capacitor filter 110 via circuit 126 with original setting (comparing) when different via circuit 122, can send the adjustment signal from circuit 124 at once, then to the equivalent electric of resistor ﹠ capacitor filter 110 perhaps equivalent resistance adjust so that cut-off frequency can be got back to default value originally.
Fig. 2 A is the basic circuit of adjusting the loop, wherein resistance R
22And capacitor C
22Be equivalent resistance in the filter and equivalent capacity.As constant current source I with fixed current ratio
22, I
24The resistance R of flowing through respectively
22And capacitor C
22The time, resistance R
22Two ends one voltage V can appear immediately
22, and capacitor C
22Terminal voltage V
24Then be to increase gradually along with charging, shown in Fig. 2 B.At constant current source I
24To capacitor C
22When beginning to charge, pulse comparator 220 can begin counting simultaneously, stops after a preset time period, and this Preset Time pulse period is the reference value of time constant just.When pulse comparator 220 stops to count, can be by voltage comparator 210 voltage V
24Whether greater than voltage V
22, so that with deciding adjustment circuit 230 will increase or reduce capacitor C
22Capacitance, and increase or shorten capacitor C in view of the above
22Charging interval.After finishing adjustment, then continue to repeat the above-mentioned charging and the action of comparison again, until capacitor C
22On voltage V
22Charging interval equate with the Preset Time pulse period till.At last, the equivalent capacitance value of adjustment filter makes it and capacitor C
22Capacitance equate.
Adjust the loop resistance R from the frequency of Fig. 2 A
22And capacitor C
22All be an end ground connection.But in the filter circuit of reality, resistance is not to be connected by this way with electric capacity, thus make equivalent resistance and equivalent capacitance value in the filter, can and Fig. 2 A in resistance R
22And capacitor C
22Different.Therefore, under the prerequisite of claimed accuracy, must design with the practical filter circuit via improvement has the cut-off frequency of same operation situation to adjust the loop.
Of particular note, about the basic principle and the characteristic of the R-2R resistor ladder that embodiments of the invention were applied to, it is that the special personage who knows this technical field should understand and know.Therefore, do not remake special elaboration herein.
Summary of the invention
By as can be known aforementioned, employed method has the not good problem of regulation and control accuracy in the prior art.Therefore, main purpose of the present invention is adjusted loop and its method in the frequency that provides a kind of and actual operating condition filter is approaching, can effectively compensate cut-off frequency because of drifts that factor caused such as processing procedure and environment.
Another main purpose of the present invention is providing a kind of regulatable resistance device, adjusts the time constant of filter circuit by changing equivalent resistance.
A main purpose more of the present invention relatively reaches adjusting device what time constant was provided, whether has been adjusted to default value and has looked the resistance that comparative result is adjusted equivalent resistance in order to the time constant of judging filter circuit.
Description of drawings
Fig. 1 is that the cut-off frequency of resistor ﹠ capacitor filter is adjusted the loop schematic diagram.
Fig. 2 A is the circuit diagram that general cut-off frequency is adjusted the loop.
Fig. 2 B is that general cut-off frequency is adjusted voltage comparator input terminal voltage graph of a relation in the loop.
Fig. 3 A is the circuit diagram of the specific embodiment of the invention.
Fig. 3 B is preset time period and system time pulse graph of a relation.
Fig. 4 is the circuit diagram of the specific embodiment of the invention.
The conventional letter of major part:
110 resistor ﹠ capacitor filters
112 input signal paths
114 output signal paths
120 cut-off frequencies are adjusted the loop
122 preset time period input path
124 adjust signal path
210 voltage comparators
220 pulse comparators
230 adjust circuit
310 differential amplifiers
320 differential voltage comparators
330 approach buffer continuously
410,420 resistor ladder circuit
412,414 resistor ladder circuit nodes
430 approach buffer continuously
I
22First constant current source
I
24Second constant current source
V
22Voltage comparator negative input end voltage
V
24Voltage comparator positive input terminal voltage
R
22Resistive element
C
22Variable-capacitance element
I
32First constant current source
I
34Second constant current source
V
31Differential voltage comparator output voltage
V
32, V
34Resistance is striden voltage
V
36The differential amplifier negative output voltage
V
38Differential amplifier positive output voltage
R
32Variable resistor element
C
32Capacity cell
S
32Switch element
The PSC preset time period
The pulse of CLK system time
I
42Constant current source
V
42, V
44Resistance is striden voltage
R
42, R
44Resistive element
C
42Capacity cell
B0 first switch element
B1 second switch element
B2 the 3rd switch element
B3 the 4th switch element
Embodiment
Below to the present invention in the description aspect the circuit, do not comprise that the active filter frequency adjusts the complete circuit in loop.The existing skill that the present invention continued to use is only done quoting of emphasis formula at this, to help elaboration of the present invention.And relevant drawings is not drawn to scale in the following content, and its effect is only in performance architectural feature of the present invention.
Fig. 3 A is the circuit diagram that frequency of the present invention is adjusted a preferred embodiment in loop, and this circuit has used a differential amplifier 310 with dual input and dual output end, two to feedback capacitor C
32And two variable resistor R
32, go out a circuit that is similar to active resistance capacitive filter with framework, wherein, variable resistor R
32Can utilize any known technology to implement, parallel connection or the series resistance for example selecting to be formed with the switch element that utilizes several resistance and equal number select circuit to be realized.In addition, 320 of differential voltage comparators are with the magnitude of voltage that decides an output, and the change-over time by magnitude of voltage (for example: when converting low state to) by high state, relatively obtain a corresponding time constant in the regulation device (for example approaching buffer continuously) at a signal, then, again by approach continuously buffer (Successive-Approximation Register, SAR) 330 with this time constant and a preset time period (Preset Circle; PSC) compare, and look comparison result variable resistor R
32Carry out suitable adjustment.
The generation of preset time period PSC is shown in Fig. 3 B, when the time pulse cycle of the system time pulse CLK that adds is T, then (enableduration) visual actual needs is set at the multiple of T during the activation of preset time period PSC, is the certain proportion relation with the default time constant value of filter circuit during this activation.In addition, during the decapacitation of preset time period PSC (disable duration), then be to be used for replacement (reset) frequency adjustment loop, its equally visual actual needs is set at the multiple of T.In addition, the switch element S among Fig. 3 A
32, it is controlled by preset time period PSC by (off) with conducting (on), wherein, when preset time period PSC activation, switch element S
32End; When preset time period PSC decapacitation, switch element S
32Conducting.
When the frequency of analysis chart 3A is adjusted the loop, at first suppose constant current source I
34Electric current be 0, just be open-circuit condition, only have constant current source I this moment
32The electric current variable resistor R that flows through
32And to feedbacking capacitor C
32Charge.PSC begins activation when preset time period, that is switch element S
32During for cut-off state, then come into operation in frequency adjustment loop.According to the operating characteristic of differential amplifier, the potential difference of its positive-negative input end can be assumed to be 0, just positive-negative input end between be the state of imaginary short (virtual short), in view of the above, then form two positive voltage V
32, V
38, two negative voltage V
34, V
36Because this is a laterally zygomorphic circuit, with the circuit of the first half, voltage V
32And voltage V
36Size be respectively:
V32＝I32×R32
Wherein, t is institute's elapsed time after the PSC activation.Work as V by finding out in the formula
32=V
36The time, time t=R then
32* C
32, this time, t was capacitor C
32The voltage of striding be charged to from 0 and equal variable resistor R
32The time constant of circuit for this reason during this period of time of striding voltage.This time constant can utilize the conversion of differential voltage comparator 320 output voltages, is approaching acquisition this time t value on the buffer 330 continuously.
The voltage ratio of differential voltage comparator 320 is to utilize (V
38-V
36)-(V
32-V
34) mode implement.When comparative result during, then represent capacitor C less than 0 volt
32Stride voltage no show resistance R still
32Stride voltage, this moment voltage V
31Can output " 0 " voltage quasi position (as 0 volt).When comparative result greater than 0 the time, then represent capacitor C
32Stride that voltage has arrived or surpass resistance R
32Stride voltage, this moment voltage V
31Can output " 1 " voltage quasi position (as 5 volts).
When circuit continued to operate the decapacitation of preset time period PSC, approaching buffer 330 continuously can acquisition voltage V
31Magnitude of voltage make a decision.When acquisition voltage is " 0 ", then represent the time constant on the present circuit bigger, so can be variable resistor R than default value
32Resistance value turn down so that voltage V
32Reduce, and then shorten capacitor C
32Be charged to voltage V
32The time of accurate position.Otherwise, when acquisition voltage is " 1 ", then represent the time constant on the present circuit littler, so can be variable resistor R than default value
32Resistance value transfer big so that voltage V
32Improve, and then can increase capacitor C
32Be charged to voltage V
32The time of accurate position.At this simultaneously, switch element S
32Also can be switched on, so that capacitor C is provided
32Discharge path when a circuit is reset.It is noted that switch element S
32Resistance value during conducting must be little to ignoring, because of its resistance value and I
32Product will be directly at C
32Last formation one initial resistivity value.When preset time period is enabled once again, frequency is adjusted the loop can repeatedly carry out above-mentioned program again, until the time constant of circuit meets fully or near till during the activation of preset time period, the equivalent resistance of main circuit can adjust according to this result on this moment filter.
Above-mentioned method decides the adjustment direction of resistance to be adjusted with a fixed capacity charging interval, certainly, also can utilize the mode of not fixing the charging interval to adjust, and its method is for treating capacitor C
32Stop charging after charging to the output voltage transition of differential voltage comparator 320, and utilize and approach the system time pulse clk cycle number that buffer 330 obtains a corresponding charging interval continuously.When system time pulse period number during greater than the time constant that sets, then resistance value should reduce, otherwise then should strengthen.But, in this direction, when the frequency of system time pulse CLK is not high enough, because the activation time of PSC is on using, must be the integral multiple of clk cycle, and the activation time of PSC defines the filter time constant value, therefore may cause the bigger error of time constant value.At this moment, if with constant current source I
34Add circuit and suppose constant current source I
34The magnitude of current be constant current source I
32During one ratio (a) of the magnitude of current, current source I for example
34The magnitude of current be constant current source I
32Half of the magnitude of current, then constant current source I
34To constant current source I
32Electric current the effect of shunting is arranged, that is can make the capacitor C of flowing through
32Electric current reduce, and make capacitor C
32Charging interval increase, the time constant of this moment can become:
When a=0.5, then
t＝2×R32×C32
So work as I
34Current value bigger, needed time t is also just long, so just can reduce the error of bringing because of the problems referred to above.
Controlled part flow arrangement in the circuit proposed by the invention can select circuit or parallel resistance to select circuit to form by circuit, the series resistance of resistor ladder, wherein realizes the circuit configurations of active filter with the circuit particularly suitable of resistor ladder.In addition, controlled part flow arrangement of the present invention can be controlled the equivalent resistance of this controlled part flow arrangement via digital controlled signal, and Fig. 4 is another preferred embodiment of the present invention.Controlled part flow arrangement 410,420 is arranged among the figure, and it is essentially the circuit configurations of a quadravalence R-2R resistor ladder, so R wherein
44Resistance value be R
42Twice, switch inside element b3, b2, b1, b0 flow direction of not controlled electric current again, and each switch element can import electric current controlled part flow arrangement 410,420 and will describe in detail in next section.
By the basic principle of R-2R resistor ladder as can be known, work as electric current I
42After flowing into the node 412 in the R-2R resistor ladder 410, meeting be divided equally is twice I
42/ 2 electric currents, together toward node 414 diffluences, another road by that analogy, then has I toward switch element b3 diffluence
42/ 2, I
42/ 4, I
42/ 8, I
42Four road electric currents such as/16 grades flow through respectively switch element b3, b2, b1, b0, and the conducting of switch element b3, b2, b1, b0 (on)/just can whether will be by (off) action to capacitor C in order to determine these electric currents
42Charging.For example, when other switch element ends when switch element b3 conducting is only arranged, then have I
42/ 2 the magnitude of current can be to capacitor C
42Charge, but when switch element b1 also conducting, then just have (I
42/ 2)+(I
42/ 8) the magnitude of current is to capacitor C
42Charging, thus, charging current just can strengthen, so time constant can reduce naturally.So, approach 430 need of buffer continuously and directly switch element b3, b2, b1, b0 in the R-2R resistor ladder 410,420 are done control, can reach the purpose that time constant is adjusted, therefore utilize the characteristic of R-2R resistor ladder, can finely tune more accurately time constant.In the equivalence, such circuit configurations may command capacitor C
32The charging current size, and indicate as can be known by the current value among the figure, it is the control relation of a kind of binary weight (binary-weighted).
The above is preferred embodiment of the present invention only, is not in order to limit the right of applying for a patent of the present invention; Simultaneously above description should be understood and be implemented for the special personage who knows the present technique field, so other does not break away from the equivalence of being finished under the disclosed spirit and change or modification, all should be included in the described claim.
Claims (20)
1. the frequency of an active resistance capacitive filter is adjusted the loop, it is characterized in that, comprising:
One differential amplifier device is one to have the device of positive and negative input and positive and negative output;
One first current-source arrangement;
Two variable resistor devices, this two variable resistor devices one end are coupled electrically with this positive input terminal and this negative input end of this differential amplifier device respectively, and the other end is coupled electrically with the anode and the negative terminal of this first current-source arrangement respectively;
Two capacitive means, this two capacitive means one end are coupled electrically with this positive input terminal and this negative input end of this differential amplifier device respectively, and the other end is coupled electrically with this negative output terminal and this positive output end of this differential amplifier device respectively;
Two switching devices, the two ends of this two switching device are coupled electrically with the two ends of this two capacitive means respectively;
One comparison means, be one to have the device of a four-input terminal and an output, the anode of one first input end and this first current-source arrangement is coupled electrically, the negative terminal of one second input and this first current-source arrangement is coupled electrically, the negative output terminal of one the 3rd input and this differential amplifier device is coupled electrically, and the positive output end of a four-input terminal and this differential amplifier device is coupled electrically;
One adds preset time period, in order to drive this two switching device; And
One signal is regulation device relatively, and this signal comparison regulation device is made comparisons this output signal that adds preset time period and this comparison means corresponding time constant when the transition, and regulates and control this two variable-resistance resistance value.
2. the frequency of active resistance capacitive filter as claimed in claim 1 is adjusted the loop, and wherein this first current-source arrangement is a constant current source.
3. the frequency of active resistance capacitive filter as claimed in claim 1 is adjusted the loop, and it more comprises one second current-source arrangement, and the anode of this second current-source arrangement and negative terminal are coupled electrically with the negative input and the positive input terminal of this differential amplifier device respectively.
4. the frequency of active resistance capacitive filter as claimed in claim 3 is adjusted the loop, and wherein this second current-source arrangement is a constant current source.
5. the frequency of active resistance capacitive filter as claimed in claim 3 is adjusted the loop, and wherein this second current-source arrangement becomes a proportionate relationship with the electric current of this first current-source arrangement.
6. the frequency of active resistance capacitive filter as claimed in claim 1 is adjusted the loop, and wherein this two variable resistor device is that parallel resistance is selected circuit.
7. the frequency of active resistance capacitive filter as claimed in claim 1 is adjusted the loop, and wherein this two variable resistor device is that series resistance is selected circuit.
8. the frequency of active resistance capacitive filter as claimed in claim 1 is adjusted the loop, and wherein this two variable resistor device is the resistor ladder circuit framework.
9. the frequency of an active resistance capacitive filter is adjusted the method in loop, it is characterized in that, comprising:
Adjust an equivalent resistance, use a controlled part flow arrangement that the frequency of this active resistance capacitive filter is adjusted the loop and be adjusted to this equivalence resistance value;
Determine a time constant, use the conversion of the output state of a comparison means to decide the frequency of this active resistance capacitive filter to adjust this time constant in loop; And
This time constant relatively, with a signal comparison regulation device this time constant and a time cycle of presetting are made comparisons, when this time constant is identical with this preset time period, then the frequency that expression will this active resistance capacitive filter is adjusted to this default value, when this time constant and this preset time period are inequality, then continue to change this equivalence resistance value till meeting this default value.
10. the frequency of active resistance capacitive filter as claimed in claim 9 is adjusted the method in loop, and wherein this controlled part flow arrangement is the structure that parallel resistance is selected circuit.
11. the frequency of active resistance capacitive filter as claimed in claim 9 is adjusted the method in loop, wherein this controlled part flow arrangement is the structure that series resistance is selected circuit.
12. the frequency of active resistance capacitive filter as claimed in claim 9 is adjusted the method in loop, wherein this controlled part flow arrangement structure that is the resistor ladder circuit.
13. the frequency of active resistance capacitive filter as claimed in claim 9 is adjusted the method in loop, wherein the digital control sign indicating number of this controlled part flow arrangement system's use decides this equivalence resistance value.
14. the timing frequency of an active resistance capacitive filter is adjusted the method in loop, it is characterized in that, comprising:
Adjust an equivalent resistance, use a controlled part flow arrangement that the frequency of this active resistance capacitive filter is adjusted the loop and be adjusted to this equivalence resistance value;
Capture a voltage signal, with default time cycle when the decapacitation state, capture this voltage signal that a comparison means is exported, and in acquisition this voltage signal the time, obtain one with a signal comparison regulation device and adjust the time constant in loop corresponding to the frequency of this active resistance capacitive filter; And
Judge this voltage signal, and change this equivalence resistance value one by one till meeting this default value by this signal comparison regulation device according to the height of this voltage signal.
15. the frequency of active resistance capacitive filter as claimed in claim 14 is adjusted the method in loop, wherein this controlled part flow arrangement is the structure that parallel resistance is selected circuit.
16. the frequency of active resistance capacitive filter as claimed in claim 14 is adjusted the method in loop, wherein this controlled part flow arrangement is the structure that series resistance is selected circuit.
17. the frequency of active resistance capacitive filter as claimed in claim 14 is adjusted the method in loop, wherein this controlled part flow arrangement structure that is the resistor ladder circuit.
18. the frequency of active resistance capacitive filter as claimed in claim 14 is adjusted the method in loop, wherein this controlled part flow arrangement uses digital control sign indicating number to decide this equivalence resistance value.
19. the frequency of active resistance capacitive filter as claimed in claim 14 is adjusted the method in loop, wherein when this voltage signal was a high state, then this signal comparison regulation device can be turned down this equivalence resistance value of this variable resistor device.
20. the frequency of active resistance capacitive filter as claimed in claim 14 is adjusted the method in loop, wherein when this voltage signal be one when hanging down state, then this signal comparison regulation device can be heightened this equivalence resistance value of this variable resistor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200410045287A CN100583628C (en) | 2004-06-04 | 2004-06-04 | Frequency regulating loop for active resistance-capacitance wave filter and method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200410045287A CN100583628C (en) | 2004-06-04 | 2004-06-04 | Frequency regulating loop for active resistance-capacitance wave filter and method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1707946A true CN1707946A (en) | 2005-12-14 |
| CN100583628C CN100583628C (en) | 2010-01-20 |
Family
ID=35581640
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200410045287A Expired - Fee Related CN100583628C (en) | 2004-06-04 | 2004-06-04 | Frequency regulating loop for active resistance-capacitance wave filter and method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100583628C (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101237235B (en) * | 2008-03-17 | 2010-07-14 | 威盛电子股份有限公司 | Circuit filter and lock phase circuit |
| CN101887280B (en) * | 2009-05-12 | 2013-05-15 | 联发科技股份有限公司 | Calibration apparatus and calibration method thereof |
| WO2019020056A1 (en) * | 2017-07-25 | 2019-01-31 | 深圳市中兴微电子技术有限公司 | Method and apparatus for correcting bandwidth of filter |
-
2004
- 2004-06-04 CN CN200410045287A patent/CN100583628C/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101237235B (en) * | 2008-03-17 | 2010-07-14 | 威盛电子股份有限公司 | Circuit filter and lock phase circuit |
| CN101887280B (en) * | 2009-05-12 | 2013-05-15 | 联发科技股份有限公司 | Calibration apparatus and calibration method thereof |
| WO2019020056A1 (en) * | 2017-07-25 | 2019-01-31 | 深圳市中兴微电子技术有限公司 | Method and apparatus for correcting bandwidth of filter |
| CN109302164A (en) * | 2017-07-25 | 2019-02-01 | 深圳市中兴微电子技术有限公司 | A kind of filter bandwidht calibration method and device |
| CN109302164B (en) * | 2017-07-25 | 2022-03-01 | 深圳市中兴微电子技术有限公司 | Filter bandwidth calibration method and device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100583628C (en) | 2010-01-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1020510C (en) | Current-source arrangement | |
| CN107807511A (en) | Calibration equipment and method, calibration equipment manufacture method and integrated circuitry construction method | |
| CN101030769B (en) | Triangle wave generating equipment with built-in capacitor | |
| CN101064474A (en) | Control circuit of power supply switch | |
| CN101030781A (en) | Sigma-delta fractional-n phase locked loop for reducing lock time and frequency error | |
| CN110429915A (en) | RC oscillating circuit | |
| CN1874148A (en) | Negative feedback circuit, as well as method and device for implementing impedance match of transmission line in chip by using the circuit | |
| CN107787093A (en) | Multipath LED constant current control module, drive circuit and control method | |
| CN101034914A (en) | Method and device for the RF performance temperature-self-adaptive compensation of the mobile communication terminal | |
| CN104779954A (en) | Successive approximation type analog-to-digital converter and error code detection based digital correction method thereof | |
| CN1860668A (en) | Multiplier-divider circuit for a PFC controller | |
| CN1675829A (en) | Voltage control oscillator having modulation function | |
| CN1017553B (en) | Measurement of capacitance and parameters related thereto | |
| CN1679234A (en) | Self calibration of continuous-time filters and systems comprising such filters | |
| CN1707946A (en) | Frquency regulating loop for active resistance-capacitance wave filter and method thereof | |
| CN110971236A (en) | Successive approximation type analog-to-digital converter and analog-to-digital conversion method | |
| CN1499727A (en) | Charge pump for lowering capacitance value needed by loop filter of phase locked loop | |
| CN1254119C (en) | Method for controlling multichannel, and circuit for carrying out same | |
| CN112350728B (en) | Successive approximation type analog-to-digital converter capable of reducing capacitance array and working method thereof | |
| CN115459769A (en) | Successive approximation analog-to-digital converter with segmented reference voltage | |
| CN1614895A (en) | AD converter | |
| CN1499631A (en) | Circuit for testing time constant of integrated resistance-capacitance product inside chip | |
| CN112397016B (en) | Line voltage compensation circuit and compensation method thereof | |
| CN112737582A (en) | DAC circuit with controllable differential output common-mode voltage in SAR-ADC and control method thereof | |
| CN1324808C (en) | Switched capacitor pipeline AD-converter |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100120 Termination date: 20190604 |