CN1702638A

CN1702638A - Method for improving serial data handling capacity of embedded systems

Info

Publication number: CN1702638A
Application number: CN 200510018875
Authority: CN
Inventors: 胡士毅; 唐运刚; 吴玲琦; 赵勋
Original assignee: Wuhan Hongxin Telecommunication Technologies Co Ltd
Current assignee: Wuhan Hongxin Telecommunication Technologies Co Ltd
Priority date: 2005-06-08
Filing date: 2005-06-08
Publication date: 2005-11-30

Abstract

This invention relates to a method for improving the ability of dealing serial data in embedding system, this method applies for serial DMA channel in serial device driving program, and distributes the DMA buffer in the physics apparatus inlay, when transmitting and receiving the agglomerate DMA data, the physics apparatus inlay and logic apparatus inlay exchange data by asynchronous read-write mechanism, the remains data that can't produce DMA intermit is disposed by timely detecting method in the timer intermit.

Description

A kind of method that improves serial data handling capacity of embedded systems

Technical field

The invention belongs to computing machine and areas of information technology, be specifically related to a kind of dma mode that in the serial device driver of embedded system, uses and substitute the method that interrupt mode improves serial data handling capacity.

Background technology

The serial device driver is a modal driver in the embedded system.In embedded system, microcontroller MCU is generally by interrupt mode and serial device swap data, when the serial device traffic rate is higher, the UART Universal Asynchronous Receiver Transmitter UART unit of MCU often designs the buffering that enough big first-in first-out unit F IFO is used for serial data, serial data is introduced into fifo queue, when the data of fifo queue reach some, produce the hardware interrupts request, make MCU change corresponding interrupt service routine over to.The benefit of doing like this is to reduce the number of times of MCU interrupt request, improves serial data handling capacity, and corresponding serial device driver is also fairly simple.

But the UART hardware FIFO inadequate resource of some low-cost MCU is also arranged, cause the time, use conventional interrupt mode can produce too frequent interrupt request, cause losing of serial data easily, can't satisfy system requirements with the high speed serialization devices communicating.The UART of this class MCU often has only by the DMA transmission channel could obtain higher traffic rate.

Summary of the invention

Purpose of the present invention is in order to overcome the defective that above-mentioned prior art exists, a kind of method that improves serial data handling capacity of embedded systems is provided, main in the serial device driver of embedded system, by adding support to direct memory access (DMA) DMA transmission mode, the raising serial data handling capacity satisfies those hardware FIFO inadequate resource but the embedded system of support serial D MA transmission is carried out the requirement of high-speed serial communication.

A kind of method that improves the serial data handling capacity of embedded system, this method is carried out according to the following steps: (1) registration timer in driving loading module interrupts, and the timer time interval T rationally is set; (2) nullifying timer in driving Unload module interrupts; (3) registration DMA interrupts in opening serial port module, and serial ports receives with sending and adopts different DMA passages respectively; (4) the DMA configuration register is set, determines source address, destination address and the transmission length of DMA transmission; For serial ports DMA read operation, source address is the data register of UART, and destination address is send buffer rcvbuf; For serial ports DMA write operation, source address is send buffer transbuf, and destination address is the data register of UART; (5) starting timer interruption and DMA interrupts; (6) in closing serial port module, stop timer and DMA and interrupt, nullify DMA then and interrupt; (7) add DMA transmitting-receiving Interrupt Process function, layers of physical devices and logical device layer use asynchronous read and write mechanism swap data, in order to improve the throughput that serial data is handled.When file system receives data from serial port, start serial D MA read operation earlier the data that read are write layers of physical devices buffering rcvbuf, again by the DMA interruption processing module with the copying data of rcvbuf buffer zone to the logical device layer, then file system can be when system be in a hurry from logical device layer reading of data in bulk asynchronously; When file system sent data to serial port, the data that will send write the buffering of writing of logical device layer earlier, copied partial data to layers of physical devices buffering transbuf by the DMA interruption processing module again, start serial D MA write operation data are sent; (8) add timer Interrupt Process function, finish the POLL method that regularly detects, the treatment scheme of this function as shown in Figure 3, DMA interrupts counting and upgrades in step 7, expression DMA receives and interrupts frequency, the current byte number of receiving by the DMA passage of DMA transmission counting expression, if regularly detecting the POLL method is behind the elapsed time T, DMA interrupts counting and DMA transmission counting does not all change, and DMA transmission counting is non-vanishing, be that serial port has data transmission, then carry out the processing of residual data, disposal route and step 7 are similar, earlier the copying data of layers of physical devices buffer zone are arrived the buffer zone of logical device layer, the notification logic mechanical floor interrupts DMA counting and the zero clearing of DMA transmission counting at last then.

The present invention is mainly in the serial device driver of embedded system, by adding support to direct memory access (DMA) DMA transmission mode, the raising serial data handling capacity satisfies those hardware FIFO inadequate resource but the embedded system of support serial D MA transmission is carried out the requirement of high-speed serial communication.

Description of drawings

Fig. 1 has described embedded system serial device Driven Architecture.

Fig. 2 has described the treatment scheme of interrupting based on the serial data transmitting-receiving of dma mode.

Fig. 3 has illustrated the method that regularly detects and handle DMA passage residual data.

Embodiment

In most of embedded OSs, the user finishes once the level that the read-write operation to serial device need relate to the application program of user's space and file system, logical device layer and the layers of physical devices of kernel spacing.Mutual relationship between the level as shown in Figure 1.The abstract property and the compatibility interface of various physical equipments wherein are provided with the closely-related logical device layer of layers of physical devices, do not relate to concrete ardware feature.The logical device layer has independently receives and dispatches buffer zone and related data structure.So the main task of device driver is to realize efficiently transmitting data in an orderly manner between the buffer zone of logical device layer and layers of physical devices.

A typical serial device driver based on interrupt mode should comprise at least with lower module: drive load/unload module, opening/closing serial port module, interruption processing module and serial data module for reading and writing.Serial data read-write of the present invention is based on dma mode.Dma mode and maximum different being of interrupt mode: data transmission becomes piece to carry out under dma mode, and the source address of data block, destination address and transmission length are pre-set, and transmission course does not need MCU to intervene.MCU only need be when each DMA end of transmission (EOT) handles data block and gets final product.

Reception for serial data, because the data of the serial device transmission just of source data generally, length is not the integral multiple of default DMA transmission length, and dma mode is to handle the data block of transmission length less than preset length, can in the DMA passage residual data appear, not data like this that handled by MCU.The present invention has adopted the method that regularly detects POLL for this situation, at set intervals active detecting and handle these residual data.

The send buffer rcvbuf of layers of physical devices and send buffer zone transbuf, its size must be moderate, can not be excessive can not be too small, otherwise all can bring negative effect to system performance, generally between 50 to 120, unit is a byte.

The present invention is described in detail below in conjunction with specific embodiments and the drawings:

Step 1: registration timer interrupts in driving loading module, and the timer time interval T rationally is set;

Step 2: in driving Unload module, nullify timer and interrupt;

Step 3: registration DMA interrupts in opening serial port module, and serial ports receives with sending and adopts different DMA passages respectively.

Step 4: the DMA configuration register is set, determines source address, destination address and the transmission length of DMA transmission.For serial ports DMA read operation, source address is the data register of UART, and destination address is for reading to cushion rcvbuf; For serial ports DMA write operation, source address is for writing buffering transbuf, and destination address is the data register of UART.

Step 5: start timer interruption and DMA and interrupt.

Step 6: in closing serial port module, stop timer and DMA and interrupt, nullify DMA then and interrupt.

Step 7: add DMA transmitting-receiving Interrupt Process function, the treatment scheme of this function as shown in Figure 2.Layers of physical devices and logical device layer use asynchronous read and write mechanism swap data, in order to improve the throughput that serial data is handled.When file system receives data from serial port, start serial D MA read operation earlier the data that read are write layers of physical devices buffering rcvbuf, again by the DMA interruption processing module with the copying data of rcvbuf buffer zone to the logical device layer, then file system can be when system be in a hurry from logical device layer reading of data in bulk asynchronously; When file system sent data to serial port, the data that will send write the buffering of writing of logical device layer earlier, copied partial data to layers of physical devices buffering transbuf by the DMA interruption processing module again, start serial D MA write operation data are sent.

Step 8: add timer Interrupt Process function, finish (POLL) method that regularly detects.The treatment scheme of this function as shown in Figure 3.DMA interrupts counting and upgrades in step 7, and expression DMA receives and interrupts frequency.The current byte number of receiving by the DMA passage of DMA transmission counting expression.If regularly detecting the POLL method is behind the elapsed time T, DMA interrupts counting and DMA transmission counting does not all change, and DMA transmission counting is non-vanishing, be that serial port has data transmission, then carry out the processing of residual data, disposal route and step 7 are similar, earlier the copying data of layers of physical devices buffer zone are arrived the buffer zone of logical device layer, the notification logic mechanical floor interrupts DMA counting and the zero clearing of DMA transmission counting at last then.

Claims

1, a kind of method that improves the serial data handling capacity of embedded system, this method is carried out according to the following steps: (1) registration timer in driving loading module interrupts, and the timer time interval T is set; (2) nullifying timer in driving Unload module interrupts; (3) registration DMA interrupts in opening serial port module, and serial ports receives with sending and adopts different DMA passages respectively; (4) the DMA configuration register is set, determines source address, destination address and the transmission length of DMA transmission; For serial ports DMA read operation, source address is the data register of UART, and destination address is send buffer rcvbuf; For serial ports DMA write operation, source address is send buffer transbuf, and destination address is the data register of UART; (5) starting timer interruption and DMA interrupts; (6) in closing serial port module, stop timer and DMA and interrupt, nullify DMA then and interrupt; (7) add DMA transmitting-receiving Interrupt Process function, layers of physical devices and logical device layer use asynchronous read and write mechanism swap data; (8) add timer Interrupt Process function, finish the POLL method that regularly detects, DMA interrupts counting and upgrades in step 7, the current byte number of receiving by the DMA passage of DMA transmission counting expression.

2, method according to claim 1, it is characterized in that: the asynchronous read and write mechanism that described logical device layer and layers of physical devices adopt is: when file system receives data from serial port, start serial direct memory visit DMA read operation earlier the data that read are write layers of physical devices send buffer rcvbuf, again by the DMA interruption processing module with the copying data of rcvbuf buffer zone to the logical device layer, then file system can be when system be in a hurry from logical device layer reading of data in bulk asynchronously; When file system sends data to serial port, the data that will send write the buffering of writing of logical device layer earlier, copy partial data to layers of physical devices by the DMA interruption processing module again and send buffer zone transbuf, start serial D MA write operation data are sent.

3, method according to claim 1, it is characterized in that: the timing detection method of described processing DMA passage residual data is: if behind the elapsed time T, DMA interrupts counting and DMA transmission counting does not all change, and DMA transmission counting is non-vanishing, be that serial port has data transmission, then carry out the processing of residual data, disposal route is earlier the copying data of layers of physical devices buffer zone to be arrived the buffer zone of logical device layer, the notification logic mechanical floor interrupts DMA counting and the zero clearing of DMA transmission counting at last then.