CN1693956A - Display panel - Google Patents

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Publication number
CN1693956A
CN1693956A CN 200510079543 CN200510079543A CN1693956A CN 1693956 A CN1693956 A CN 1693956A CN 200510079543 CN200510079543 CN 200510079543 CN 200510079543 A CN200510079543 A CN 200510079543A CN 1693956 A CN1693956 A CN 1693956A
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China
Prior art keywords
common electrode
wire
electrode wire
coupled
voltage input
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CN 200510079543
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CN100361001C (en
Inventor
赖明升
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AU Optronics Corp
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AU Optronics Corp
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Abstract

A display panel that includes the first signal line, the second signal line, the first test line, the second test line, the static electricity discharge protecting circuit, the first common pole line and the second common pole line. The first test is connected to the first signal line, and the second test line is connected to the second signal line. The static electricity discharge protecting circuit is connected to the first signal line or the second signal line. The first common pole line is linked with the first voltage importation port. Moreover, the first signal line is connected to the first common pole line through the static electricity discharge protecting circuit. The second common pole line is linked with the second voltage importation port. Moreover, the second signal line is connected to the second common pole line through the static electricity discharge protecting circuit.

Description

Display panel
Technical field
The present invention relates to a kind of display panels, particularly relate to a kind of display panels with test circuit.
Background technology
Fig. 1 represents that available liquid crystal shows (liquid crystal display, LCD) the array of display synoptic diagram of panel.As shown in the figure, array of display 1 is to be configured on the glass substrate, and is by parallel crisscross data line D at least in twos 1To D mAnd scanning linear G 1To G nForm the data line that each is staggered and scanning linear definition a display unit, for example data line D 1With scanning linear G 1Definition display unit 100.As shown in the figure, the equivalent electrical circuit of display unit 100 (other display unit is also identical) is to comprise switching transistor TFT, memory capacitance Cs, and liquid crystal capacitance Clc.The grid of switching transistor TFT couples sweep trace G 1, its drain electrode couples data line D 1, and its source electrode couples pixel electrode PE.
When array of display finish be configured on the glass substrate after, whole glass substrate will need through by test procedure, and then detect the whether short circuit or the damage of data line and sweep trace.For reaching this purpose, United States Patent (USP) the 6th, 566,902 disclose a kind of liquid crystal indicator, and in order to the test signal line, as shown in Figure 2, it has a plurality of data line DL, odd number p-wire ODDL and even number p-wire EDDL.Odd number p-wire ODDL couples the data line DL of odd number by FPDP 2, and even number p-wire EDDL couples data lines of even number DL by FPDP 2.This liquid crystal indicator provides two common electrode wire CLa and CLb, is to cross over data line DL and dispose.This also crystal device a plurality of static discharge (eletrostaticdischarge more are provided; ESD) holding circuit 12; each esd protection circuit 12 is coupled between the data line DL and common electrode wire CLa of odd number, and is coupled between data lines of even number DL and the common electrode wire CLb.In addition, liquid crystal indicator more provides at least two auxiliary esd protection circuits 14, and it is serially connected between common electrode wire CLa and the CLb.In this prior art, be to provide voltage to common electrode wire CLa and CLb with a common electric voltage source Vcom.When carrying out test procedure, test signal provides to odd number p-wire ODDL and even number p-wire EDDL, and provide respectively to odd number and data lines of even number DL, with whether short circuit or damage, for example short circuit between two data line DL of test data line.Similarly, identical test structure also is applicable to sweep trace GL.
Yet; in this prior art; because data line DL is coupled to common electrode wire CLa or CLb by esd protection circuit 12; and common electrode wire CLa and CLb are coupled to same common electric voltage source Vcom jointly by auxiliary esd protection circuit 14 again; make in test procedure, provide to the test signal of odd number p-wire ODDL and even number p-wire EDDL and can interfere with each other.Therefore, according to this prior art, the test of signal wire then can't accurately be carried out.
Summary of the invention
In view of this; in order to address the above problem; fundamental purpose of the present invention is to provide a kind of display panel, and it comprises a plurality of first signal wires, a plurality of secondary signal line, first p-wire, second p-wire, a plurality of ESD protection circuit, first common electrode wire and second common electrode wire.Each the secondary signal line and first signal wire are interconnected.The first p-wire coupled with first signal line, and second p-wire couples the secondary signal line.Each ESD protection circuit couples one of one of a plurality of first signal wires person or a plurality of secondary signal lines person.First common electrode wire couples the first voltage input end mouth, and wherein, each first signal wire is coupled to first common electrode wire by the ESD protection circuit of correspondence.Second common electrode wire couples the second voltage input end mouth, and wherein, each secondary signal line is coupled to second common electrode wire by the ESD protection circuit of correspondence.
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Fig. 1 represents the array of display synoptic diagram of existing LCD panel
Fig. 2 represents existing liquid crystal indicator in order to the test signal line.
Fig. 3 and 4 expressions are according to the display panel of first embodiment of the invention.
Fig. 5 represents the display panel according to second embodiment of the invention.
Symbol description:
1～array of display; 100～display unit; Clc～liquid crystal capacitance; Cs～memory capacitance;
D 1... D m～data line; G 1... G n～scanning linear; PE～pixel electrode; TFT～switching transistor;
2～FPDP, 12～esd protection circuit; 14～auxiliary esd protection circuit;
CLa, CLb～common electrode wire; DL～data line; EDDL～even number p-wire;
GL～sweep trace; ODDL～odd number p-wire; Vcom～common electric voltage source;
3～display panel; 30,32～test circuit; 31～array of display;
301,303～esd protection circuit; 302～FPDP; 304～scanning port;
CL 1, CL 2, CL 3, CL 4～common electrode wire; D 1... D 2x～data line;
EDDL 1, EDDL 2～even number p-wire; ODDL 1, ODDL 2～odd number p-wire;
PV 1, PV 2, PV 3, PV 4～common electric voltage input port; R 1, R 2, R 3, R 4～high impedance assembly;
S 1... S 2y～scanning linear; 5～display panel; 50～test circuit; 51～array of display;
501～esd protection circuit; 502～FPDP; CL R, CL G, CL B～common electrode wire;
D 1... D 3x～data line; RDDL～red test line; GDDL～green p-wire;
BDDL～blue p-wire; PV R, PV G, PV B～common electric voltage input port;
S 1... S 2y～scanning linear;
Embodiment
First embodiment:
Fig. 3 is the display panel 3 of expression according to first embodiment of the invention, and display panel 3 comprises test circuit 30 and array of display 31, and wherein, test circuit 30 and array of display 31 are configured on the glass substrate.Because the array of display 31 of Fig. 3 is identical with the array of display 1 of Fig. 1, therefore, for convenience of description, identical assembly is represented with identical numbering, and is omitted at this about the explanation of array of display 31.In this embodiment, suppose that array of display 31 is by crisscross a plurality of data line D 1To D 2xAnd scanning linear S 1To S 2yForm.In first embodiment, data line D 1To D 2xDivide into two groups, one group is the data line D of odd number 1To D 2x-1, and another group is data lines of even number D 2To D 2xTest circuit 30 comprises odd number p-wire ODDL 1, even number p-wire EDDL 1, a plurality of static discharges (eletrostaticdischarge, ESD) holding circuit 301 and a plurality of FPDP 302.The data line D of odd number 1To D 2x-1FPDP 302 by correspondence is coupled to odd number p-wire ODDL 1, and data lines of even number D 2To D 2xFPDP 302 by correspondence is coupled to even number p-wire EDDL 1
Each esd protection circuit 301 is coupled to the data line D of odd number 1To D 2x-1With common electrode wire CL 1Between or be coupled to data lines of even number D 2To D 2xWith common electrode wire CL 2Between.It should be noted that common electrode wire CL 1With CL 2Be to be coupled to different common electric voltage input port, as shown in Figure 3, common electrode wire CL 1Be to be coupled to common electric voltage input port PV 1, and common electrode wire CL 2Be to be coupled to common electric voltage input port PV 2
In the present embodiment, common electrode wire CL 1With common electric voltage input port PV 1Between can have high impedance assembly R 1, and common electrode wire CL 2With common electric voltage input port PV 2Between can have high impedance assembly R 2
Since on glass substrate, common electric voltage input port PV 1With PV 2Be different both, promptly on glass substrate, common electric voltage input port PV 1With PV 2Do not couple each other, therefore, when carrying out test procedure, provide data line D to odd number 1To D 2x-1And data lines of even number D 2To D 2xTest signal separately can the phase mutual interference.
Consult Fig. 4, display panel 3 more comprises test circuit 32, in order to test scanning linear S 1To S 2yFor convenience of description, Fig. 4 only represents test circuit 32 and array of display 31, and test circuit 30 omits in Fig. 4.Consult Fig. 4, in first embodiment, scanning linear S 1To S 2yDivide into two groups, one group is the scanning linear S of odd number 1To S 2y-1, and another group is the scanning linear S of even number 2To S 2yTest circuit 32 comprises odd number p-wire ODDL 2, even number p-wire EDDL 2, a plurality of esd protection circuits 303 and a plurality of scanning port 304.The scanning linear S of odd number 1To S 2y-1The port 304 that scans by correspondence is coupled to odd number p-wire ODDL 2, and the scanning linear S of even number 2To S 2yThe port 304 that scans by correspondence is coupled to even number p-wire EDDL 2
Each esd protection circuit 303 is coupled to the scanning linear S of odd number 1To S 2y-1With common electrode wire CL 3Between or be coupled to the scanning linear S of even number 2To S 2yWith common electrode wire CL 4Between.It should be noted that common electrode wire CL 3With CL 4Be to be coupled to different common electric voltage input port, as shown in Figure 4, common electrode wire CL 3Be to be coupled to common electric voltage input port PV 3, and common electrode wire CL 4Be to be coupled to common electric voltage input port PV 4
In the present embodiment, common electrode wire CL 3With common electric voltage input port PV 3Between can have high impedance assembly R 3, and common electrode wire CL 4With common electric voltage input port PV 4Between can have high impedance assembly R 4
Since on glass substrate, common electric voltage input port PV 3With PV 4Be different both, promptly on glass substrate, common electric voltage input port PV 3With PV 4Do not couple each other, therefore, when carrying out test procedure, provide scanning linear S to odd number 1To S 2y-1And the scanning linear S of even number 2To S 2yTest signal separately can the phase mutual interference.
Second embodiment:
Fig. 5 is the display panel 5 of expression according to second embodiment of the invention, and display panel 5 comprises test circuit 50 and array of display 51, and wherein, test circuit 50 and array of display 51 are configured on the glass substrate.Because the array of display 51 of Fig. 5 is identical with the array of display 1 of Fig. 1, therefore, for convenience of description, identical assembly is represented with identical numbering, and is omitted at this about the explanation of array of display 51.In this embodiment, suppose that array of display 51 is by crisscross a plurality of data line D 1To D 3xAnd scanning linear S 1To S 2yForm.According to red (R), green (G), blue (B) three-primary colours, data line D 1To D 3xDivide into three groups, one group is red data line D 1To D 3x-2, one group is green data line D 2To D 3x-1, and another group is blue data line D 3To D 3xTest circuit 50 comprises red test line RDDL, green p-wire GDDL, blue p-wire BDDL, a plurality of esd protection circuit 501 and a plurality of FPDP 502.Red data line D 1To D 3x-2FPDP 502 by correspondence is coupled to red test line RDDL, green data line D 2To D 3x-1FPDP 502 by correspondence is coupled to green p-wire GDDL, and blue data line D 3To D 3xFPDP 502 by correspondence is coupled to blue p-wire BDDL.
Each esd protection circuit 501 is coupled to red data line D 1To D 3x-2With common electrode wire CL RBetween, be coupled to green data line D 2To D 3x-1With common electrode wire CL GBetween or be coupled to blue data line D 3To D 3xWith common electrode wire CL BBetween.It should be noted that common electrode wire CL R, CL G, and CL BBe to be coupled to different common electric voltage input port, as shown in Figure 5, common electrode wire CL RBe to be coupled to common electric voltage input port PV R, common electrode wire CL GBe to be coupled to common electric voltage input port PV G, and common electrode wire CL BBe to be coupled to common electric voltage input port PV B
In the present embodiment, can have a high impedance assembly R between each common electrode wire common electric voltage input port corresponding with it.
Since on glass substrate, common electric voltage input port PV R, PV G, and PV BDifferent each other, promptly on glass substrate, common electric voltage input port PV R, PV G, and PV BDo not couple each other, therefore, when carrying out test procedure, provide to red data line D 1To D 3x-2, green data line D 2To D 3x-1, and blue data line D 3To D 3xTest signal separately can the phase mutual interference.
In a second embodiment, be applicable to sweep trace S 1To S 2yTest circuit identical with the test circuit 32 of Fig. 4, therefore, about sweep trace S 1To S 2yAnd the annexation between its test circuit sees also Fig. 4 explanation of first embodiment, is omitted at this.
In sum, according to the demand of system, signal wire (data line or sweep trace) can be divided into a plurality of groups and test respectively, and the signal wire of each group is to be coupled to a common electrode line.Because on glass substrate, a plurality of common electrode wire are to be coupled to different common electric voltage input port respectively, therefore a plurality of common electrode wire do not couple each other, make that the test signal on the signal wire can not influence each other when the test signal line.In addition, in the present invention, a plurality of common electric voltage input ports do not connect on glass substrate each other, and can printed circuit board (PCB) (print circuit board, PCB) or soft printed circuit board (flexible print circuit is connected on FPC).
Though the present invention discloses as above with preferred embodiment; so it is not in order to limit scope of the present invention; anyly have the knack of this skill person; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking accompanying the claim person of defining.

Claims (7)

1. display panel comprises:
A plurality of first signal wires;
A plurality of secondary signal lines, interconnected with described first signal wire;
One first p-wire couples described first signal wire;
One second p-wire couples described secondary signal line;
A plurality of ESD protection circuits, each this ESD protection circuit couples one of one of described first signal wire person or described secondary signal line person;
One first common electrode wire couples one first voltage input end mouth, and wherein, each this first signal wire is coupled to this first common electrode wire by this ESD protection circuit of correspondence; And
One second common electrode wire couples one second voltage input end mouth, and wherein, each this secondary signal line is coupled to this second common electrode wire by this ESD protection circuit of correspondence.
2. display panel as claimed in claim 1 more comprises:
One first impedance component is coupled between this first common electrode wire and this first voltage input end mouth; And
One second impedance component is coupled between this second common electrode wire and this second voltage input end mouth.
3. display panel as claimed in claim 1, wherein, described first and second signal wire is a plurality of data lines or a plurality of scanning linear.
4. display panel comprises:
One first, second, and the 3rd data line, configuration in regular turn;
One first p-wire couples this first data line;
One second p-wire couples this second data line;
One the 3rd p-wire couples the 3rd data line;
A plurality of first ESD protection circuits, each this first ESD protection circuit couples this first data line, this second data line, or the 3rd data line;
One first common electrode wire couples one first voltage input end mouth, and wherein, this first data line is coupled to this first common electrode wire by this first ESD protection circuit of correspondence;
One second common electrode wire couples one second voltage input end mouth, and wherein, this second data line is coupled to this second common electrode wire by this first ESD protection circuit of correspondence;
One the 3rd common electrode wire couples a tertiary voltage input port, and wherein, the 3rd data line is coupled to the 3rd common electrode wire by this first ESD protection circuit of correspondence.
5. display panel as claimed in claim 4 more comprises:
One first impedance component is coupled between this first common electrode wire and this first voltage input end mouth;
One second impedance component is coupled between this second common electrode wire and this second voltage input end mouth; And
One the 3rd impedance component is coupled between the 3rd common electrode wire and this tertiary voltage input port.
6. display panel as claimed in claim 4 more comprises:
One first and second sweep trace;
One the 4th p-wire couples this first sweep trace;
One the 5th p-wire couples this second sweep trace;
A plurality of second ESD protection circuits, each this second ESD protection circuit couples this first sweep trace or this second sweep trace;
One the 4th common electrode wire couples one the 4th voltage input end mouth, and wherein, this first sweep trace is coupled to the 4th common electrode wire by this second ESD protection circuit of correspondence; And
One the 5th common electrode wire couples one the 5th voltage input end mouth, and wherein, this second sweep trace is coupled to the 5th common electrode wire by this second ESD protection circuit of correspondence.
7. display panel as claimed in claim 6 more comprises:
One the 4th impedance component is coupled between the 4th common electrode wire and the 4th voltage input end mouth; And
One the 5th impedance component is coupled between the 5th common electrode wire and the 5th voltage input end mouth.
CNB2005100795438A 2005-06-23 2005-06-23 Display panel Expired - Fee Related CN100361001C (en)

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CN100361001C CN100361001C (en) 2008-01-09

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7773164B2 (en) 2007-08-14 2010-08-10 Chunghwa Picture Tubes, Ltd. Active device array substrate
CN102236179A (en) * 2010-05-07 2011-11-09 北京京东方光电科技有限公司 Thin film transistor-liquid crystal display (TFT-LCD) array substrate and manufacturing method thereof
CN105070239A (en) * 2015-08-27 2015-11-18 武汉华星光电技术有限公司 Liquid crystal display panel
CN105446537A (en) * 2015-12-31 2016-03-30 厦门天马微电子有限公司 Detection circuit and detection method for touch control display panel and touch control display panel
CN105513517A (en) * 2015-11-23 2016-04-20 友达光电股份有限公司 Display capable of adjusting driving signal and adjusting method thereof
CN107577071A (en) * 2017-09-20 2018-01-12 京东方科技集团股份有限公司 A kind of display panel and liquid crystal display

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3718355B2 (en) * 1998-11-26 2005-11-24 株式会社 日立ディスプレイズ Liquid crystal display device
KR100353955B1 (en) * 2000-12-20 2002-09-28 엘지.필립스 엘시디 주식회사 Liquid Crystal Display for Examination of Signal Line
US7129923B2 (en) * 2003-06-25 2006-10-31 Chi Mei Optoelectronics Corporation Active matrix display device

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7773164B2 (en) 2007-08-14 2010-08-10 Chunghwa Picture Tubes, Ltd. Active device array substrate
US9366928B2 (en) 2010-05-07 2016-06-14 Boe Technology Group Co., Ltd. TFT-LCD array substrate and manufacturing method thereof
CN102236179A (en) * 2010-05-07 2011-11-09 北京京东方光电科技有限公司 Thin film transistor-liquid crystal display (TFT-LCD) array substrate and manufacturing method thereof
CN102236179B (en) * 2010-05-07 2014-03-19 北京京东方光电科技有限公司 Thin film transistor-liquid crystal display (TFT-LCD) array substrate and manufacturing method thereof
US8928826B2 (en) 2010-05-07 2015-01-06 Beijing Boe Optoelectronics Technology Co., Ltd. TFT-LCD array substrate and manufacturing method thereof
CN105070239A (en) * 2015-08-27 2015-11-18 武汉华星光电技术有限公司 Liquid crystal display panel
CN105070239B (en) * 2015-08-27 2018-10-16 武汉华星光电技术有限公司 A kind of liquid crystal display panel
CN105513517A (en) * 2015-11-23 2016-04-20 友达光电股份有限公司 Display capable of adjusting driving signal and adjusting method thereof
TWI576804B (en) * 2015-11-23 2017-04-01 友達光電股份有限公司 Driving signal modifiable displayer and modifying method thereof
CN105513517B (en) * 2015-11-23 2018-09-04 友达光电股份有限公司 Display capable of adjusting driving signal and adjusting method thereof
CN105446537B (en) * 2015-12-31 2018-07-13 厦门天马微电子有限公司 The detection circuit and detection method of touch-control display panel, touch-control display panel
CN105446537A (en) * 2015-12-31 2016-03-30 厦门天马微电子有限公司 Detection circuit and detection method for touch control display panel and touch control display panel
CN107577071A (en) * 2017-09-20 2018-01-12 京东方科技集团股份有限公司 A kind of display panel and liquid crystal display
CN107577071B (en) * 2017-09-20 2020-06-05 京东方科技集团股份有限公司 Display panel and liquid crystal display device

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