CN1667603A - Method of configuring information processing system and semiconductor integrated circuit - Google Patents

Method of configuring information processing system and semiconductor integrated circuit Download PDF

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Publication number
CN1667603A
CN1667603A CNA2005100537741A CN200510053774A CN1667603A CN 1667603 A CN1667603 A CN 1667603A CN A2005100537741 A CNA2005100537741 A CN A2005100537741A CN 200510053774 A CN200510053774 A CN 200510053774A CN 1667603 A CN1667603 A CN 1667603A
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parameter
data dependence
similarity
continuity
fpga
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CNA2005100537741A
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CN100432981C (en
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罔林和宏
罔本稔
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]

Abstract

A method of configuring an information processing system according to the present invention, in an information processing system for realizing one or a plurality of applications, comprises, a step of modeling all of the applications for each certain process level and inputting the models, a step of inputting parameters representing invariability for the inputted models, a step of using the models of the applications and the parameters representing invariability as inputted information and comparing the parameters representing invariability to a boundary condition, and a step of allocating one of the application models to programmable logic and another of the application models to an exclusive-use hardware based on a result of the comparison.

Description

The method of configuring information handling system and SIC (semiconductor integrated circuit)
Technical field
The present invention relates to a kind of information handling system, this information handling system uses the FPGA (Field Programmable Gate Array) that can reconfigure SIC (semiconductor integrated circuit) after SIC (semiconductor integrated circuit) is manufactured to realize using, more specifically, relate to the method that configuration comprises the information handling system of FPGA (Field Programmable Gate Array), also relate to the SIC (semiconductor integrated circuit) of the method for application configuration information disposal system.
Background technology
In handling different types of digital signal, use different types of SIC (semiconductor integrated circuit), for example microcomputer, digital signal processor (DSP), special IC (ASIC), memory element (storer) etc.In recent years, can be after SIC (semiconductor integrated circuit) be manufactured FPGA (Field Programmable Gate Array), the reconfigurable logic that can after circuit is manufactured, change the FPGA (Field Programmable Gate Array) of circuit structure, the particularly change of executive circuit structure at high speed without restriction by the routine change process arouse attention.
In reconfigurable logic, under the situation that changes technical standard or standard or in SIC (semiconductor integrated circuit), have problems, can change circuit structure without restriction, so just do not need the additional manufacturing of circuit.The application of reconfigurable logic can help to reduce to research and develop the duration of needs and the manufacturing cost of SIC (semiconductor integrated circuit).
As illustrated in fig. 1 and 2, suppose part that a plurality of circuit are all shared, with the part that constitutes by the regional nonoverlapping non-special-purpose independent circuits that does not wherein comprise public part on the circuit and forming circuit, jointly be called aforementioned basic circuit, repeat following steps: the first step of pre-configured aforementioned basic circuit on Programmable Logic Device, with based on the circuit information of representing difference between a plurality of circuit and the aforementioned basic circuit, partly reconfigure a plurality of circuit, and on Programmable Logic Device, produce second step of necessary function circuit thus.
But, to compare with any specialized hardware, FPGA (Field Programmable Gate Array) consumes big area and a large amount of power usually.But less and have under the situation of many non-special-purpose independent circuits in the shared portion on the circuit, the circuit region that can freely change and use is very limited.Therefore, the area utilization ratio of integrated circuit is poor, and has increased circuit size thus, can increase the manufacturing cost of Programmable Logic Device so unfriendly.
Summary of the invention
A kind of in the information handling system that is used for realizing one or more application, the method for configuring information handling system according to the present invention comprises:
Set up the step of all application models and input model for each process level of determining;
The step of representing the parameter of unchangeability for the model input of being imported;
The parameter of using application model and expression unchangeability is as input information, and will represent the step that the parameter of unchangeability is compared with boundary condition; With
Result based on the comparison, output is distributed to FPGA (Field Programmable Gate Array) with a part of application model and another part application model is distributed to the step of the information of specialized hardware.
SIC (semiconductor integrated circuit) corresponding to the method for above-mentioned configuring information handling system is made of following circuit part: be used for realizing that by FPGA (Field Programmable Gate Array) the parameter of expression unchangeability is the circuit part of low process and is used for realizing that by specialized hardware the parameter of expression unchangeability is the circuit part of high process.
According to said structure, be judged to do constitute the initial conditions of each module of application corresponding to the parameter of the expression unchangeability of associated process, the parameter of expression unchangeability is that high module does not need to change, and is assigned to special circuit in view of the above.In this way, can realize the circuit area of minimum dimension.On the contrary, this parameter is that the high module of necessity low and that change is assigned to FPGA (Field Programmable Gate Array) (microcomputer, DSP, reconfigurable LSI etc.).Thus, can handle change neatly by rewriting program.As a result, owing to reduce circuit size and the increase of the area utilization ratio of realization thus, can cut down the manufacturing cost of FPGA (Field Programmable Gate Array).
From following detailed description of preferred embodiment, will understand other purpose of the present invention and advantage, and can understand these preferred embodiments with reference to the accompanying drawings more thoroughly.
Description of drawings
Fig. 1 is explanation reconfigures the method for Programmable Logic Device according to routine techniques a instance graph.
Fig. 2 is the process flow diagram of explanation according to the operation of routine techniques.
Fig. 3 is the process flow diagram of explanation according to the method for embodiments of the invention 1 configuring information handling system.
Fig. 4 is the block diagram according to the application model of embodiment 1.
Fig. 5 is the block diagram that comprises the file of continuity parameter according to embodiment 1.
Fig. 6 is the process flow diagram of explanation according to the method for embodiments of the invention 2 configuring information handling systems.
Fig. 7 is the block diagram according to the application model of embodiment 2.
Fig. 8 is the block diagram that comprises the file of data dependence parameter according to embodiment 2.
Fig. 9 is the process flow diagram of explanation according to the method for embodiments of the invention 3 configuring information handling systems.
Figure 10 A and 10B are the block diagrams according to the application model of embodiment 3.
Figure 11 is the block diagram that comprises the file of similarity parameter according to embodiment 3.
Figure 12 is the process flow diagram of explanation according to the method for embodiments of the invention 4 configuring information handling systems.
Figure 13 is the block diagram that comprises the file of each continuity parameter and data dependence parameter according to embodiment 4.
Figure 14 is the file block diagram that comprises data dependence and successional weighted value according to embodiment 4.
Figure 15 shows the chart of the allocation result of each module that obtains among the embodiment 4.
Figure 16 is the process flow diagram of explanation according to the method for embodiments of the invention 5 configuring information handling systems.
Figure 17 is the block diagram that comprises the file of each continuity parameter and similarity parameter according to embodiment 5.
Figure 18 is the block diagram of file that comprises the weighted value of continuity and similarity according to embodiment 5.
Figure 19 shows the chart of the allocation result of each module that obtains among the embodiment 5.
Figure 20 is the process flow diagram of explanation according to the method for embodiments of the invention 6 configuring information handling systems.
Figure 21 is the block diagram that comprises the file of each data dependence parameter and similarity parameter according to embodiment 6.
Figure 22 is the block diagram of file that comprises the weighted value of data dependence and similarity according to embodiment 6.
Figure 23 shows the chart of the allocation result of each module that obtains among the embodiment 6.
Figure 24 is the process flow diagram of explanation according to the method for embodiments of the invention 7 configuring information handling systems.
Figure 25 is the block diagram that comprises the file of each continuity parameter, data dependence parameter and similarity parameter according to embodiment 7.
Figure 26 is the block diagram of file that comprises the weighted value of continuity, data dependence and similarity according to embodiment 7.
Figure 27 shows the chart of the allocation result of each module that obtains among the embodiment 7.
Figure 28 is the process flow diagram of explanation according to the method for embodiments of the invention 8 configuring information handling systems.
Figure 29 is the block diagram that comprises the file of continuity parameter according to embodiment 8.
Figure 30 is the block diagram that comprises the file of data dependence parameter according to embodiment 8.
Figure 31 is the block diagram that comprises the file of similarity parameter according to embodiment 8.
Figure 32 shows the chart of the allocation result of each module of the continuity parameter of acquisition among the embodiment 8.
Figure 33 shows each module assignment result's of the data dependence parameter that obtains among the embodiment 8 chart.
Figure 34 shows the chart of the allocation result of each module of the similarity parameter of acquisition among the embodiment 8.
Figure 35 is the process flow diagram of explanation according to the method for embodiments of the invention 9 configuring information handling systems.
Figure 36 A and 36B are the block diagrams that comprises the file of each continuity parameter, data dependence parameter and similar parameter according to embodiment 9.
Figure 37 is the block diagram of file that comprises the weighted value of continuity, data dependence and similarity according to embodiment 9.
Figure 38 shows the chart of the allocation result of each module that obtains among the embodiment 9.
Figure 39 is the process flow diagram of explanation according to the method for embodiments of the invention 10 configuring information handling systems.
Figure 40 A, 40B and 40C are the block diagrams that comprises the file of each continuity parameter, data dependence parameter and similar parameter according to embodiment 10.
Figure 41 shows the chart of the allocation result of each module that obtains among the embodiment 10.
Figure 42 is the process flow diagram of explanation according to the method for embodiments of the invention 11 configuring information handling systems.
Figure 43 A, 43B and 43C are the block diagrams that comprises the file of each continuity parameter, data dependence parameter and similar parameter according to embodiment 11.
Figure 44 shows the chart of the allocation result of each module that obtains among the embodiment 11.
Figure 45 is the process flow diagram of explanation according to the method for embodiments of the invention 12 configuring information handling systems.
Embodiment
With reference to the preceding method of configuring information handling system according to the present invention, the unchangeability scope during parametric representation changes, its example comprises continuity parameter, data dependence parameter, similarity parameter etc. and combination thereof.Continuity parameter and similarity parametric representation are according to the same trend of its size dependence, and these parameters are also represented the opposite trend about the data dependence parameter simultaneously.Below, the present invention is more specifically described in a different manner.
A kind of first method in the information handling system configuration first information disposal system that is being used for realizing one or more application comprises:
Set up the step of all application models and input model for each process level of determining;
Import the step of continuity parameter for the model of being imported;
Use application model and continuity parameter as input information and step that the continuity parameter is compared with boundary condition; And
Result based on the comparison, output is distributed to FPGA (Field Programmable Gate Array) with a part of application model and another part application model is distributed to the step of the information of specialized hardware.
Whether the continuity parameter is once need to represent change process or needs often to change the designator of process backward.
A kind of SIC (semiconductor integrated circuit) of first method corresponding to configuring information handling system is made of following circuit part: be used for realizing that by FPGA (Field Programmable Gate Array) the continuity parameter is the circuit part of low process and is used for realizing that by specialized hardware the continuity parameter is the circuit part of high process.
According to said structure, be judged to do constitute the initial conditions of each module of application corresponding to the continuity parameter of associated process, then, give special circuit based on the module assignment that this judgement will not need to change.In this way, can realize the circuit area of minimum dimension.On the contrary, give FPGA (Field Programmable Gate Array) with the high module assignment of necessity that changes.Thus, can handle change neatly by rewriting program.As a result, by the manufacturing cost that reduces to cut down FPGA (Field Programmable Gate Array) of circuit size, and increase the area utilization ratio thus.
A kind of second method at the information handling system configuring information handling system that is used for realizing one or more application comprises:
Set up the step of all application models and input model for each process level of determining;
Import the step of data dependence parameter for the model of being imported;
Use application model and data dependence parameter as input information and step that the data dependence parameter is compared with boundary condition; And
Result based on the comparison, output is distributed to FPGA (Field Programmable Gate Array) with a part of application model and another part application model is distributed to the step of the information of specialized hardware.
The data dependence parameter is whether the pending data volume of expression is designator constant or that change.
SIC (semiconductor integrated circuit) corresponding to second method of configuring information handling system is made of following circuit part: be used for realizing that by FPGA (Field Programmable Gate Array) the data dependence parameter is the circuit part of high process, be used for realizing that by specialized hardware the data dependence parameter is the circuit part of low process.
According to said structure, be judged to do constitute the initial conditions of each module of application corresponding to the data dependence parameter of associated process, the module assignment that pending data volume is constant is given special circuit.In this way, can be implemented in the circuit of less power consumption in the minimum area size.On the contrary, pending data volume is variable to heavens module assignment is given FPGA (Field Programmable Gate Array).Thus,, optimize the structure of Programmable Logic Device, just can handle this change neatly by rewriting program only according to data volume.Realize comprising any process of data dependence by FPGA (Field Programmable Gate Array), and realize comprising any process of no datat correlativity,, and can cut down manufacturing cost thus so that minimize the area of SIC (semiconductor integrated circuit) by specialized hardware.In addition, because can handle frequency and can cut down power consumption so can reduce according to the process configuration optimum circuit.
A kind of third party's method at the information handling system configuring information handling system that is used for realizing one or more application comprises:
Set up the step of all application models and input model for each the carrying out of determining level;
Import the step of similarity parameter for the model of being imported;
Use application model and similarity parameter as input information and step that the similarity parameter is compared with boundary condition; And
Result based on the comparison, output is distributed to FPGA (Field Programmable Gate Array) with a part of application model and another part application model is distributed to the step of the information of specialized hardware.
The similarity parameter is to be illustrated in the designator whether similar process is arranged in the module.
SIC (semiconductor integrated circuit) corresponding to third party's method of configuring information handling system is made of following circuit part: be used for realizing that by FPGA (Field Programmable Gate Array) the similarity parameter is the circuit part of low process and is used for realizing that by specialized hardware the similarity parameter is the circuit part of high process.
According to said structure, be judged to do constitute the initial conditions of each module of application corresponding to the similarity parameter of associated process, will comprise that the module assignment of similar process is given special circuit.In this way, the circuit that can realize reducing power consumption and realize the minimum area size.On the contrary, give FPGA (Field Programmable Gate Array) with the low module assignment of similarity that detects.Thus, the structure by rewriting program is only optimized Programmable Logic Device can realize the flexible response of the process that changes.Realize sharable module by special circuit, and realize sharable hardly module,, and can cut down manufacturing cost thus so that can minimize the area of SIC (semiconductor integrated circuit) by FPGA (Field Programmable Gate Array).
A kind of cubic method at the information handling system configuring information handling system that is used for realizing one or more application comprises:
Set up the step of all application models and input model for each process level of determining;
Import the step of continuity parameter and data dependence parameter for the model of being imported.
Make the step of each continuity parameter and data dependence parameter weighting;
Comparison/selection is as the step of application model, continuity parameter, data dependence parameter and the weighted value separately thereof of input information; And
Result based on the comparison, output is distributed to FPGA (Field Programmable Gate Array) with a part of application model and another part application model is distributed to the step of the information of specialized hardware.
According to said structure, the continuity parameter and the data dependence parameter that are used for each module are judged to do initial conditions, after this do not need to change and module with low data dependence is assigned to special circuit.In this way, can the minimization circuit area.On the contrary, the high and module that have a high data dependence of the necessity of change is assigned to FPGA (Field Programmable Gate Array).Thus, can handle this change neatly by rewriteeing this program.As a result, can dwindle the size of Programmable Logic Device, and can realize the more high-level efficiency that area utilizes, can cause the manufacturing cost reduction like this.
A kind of the 5th method at the information handling system configuring information handling system that is used for realizing one or more application comprises:
Set up the step of all application models and input model for each the carrying out of determining level;
Import the step of continuity parameter and similarity parameter for the model of being imported;
Make the step of each continuity parameter and similarity parameter weighting;
Comparison/selection is as the step of application model, continuity parameter, similarity parameter and the weighted value separately thereof of input information; And
Result based on the comparison, output is distributed to FPGA (Field Programmable Gate Array) with a part of application model and another part application model is distributed to the step of the information of specialized hardware.
According to said structure, the continuity parameter and the similarity parameter that are used for each module are judged to do initial conditions, after this do not need to change and module with high similarity is assigned to special circuit.In this way, can the minimization circuit area.On the contrary, the high and module that have a low similarity of the necessity of change is assigned to FPGA (Field Programmable Gate Array).Thus, can handle this change neatly by rewriteeing this program.As a result, can dwindle the size of Programmable Logic Device, and can increase the efficient that area utilizes, thereby cause the reduction of manufacturing cost.
A kind of the 6th method at the information handling system configuring information handling system that is used for realizing one or more application comprises:
Set up the step of all application models and input model for each process level of determining;
Import the step of data dependence parameter and similarity parameter for the model of being imported;
Make the step of each data dependence parameter and similarity parameter weighting;
Comparison/selection is as the step of application model, data dependence parameter, similarity parameter and the weighted value separately thereof of input information; And
Result based on the comparison, output is distributed to FPGA (Field Programmable Gate Array) with a part of application model and another part application model is distributed to the step of the information of specialized hardware.
According to said structure, be judged to do initial conditions corresponding to the data dependence parameter and the similarity parameter of associated process, wherein the process module that do not rely on data volume and detect high similarity is assigned to special circuit.In this way, can the minimization circuit area.On the contrary, the module with high data dependence and low similarity is assigned to FPGA (Field Programmable Gate Array).Thus, can handle this change neatly by rewriting program.As a result, can dwindle the size of Programmable Logic Device, and can increase the area utilization ratio, cause the reduction of manufacturing cost.
A kind of the 7th method at the information handling system configuring information handling system that is used for realizing one or more application comprises:
Set up the step of all application models and input model for each process level of determining;
Import the step of continuity parameter, data dependence parameter and similarity parameter for the model of being imported;
Make the step of each continuity parameter, data dependence parameter and similarity parameter weighting;
Comparison/selection is as the step of application model, continuity parameter, data dependence parameter, similarity parameter and the weighted value separately thereof of input information; And
Result based on the comparison, output is distributed to FPGA (Field Programmable Gate Array) with a part of application model and another part application model is distributed to the step of the information of specialized hardware.
A kind of SIC (semiconductor integrated circuit) of the 7th method corresponding to configuring information handling system is made of following circuit part: be used for realizing the circuit part of comparative result by programmable circuit based on the weighted value of continuity parameter, data dependence parameter, similarity parameter and continuity, data dependence and similarity parameter, be used for realizing by specialized hardware the circuit part of comparative result.
According to said structure, the continuity parameter, data dependence parameter and the similarity parameter that are used for each module are judged to do initial conditions, and wherein the possibility that changes of process module low, that do not rely on data volume and detect high similarity is assigned to special circuit.In this way, can the minimization circuit area.On the contrary, wherein the possibility height that changes of process, the module that high data dependence arranged and detect low similarity are assigned to FPGA (Field Programmable Gate Array).Thus, just can change process neatly by rewriting program.As a result, can dwindle the size of Programmable Logic Device, and can increase the area utilization ratio, can cut down manufacturing cost simultaneously.
A kind of the method from all directions at the information handling system configuring information handling system that is used for realizing one or more application comprises:
Set up the step of all application models and input model for each process level of determining;
Import the step of continuity parameter for the model of being imported;
Import the step of data dependence parameter for the model of being imported;
Import the step of similarity parameter for the model of being imported;
With respect to boundary condition, comparison/selection is as the application model and the continuity parameter of input information, according to comparative result a part of application model is distributed to FPGA (Field Programmable Gate Array), and use the conduct of another part application model based on the input in the comparison step of data dependence parameter based on the continuity parameter; With
With respect to boundary condition, comparison/selection is as the data dependence parameter and the comparative result of input information, according to comparative result a part of application model is distributed to FPGA (Field Programmable Gate Array), and use the conduct of another part application model based on the input in the comparison step of similarity parameter based on the data dependence parameter;
With respect to boundary condition, comparison/selection is as the similarity parameter of input information and the step of comparative result; With
According to the comparative result based on the similarity parameter, output is distributed to FPGA (Field Programmable Gate Array) with a part of application model and another part application model is distributed to the step of the information of specialized hardware.
In said structure, use three types of parameters in the mode identical with the 7th method of configuring information handling system, these three types of parameters are continuity parameter, data dependence parameter and similarity parameter.But, each parameter is not weighted, and with in the phase one based on the judgement of continuity parameter, in next stage based on the judgement of data dependence parameter, continue this mode then, sequentially judge this distribution by a plurality of stages based on the judgement of similarity parameter.
A kind of corresponding to configuring information handling system the from all directions the SIC (semiconductor integrated circuit) of method constitute by following circuit part: be used for realizing the circuit part of comparative result based on continuity parameter, data dependence parameter and similarity parameter, realize the circuit part of comparative result by specialized hardware by FPGA (Field Programmable Gate Array).
According to said structure, the possibility that process changes is low, do not rely on data volume and the high module of similarity is assigned to special circuit.Thus, can the minimization circuit area.On the contrary, possibility height, data dependence height and the low module of similarity of process change are assigned to FPGA (Field Programmable Gate Array).In said method, can handle change neatly by the rewriting program.Can dwindle the size of programmable circuit thus.Like this, can cut down manufacturing cost, increase the area utilization ratio simultaneously.
A kind of the 9th method at the information handling system configuring information handling system that is used for realizing one or more application comprises:
Think that about all application each determine the C programmer of process level modeling, describe the step of continuity parameter, data dependence parameter and similarity parameter;
Make the step of each continuity parameter, data dependence parameter and similarity parameter weighting;
Comparison/selection is as the step of application model, continuity parameter, data dependence parameter, similarity parameter and the weighted value separately thereof of input information; With
Result based on the comparison, output is distributed to FPGA (Field Programmable Gate Array) with a part of application model and another part application model is distributed to the step of the information of specialized hardware.
A kind of SIC (semiconductor integrated circuit) of the 9th method corresponding to configuring information handling system is made of following circuit part: be used to pass through FPGA (Field Programmable Gate Array), realize the circuit part of comparative result based on the weighted value of continuity parameter, data dependence parameter, similarity parameter and continuity, data dependence and similarity parameter, realize the circuit part of comparative result by specialized hardware.
According to said structure,, can increase treatment effeciency because describe continuity parameter, data dependence parameter and similarity parameter with C programmer.
A kind of the tenth method at the information handling system configuring information handling system that is used for realizing one or more application comprises:
Think that about all application each determine the hardware description language of process level modeling, describe the step of continuity parameter, data dependence parameter and similarity parameter;
Make the step of each continuity parameter, data dependence parameter and similarity parameter weighting;
Comparison/selection is as the step of application model, continuity parameter, data dependence parameter, similarity parameter and the weighted value separately thereof of input information; And
Result based on the comparison, output is distributed to FPGA (Field Programmable Gate Array) with a part of application model and another part application model is distributed to the step of the information of specialized hardware.
According to said structure,, can increase treatment effeciency because describe continuity parameter, data dependence parameter and similarity parameter with hardware description language.
A kind of the 11 method at the information handling system configuring information handling system that is used for realizing one or more application comprises:
Think that about all application each determine the C programmer or the hardware description language of process level modeling, describe the step of continuity parameter, data dependence parameter and similarity parameter;
Input model and automatically extract the step of similarity parameter;
Make the step of each continuity parameter, data dependence parameter and similarity parameter weighting;
Comparison/selection is as the step of similarity parameter, the continuity parameter of describing in model, data dependence parameter and the weighted value separately thereof automatically extracted of input information; With
Result based on the comparison, output is distributed to FPGA (Field Programmable Gate Array) with a part of application model and another part application model is distributed to the step of the information of specialized hardware.
A kind of SIC (semiconductor integrated circuit) of the 11 method corresponding to configuring information handling system is made of following circuit part: be used to pass through FPGA (Field Programmable Gate Array), realize the circuit part of comparative result based on the weighted value of continuity parameter, data dependence parameter and similarity parameter and continuity, data dependence and similarity parameter, and the circuit part that is used for realizing by specialized hardware comparative result.
In C language and hardware description language, be extracted in the common level in the use circuit of each module level with the form of similarity parameter.The description of similarity parameter can be omitted, and can improve treatment effeciency thus.
A kind of the 12 method at the information handling system configuring information handling system that is used for realizing one or more application comprises:
Think about each of all application and determine that the C programmer of process level modeling describes the step of continuity parameter, data dependence parameter and similarity parameter;
Make the step of each continuity parameter, data dependence parameter and similarity parameter weighting;
Comparison/selection is as the step of application model, continuity parameter, data dependence parameter, similarity parameter and the weighted value separately thereof of input information; With
The result distributes to FPGA (Field Programmable Gate Array) with a part of application model based on the comparison, and the circuit of output FPGA (Field Programmable Gate Array) forms the step of information; With
The circuit of another part application model being distributed to specialized hardware and exporting special circuit forms the step of information.
A kind of SIC (semiconductor integrated circuit) of the 12 method corresponding to configuring information handling system is made of following circuit part: be used to pass through FPGA (Field Programmable Gate Array), realize the circuit part of comparative result based on the weighted value of continuity parameter, data dependence parameter, similarity parameter and continuity, data dependence and similarity parameter, and the circuit part that is used for realizing by specialized hardware comparative result.
According to said structure, size and reduction manufacturing cost in order to dwindle Programmable Logic Device improve the area utilization ratio simultaneously, and the circuit that can obtain FPGA (Field Programmable Gate Array) forms the circuit formation information of information and special circuit.
Below, the method and the SIC (semiconductor integrated circuit) of configuring information handling system according to a preferred embodiment of the invention are described with reference to the drawings.
Embodiment 1
Below, with reference to the method for figure 3 to Fig. 5 descriptions according to embodiments of the invention 1 configuring information handling system.
In step 310, the deviser is by drawing or the language description application.For example, use higher level lanquage such as the application in C language or a plurality of modules of register transfer language (RTL) description.Fig. 4 shows the demodulation process of CDMA (CDMA) communication as examples of applications.
Demodulation process 400 is by five modules of 405 constitute from despreading 401 to error correction, and with language each module is described.For the unit of describing without limits.
In step 320, each module input continuity parameter.Whether the continuity parameter is to indicate to put unnecessary change process or deny the designator that needs frequent reprogramming in random time in the future.
With following manner input continuity parameter.As shown in Figure 5, the deviser creates a file 500, and the title of five modules and the continuity parameter of module are corresponded to each other respectively.For example, have low successional module and be designated as " 10 ", be designated as " 1 " and have higher successional module." module 401 to write note in the definitional part 501 in the file 500; ETNL=1 ", the continuity parameter in the representation module 401 (representing despreading in the present embodiment) is " 1 ", the meaning is meant that the necessity that changes the despreading process is low." module 405 for note in the definitional part 5010; ETNL=10 " continuity parameter in the finger print piece 405 (representing error correction in the present embodiment) is " 10 ", the meaning is meant that the necessity that changes the error recovery process is high.Carry out as above description to constitute using all modules of 400.The note of continuity parameter is not limited to the above-mentioned example in the present embodiment.
In step 330, based on step 320 in the definition the relevant information of continuity, judge whether by FPGA (Field Programmable Gate Array) (for example, microcomputer, DSP, reconfigurable LSI etc.) or special circuit the process of the module of describing in the treatment step 310 401 to 405.At first, whether the numerical value of judging the continuity parameter of describing in the definitional part of file 500 (ETNL) is greater than or less than predetermined numerical value.For example, suppose pre-defined following rule: when the numerical value of ETNL equals or exceeds " 5 ", give FPGA (Field Programmable Gate Array), when the numerical value of ETNL is lower than " 5 ", give special circuit with module assignment with module assignment.Under this rule, rule out in special circuit processing module 401 and processing module 405 in FPGA (Field Programmable Gate Array).
Next, use 400 and be divided into each module, and based on the judgement of before having made, the description of each module is assigned to step 340 described later and 350.Under the situation of present embodiment, module 401,402 and 404 is assigned to step 340, and module 403 and 405 is assigned to step 350.
Step 340 is responsible for being used for the Module Design step of distribution in special circuit performing step 330.For example, based on the RTL description of module 401,402 and 404, by finishing circuit such as the synthetic method of logic.
Step 350 is responsible for being used for the Module Design step of distribution in FPGA (Field Programmable Gate Array) performing step 330.For example, the deviser creates a program, wherein according to the characteristic of process in module 403 and 405, can explain concrete FPGA (Field Programmable Gate Array).
In said method,, can give the circuit that is fit to constituting each module assignment of using based on the necessity that changes as the associated process of initial conditions.In other words, give special circuit, so that can realize minimum circuit area with the module assignment that after this there is no need the process that changes.On the contrary, with regard to the module that the change process is highly necessity, by FPGA (Field Programmable Gate Array), such as microcomputer, DSP or reconfigurable LSI, only rewriting program just can be handled this change neatly.As described, can reduce area, and there is no need to make again circuit, this makes the reduction of manufacturing cost.
Embodiment 2
Below, with reference to the method for figure 6 to Fig. 8 descriptions according to embodiments of the invention 2 configuring information handling systems.
In step 610, the deviser is by drawing or the language description application.For example, in a plurality of modules, be described such as C language and/or RTL with higher level lanquage.As an example of using, the demodulation process in WLAN (wireless local area network) (LAN) communication has been shown among Fig. 7.
Demodulation process 700 is made of seven modules from automatic frequency control (AFC) 701 to Viterbi decoding 707, and with language each module is described.For the unit of describing without limits.
In step 620, be each module input data dependence parameter.The data dependence parameter is meant whether pending data volume is constant or variable designator.
Import the data dependence parameter in the following manner.As shown in Figure 8, the deviser creates a file 800, and the title of seven modules and the data dependence parameter of module are corresponded to each other respectively.For example, the module with higher data correlativity is appointed as " 10 ", and the module with lower data correlativity is appointed as " 1 "." module 704 to write note in the definitional part 804 of file 800; DATA=1 " data dependence parameter in the representation module 704 (representing Fast Fourier Transform (FFT) (FFT) in the present embodiment) is " 1 ", the meaning is meant that the treatment capacity of FFT is constant always, with conversion ratio irrelevant (no datat correlativity)." module 705 for note in the definitional part 805; DATA=10 " data dependence parameter in the representation module 705 (representing subcarrier demodulation in the present embodiment) is " 10 "; and the meaning is meant data volume pending in the subcarrier demodulation variable; according to modulator approach (BPSK, QPSK, 16QAM or 64QAM), (high data dependence) changes high likelihood.Carry out as above description to constitute using all modules of 700.The note of data dependence parameter is not limited to the above-mentioned example in the present embodiment.
In step 630,, judge whether to carry out the process of the module of in step 620, describing 701 to 707 by FPGA (Field Programmable Gate Array) or special circuit based on information about the data dependence of definition in the step 620.At first, whether the numerical value of judging the data dependence parameter of describing in the definitional part of file 800 (DATA) is greater than or less than predetermined numerical value.For example, suppose pre-defined following rule: when the numerical value of DATA equals or exceeds " 5 ", give FPGA (Field Programmable Gate Array), when the numerical value of DATA is lower than " 5 ", give special circuit with module assignment with module assignment.Under this rule, judge in special circuit processing module 704 and processing module 705 in FPGA (Field Programmable Gate Array).
Next, use 700 and be divided into each module, and based on the judgement of before having made, the description of each module is assigned to step 640 described later and 650.Under the situation of present embodiment, module 701,702,703 and 704 is assigned to step 640, and module 705,706 and 707 is assigned to step 650.
Step 640 is responsible for being used for the Module Design step of distribution in special circuit performing step 630.For example, the RTL based on module 701,703 and 704 describes by finishing circuit such as the synthetic method of logic.
Step 650 is responsible for being used for being implemented in the Module Design step that step 630 is distributed by FPGA (Field Programmable Gate Array).For example, the deviser creates a program, wherein based on the characteristic of process in module 705,706 and 707, can explain concrete FPGA (Field Programmable Gate Array).
In said method,, can constitute each module assignment of using and give the circuit that is fit to based on the data dependence of the associated process that is used as initial conditions.In other words, with regard to pending data volume is constant module, can the minimization circuit area, when by special circuit configuration optimum circuit, can reduce power consumption simultaneously.On the contrary, with regard to the variable module of pending data volume high likelihood, when rewriting program only, can optimize the structure of Programmable Logic Device, and can handle this change neatly.
When circuit is designed, so that during the hardest processing of response, area and power consumption increase.In order to address this problem, when the process that comprises data dependence is assigned to FPGA (Field Programmable Gate Array), and the process that does not comprise data dependence is described as present embodiment when being assigned to specialized hardware, the area of SIC (semiconductor integrated circuit) can be minimized, and manufacturing cost can be reduced.In addition, can reduce and handle frequency and power consumption according to pending process configuration optimum circuit.
Embodiment 3
Below, with reference to the method for figure 9 to Figure 11 descriptions according to embodiments of the invention 3 configuring information handling systems.
In step 910, the deviser is by drawing or the language description application.For example, in a plurality of modules, be described such as C language or RTL by higher level lanquage.An example as using has illustrated the demodulation process (1000) in the cdma communication among Figure 10 A, and the demodulation process (1010) in the WLAN communication has been shown among Figure 10 B.The demodulation process 1000 of cdma communication is by five modules of 1005 constitute from despreading 1001 to Viterbi decoding, and demodulation process 1010 is described these modules with language by constituting from automatic frequency control 1,011 seven modules to Viterbi decoding 1017.For the unit of describing without limits.
In step 920, the similarity parameter is transfused to as the designator whether any similar process is arranged in module.
Import the similarity parameter in the following manner.As shown in figure 11, the deviser creates a file 1100, and the title of 12 modules and the similarity parameter of module are corresponded to each other respectively.For example, comprise that the module of more similar process is designated as " 10 ", be reduced to " 1 " as the module that comprises more dissimilar process." module 1005 to write note in the definitional part 1105 in the file 1100; COMMON=10 " similarity parameter in the representation module 1005 (Viterbi decoding of representing cdma communication in the present embodiment) is " 10 ", " module 1017 to write note in the definitional part 1112 in the file 1100; COMMMON=10 ", the similarity parameter in the representation module 1017 (Viterbi decoding of representing WLAN communication in the present embodiment) is " 10 ".This means between the Viterbi decoding of the Viterbi decoding of cdma communication and WLAN communication and have similarity." module 1001 for note in the definitional part 1101; COMMMON=1 " similarity parameter in the representation module 1001 (representing the despreading of cdma communication in the present embodiment) is " 1 ", the meaning is meant at cdma communication 1000 and communicates by letter with WLAN in 1010, do not detect the module that the despreading process has similarity.Carry out as above description to constitute using all modules of 1000 and 1010.The note of similarity parameter is not limited to the above-mentioned example in the present embodiment.
In step 930,, judge whether to carry out the module 1001 to 1005 of description in step 910 and 1011 to 1017 process by FPGA (Field Programmable Gate Array) or special circuit based on information about the similarity of definition in the step 920.At first, whether the numerical value of judging the similarity parameter of describing in the definitional part of file 1100 (COMMON) is greater than or less than predetermined value.For example, suppose pre-defined following rule: when the numerical value of COMMON surpasses " 5 ", give special circuit, when the numerical value of COMMON is equal to or less than " 5 ", give FPGA (Field Programmable Gate Array) with module assignment with module assignment.Under this rule, judge in special circuit processing module 1005 and 1017 and in FPGA (Field Programmable Gate Array) processing module 1001.
Next, use 1000 and 1010 and be divided into each module, and based on the judgement of before having made, the description of each module is assigned to step 940 described later and 950.Under the situation of present embodiment, module 1003,1005,1015 and 1017 is assigned to step 940, and module 1001,1002,1004,1011,1012,1013,1014 and 1016 is assigned to step 950.
Step 940 is responsible for can sharing with all modules of distributing the method design specialized circuit of any similarity between them in step 930.For example, based on the RTL description of module 1003,1005,1015 and 1017, by finishing circuit such as the synthetic method of logic.
Step 950 is responsible for being used for the Module Design step of distributing by FPGA (Field Programmable Gate Array) performing step 930.For example, the deviser creates a program, wherein based on the characteristic of process in module 1001,1002,1004,1011,1012,1013,1014 and 1016, can explain concrete FPGA (Field Programmable Gate Array).
In said method,, can constitute each module assignment of using and give the circuit that is fit to based on the similarity of the module that is used as initial conditions.In other words, with regard to the similar module of process, use circuit usually, so that can optimize circuit structure by special circuit.Thus, can realize minimum area and the circuit that reduces power consumption.On the contrary, with regard to the module that does not almost detect similarity,, when the rewriting program only, still can optimize the structure of programmable circuit, so can handle this change neatly although because have the shortcoming that is difficult to share circuit.
Realize sharing the module of circuit by special circuit, can the minimization circuit area and can cut down manufacturing cost, and wherein be difficult to the module of shared circuit by the FPGA (Field Programmable Gate Array) realization.
Embodiment 4
Below, referring to figs 12 to the method for Figure 15 description according to embodiments of the invention 4 configuring information handling systems.
In step 1210, the deviser is by drawing or the language description application.For example, in a plurality of modules, be described such as C language or RTL by higher level lanquage.As examples of applications, the demodulation process in the cdma communication has been shown among Fig. 4.
Demodulation process 400 is by five modules of 405 constitute from despreading 401 to error correction, and with language each module is described.For the unit of describing without limits.
In step 1220, be each module input continuity parameter and data dependence parameter.In order to following method input continuity parameter and data dependence parameter.As shown in figure 13, the deviser creates a file 1300, and the title of five modules and the continuity and the data dependence parameter of module are corresponded to each other respectively." module 401 to write note in the definitional part 1301 in the file 1300; ETNL=1, DATA=3 " continuity parameter in the representation module 401 (representing despreading in the present embodiment) is " 1 "; and wherein the data dependence parameter is " 3 "; the meaning is meant that the necessity that changes the despreading process is low, and the deal with data amount can not change in large quantities based on data dependence." module 405 for note in the definitional part 1305; ETNL=10, DATA=7 " continuity parameter in the representation module 405 (representing error correction in the present embodiment) is " 10 "; and wherein the data dependence parameter is " 7 "; the meaning is meant that the necessity that changes the error correction process is high; and because data dependence, the data volume of processing changes significantly.Carry out as above description to constitute using all modules of 400.The note of continuity parameter and data dependence parameter is not limited to the above-mentioned example in the present embodiment.
In step 1230, the weighted value of definition continuity parameter and data dependence parameter.For example, shown in the file 1400 of Figure 14, the note in the definitional part 1401 " WEIGHT_ETNL:0.8 " be meant that the weighted value of continuity parameter is 0.8.Note in the definitional part 1402 " WEIGHT_DATA:0.2 " is meant that the weighted value of data dependence parameter is 0.2.The weighted value of continuity parameter and data dependence parameter is not limited to the above-mentioned example in the present embodiment.
In step 1240, based on about successional information with about the continuity of definition in the information of data dependence of definition in the step 1220 and the step 1230 and the weighted value of data dependence, judge whether process by the module of describing in FPGA (Field Programmable Gate Array) or the special circuit execution in step 1,210 401 to 405.At first, the successional weighted value of describing in the continuity parameter of describing in the definitional part of use file 1300 (ETNL) and the definitional part of data dependence parameter (DATA) and file 1400 (WEIGHT_ETNL) and the weighted value (WEIGHT_DATA) of data dependence are calculated with predetermined computing formula.Then, judge whether result calculated is greater than or less than predetermined value.
The example of computing formula used herein is (ETNL * WEIGHT_ETNL+DATA * WEIGHT_DATA), wherein continuity and data dependence addition.
For example, suppose pre-defined following rule: when result of calculation equals or exceeds " 5 ", give FPGA (Field Programmable Gate Array), when result of calculation is lower than " 5 ", give special circuit with module assignment with module assignment.
Under this rule, because result of calculation is " 1.4 ", thus judge the process of execution module 401 in special circuit, and because result of calculation is " 9.4 ", so judge the process of execution module 405 in FPGA (Field Programmable Gate Array).Computing formula is not limited to above-mentioned example.Figure 15 shows the result of calculation that obtains in the present embodiment.
Next, use 400 and be divided into each module, and based on the aforementioned calculation result, the description of each module is assigned to step 1250 described later and 1260.Under the situation of present embodiment, module 401,402 and 404 is assigned to step 1250, and module 403 and 405 is assigned to step 1260.
Step 1250 is responsible for being used for the Module Design step of distributing by special circuit performing step 1240.For example, based on the RTL description of module 401,402 and 404, by finishing circuit such as the synthetic method of logic.
Step 1260 is responsible for being used for the Module Design step of distributing by FPGA (Field Programmable Gate Array) performing step 1240.For example, the deviser creates a program, wherein according to the process characteristic in module 403 and 405, can explain concrete FPGA (Field Programmable Gate Array).
In said method, based on as initial conditions, about the necessity and the data dependence of the change of associated process, can constitute each module assignment of using and give the circuit that is fit to.In other words, give special circuit with after this there is no need the low module assignment of change process and data dependence, so that can the minimization circuit area.On the contrary, changing in process is under highly necessary and the high situation of data dependence, only just can realize flexible response to change by rewriteeing program in the FPGA (Field Programmable Gate Array).As described, because the realization area reduces and needn't make circuit again, therefore can cut down manufacturing cost.
Embodiment 5
Below, referring to figures 16 to the method for Figure 19 description according to embodiments of the invention 5 configuring information handling systems.
In step 1610, the deviser is by drawing or the language description application.For example, in a plurality of modules, be described such as C language or RTL by higher level lanquage.Figure 10 A and 10B are as examples of applications.
In step 1620, be each module input continuity parameter and similarity parameter.In order to following method input continuity parameter and similarity parameter.As shown in figure 17, the deviser creates a file 1700, and the title of each module and the continuity and the similarity parameter of module are corresponded to each other respectively." module 1001 to write note in the definitional part 1701 of file 1700; ETNL=1, COMMON=1 " continuity parameter in the representation module 1001 (representing despreading in the present embodiment) be " 1 " and wherein the similarity parameter be " 1 "." module 1014 for note in the definitional part 1709; ETNL=1, COMMON=2 " continuity parameter in the representation module 1014 (representing FFT in the present embodiment) is " 1 ", and wherein the similarity parameter is " 2 ".Carry out as above description to constitute using all modules of 1000 and 1010.The note of continuity and similarity parameter is not limited to the above-mentioned example in the present embodiment.
In step 1630, the weighted value of definition continuity parameter and similarity parameter.For example, shown in the file 1800 of Figure 18, the weighted value of the note in the definitional part 1801 " WEIGHT_ETNL:0.6 " expression continuity parameter is " 0.6 ".The weighted value of the note in the definitional part 1802 " WEIGHT_COMMON:0.4 " expression similarity parameter is 0.4 ".The weighted value of continuity parameter and similarity parameter is not limited to the above-mentioned example in the present embodiment.
In step 1640, based on about successional information with about the continuity of definition in the information of data dependence of definition in the step 1620 and the step 1630 and the weighted value of data dependence, judge whether process by the module of describing in FPGA (Field Programmable Gate Array) or the special circuit execution in step 1,610 1001 to 1017.At first, the successional weighted value of describing in the continuity parameter of describing in the definitional part of use file 1700 (ETNL) and the definitional part of similarity parameter (COMMON) and file 1800 (WEIGHT_ETNL) and the weighted value (WEIGHT_COMMON) of similarity are calculated with predetermined computing formula.Then, judge whether result calculated is greater than or less than predetermined value.
The example of computing formula used herein is (ETNL * WEIGHT_ETNL-COMMON * WEIGHT_COMMON), wherein deduct similarity from continuity.
For example, suppose pre-defined following rule: when result of calculation surpasses " 0 ", give FPGA (Field Programmable Gate Array), and when result of calculation is equal to or less than " 0 ", give special circuit with module assignment with module assignment.
Under this rule, because result of calculation is " 0.2 ", so determination module 1001 is assigned to FPGA (Field Programmable Gate Array), because result of calculation is " 0.2 ", determination module 1014 is assigned to special circuit.Computing formula is not limited to above-mentioned example.Figure 19 shows the result of calculation that obtains in the present embodiment.
Next, use 1000 and 1010 and be divided into each module, and based on the aforementioned calculation result, the description of each module is assigned to step 1650 described later and 1660.Under the situation of present embodiment, module 1011,1012 and 1014 is assigned to step 1650, and module 1001-1005,1013 and 1015-1017 be assigned to step 1660.
Step 1650 is responsible for being used for the Module Design step of distributing by special circuit performing step 630.For example, describe by finishing circuit based on RTL such as the synthetic method of logic.
Step 1660 is responsible for being used for the Module Design step of distributing by FPGA (Field Programmable Gate Array) performing step 1640.For example, the deviser creates a program, wherein according to the process characteristic in the module, can explain concrete FPGA (Field Programmable Gate Array).
In said method,, can constitute each module assignment of using and give the circuit that is fit to based on the necessity that changes as the process of initial conditions with about the similarity of associated process.In other words, after this there is no need the high module assignment of change process and similarity and give special circuit, so that can the minimization circuit area.On the contrary, changing with regard to process is with regard to the low module of highly necessary and similarity, just can realize flexible response to change by only rewriteeing program in the FPGA (Field Programmable Gate Array).As described, because the realization area reduces and there is no need to make again circuit, therefore can cut down manufacturing cost.
Embodiment 6
Below, referring to figures 20 through the method for Figure 23 description according to embodiments of the invention 6 configuring information handling systems.Figure 10 A and 10B are used as examples of applications.
In step 2010, the deviser is by drawing or the language description application.For example, in a plurality of modules, be described such as C language or RTL by higher level lanquage.
In step 2020, be each module input data dependence parameter and similarity parameter in order to following method.As shown in figure 21, the deviser creates a file 2100, and the title of each module and the data dependence and the similarity parameter of module are corresponded to each other respectively." module 1001 to write note in the definitional part 2101 of file 2100; DATA=1, COMMON=10 " data dependence parameter in the representation module 1001 (representing despreading in the present embodiment) be " 1 " and wherein the similarity parameter be " 10 "." module 1016 for note in the definitional part 2111; DATA=8, COMMON=4 " data dependence parameter in the representation module 1016 (representing deinterleaving in the present embodiment) is " 8 ", and wherein the similarity parameter is " 4 ".Carry out as above description to constitute using all modules of 1000 and 1010.The note of data dependence parameter and similarity parameter is not limited to the above-mentioned example in the present embodiment.
In step 2030, the weighted value of definition of data relevance parameter and similarity parameter.For example, shown in the file 2200 of Figure 22, the weighted value of the note in the definitional part 2201 " WEIGHT_DATA:1 " expression data dependence parameter is " 1 ".The weighted value of the similarity parameter in note " WEIGHT_COMMON:1 " the expression definitional part 2202 is " 1 ".The weighted value of data dependence parameter and similarity parameter is not limited to the above-mentioned example in the present embodiment.
In step 2040, based on about the data dependence of definition in the data dependence of definition in the step 2020 and the information of similarity and the step 2030 and the weighted value of similarity, judge whether process by the module of describing in FPGA (Field Programmable Gate Array) or the special circuit execution in step 2,010 1001 to 1017.At first, the weighted value (WEIGHT_DATA) of the data dependence of describing in the definitional part of the data dependence parameter of describing in the definitional part of use file 2100 (DATA) and similarity parameter (COMMON) and file 2200 and the weighted value (WEIGHT_COMMON) of similarity are calculated with predetermined computing formula.Then, judge whether result of calculation is greater than or less than predetermined numerical value.
The example of computing formula used herein is (DATA * WEIGHT_DATA-COMMON * WEIGHT_COMMON), wherein deduct similarity from data dependence.
For example, suppose pre-defined following rule: when result of calculation surpasses " 0 ", give FPGA (Field Programmable Gate Array), and when result of calculation is equal to or less than " 0 ", give special circuit with module assignment with module assignment.
Under this rule, because result of calculation is " 0 ", thus judge the process of execution module 1001 in special circuit, and because result of calculation is " 4 ", so judge the process of execution module 1016 in FPGA (Field Programmable Gate Array).Computing formula is not limited to above-mentioned example.Figure 23 shows the result of calculation that obtains in the present embodiment.
Next, use 1000 and 1010 and be divided into each module, and based on the aforementioned calculation result, the description of each module is assigned to step 2050 described later and 2060.
Step 2050 is responsible for being used for the Module Design step of distributing by special circuit performing step 630.For example, describe by finishing circuit based on RTL such as the synthetic method of logic.
Step 2060 is responsible for being used for the Module Design step of distributing by FPGA (Field Programmable Gate Array) performing step 2040.For example, the deviser creates a program, wherein according to the process characteristic in the module, can explain concrete FPGA (Field Programmable Gate Array).
In said method,, can give the circuit that is fit to constituting each module assignment of using based on as the data dependence of initial conditions and the similarity of relevant process.In other words, process does not rely on data volume and the high module of similarity is assigned to special circuit, so that can the minimization circuit area.On the contrary, with regard to process depends on the low module of data volume and similarity, just can realize flexible response to changing by only rewriteeing program in the FPGA (Field Programmable Gate Array).As described, because the realization area reduces and there is no need to make again circuit, therefore can cut down manufacturing cost.
Embodiment 7
Below, with reference to the method for Figure 24 to Figure 27 description according to embodiments of the invention 7 configuring information handling systems.Figure 10 A and 10B are used as examples of applications.
In step 2410, the deviser is by drawing or the language description application.For example, in a plurality of modules, be described such as C language or RTL by higher level lanquage.
In step 2420, be each module input continuity parameter, data dependence parameter and similarity parameter in order to following method.As shown in figure 25, the deviser creates a file 2500, and the title of each module and continuity, data dependence and the similarity parameter of module are corresponded to each other respectively." module 1001 to write note in the definitional part 2501 of file 2500; ETNL=1, DATA=1, COMMON=1 " continuity, data dependence and similarity parameter in the representation module 1001 (representing despreading in the present embodiment) be respectively " 1 ".
" module 1014 for note in the definitional part 2509; ETNL=1, DATA=1, COMMON=2 " continuity, data dependence and similarity parameter in the representation module 1014 (representing FFT in the present embodiment) be respectively " 1 ", " 1 " and " 2 ".Carry out as above description to constitute using all modules of 1000 and 1010.The note of continuity, data dependence parameter and similarity parameter is not limited to the above-mentioned example in the present embodiment.
In step 2430, the weighted value of definition continuity, data dependence parameter and similarity parameter.For example, shown in the file 2600 of Figure 26, the weighted value of the note in the definitional part 12601 " WEIGHT_ETNL:2 " expression continuity parameter is " 2 ".The weighted value of the note in the definitional part 2602 " WEIGHT_DATA:1 " expression data dependence parameter is " 1 ".The weighted value of the note in the definitional part 2603 " WEIGHT_COMMON:2 " expression similarity parameter is " 2 ".The weighted value of continuity, data dependence parameter and similarity parameter is not limited to the above-mentioned example in the present embodiment.
In step 2440, weighted value based on about continuity, data dependence and the similarity of definition in the information of continuity, data dependence and similarity of definition in the step 2420 and the step 2430 judges whether the process by the module of describing in FPGA (Field Programmable Gate Array) or the special circuit execution in step 2410.At first, use continuity parameter (ETNL), data dependence parameter (DATA) and the similarity parameter (COMMON) described in the definitional part of file 2500, the weighted value (WEIGHT_ETNL) of the continuity parameter of describing in the definitional part of file 2600, the weighted value (WEIGHT_COMMON) of weighted value of data dependence parameter (WEIGHT_DATA) and similarity parameter is calculated with predetermined computing formula.Then, judge whether result calculated is greater than or less than predetermined numerical value.
The example of computing formula used herein is (ETNL * WEIGHT_ETNL+DATA * WEIGHT_DATA-COMMON * WEIGHT_COMMON).In above-mentioned formula, continuity and data dependence addition deduct similarity again.
For example, suppose pre-defined following rule: when result of calculation surpasses " 0 ", give FPGA (Field Programmable Gate Array), and when result of calculation is equal to or less than " 0 ", give special circuit with module assignment with module assignment.
Under this rule, because result of calculation is " 1 ", determination module 1001 is assigned to FPGA (Field Programmable Gate Array), because result of calculation is " 1 ", determination module 1014 is assigned to special circuit.Computing formula is not limited to above-mentioned example.Figure 27 shows the result of calculation that obtains in the present embodiment.
Next, use 1000 and 1010 and be divided into each module, and based on the aforementioned calculation result, the description of each module is assigned to step 2450 described later and 2460.
Step 2450 is responsible for being used for the Module Design step of distribution in special circuit performing step 2440.For example, describe by finishing circuit based on RTL such as the synthetic method of logic.
Step 2460 is responsible for being used for the Module Design step of distribution in FPGA (Field Programmable Gate Array) performing step 2440.For example, the deviser creates a program, wherein according to the process characteristic in the module, can explain concrete FPGA (Field Programmable Gate Array).
In said method,, can constitute each module assignment of using and give the circuit that is fit to based on the similarity of the continuity, data dependence and the relevant process that are used as initial conditions.In other words, the necessity that process changes is low, do not have data dependence and the high module of similarity to be assigned to special circuit, thus can the minimization circuit area.On the contrary, with regard to the low module of necessity height, data dependence height and the similarity that changes with regard to process, just can realize flexible response to change by only rewriteeing program in the FPGA (Field Programmable Gate Array).As described, because the realization area reduces and there is no need to make again circuit, therefore can cut down manufacturing cost.
Embodiment 8
Below, with reference to the method for Figure 28 to 34 description according to embodiments of the invention 8 configuring information handling systems.Figure 10 A and 10B are used as examples of applications.
In step 2810, the deviser is by drawing or the language description application.For example, in a plurality of modules, be described such as C language or RTL by higher level lanquage.
In step 2820, be each module input continuity parameter in order to following method.As shown in figure 29, the deviser creates a file 2900, and the title of each module and the continuity parameter of module are corresponded to each other respectively." module 1001 to write note in 2900 the definitional part 2901; ETNL=1 " continuity parameter in the representation module 1001 (representing despreading in the present embodiment) is " 1 ".
" module 1005 for note in the definitional part 2905; ETNL=10 " continuity parameter in the representation module 1005 (Viterbi decoding of representing cdma communication in the present embodiment) is " 10 ".Carry out as above description to constitute using all modules of 1000 and 1010.
In step 2821, be each module input data dependence parameter in order to following method.As shown in figure 30, the deviser creates a file 3000, and the title of each module and the data dependence parameter of module are corresponded to each other respectively.
" module 1001 to write note in the definitional part 3001 of file 3000; DATA=1 " data dependence parameter in the representation module 1001 (representing despreading in the present embodiment) is " 1 ".
" module 1003 for note in the definitional part 3003; DATA=7 " data dependence parameter in the representation module 1003 is " 7 ".Carry out as above description to constitute using all modules of 1000 and 1010.
In step 2822, be each module input similarity parameter in order to following method.As shown in figure 31, the deviser creates a file 3100, and the title of each module and the similarity parameter of module are corresponded to each other respectively.
" module 1001 to write note in the definitional part 3101 of file 3100; COMMON=1 " similarity parameter in the representation module 1001 (representing despreading in the present embodiment) is " 1 ".
" module 1016 for note in the definitional part 3011; COMMON=10 " similarity parameter in the representation module 1016 is " 10 ".Carry out as above description to constitute using all modules of 1000 and 1010.
In step 2830,, judge whether the process by the module described in the FPGA (Field Programmable Gate Array) execution in step 2810 or forward step 2831 described later to based on successional information about definition in the step 2820.At first, whether the numerical value of judging the continuity parameter of describing in the definitional part of file 2900 (ETNL) is greater than or less than predetermined numerical value.
For example, suppose pre-defined following rule: when the numerical value of continuity parameter equals or exceeds " 5 ", each module assignment is given FPGA (Field Programmable Gate Array) and forwarded step 2831 during less than " 5 " to when the numerical value of continuity parameter.Under this rule, because judged result is " 1 ", so determination module 1001 proceeds to step 2831, and because judged result is " 10 ", so judge the process by FPGA (Field Programmable Gate Array) execution module 1005.Figure 32 shows the judged result that obtains in the present embodiment.
Next, use 1000 and 1010 and be divided into each module, and based on the aforementioned calculation result, the description of each module is assigned to step 2840 described later and 2831.
In step 2831,, judge whether the process by the module described in the FPGA (Field Programmable Gate Array) execution in step 2810 or go to step 2832 described later based on the information of data dependence about definition in the step 2821.At first, whether the numerical value of judging the data dependence parameter of describing in the definitional part of file 3000 (DATA) is greater than or less than predetermined value.
For example, suppose pre-defined following rule: when the numerical value of data dependence parameter equals or exceeds " 5 ", each module assignment is given FPGA (Field Programmable Gate Array) and when the numerical value of data dependence parameter during less than " 5 ", gone to step 2832.Under this rule, because judged result is " 1 ", so determination module 1001 proceeds to step 2832, and because judged result is " 7 ", so by FPGA (Field Programmable Gate Array) processing module 1003.Judged result has been shown among Figure 33.
Next, use 1000 and 1010 and be divided into each module, and based on above-mentioned judged result, the description of each module is assigned to step 2841 described later and 2832.
In step 2832,, judge whether to carry out the process of the module of in step 2810, describing by FPGA (Field Programmable Gate Array) or specialized hardware based on information about the similarity of definition in the step 2822.At first, whether the numerical value of judging the similarity parameter of describing in the definitional part of file 3100 (COMMON) is greater than or less than predetermined value.
For example, suppose pre-defined following rule: when the numerical value of similarity parameter equals or exceeds " 5 ", each module assignment is given special circuit and when the numerical value of continuity parameter during less than " 5 ", gone to FPGA (Field Programmable Gate Array).Under this rule, because judged result is " 1 ", thus judge by FPGA (Field Programmable Gate Array) processing module 1001, and because judged result is " 10 ", so judge by specialized hardware processing module 1016.Judged result has been shown among Figure 34.
Next, use 1000 and 1010 and be divided into each module, and based on above-mentioned judged result, the description of each module is assigned to step 2842 described later and 2850.
Step 2840 is responsible for being used for being implemented in the Module Design step of distributing in the step 2830 of FPGA (Field Programmable Gate Array).For example, the deviser creates a program, wherein according to the process characteristic in the module, can explain concrete FPGA (Field Programmable Gate Array).
Step 2841 is responsible for being used for the Module Design step of distribution in FPGA (Field Programmable Gate Array) performing step 2831.For example, the deviser creates a program, wherein according to the process characteristic in the module, can explain concrete FPGA (Field Programmable Gate Array).
Step 2842 is responsible for being used for the Module Design step of distribution in FPGA (Field Programmable Gate Array) performing step 2832.For example, the deviser creates a program, wherein according to the process characteristic in the module, can explain concrete FPGA (Field Programmable Gate Array).
Step 2850 is responsible for being used for the Module Design step of distribution in special circuit performing step 2832.For example, describe by finishing circuit based on RTL such as the synthetic method of logic.
In said method,, can constitute each module assignment of using and give the circuit that is fit to based on the similarity of the continuity, data dependence and the relevant process that are used as initial conditions.In other words, the necessity that process changes is low, do not have data dependence and the high module of similarity to be assigned to special circuit, thus can the minimization circuit area.On the contrary, with regard to the low module of necessity height, data dependence height and the similarity that changes with regard to process, just can realize flexible response to change by only rewriteeing program in the FPGA (Field Programmable Gate Array).As described, because the realization area reduces and there is no need to make again circuit, therefore can cut down manufacturing cost.
Embodiment 9
Below, with reference to the method for Figure 35 to 38 description according to embodiments of the invention 9 configuring information handling systems.Figure 10 A and 10B are used as examples of applications.
In step 3510, the deviser by language for example higher level lanquage use such as the C language description.With language each module shown in Figure 10 A and the 10B is described.
Be each module input continuity, data dependence and similarity parameter.For example, shown in Figure 36 A, note " a1001 (); / *ETNL=2, DATA=1, COMMON=8 */ " be written into the module invokes part of module 1001." a1001 (); " corresponding to the part of calling of using module a1001 (despreading 1001) among the A (being cdma communication 1000 in the present embodiment).[/ *ETNL=2, DATA=1, COMMON=8 */] represent that continuity parameter " ETNL " is " 2 ", data dependence parameter " DATA " is that " 1 " and similarity parameter " COMMON " they are " 8 ".
In said method, in each module that constitutes application 1000 and 1010, continuity, data dependence and similarity parameter are described.
In step 3520, the weighted value of definition continuity, data dependence parameter and similarity parameter.For example, shown in the file 3700 of Figure 37, the weighted value of the note in the definitional part 3701 " WEIGHT_ETNL:2 " expression continuity parameter is " 2 ".The weighted value of the note in the definitional part 3702 " WEIGHT_DATA:1 " expression data dependence parameter is " 1 ".The weighted value of the note in the definitional part 3703 " WEIGHT_COMMON:2 " expression similarity parameter is " 2 ".The weighted value of continuity, data dependence parameter and similarity parameter is not limited to the above-mentioned example in the present embodiment.
In step 3530, weighted value based on about continuity, data dependence and the similarity of definition in the information of continuity, data dependence and similarity of definition in the step 3510 and the step 3520 judges whether the process by the module of describing in FPGA (Field Programmable Gate Array) or the special circuit execution in step 2410.At first, use continuity parameter (ETNL), data dependence parameter (DATA) and the similarity parameter (COMMON) described in the definitional part of file 3610, the weighted value (WEIGHT_COMMON) of the weighted value (WEIGHT_ETNLL) of the continuity parameter of describing in the definitional part of file 3700, the weighted value (WEIGHT_DATA) of data dependence parameter and similarity parameter is calculated with predetermined computing formula.Then, judge whether result of calculation is greater than or less than predetermined numerical value.
The example of computing formula used herein is (ETNL * WEIGHT_ETNL+DATA * WEIGHT_DATA-COMMON * WEIGHT_COMMON).
For example, suppose pre-defined following rule: when result of calculation surpasses " 0 ", give FPGA (Field Programmable Gate Array), and when result of calculation is lower than " 0 ", give special circuit with module assignment with module assignment.
Under this rule, because result of calculation is " 11 ", so determination module 1001 is assigned to special circuit, and because result of calculation is " 15 ", so determination module 1005 is assigned to FPGA (Field Programmable Gate Array).Computing formula is not limited to above-mentioned example.Figure 38 shows the result of calculation that obtains in the present embodiment.
Next, use 1000 and 1010 and be divided into each module, and based on the aforementioned calculation result, the description of each module is assigned to step 3540 described later and 3550.
Step 3540 is responsible for being used for the Module Design step of distribution in special circuit performing step 3530.For example, describe by finishing circuit based on RTL such as the synthetic method of logic.
Step 3550 is responsible for being used for the Module Design step of distribution in FPGA (Field Programmable Gate Array) performing step 3530.For example, the deviser creates a program, wherein according to the characteristic of the process in the module, can explain concrete FPGA (Field Programmable Gate Array).
In said method,, can constitute each module assignment of using and give the circuit that is fit to based on the similarity of the continuity, data dependence and the relevant process that are used as initial conditions.In other words, wherein the necessity that changes of process low, do not have data dependence and the high module of similarity to be assigned to special circuit.Thus, can realize minimum circuit area.On the contrary, with regard to the low module of necessity height, data dependence height and the similarity that changes with regard to process, just can realize flexible response to change by only rewriteeing program in the FPGA (Field Programmable Gate Array).As described, because the realization area reduces and there is no need to make again circuit, therefore can cut down manufacturing cost.
Embodiment 10
Below, with reference to the method for Figure 39 to Figure 41 description according to embodiments of the invention 10 configuring information handling systems.
In step 3910, the deviser uses by describing such as the circuit descriptive language of RTL, such as the example shown in Figure 40 A, 40B and the 40C.By language each module is described.
Be each module input continuity, data dependence and similarity parameter.For example, the module invokes of module a1 shown in Figure 40 A partly write note " al al (and .clock (clock) .reset (reset) ...); / *ETNL=10, DATA=1, COMMON=1 */ "]], the continuity parameter " ETNL " of representation module a1 is " 10 ", and data dependence parameter " DATA " wherein and similarity parameter " COMMON " are respectively " 1 ".With said method, in constituting each module of using, continuity, data dependence and similarity parameter are described.
In step 3920, the weighted value of definition continuity, data dependence parameter and similarity parameter.For example, shown in the file 3700 of Figure 37, the weighted value of the note in the definitional part 3701 " WEIGHT_ETNL:2 " expression continuity parameter is " 2 ".The weighted value of the note in the definitional part 3702 " WEIGHT_DATA:1 " expression data dependence parameter is " 1 ".The weighted value of the note in the definitional part 3703 " WEIGHT_COMMON:2 " expression similarity parameter is " 2 ".The weighted value of continuity, data dependence parameter and similarity parameter is not limited to the above-mentioned example in the present embodiment.
In step 3930, weighted value based on about continuity, data dependence and the similarity of definition in the information of continuity, data dependence and similarity of definition in the step 3910 and the step 3920 judges whether the process by FPGA (Field Programmable Gate Array) or special circuit execution module.At first, use continuity parameter (ETNL), data dependence parameter (DATA) and the similarity parameter (COMMON) described in the file 4010,4020 and 4030, the weighted value (WEIGHT_ETNLL) of the continuity parameter of describing in the definitional part of file 3700, the weighted value (WEIGHT_COMMON) of weighted value of data dependence parameter (WEIGHT_DATA) and similarity parameter is calculated with predetermined computing formula.Then, judge whether result of calculation is greater than or less than predetermined numerical value.
The example of computing formula used herein is (ETNL * WEIGHT_ETNL+DATA * WEIGHT_DATA-COMMON * WEIGHT_COMMON).
For example, suppose pre-defined following rule: when result of calculation surpasses " 0 ", give FPGA (Field Programmable Gate Array), and when result of calculation is lower than " 0 ", give special circuit with module assignment with module assignment.
Under this rule, because result of calculation is " 17 ", thus judge by special circuit processing module a3, and because result of calculation is " 19 ", so judge by FPGA (Field Programmable Gate Array) processing module a1.Computing formula is not limited to above-mentioned example.Figure 41 shows the result of calculation that obtains in the present embodiment.
Next, application is divided into each module, and based on the aforementioned calculation result, the description of each module is assigned to step 3940 described later and 3950.
Step 3940 is responsible for being used for the Module Design step of distribution in special circuit performing step 3930.For example, describe by finishing circuit based on RTL such as the synthetic method of logic.
Step 3950 is responsible for being used for the Module Design step of distribution in FPGA (Field Programmable Gate Array) performing step 3930.For example, the deviser creates a program, wherein according to the process characteristic in the module, can explain concrete FPGA (Field Programmable Gate Array).
In said method,, can constitute each module assignment of using and give the circuit that is fit to based on the similarity of the continuity, data dependence and the relevant process that are used as initial conditions.In other words, wherein the necessity that changes of process low, do not have data dependence and the high module of similarity to be assigned to special circuit.Thus, can realize minimum circuit area.On the contrary, with regard to the low module of necessity height, data dependence height and the similarity that changes with regard to process, just can realize flexible response to change by only rewriteeing program in the FPGA (Field Programmable Gate Array).As described, because the realization area reduces and there is no need to make again circuit, therefore can cut down manufacturing cost.
Embodiment 11
Below, with reference to the method for Figure 42 to Figure 44 description according to embodiments of the invention 11 configuring information handling systems.
In step 4210, the deviser describes such as RTL by the circuit descriptive language and uses, Figure 43 A, and 43B and 43C show example.By language being described to each module.
Be each module input continuity parameter, data dependence parameter.For example, note [al al (.clock (clock) .reset (reset) ...); / *ETNL=10, DATA=1 */] be written into the module invokes part of the module a1 shown in Figure 40 A, the continuity parameter ETNL of representation module a1 " be 10 " and data dependence parameter " DATA " wherein be " 1 ".With said method, in constituting each module of using, continuity parameter, data dependence parameter are described.
In 4220, be that each module is extracted the common level in the circuit that uses with form by the similarity parameter of the RTL of description in the step 4210.For example, in the module a3 shown in Figure 43 A, 43B and the 43C, b3 and c3, because the circuit of Shi Yonging identical with shown in 4311,4321 and 4331 just in time respectively, so similarity is judged as " 10 ".Lack at module a1, a2, b1, b2, c1 and c2 under the situation of public character, the similarity parameter is " 1 ".
In step 4230, use the mode identical to define the weighted value of continuity and data dependence parameter and the weighted value of the similarity parameter extracted with file 3700.
In step 4340, based on about the continuity of definition in the step 4210 and the information of data dependence, continuity, the weighted value of similarity parameter, judge whether to carry out the process of each module by FPGA (Field Programmable Gate Array) or special circuit about definition in the information of the similarity extracted in the step 4220 and the step 4230.At first, use continuity parameter (ETNL) and the data dependence parameter (DATA) described in the file 4310,4320 and 4330, the weighted value (WEIGHT_COMMON) of the weighted value (WEIGHT_ETNL) of the continuity parameter of describing in the similarity parameter of extracting in the step 4320 (COMMON) and the definitional part of file 3700, the weighted value (WEIGHT_DATA) of data dependence parameter and similarity parameter is calculated with predetermined computing formula as element.Then, judge whether result of calculation is greater than or less than predetermined numerical value.
Here computing formula is assumed to be (ETNL * WEIGHT_ETNL+DATA * WEIGHT_DATA-COMMON * WEIGHT_COMMON).
For example, suppose pre-defined following rule: when result of calculation surpasses " 0 ", give FPGA (Field Programmable Gate Array), and when result of calculation is lower than " 0 ", give special circuit with module assignment with module assignment.
Under this rule, because result of calculation is " 17 ", thus judge by special circuit processing module a3, and because result of calculation is " 19 ", so judge by FPGA (Field Programmable Gate Array) processing module a1.Computing formula is not limited to above-mentioned example.Figure 44 shows the result of calculation that obtains in the present embodiment.
Next, application is divided into each module, and based on the aforementioned calculation result, the description of each module is assigned to step 4250 described later and 4260.
Step 4250 is responsible for being used for the Module Design step of distribution in special circuit performing step 4240.For example, describe by finishing circuit based on RTL such as the synthetic method of logic.
Step 4260 is responsible for being used for the Module Design step of distribution in FPGA (Field Programmable Gate Array) performing step 4240.For example, the deviser creates a program, wherein according to the process characteristic in the module, can explain concrete FPGA (Field Programmable Gate Array).
In said method,, can constitute each module assignment of using and give the circuit that is fit to based on the similarity of the continuity, data dependence and the relevant process that are used as initial conditions.In other words, wherein the necessity that changes of process low, do not have data dependence and the high module of similarity to be assigned to special circuit, thus can the minimization circuit area.On the contrary, with regard to the low module of necessity height, data dependence height and the similarity that changes with regard to process, just can realize flexible response to change by only rewriteeing program in the FPGA (Field Programmable Gate Array).As described, because the realization area reduces and there is no need to make again circuit, therefore can cut down manufacturing cost.
Embodiment 12
Below, with reference to the method for Figure 42 to 44 description according to embodiments of the invention 12 configuring information handling systems.In Figure 45, step 4510,4520 consistent with step among the embodiment 9 with 4530.
In step 4540, the module converts of distributing in the step 4530 is the site tabulation output then of gate level.
In step 4550, export the program of the FPGA (Field Programmable Gate Array) that can explain based on the module of distributing in the step 4530.
In said method,, can constitute each module assignment of using and give the circuit that is fit to based on the similarity of the continuity, data dependence and the relevant process that are used as initial conditions.In other words, wherein the necessity that changes of process low, do not have data dependence and the high module of similarity to be assigned to special circuit, so that can the minimization circuit area.On the contrary, with regard to the low module of necessity height, data dependence height and the similarity that changes with regard to process, just can realize flexible response to change by only rewriteeing program in the FPGA (Field Programmable Gate Array).As described, because the realization area reduces and there is no need to make again circuit, therefore can cut down manufacturing cost.
The present invention is not limited to the embodiment that describes up to now, can carry out various improvement in its technological thought scope.
As described thus far, according to the present invention, according to so far described structure and method can increase the area utilization ratio and carry out application process neatly at the chip area of minimum.Therefore, can successfully cut down manufacturing cost.
The method of configuring semiconductor integrated circuit and SIC (semiconductor integrated circuit) can be used for prolonging the cycle effectively when guaranteeing degree of freedom according to the present invention, and further can cut down manufacturing cost effectively.This technology is advantageously used for semi-conductive research and development instrument.

Claims (22)

1, a kind of method at the information handling system configuring information handling system that is used for realizing one or more application comprises:
Set up the step of all application models and input model for each process level of determining;
The step of representing the parameter of unchangeability for the model input of being imported;
The parameter of using application model and expression unchangeability is as input information, and will represent the step that the parameter of unchangeability is compared with boundary condition; With
Result based on the comparison, output is distributed to FPGA (Field Programmable Gate Array) with a part of application model and another part application model is distributed to the step of the information of specialized hardware.
2, the method for configuring information handling system according to claim 1, wherein
The parameter of expression unchangeability is a continuity parameter about the model of being imported, and based on the comparative result of continuity parameter and boundary condition, a part of application model is distributed to FPGA (Field Programmable Gate Array), and another part application model is distributed to specialized hardware.
3, the method for configuring information handling system according to claim 1, wherein
The parameter of expression unchangeability is the data dependence parameter about the model of being imported, and comparative result based on data dependence parameter and boundary condition, a part of application model is distributed to FPGA (Field Programmable Gate Array), another part application model is distributed to specialized hardware.
4, the method for configuring information handling system according to claim 1, wherein
The parameter of expression unchangeability is a similarity parameter about the model of being imported, and based on the comparative result of similarity parameter and boundary condition, a part of application model is distributed to FPGA (Field Programmable Gate Array), and another part application model is distributed to specialized hardware.
5, the method for configuring information handling system according to claim 1, the parameter of wherein representing unchangeability are about the continuity parameter of the model of being imported and data dependence parameter,
Also comprise: after the step of input parameter, make the step of continuity parameter and data dependence parameter weighting, and comparison/selection is as the step of application model, continuity parameter, data dependence parameter and the weighted value separately thereof of input information, and
The result distributes to FPGA (Field Programmable Gate Array) with a part of application model based on the comparison, and another part application model is distributed to specialized hardware.
6, the method for configuring information handling system according to claim 1, the parameter of wherein representing unchangeability are about the continuity parameter of the model of being imported and similarity parameter,
Also comprise: after the step of input parameter, make the step of continuity parameter and similarity parameter weighting, and comparison/selection is as the step of application model, continuity parameter, similarity parameter and the weighted value separately thereof of input information, and
The result distributes to FPGA (Field Programmable Gate Array) with a part of application model based on the comparison, and another part application model is distributed to specialized hardware.
7, the method for configuring information handling system according to claim 1, the parameter of wherein representing unchangeability are about the data dependence parameter of the model of being imported and similarity parameter,
Also comprise: make the step of data dependence parameter and similarity parameter weighting, and comparison/selection is as the step of application model, data dependence parameter, similarity parameter and the weighted value separately thereof of input information, and
The result distributes to FPGA (Field Programmable Gate Array) with a part of application model based on the comparison, and another part application model is distributed to specialized hardware.
8, the method for configuring information handling system according to claim 1, the parameter of wherein representing unchangeability are about the continuity parameter of the model of being imported, data dependence parameter and similarity parameter,
Also comprise: make the step of continuity parameter, data dependence parameter and similarity parameter weighting, and comparison/selection is as the step of application model, continuity parameter, data dependence parameter, similarity parameter and the weighted value separately thereof of input information, and
The result distributes to FPGA (Field Programmable Gate Array) with a part of application model based on the comparison, and another part application model is distributed to specialized hardware.
9, the method for configuring information handling system according to claim 1 comprises:
For the model of being imported is imported the step of continuity parameter as the parameter of expression unchangeability;
Import the step of data dependence parameter for the model of being imported;
Import the step of similarity parameter for the model of being imported;
With respect to boundary condition, comparison/selection is as the application model and the continuity parameter of input information, according to comparative result a part of application model is distributed to FPGA (Field Programmable Gate Array), and use another part application model as step based on the input in the comparison step of data dependence parameter based on the continuity parameter;
With respect to boundary condition, comparison/selection is as the data dependence parameter and the comparative result of input information, according to comparative result a part of application model is distributed to FPGA (Field Programmable Gate Array), and use another part application model as step based on the input in the comparison step of similarity parameter based on the data dependence parameter; With
With respect to boundary condition, comparison/selection is as the similarity parameter of input information and the step of comparative result; Wherein
According to comparative result based on the similarity parameter, a part of application model is distributed to FPGA (Field Programmable Gate Array), another part application model is distributed to specialized hardware.
10, the method for configuring information handling system according to claim 1 comprises:
Think about each of all application and determine that the C programmer of process level modeling describes the step as continuity parameter, data dependence parameter and the similarity parameter of the parameter of expression unchangeability;
Make the step of continuity parameter, data dependence parameter and similarity parameter weighting;
Comparison/selection is as the step of application model, continuity parameter, data dependence parameter, similarity parameter and the weighted value separately thereof of input information, wherein
The result distributes to FPGA (Field Programmable Gate Array) with a part of application model based on the comparison, and another part application model is distributed to specialized hardware.
11, the method for configuring information handling system according to claim 1 comprises:
Think about each of all application and determine that the hardware description language of process level modeling describes the step as continuity parameter, data dependence parameter and the similarity parameter of the parameter of expression unchangeability;
Make the step of continuity parameter, data dependence parameter and similarity parameter weighting;
Comparison/selection is as the step of application model, continuity parameter, data dependence parameter, similarity parameter and the weighted value separately thereof of input information, wherein
The result distributes to FPGA (Field Programmable Gate Array) with a part of application model based on the comparison, and another part application model is distributed to specialized hardware.
12, the method for configuring information handling system according to claim 1 comprises:
Think about each of all application and determine that the C programmer of process level modeling or hardware description language describe as the continuity parameter of the parameter of expression unchangeability and the step of data dependence parameter;
Input model and automatically extract the step of similarity parameter;
Make the step of continuity parameter, data dependence parameter and similarity parameter weighting;
Comparison/selection is as the step of continuity parameter, data dependence parameter and the weighted value separately thereof described in the similarity parameter of automatically extracting of input information, the model, wherein
The result distributes to FPGA (Field Programmable Gate Array) with a part of application model based on the comparison, and another part application model is distributed to specialized hardware.
13, the method for configuring information handling system according to claim 1 comprises:
Think about each of all application and determine that the C programmer of process level modeling describes the step as continuity parameter, data dependence parameter and the similarity parameter of the parameter of expression unchangeability;
Make the step of continuity parameter, data dependence parameter and similarity parameter weighting;
Comparison/selection is as the step of application model, continuity parameter, data dependence parameter, similarity parameter and each weighted value thereof of input information, wherein
Result's circuit of a part of application model being distributed to FPGA (Field Programmable Gate Array) and exporting FPGA (Field Programmable Gate Array) forms information based on the comparison, and the circuit of another part application model being distributed to specialized hardware and exporting special circuit forms information.
14, a kind of SIC (semiconductor integrated circuit), the method based on configuring information handling system as claimed in claim 1 comprises:
Be used for realizing that by FPGA (Field Programmable Gate Array) the parameter of expression unchangeability is the circuit part of low process; With
Be used for realizing that by specialized hardware the parameter of expression unchangeability is the circuit part of high process.
15, a kind of SIC (semiconductor integrated circuit), the method based on configuring information handling system as described in claim 2 comprises:
Be used for realizing that by FPGA (Field Programmable Gate Array) the continuity parameter is the circuit part of low process; With
Be used for realizing that by specialized hardware the continuity parameter is the circuit part of high process.
16, a kind of SIC (semiconductor integrated circuit), the method based on configuring information handling system as described in claim 3 comprises:
Be used for realizing that by FPGA (Field Programmable Gate Array) the data dependence parameter is the circuit part of high process; With
Be used for realizing that by specialized hardware the data dependence parameter is the circuit part of low process.
17, a kind of SIC (semiconductor integrated circuit), the method based on configuring information handling system as described in claim 4 comprises:
Be used for realizing that by FPGA (Field Programmable Gate Array) the similarity parameter is the circuit part of low process; With
Be used for realizing that by specialized hardware the similarity parameter is the circuit part of high process.
18, a kind of SIC (semiconductor integrated circuit), the method based on configuring information handling system as described in claim 8 comprises:
Be used for by the circuit part of FPGA (Field Programmable Gate Array) realization based on the comparative result of the weighted value of continuity parameter, data dependence parameter, similarity parameter and continuity parameter, data dependence parameter and similarity parameter; With
Be used for realizing the circuit part of described comparative result by specialized hardware.
19, a kind of SIC (semiconductor integrated circuit), the method based on configuring information handling system as described in claim 9 comprises:
Be used for by the circuit part of FPGA (Field Programmable Gate Array) realization based on the comparative result of continuity parameter, data dependence parameter and similarity parameter; With
Be used for realizing the circuit part of described comparative result by specialized hardware.
20, a kind of SIC (semiconductor integrated circuit), the method based on configuring information handling system as described in claim 10 comprises:
Be used for by the circuit part of FPGA (Field Programmable Gate Array) realization based on the comparative result of the weighted value of continuity parameter, data dependence parameter, similarity parameter and continuity parameter, data dependence parameter and similarity parameter; With
Be used for realizing the circuit part of described comparative result by specialized hardware.
21, a kind of SIC (semiconductor integrated circuit), the method based on configuring information handling system as described in claim 12 comprises:
Be used for by the circuit part of FPGA (Field Programmable Gate Array) realization based on the comparative result of the weighted value of continuity parameter, data dependence parameter, similarity parameter and continuity parameter, data dependence parameter and similarity parameter;
Be used for realizing the circuit part of described comparative result by specialized hardware.
22, a kind of SIC (semiconductor integrated circuit), the method based on configuring information handling system as described in claim 13 comprises:
Be used for by the circuit part of FPGA (Field Programmable Gate Array) realization based on the comparative result of the weighted value of continuity parameter, data dependence parameter, similarity parameter and continuity parameter, data dependence parameter and similarity parameter;
Be used for realizing the circuit part of described comparative result by specialized hardware.
CNB2005100537741A 2004-03-11 2005-03-11 Method of configuring information processing system and semiconductor integrated circuit Expired - Fee Related CN100432981C (en)

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