CN1658153B - Compound dynamic preset number representation and algorithm, and its processor structure - Google Patents
Compound dynamic preset number representation and algorithm, and its processor structure Download PDFInfo
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Abstract
This invention offers a new fixed-point number representation to represent the digital data after it is numerically conversed. This new representation includes two parts. The first part is that it setthe reserved number of least significant bits in the digital data as a dynamic dislocation value. This value represents the shifted digit capacity in numeric conversion. The other part is that it corresponds all the bits except the dynamic dislocation value to the partial bits of the digital data before numerical conversion. The partial bits includes at least a most important bit containing the numeric information.
Description
Technical field
The invention provides an a kind of novel fixed-point number operation method and a relevant digital signal processor, refer in particular to a kind of dynamic fixed-point number operation method of combined type (Joint Adaptive Fixed-Point Arithmetic) and the correlated digital signals processor that numerical data can be changed between certain point number representation and the dynamic fixed-point number representation of a combined type.
Background technology
Since nearly ten years, fast development along with ultra-large type integrated circuit technique and computer technology, the an urgent demand that real time digital signal is handled, electronic information circle released one after another various function patterns digital signal processor (Digital Signal Processor, DSP).These digital signal processors generally have advantages such as dirigibility is good, degree of accuracy is high, powerful.The application of digital signal processor is very wide, yet in fact, a processor can not satisfy all or most application demands fully, and the design engineer all needs to take all factors into consideration according to factors such as the complexity of performance, cost, integrated level, exploitation and power consumptions when selecting digital signal processor.
Summary, digital signal processor all are used for handling numerical data, but different digital signal processors has different characteristics, is applicable to different application.General digital signal processor can be divided into fixed point numerical expression (Fixed Point DSP) and floating-point numerical expression digital signal processor (Floating Point DSP), and such differentiation is according to the pattern of the handled numerical data of digital signal processor and corresponding operation method.Fixed point numerical expression digital signal processor uses the fixed-point number operation method, handled numerical data adopts fixed-point number representation (Fixed Point Representation), " fixed-point number " is meant the stationkeeping of the radix point in numerical data, and the numerical data with fixed-point number representation is promptly looked the position of radix point wherein respectively, can be expressed as the decimal form between integer or-1.0 to+1.0.Floating-point numerical expression digital signal processor then uses the floating point arithmetic method, handled numerical data adopts floating number representation (FloatingPoint Representation), and numerical tabular is shown as the form of a mantissa (Mantissa) and same index (Exponent): mantissa * 2
IndexThe floating point arithmetic method is a kind of than the complex calculations rule, utilize the floating number representation can realize numerical data is expanded to sizable Data Dynamic scope, therefore the broad numerical range and the character of pinpoint accuracy, shown the huge market potential that floating-point numerical expression digital signal processor is contained, but consider reasons such as cost and power consumption, the application of fixed point numerical expression digital signal processor on general consumption electronic products will be possessed firm advantage.
See also Fig. 1, Fig. 1 is the functional block diagram of conventional fixed point numerical expression digital signal processor 10 1 embodiment.This (fixed point numerical expression) digital signal processor 10 can be used to handle the numerical data that many groups have the fixed-point number representation, that is these numerical datas have comprised integer (Integer) and two kinds of expressions of decimal pattern, in addition, in present embodiment, these numerical datas are according to what of itself shared figure place, be divided into the numerical data of n position and the numerical data of 2n position, n is the integer greater than zero.Digital signal processor 10 comprises a data receiver 12, a mlultiplying circuit (Multiplication Circuit) 16, one multiplication shift device (Multiplication Shifter) 18,1 first shift unit 14, one second shift unit 24, selects computing module (Multiplexing Arithmetic Module) 20, one memory storage (Storage Instrument) 22 and one data to write end 26.Data receiver 12 usefulness causes, one storer or other external circuits receive the numerical data of most group n position, data receiver 12 is also sent the numerical data of two groups of n positions in the mlultiplying circuit 16 to, mlultiplying circuit 16 can multiply each other the numerical data with two n positions of fixed-point number representation, produce one and have the numerical data of the 2n position of fixed-point number representation, then be electrically connected to the multiplication shift device 18 of mlultiplying circuit 16, can be the pattern of integer or decimal according to this numerical data, suitably adjust the position of the radix point of the numerical data of 2n position after multiplying each other, produce first numerical data of a 2n position.Simultaneously, data receiver 12 is sent to the numerical data of a n position in first shift unit 14, first shift unit 14 will have the numerical data of this n position of fixed-point number representation, extend program (Sign Extension) through a basic sign, produce one and have second numerical data of the 2n position of fixed-point number representation.With the binary bit positive number (n=8) with one 8: (00010100) is converted to one 16 binary bit positive number (n=16) is example, as long as high hyte is filled up zero just can, that is, eight positions of a high position are partly filled 0, become (0000000000010100), but if when representing negative with two's complement, extended eight positions all will be filled out 1, for example one 8 binary bit negative (11101100) can utilize eight positions will extending all to fill 1 to obtain (11,111,111 11101100).
Select computing module 20 to comprise a selecting arrangement 19 and an arithmetic element (Arithmetic Unit) 21, selecting arrangement 19 is electrically connected to first shift unit 14 and multiplication shift device 18, be used between first numerical data of 2n position and second numerical data, selecting one output, when reality was implemented, selecting arrangement 19 can use a multiplexer (Multiplexer) to finish.Arithmetic element 21 is electrically connected to selecting arrangement 19, be used for receiving (the 2n position) first numerical data or second numerical data selected, and arithmetic element 21 comprises another input end, be used for receiving the 4th numerical data of the 2n position of transmitting by memory storage 22, thus, arithmetic element 21 can be carried out the function of various computings to the numerical data (the 3rd numerical data and first or second numerical data) of this a little 2n position, next, the 3rd numerical data of the 2n position after arithmetic element 21 outputs are handled is to memory storage 22, the function of memory storage 22 promptly is used for storing through selecting the many group digital datas after computing module 20 is handled, and when reality was implemented, memory storage 22 can be finished by a totalizer (Accumulator).At last, second shift unit 24 will have the digital data conversion of 2n position of fixed-point number representation for still having the numerical data of a n position of fixed-point number representation, and write end 26 by data this numerical data with n position of fixed-point number representation is write in aforesaid memory storage or other devices.
By above-mentioned routine techniques as can be known, fixed point numerical expression digital signal processor still exists the problem that some utmost points need improve when being commonly this area and accepting and use.The main target market of many now fixed point numerical expression digital signal processors is built-in applied systems; the capacity of the storer in this application need be generally little; and the fixed point numerical expression digital signal processor 10 of Fig. 1 with the situation of the less storer fit applications of this capacity under; during the fixed-point number computing of being correlated with; then be forced to have the restriction (Resolution limitation) on (figure place) resolution, take place and often have quantization error (QuantizationError).Please continue to consult Fig. 1, the numerical data of two n positions is after mlultiplying circuit 16 multiplies each other among Fig. 1, product is the numerical data of 2n position, again after a series of processing, if second shift unit 24 will be the numerical data of n position with the digital data conversion with 2n position of fixed-point number representation, with in the storer that is stored in the n position time, numerical data in this 2n position is under the situation of decimal pattern, then must get n position higher in the numerical data of this 2n position, hang down the n position and cast out, and give up in the process of figure place in this time, make easily between the numerical data of the numerical data of the n position after the conversion and original 2n position and produce error.For example 48 of one (the binary notation representations) under the hexadecimal representation are: 0x004444ffffff, if utilize cast out lower 24 with after being converted to 24 numerical data, become 0x004444, often the numerical value 0x004444000000 that counts after the operation method reduction of regulation obviously has huge difference with former numerical value again, promptly causes above-mentioned quantization error.This quantization error may cause discontinuous, distortion on the digital signal size, with other bad effects, become the restriction of conventional fixed point numerical expression digital signal processor 10 on usefulness.If the desire utilization increases the figure place of digital signal processor or uses floating-point numerical expression digital signal processor instead in the hope of improving quantization error, the thing followed is the significantly increase of hardware cost.In addition, program code that utilize to revise fixed point numerical expression digital signal processor to be to reduce the method for quantization error, can increase program complexity and take the operation efficiency of plurality word signal processor.
Summary of the invention
Therefore fundamental purpose of the present invention is an a kind of novel fixed-point number operation method and a novel fixed-point number representation, and provides this novel fixed-point number operation method of a kind of application to handle the digital signal processor of numerical data, to address the above problem.
In the present invention, we are with a novel fixed-point number representation and a novel fixed-point number operation method, in the numerical data calculating process that applies to a digital signal processor and be correlated with, guarantee that handled numerical data can be preserved how correct highest significant position under resolution restriction, promote the accuracy of signal Processing.Novel fixed-point number representation of the present invention is based on the fixed-point number representation of routine, and after the part key concept with reference to the floating number representation, the dynamic fixed-point number representation of a combined type that is proposed (JointAdaptive Fixed-Point Representation), and at the mid-corresponding hardware device of digital signal processor, when making a higher count digital data be converted to a lower-order digit numerical data, can finish with the mode of less repeats bits and change and store in the storer, to keep maximum highest significant positions; And after when the lower-order digit numerical data read back original higher count digital data, again can be precisely and finish the effect of reduction efficiently, reduce quantization error.
Under novel fixed-point number representation of the present invention, a predetermined number lowest order is made as a dynamic shift value in the one lower-order digit numerical data, this dynamic shift value (under the decade representation) that occupies the predetermined number units promptly represent in novel fixed-point number operation method of the present invention the figure place of be shifted (Shift), replace the position of repeating in original higher count digital data, thus, lower-order digit numerical data with novel fixed-point number representation of the present invention can be replaced original higher count digital data under high degree of accuracy, possesses great dynamic range (Dynamic range), and has a lower complexity (Complexity), thereby can realize novel fixed-point number operation method of the present invention with software (Software) or relevant firmware, realize the advantage that reduces cost and save circuit resource.
Purpose of the present invention is for providing a kind of novel fixed-point number representation, be used for representing the numerical data behind the numerical value conversion operations, this novel fixed-point number representation comprises: a predetermined number lowest order in this numerical data is made as a dynamic shift value (Dynamic Shift Value), wherein this dynamic shift value represent in this numerical value conversion operations the figure place of be shifted (Shift); And with a plurality of the part positions that correspond to this numerical data before this numerical value conversion operations except this dynamic shift value in this numerical data, this part position comprises at least one highest significant position that contains numerical information.
Another object of the present invention is for providing a kind of method that is used for a digital signal processor (Digital SignalProcessor), the one higher count digital data of (Fixed PointRepresentation) is converted to the lower-order digit numerical data with a novel fixed-point number representation to be used for having the certain point number representation, this method comprises: (a) according to the order of magnitude of this higher count digital data, this higher count digital data that will have this fixed-point number representation is amplified displacement (Magnifying Shift) N position, wherein N is the integer more than or equal to zero, and the value of N changes along with the order of magnitude of this higher count digital data; (b) after carrying out step (a), cast out the figure place of a predetermined number in this higher count digital data; And (c) after carrying out step (b), a dynamic shift value (Dynamic Shift Value) is set, and have this lower-order digit numerical data of this novel fixed-point number representation with generation, wherein this dynamic shift value is corresponding to the value of N.
Another purpose of the present invention is for providing a kind of method that is used for a digital signal processor, a lower-order digit digital data conversion that is used for having a novel fixed-point number representation is for to have the higher count digital data of certain point number representation (Fixed Point Representation), and this method comprises: by obtaining a dynamic shift value (Dynamic Shift Value) in this lower-order digit numerical data; And, this lower-order digit numerical data is dwindled displacement (Minifying Shift) N position according to this dynamic shift value, wherein N is the integer more than or equal to zero.
A further object of the present invention is for providing a kind of digital signal processor, be used for handling at least one group digital data, this at least one group digital data has a plurality of numeric expressions respectively, these a plurality of numeric expressions comprise a certain point number representation (Fixed Point Representation) and a novel fixed-point number representation at least, this digital signal processor comprises: at least one extraction shift unit (Extracting/ShiftingDevice), a digital data conversion that will have this novel fixed-point number representation are the numerical data with this fixed-point number representation; A plurality of representation change-over circuits (Representation Converter), each representation change-over circuit utilizes a novel fixed-point number operation method, should at least one group digital data in arbitrary numerical data between this fixed-point number representation and this novel fixed-point number representation, change; And at least one arithmetic element (Arithmetic Unit), be used for this at least one group digital data of computing.
Description of drawings
Fig. 1 is the functional block diagram of an embodiment of conventional certain point number formula digital signal processor.
Fig. 2 is the synoptic diagram with numerical data of the dynamic fixed-point number representation of combined type of the present invention.
Fig. 3 is the synoptic diagram of an embodiment of the numerical data of Fig. 2.
Fig. 4 is the process flow diagram of the present invention one method embodiment.
Fig. 5 is the process flow diagram of the detailed method embodiment of Fig. 4.
Fig. 6 is the process flow diagram of the present invention one other method embodiment.
Fig. 7 is the functional block diagram of an embodiment of the present invention's one digital signal processor.
Fig. 8 is the functional block diagram of an embodiment of part original paper in Fig. 7 digital signal processor.
Fig. 9 is the functional block diagram of a specific embodiment of Fig. 7 digital signal processor.
The reference numeral explanation
10,30,50, digital signal processor 12,52 data receivers
14 first shift units, 16,36,56 mlultiplying circuits
18 multiplication shift devices, 19,69 selecting arrangements
20,60 select computing module 21,31,61 arithmetic elements
22,62 memory storages, 24 second shift units
26,66 data write end 34 representation change-over circuits
37,57 extraction elements 38,58 extract shift unit
39,59 shift units, 53 first representations conversion
The road
The conversion of 55 second representations
Circuit
Embodiment
At first, the present invention proposes a kind of novel fixed-point number representation, be called the dynamic fixed-point number representation of combined type, and a novel fixed-point number operation method disclosed, be called the dynamic fixed-point number operation method of combined type, to have in the digital signal processor of (figure place) resolution restriction in one, finish the numerical value conversion operations of relevant digital data effectively.The dynamic fixed-point number representation of combined type of the present invention is a kind of novel numeric expression between conventional fixed-point number representation and floating number representation, the dynamic fixed-point number representation of combined type is based in the fixed-point number representation numerical data being expressed as integer or being expressed as decimal form between-1.0 to+1.0, and quote the notion of floating number representation, use a plurality of positions to be used as the index (Exponent) of this numerical data, and this index is called dynamic shift value (Dynamic Shift Value) in the present invention, it is an available immediately numerical value that this title has also implied it, and need not just can draw value corresponding through extra operation (as tabling look-up).Remaining position then is a mantissa (Mantissa) in the numerical data.The key concept of the dynamic fixed-point number representation of combined type is: have in the numerical data of the dynamic fixed-point number representation of combined type in one, dynamically the shared figure place of shift value is fixing preset value, and dynamically shift value in the value under the decade representation promptly represent in the novel fixed-point number operation method of the present invention the figure place of be shifted (Shift), that is to say, when former numerical value hour, the position of too much repeating can occupy the high bit place of former numerical value, the figure place of required displacement this moment is more, then dynamic shift value is made as the higher value of the figure place that should replace (displacement), with the position of too much repeating in the former numerical data of a large amount of replacements, otherwise mutually, when the former numerical value before the conversion was big, dynamically shift value was then less.See also Fig. 2, Fig. 2 is the synoptic diagram of an embodiment with numerical data DA of the dynamic fixed-point number representation of combined type of the present invention.This numerical data DA indicates position (Sign bit), the bit data that accounts for maximum figure places and a dynamic shift value by one to be constituted.As previously mentioned, dynamically the shared figure place of shift value is fixing; Indicate the position most significant digit among the numerical data DA for this reason, judgement as sign symbol, when the sign position is 0, numerical data DA be on the occasion of, when indicating the position when being 1, numerical data DA then be a negative value, and former numerical value less and need to judge repeat in the former numerical data the time, promptly be to play (most significant digit of bit data) inferior to the next bit place that indicates the position among the numerical data DA thus, will with indicate the position that the position have identical place value (1 or 0)) the position be considered as the position of repetition.
Please continue to consult Fig. 2, numerical data DA is the higher count digital data that has a fixed-point number representation by original, utilizes combined type of the present invention dynamic fixed-point number operation method conversion back and gets.Ask for an interview Fig. 3, Fig. 3 is the synoptic diagram of dynamic fixed-point number representation one specific embodiment of Fig. 2 combined type.The figure place of shown numerical data is made as 24 among Fig. 3 embodiment, this numerical data of 24 is to be converted by a higher count digital data with fixed-point number representation, in present embodiment, the figure place of this higher count digital data can be made as 48 or other and be high figure place than 24, wherein indicate one (position 23) accounting for the most significant digit place, dynamically shift value accounts for five minimum positions of numerical data DA (position 0 puts 4 in place), and bit data has accounted for 18 positions (position 5 puts 22 in place).Dynamically 0 to 31 dynamic range (Dynamic range) has promptly been represented in shared five positions (position 0 puts 4 in place) of shift value, the position that can replace 31 repetitions in former 48 numerical data at most, the feasible actual dynamic range that contains 50 (1+18+31=50) of (the dynamic fixed-point number representation of combined type) numerical data energy with dynamic shift value of five, in addition, because the dynamic shift value in the present embodiment is arranged in and accounts for numerical data DA lowest order place, place the representation that indicates the high level behind the position to compare index with conventional floating number representation, dynamic shift value of the present invention is as easy as rolling off a log by being judged in the numerical data and extracting, and utilize dynamic shift value directly to separate and read the figure place that this numerical data is shifted, make that using the dynamic fixed-point number operation method of combined type of the present invention has lower complexity (Complexity), is suitable for implementing in the software.
Please continue to consult Fig. 3, when if desire is converted to one 48 numerical data (having the fixed-point number representation) with pattern shown in Figure 3 one 24 s' numerical data, at first, the dynamic fixed-point number operation method of combined type can be according to the order of magnitude of this numerical data of 48, this numerical data of 48 is amplified displacement (Magnifying Shift) N position, the value of N changes along with the order of magnitude of this numerical data of 48, when the absolute value of this numerical data of 48 is healed big, the value of N is littler, and when absolute value more hour, the value of N is then bigger.The value of this sign position is identical with the sign position in original 48 numerical data, and be when having 24 of the dynamic fixed-point number representation of combined type numerical data with 48 digital data conversion, utilize exactly will to indicate in position and this numerical data of 48 other and be compared, to select the figure place (N value) of required displacement.After the selected N value, the figure place of casting out a predetermined number in this numerical data of 48 (comparatively speaking, promptly keep the part figure place in this numerical data of 48), and setting has 24 numerical data of this novel fixed-point number representation corresponding to the dynamic shift value of N value with generation.Be exemplified below, and for asking the picture clear display, the number that we represent with a hexadecimal (arbitrary under the hexadecimal representation four of having represented under the binary representation method): 0x004444ffffff is an example, first three figure place 004 has been represented 12 figure places 000000000100 under the binary representation method under the hexadecimal representation, leftmost for indicating the position, there are eight 0 after indicating the position, because therefore these eight 0 positions that are and indicate the position repetition have been represented and needed 8 positions of amplification displacement in the processes of conversion.Next, in order with 48 digital data conversion to be 24 numerical data, must be by giving up 24 than the low level place, add five dynamic shift values corresponding to 8 (positions) (promptly 01000) at last again, and be arranged at the caudal end (lowest order place) of 24 numerical data.As if the numerical data 0x004444ffffff that turns one's head with 48 is example, it is amplified 8 positions of displacement, and by giving up 24 than the low level place, become 0x4444ff, after minimum five positions being changed to dynamic shift value (01000) at last, promptly finish 24 numerical data with " the dynamic fixed-point number representation of combined type ": 0x4444e8.
Please note, the figure place of the dynamic shift value among the present invention is not limit five, and only be the preferred embodiment among the present invention in the dynamic shift value shown in Fig. 2 and Fig. 3, that is to say, if dynamic shift value is changed into when accounting for minimum four positions of numerical data DA, bit data can account for one more, has the nineteen position altogether, degree of accuracy in the numerical value conversion promotes a little, and dynamically four shared positions of shift value become and represent 0 to 15 dynamic range (Dynamic range), feasible (the dynamic fixed-point number representation of combined type) numerical data with dynamic shift value of four can the actual dynamic range that contains become 35 (1+19+15=35), this has also illustrated, the shared figure place of the present invention's dynamic shift value of visual actual needs adjustment, higher elasticity when realizing practical application.Moreover, the position that no matter in transfer process, is omitted (as in the present embodiment by giving up 24 than the low level place) why, will be after the dynamic fixed-point number operation method conversion of combined type, when the numerical data that these is had Fig. 2, Fig. 3 representation (the dynamic fixed-point number representation of combined type) imposes partial arithmetic, dynamic shift value specially need not be rejected, be considered as holistic numerical value and dynamic shift value can be included in.
In sum, the dynamic fixed-point number operation method of combined type of the present invention is used for a higher count digital data with fixed-point number representation is converted to a lower-order digit numerical data with the dynamic fixed-point number representation of combined type, follow the embodiment of Fig. 3, method embodiment after the conclusion can consult Fig. 4, Fig. 4 is the process flow diagram of the present invention one method embodiment, with a digital data conversion of 48 with fixed-point number representation is one to have 24 numerical data of the dynamic fixed-point number representation of combined type, and comprises the following step:
Step 100: beginning, and a numerical data of 48 with fixed-point number representation is provided, enter step 102;
Step 102: according to the order of magnitude of this seniority (48) numerical data, a selected N value, and seniority (48) the numerical data amplification displacement N position that will have the fixed-point number representation, meaning promptly amplifies 2 with this numerical data of 48 with fixed-point number representation
NDoubly, carry out step 104.Select the key concept of N value to be: when the absolute value of original higher count digital data is healed when big, the value of N is littler, when the absolute value of the absolute value of higher count digital data more hour, the value of N is then bigger, that is to say that the N value is by relatively one indicating position other in the higher count digital data and learn the figure place of repeats bits therewith;
Step 104: the figure place of casting out a predetermined number in this seniority (48) numerical data, keep and comprise at least one part position of containing the highest significant position of numerical information, make this seniority (48) numerical data after giving up the figure place of this predetermined number, the figure place that it had is identical with the figure place of lower-order digit numerical data, enters step 106.As in the present embodiment, can cast out last in this numerical data of 48 24 (or keep in this numerical data of 48 preceding 24), become one 24 numerical data;
Step 106: (corresponding to selected N value) the dynamic shift value that is provided with has lower-order digit (24) numerical data of the dynamic fixed-point number representation of combined type with generation;
Step 108: finish the conversion of the dynamic fixed-point number operation method of combined type.
Note that in the foregoing description, to be arranged in minimum five the dynamic shift value of numerical data DA, the position that can only replace 31 repetitions in former 48 numerical data at most, in step 102,, then need shift amount (N value) is limited if need the figure place of displacement to surpass at 31 o'clock.That is to say, method of the present invention need be preset a maximum shift figure place, the maximal value that this maximum shift figure place can be represented corresponding to this dynamic shift value, and when the value of N less than the maximum shift figure place, then keep the value of N, if the value of N is during more than or equal to the maximum shift figure place, then the value with N is made as the maximum shift figure place, but not all being shifted of really will repeating in former 48 numerical data.For instance, if one 48 numerical data is: 0x000000000007, the figure place of whole required displacements is 44 (N=44), but default under five the situation at dynamic shift value, the maximum shift figure place is 31, therefore, it can only be amplified 31 positions of displacement, become 0x000380000000, again by after giving up 24 than the low level place, become 0x000380, behind the dynamic shift value (11111) of adding (maximal value) at last, promptly finish 24 numerical data with " the dynamic fixed-point number representation of combined type ": 0x00039f.
As from the foregoing, before the selected N value of step 102, need to detect earlier the N value, and carry out relevant decision operation, to determine correct N value, correlation step sees also Fig. 5, and Fig. 5 is the process flow diagram of the detailed method embodiment of Fig. 4, also comprises the following step:
Step 101: before carry out step 102, relatively indicate position other in seniority (48) numerical data and learn the figure place of repeats bits therewith, i.e. the N of selected final value not as yet, and carry out step 103;
Step 103: whether the value of judging N less than a maximum shift figure place, the maximal value that can represent corresponding to this dynamic shift value of this maximum shift figure place wherein, if the value of N enters step 105 less than the maximum shift figure place, otherwise, then enter step 107;
Step 105: when the value of N less than the maximum shift figure place, then keep the value of N, and carry out step 102;
Step 107: when the value of N more than or equal to the maximum shift figure place, then the value with N is made as the maximum shift figure place, and proceeds to step 102.
So, as N during more than or equal to maximum shift figure place (as: 31), will be contained in the numerical data with the dynamic fixed-point number representation of combined type just like the repeats bits (0 among the example 0x00039f as described above) of routine techniques speech gained after basic sign is extended program (Sign Extension), that is to say, in numerical data with the dynamic fixed-point number representation of combined type, only need comprise at least one highest significant position that contains the numerical information of former numerical data gets final product, the most extreme example promptly is when former numerical data with fixed-point number representation is zero, above-mentioned " at least one highest significant position that contains the numerical information of former numerical data " is and indicates position (0), and above-mentioned numerical information then only comprises this and indicates position (0).This also represents in the present embodiment, when former numerical data with fixed-point number representation is zero, anticipate when promptly 48 numerical data is 0x000000000000, corresponding 24 numerical data with the dynamic fixed-point number representation of combined type is 0x000000, but not 0x00001f, avoid being considered as holistic numerical value and in addition during computing, cause misleading in the numerical data that this is had the dynamic fixed-point number representation of combined type.
The dynamic fixed-point number operation method of combined type of the present invention the one higher count digital data with fixed-point number representation is converted to one have the lower-order digit numerical data of the dynamic fixed-point number representation of combined type after, also this lower-order digit digital data conversion that must will have the dynamic fixed-point number representation of combined type is returned the higher count digital data with fixed-point number representation, just complete realization the present invention changes a numerical data between fixed-point number representation and the dynamic fixed-point number representation of combined type technical characterictic.When reality is implemented, conceptive, only need above-mentioned program is operated with the notion of opposite (Reversed), just when conversion, judge dynamic shift value, according to dynamic shift value, the lower-order digit numerical data is dwindled displacement (Minifying Shift) N position (N is the integer more than or equal to zero), and according to indicating the position, the value of each in the decision N position, simultaneously the lower-order digit numerical data is supplied figure place to the figure place of the figure place that it had and the higher count digital data of being desired identical after, again with this dynamic shift value of this lower-order digit numerical data shared locate to fill out a particular value, or continue to use former dynamic shift value, can finish the purpose of reduction.In the operation about displacement, if more detailed again the discussion and differentiation, and be example by 24 situations of changing back 48 still with numerical data, when numerical data is decimal form between-1.0 to+1.0, before carrying out shifting function, former 24 numerical data can be placed before 48 24, right shift N position again after judging the N value.In this, we continue with above-mentioned 24 numerical data with " the dynamic fixed-point number representation of combined type ": 0x4444e8 (hexadecimal representation) is an example, if desire is converted to the reduction of this numerical data of 24 numerical data of (having the fixed-point number representation) 48, because last five place values of this numerical data of 24 (under the binary representation method) are (01000), amplification had been shifted 8 when also representative was changed originally.So, this number is dwindled 8 of displacements (is equal to divided by 2
8), and total bit augmented 48 according to indicating position (its value is 0), at last, if above-mentioned (five) particular value is made as (10000), then can produce the numerical data 0x004444f00000 of (having the fixed-point number representation) 48, if continue to use former dynamic shift value, then can produce 48 numerical data: 0x004444e80000.
The numerical value of above-mentioned particular value does not limit, the minimum value (00000...0) that the usefulness that the foregoing description is made as (10000) is intended to any number under the binary representation method is (10000...0) with the mean value of maximal value (11111...1), therefore, (have only the most significant digit value is 1 to the particular value of this pattern, all the other are 0) can represent the mean value of the figure place that in transfer process, is omitted, can make the value after the omission and the difference of original value reduce to minimum.Note that the position with the original place of dynamic shift value changes a particular value (as above-mentioned mean value or 0) into or keeps the practice of former dynamic shift value, all is contained in the technical characterictic of the present invention.Keep in desire under the situation of former dynamic shift value, though this dynamic shift value is not the some that belongs to former numerical data, but because it is positioned at the lowest order place (least significant bit (LSB) of representation, LSB, Least Significant Bit), little to the initial numberical data influence, when being used for the digital audio-video signal Processing, the effect that has retouching noise (Dithering) on the contrary, let us can hear that seemingly more smooth musical sound reaches the more happy details of multitone, and complexity is lower when reality is carried out, and does not need extra arithmetic operation or hardware.Yet if irrelevant digital audio-video signal Processing and concern other simple numerical operations, uncertain effect how, at this moment, just can replace former dynamic shift value with a particular value as above-mentioned embodiment, and extra arithmetic operation or hardware need be set simultaneously adapt to.
Thus, compare as can be known with former several 0x004444ffffff of 0x4444e8, through the numerical value 0x004444f00000 that restores after the conversion of the dynamic fixed-point number operation method of combined type of the present invention still with former numerical value difference to some extent, but if the conventional fixed-point number operation method of simple use, 48 numerical data is given up the value (0x004444000000) that back 24 data (becoming 0x004444) restore and get to be compared, can find out that then the dynamic fixed-point number operation method of combined type of the present invention can effectively reduce the quantization error in the numerical value transfer process, and, owing to place the dynamic shift value at lowest order place promptly to represent the figure place that is shifted in computing, when it is implemented on hardware, can be under the situation that does not increase too many extra software and hardware resources, can and handle numerical data and improve degree of accuracy with less space storage, more can directly implement with software.
It is one to have a detailed method embodiment of 48 numerical data of fixed-point number representation with a digital data conversion of 24 with the dynamic fixed-point number representation of combined type that Fig. 6 has described the invention described above.See also Fig. 6, Fig. 6 is the process flow diagram of other method embodiment of the present invention, comprises the following step:
Step 300: just begun to provide a numerical data of 24 with the dynamic fixed-point number representation of combined type, next carried out step 302 and step 304 simultaneously;
Step 302: judge a dynamic shift value by a plurality of (as: five) lowest order default in this lower-order digit numerical data, carry out step 306;
Step 304: the lower-order digit numerical data is supplied the figure place of its figure place to the higher count digital data of being desired, anticipate promptly, this moment, former 24 numerical data placed 48; When numerical data is decimal form between-1.0 to+1.0, before carrying out shifting function, former 24 numerical data can be placed 48 before 24, carry out step 306;
Step 306: according to dynamic shift value, this lower-order digit numerical data is dwindled displacement N position, wherein N is the integer more than or equal to zero, and the N value is dynamic shift value;
Step 308: this dynamic shift value shared place, position in the higher count certificate of lower-order digit numerical data is filled out a particular value, or continue to use former dynamic shift value, to produce a numerical data of 48 with fixed-point number representation, the 24 bit digital data-switching that successfully will have the dynamic fixed-point number representation of combined type are returned 48 bit digital data with fixed-point number representation.
Behind open dynamic fixed-point number representation of combined type of the present invention and the dynamic fixed-point number operation method of combined type, the present invention be provided with the corresponding hardware structure with use the dynamic fixed-point number operation method of combined type, finish have the complete technical characterictic of the present invention digital signal processor.See also Fig. 7, Fig. 7 is the functional block diagram of an embodiment of the present invention's one digital signal processor 30.As previously mentioned, digital signal processor 30 of the present invention can be handled the numerical data with fixed-point number representation and the dynamic fixed-point number representation of combined type, and in the present embodiment, numerical data can be divided into higher count digital data (can correspond to the numerical data of 2n position among Fig. 1) and lower-order digit numerical data (can correspond to the numerical data of n position among Fig. 1) again according to what of figure place, and when reality is implemented, the figure place that numerical data had does not limit, not only in two kinds of above-mentioned higher count digital data and lower-order digit numerical datas.Digital signal processor 30 comprises a mlultiplying circuit (Multiplication Circuit) 36, and extracts shift unit (Extracting/ShiftingDevice) 38, a representation change-over circuit (Representation Converter) 34, reaches an arithmetic element (Arithmetic Unit) 31.Mlultiplying circuit 36 can be used to two lower-order digit numerical datas are multiplied each other and produces a higher count digital data, be electrically connected to mlultiplying circuit 36 and extract shift unit 38, a digital data conversion that is used for having the dynamic fixed-point number representation of combined type is the higher count digital data with fixed-point number representation.Representation change-over circuit 34 can be used the dynamic fixed-point number operation method of combined type of the present invention, and the numerical data that it received is changed between fixed-point number representation and the dynamic fixed-point number representation of combined type.Arithmetic element 31 interconnects with extraction shift unit 38 and representation change-over circuit 34, can be used to computing and be sent to wherein numerical data, and be not defined as unfixed point number representation and the dynamic fixed-point number representation of combined type by arithmetic element 31 handled numerical datas.
Please note, the quantity of extracting shift unit 38 and representation change-over circuit 34 does not limit, the function of each representation change-over circuit 34 can be designed to " digital data conversion that will have the fixed-point number representation is the numerical data with the dynamic fixed-point number representation of combined type " or " digital data conversion that will have the dynamic fixed-point number representation of combined type is the numerical data with fixed-point number representation " respectively, thus, the representation change-over circuit 34 that can will have the particular conversion function, look practical situation and install to be arranged at and anyly in the digital signal processor 30 of the present invention have this conversion to need part, receive the numerical data that also output has dynamic fixed-point number representation of combined type or fixed-point number representation.This has also shown simultaneously, in the digital signal processor 30 of above-mentioned present embodiment, representation change-over circuit 34 is not fixed with other interelement array modes that are connected, need not to link to each other with arithmetic element 31, can carry out flexible interconnecting with computing flow process and other hardware elements of numerical data as limiting among Fig. 7.For example, if user's desire will through arithmetic element 31 handle and output after a higher count digital data with this fixed-point number representation, be converted to a lower-order digit numerical data to write in the external memorizer, then can be designed to representation change-over circuit 34 to possess the function of " this higher count digital data with this fixed-point number representation is converted to the lower-order digit numerical data with the dynamic fixed-point number representation of combined type of the present invention ", and be connected to this external storer, because the technical characterictic that the dynamic fixed-point number operation method of combined type of the present invention has low quantization error, can make and write between the lower-order digit numerical data and original higher count digital data in the external memorizer, because of the error that conversion is caused reduces to minimum.
Directly involving the dynamic fixed-point number operation method of combined type of the present invention in the digital signal processor 30 is: extract shift unit 38 and representation change-over circuit 34.Wherein extracting shift unit 38 segments according to function, can distinguish again is an extraction element 37 and a shift unit 39, ask for an interview Fig. 8, Fig. 8 is the functional block diagram of an embodiment of Fig. 7 digital signal processor 30 part original papers, comprise extraction element 37, shift unit 39, with mlultiplying circuit 36.Multiplying of the present invention can be handled the numerical data of various types, the numerical data that comprises dynamic fixed-point number representation of tool combined type and fixed-point number representation, if two lower-order digits (the n position in the input mlultiplying circuit 36, and n is 24 in previous embodiment) numerical data all has the dynamic fixed-point number representation of combined type, before two (having combined type dynamic fixed-point number representation) bit data are multiplied each other, can be shown in the step 308 among Fig. 6, the shared place, position of the dynamic shift value of the lower-order digit numerical data that will (have the dynamic fixed-point number representation of combined type) fills out a particular value, or keeps former dynamic shift value; In the process that multiplies each other, can be with the bit data in the numerical data, dynamically shift value is separately looked it, therefore, mlultiplying circuit 36 can directly multiply each other two lower-order digits (n position) numerical data bit data separately, and with dynamic shift value addition, and this moment, two lower-order digit numerical datas were also sent in the extraction element 37, extract dynamic shift value separately in this two lower-order digits number (n position) bit data, judge relevant N value, then this relevant information is conveyed into shift unit 39, according to the N value of judging, a seniority (2n position) numerical data that data after will handling via mlultiplying circuit 36 be made corresponding radix point displacement, correct to draw (having the fixed-point number representation).
Circuit structure among Fig. 7 embodiment and on-fixed, can adjust in response to different demands, therefore, next we propose a digital signal processor than detailed structure, fully discloses the dynamic fixed-point number operation method of combined type of the present invention cooperates utilization with hardware device situation.See also Fig. 9, Fig. 9 is the functional block diagram of the specific embodiment of Fig. 7.The digital signal processor 50 of Fig. 9 comprises a data receiver 52, a mlultiplying circuit 56, an extraction element 57, a shift unit 59, one first representation change-over circuit 53, a selection computing module 60, a memory storage 62, one second representation change-over circuit 55 and data and writes end 66.Data receiver 52 can receive many groups and have the numerical data of the n position of the dynamic fixed-point number representation of combined type, mlultiplying circuit 56 is electrically connected to data receiver 52, be used for receiving two groups of numerical datas with n position of the dynamic fixed-point number representation of combined type, mlultiplying circuit 56 also can multiply each other the numerical data of this two n position, generation has the numerical data of the 2n position of the dynamic fixed-point number representation of combined type, after handling via extraction element 57 and shift unit 59 (extraction element 57 and shift unit 59 can merge be considered as one extract shift unit 58) again, draw the 5th numerical data of 2n position with fixed-point number representation.
At the same time, the first representation change-over circuit 53 that is electrically connected to data receiver 52 also receives one and has the numerical data of the n position of the dynamic fixed-point number representation of combined type, according to the dynamic shift value of the numerical data of this n position and indicate the position, the digital data conversion that is used for this n position is the 6th numerical data with 2n position of fixed-point number representation.Select computing module 60 to comprise a selecting arrangement 69 and an arithmetic element 61, selecting arrangement 69 is electrically connected to the first representation change-over circuit 53 and shift unit 59, with cause 2n position the 5th, and the 6th numerical data in select one output, so selecting arrangement 69 can use a multiplexer (Multiplexer) to finish.Arithmetic element 61 is electrically connected to selecting arrangement 69, be used for receiving (the 2n position) the 5th numerical data or the 6th numerical data selected, and arithmetic element 61 comprises another input end, be used for receiving the 8th numerical data of the 2n position of transmitting by memory storage 62, thus, arithmetic element 61 can have the function of the various computings of (the 2n position) numerical data (the 8th, the 5th or the 6th numerical data) execution of fixed-point number representation a bit to this.Next, the 7th numerical data of the 2n position after arithmetic element 61 outputs are handled is to memory storage 62, the function of memory storage 62 promptly is used for storing through selecting the many group digital datas after computing module 60 is handled, and when reality was implemented, memory storage 62 can be finished by a totalizer (Accumulator).The digital data conversion that the second representation change-over circuit 55 will have the 2n position of fixed-point number representation is the numerical data with n position of the dynamic fixed-point number representation of combined type, and writes end 66 by data this numerical data with n position of the dynamic fixed-point number representation of combined type write in the aforesaid memory storage.
Compare with conventional fixed-point number representation, the dynamic fixed-point number representation of combined type of the present invention can be under the situation of the significance bit that contains numerical information of preserving (in the higher count digital data before the conversion) location number, realize maximum dynamic range, in other words, also improve the too high complexity of floating number representation, thereby be convenient to realize the dynamic fixed-point number operation method of combined type of the present invention with software or relevant firmware.And the digital signal processor of the dynamic fixed-point number operation method of application combined type of the present invention, can be when a higher count digital data be converted to a lower-order digit numerical data, with the mode of less repeats bits finish the conversion and store in the storer, and after when the lower-order digit numerical data read back original higher count digital data, can precisely also finish the effect of conversion (reduction) again efficiently, and finish the functions such as multiplying of many group digital datas easily, just can under the situation that does not expend too much extra resource, reduce quantization error thus.
The above only is preferred embodiment of the present invention, and all equivalences of carrying out according to claim of the present invention change and revise, and all should belong to covering scope of the present invention.
Claims (26)
1. the method for expressing of a novel fixed point digital signal is used for representing that one has the digital signal of signal behind the numerical value conversion operations of fixed-point number representation, and the method for expressing of this novel fixed point digital signal comprises:
The lowest order of predetermined number in this digital signal is made as by a dynamic shift value shared, wherein this dynamic shift value is represented the figure place that is shifted in this numerical value conversion operations; And
With a plurality of the part positions that correspond to this digital signal before this numerical value conversion operations except this dynamic shift value in this digital signal, this part position comprises the highest significant position of the numerical information of the digital signal before at least one representative numerical value conversion operations.
2. the method for expressing of novel fixed point digital signal as claimed in claim 1 is characterized in that, the size of this dynamic shift value is to determine according to the order of magnitude of the digital signal before the described numerical value conversion operations.
3. the method for expressing of novel fixed point digital signal as claimed in claim 1, wherein this numerical value conversion operations is a conversion from seniority numeral signal to the lower-order digit digital signal.
4. method that is used for a digital signal processor, the seniority numeral conversion of signals that is used for having the certain point number representation is the lower-order digit digital signal with novel fixed point digital signal representation as claimed in claim 1, this method comprises:
(a) according to the order of magnitude of this seniority numeral signal, this seniority numeral signal that will have this fixed-point number representation amplifies displacement N position, and wherein N is the integer more than or equal to zero, and the value of N changes along with the order of magnitude of this seniority numeral signal;
(b) cast out the figure place of the difference number of seniority and lower-order digit in this seniority numeral signal; And
(c) will cast out that this predetermined number lowest order corresponding with the figure place of this dynamic shift value replaces with this dynamic shift value in the digital signal after the step, the dynamic shift value in this lower-order digit digital signal of this novel fixed point digital signal representation is corresponding to the value of N.
5. method as claimed in claim 4, wherein the absolute value when this seniority numeral signal is bigger, and the value of N is littler; When the absolute value of this seniority numeral signal is littler, the value of N is bigger.
6. method as claimed in claim 4, it also comprises:
(d) in step (a), whether the value of judging N is less than a maximum shift figure place, and wherein this maximum shift figure place is corresponding to the maximal value that can represent of this predetermined number; And
(e) if the value of N less than this maximum shift figure place, then keep the value of N, otherwise then the value with N is made as this maximum shift figure place.
7. method as claimed in claim 4, wherein this seniority numeral signal packet contains one and indicates position (Signbit), the value of N selected by relatively should indicate in position and this seniority numeral signal other and get.
8. method as claimed in claim 7, wherein this lower-order digit digital signal comprises this sign position, and this lower-order digit digital signal with this novel fixed point digital signal representation can be converted into this seniority numeral signal with this fixed-point number representation according to this dynamic shift value and this sign position.
9. method as claimed in claim 4, it also comprises:
(f) after carrying out step (c), this lower-order digit digital signal that will have this novel fixed point digital signal representation writes in the memory storage.
10. method that is used for a digital signal processor, a lower-order digit digital signal that is used for having novel fixed point digital signal representation as claimed in claim 1 is converted to the seniority numeral signal with certain point number representation, and this method comprises:
From this lower-order digit digital signal, obtain this dynamic shift value; And
According to this dynamic shift value, this lower-order digit digital signal is dwindled displacement N position, wherein N is the integer more than or equal to zero, and the N value is this dynamic shift value;
This lower-order digit digital signal is supplied the figure place of its figure place to this seniority numeral signal, to obtain this seniority numeral signal;
This dynamic shift value is added a particular value in shared place, position in the seniority numeral signal of this acquisition, or continue to use this dynamic shift value.
11. the method as claim 10 is characterized in that, the first value of this particular value is 1, and all the other every values are 0.
12. the method as claim 10 is characterized in that, this lower-order digit digital signal comprises one and indicates the position, and this value of dwindling in the N position of displacement determines according to this signs position.
13. the method as claim 10 is characterized in that, this lower-order digit digital signal comprises one and indicates the position, and in supplying the step of figure place, every value of being supplied is the value of this sign position.
14. digital signal processor, be used for handling at least one group of digital signal, this at least one group of digital signal has a plurality of numeric expressions respectively, these a plurality of numeric expressions comprise a certain point number representation and a novel fixed point digital signal representation as claimed in claim 1 at least, and this digital signal processor comprises:
At least one extraction shift unit is used for being converted to the digital signal with this fixed-point number representation according to the digital signal that method as claimed in claim 10 will have this novel fixed point digital signal representation;
A plurality of representation change-over circuits, each representation change-over circuit according to as claim 4 or 10 described methods should at least one group in the digital signal arbitrary digital signal reach between this novel fixed point digital signal representation in this fixed-point number representation and change; And
At least one arithmetic element is used for this at least one group of digital signal of computing.
15. as the digital signal processor of claim 14, wherein this at least one extraction shift unit comprises:
One extraction element has with cause in the digital signal of this novel fixed point digital signal representation and extracts dynamic shift value; And
One shift unit, be electrically connected to this extraction element, be used for, this is had the digital signal displacement N position of this novel fixed point digital signal representation according to this dynamic shift value, wherein N is the integer more than or equal to zero, to obtain the digital signal that this has the fixed-point number representation.
16. as the digital signal processor of claim 15, wherein the size of this dynamic shift value is determined according to the order of magnitude that is converted to the preceding digital signal of this novel fixed point digital signal.
17. as the digital signal processor of claim 15, wherein each digital signal comprises one and indicates the position, this shift unit indicates the position according to this, to determine in this N position the value of each.
18. digital signal processor as claim 14, wherein this digital signal processor be used for will have the seniority numeral conversion of signals of this fixed-point number representation be a lower-order digit digital signal with this novel fixed point digital signal representation, this lower-order digit digital signal that perhaps will have this novel fixed point digital signal representation is converted to this seniority numeral signal with this fixed-point number representation.
19. digital signal processor as claim 18, wherein this novel fixed point digital signal operation method is according to the order of magnitude of this seniority numeral signal, this seniority numeral signal that will have this fixed-point number representation amplifies displacement N position, and give up the figure place of predetermined number, one dynamic shift value is set again, this lower-order digit digital signal that has this novel fixed point digital signal representation with generation, wherein N is the integer more than or equal to zero, this dynamic shift value is corresponding to the value of N, and the figure place of occupying predetermined number.
20. as the digital signal processor of claim 19, wherein the value of N changes along with the order of magnitude of this seniority numeral signal, heals greatly when the absolute value of this seniority numeral signal, the value of N is littler; When the absolute value of this seniority numeral signal is littler, the value of N is bigger.
21. as the digital signal processor of claim 20, wherein when the value of N during less than a maximum shift figure place, then keep the value of N, if the value of N is more than or equal to this maximum shift figure place, then the value with N is made as this maximum shift figure place.
22. as the digital signal processor of claim 21, wherein this maximum shift figure place is corresponding to a maximal value of this dynamic shift value.
23. as the digital signal processor of claim 20, wherein this seniority numeral signal packet contains one and indicates the position, the value of N selected by relatively should indicate in position and this seniority numeral signal other and get.
24. as the digital signal processor of claim 14, it also comprises:
One memory storage is electrically connected to this arithmetic element, is used for storing this at least one group of digital signal.
25. digital signal processor as claim 24, wherein this extraction shift unit is electrically connected to this mlultiplying circuit, when this two lower-order digits digital signal of this mlultiplying circuit of input all has this novel fixed point digital signal representation, this extraction shift unit is according to the dynamic shift value with this two lower-order digits digital signal of this novel fixed point digital signal representation, and this seniority numeral conversion of signals that will have this novel fixed point digital signal representation is this seniority numeral signal with this fixed-point number representation.
26. the digital signal processor as claim 14 is characterized in that, this novel fixed point digital signal representation is the dynamic fixed-point representation of a combined type.
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