CN1648904A - Method for quick completing port connection using graphic interface - Google Patents
Method for quick completing port connection using graphic interface Download PDFInfo
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- CN1648904A CN1648904A CN 200410018626 CN200410018626A CN1648904A CN 1648904 A CN1648904 A CN 1648904A CN 200410018626 CN200410018626 CN 200410018626 CN 200410018626 A CN200410018626 A CN 200410018626A CN 1648904 A CN1648904 A CN 1648904A
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Abstract
The method of quick port connection with graphic interface includes the following steps: reading the module defined HDL source file and analyzing the outward I/O ports of all the modules; drawing the graphic interface in the screen; filling the module names and port names in the graphic interface; drawing connection lines on mutually matching ports in the interface and defining outward ports of the whole module; and creating the HDL source codes of the top layer module automatically. Compared with available technology, the present invention can show the analyzed module to be treated in compact graphic interface form for showing more module ports in the screen and has free configuration of connection regulation to speed and simplify the line connection course in drawing.
Description
Technical field
The present invention relates to the general design method that a kind of internal module port connects, particularly relate to a kind of graphical interfaces that utilizes and realize the method that each end points connects fast in the hardware description language.
Background technology
At present, need to carry out IC layout design and drawing protract in the production run of electronic product inevitably, so-called integrated circuit (IC), be meant SIC (semiconductor integrated circuit), it promptly is substrate with the semiconductor material, will have at least one is two above elements of active component and some or all of interconnection line is integrated among the substrate or on the substrate, with intermediate product or the final products of carrying out certain electric function; And IC layout design is meant to have at least one to be two the above elements of active component and the three-dimensional configuration of some or all of interconnection line in the integrated circuit, perhaps for making the above-mentioned three-dimensional configuration that integrated circuit is prepared; At present, the existing on the market a variety of IC design softwares that are used to draw integrated circuit diagram.
The design language that wherein is usually used in digital integrated circuit comprises HDL (Hardware DescriptionLanguage; hardware description language), multiple concrete syntax such as verilog and VHDL; as shown in Figure 1; design diagram for printed-wiring board (PWB); its design is divided into front end and rear end; needed element and annexation (being principle diagram design) on the front end definition plate; they put onboard particular location (may send to the CAD chamber is finished by specialty wiring personnel) rear end definition; when utilizing prior art that this drawing is drawn, can there be following problem usually:
1. when will be connected the port B of the port A of a module in the digital circuit shown in Figure 1 and another module, can take a. to be dragged to the B point from the A point, obtain this coordinate parameters of 2, so that the company of drawing is existing with mouse; B. play identical network cable names for A with B, in program, realize connecting effect; The Xilinx company software I SE6.1 version of producing for example;
The shortcoming of this method of attachment is, because its loose module display mode, caused original waste, in large-scale slightly design, often needed loaded down with trivial details action (for example frequent roll screen even the switching page are sought the port of needs connection) with regard to limited screen space.And, because the port that connected too disperses, be difficult for also checking that annexation handles whether correctly.
2. in the present IC design, usually adopt hardware description language to realize it being programmable logic device (PLD) PLD (Programable Logic Device), on-site programmable gate array FPGA (Field Programable GateArray), and this HDL code both can adopt common text editor input, also can adopt special-purpose HDL text editor input and carry out simple grammatical analysis;
The code of annexation is a lot of between the representation module in this method, and thousands of row are arranged usually, and the workload of edit is very huge, and often makes mistake, and needs debugging repeatedly, and labour intensity is big.
Summary of the invention
Purpose of the present invention is just in order to solve the problem that each tie point can't connect fast in the existing IC design, finish the method that port connects fast and propose a kind of graphical interfaces that utilizes, this method is presented at each module that annexation is arranged, the port in the design drawing that will draw on the screen by the graphical interfaces form, provide simultaneously to connect guide, make the module that will connect or the line process of port become quick, easy.
The invention provides a kind of graphical interfaces that utilizes and finish the method that port connects fast, this method may further comprise the steps:
1) reads the source file of each module definition, analyze the external input/output port of each module;
2) graphical interfaces that on screen, draws;
3) module name and the port name of action required filled in the relevant position in graphical interfaces;
4) treat foregoing fill in finish after, on the interface, the port that matches each other is carried out line operation, define simultaneously whole module to external port;
5) generate the source code of this top-level module automatically.
Compared with prior art, the present invention can be to pending module through after resolving, be shown as the compact graphic interface form, make on the limited indicator screen and can show more module port simultaneously, simultaneously can freely dispose online rule, thereby make the line process in the software drawing technique fast and convenient.
Be elaborated below in conjunction with embodiment and with reference to the technical scheme of accompanying drawing to this invention.
Description of drawings
Fig. 1 is the PCB design synoptic diagram in the background technology of the present invention;
Fig. 2 is a kind of general flow chart that utilizes graphical interfaces to finish the method for port connection fast proposed by the invention;
Fig. 3 is a kind of graphical interfaces synoptic diagram that utilizes graphical interfaces to finish the method for port connection fast proposed by the invention;
Fig. 4 is a kind of graphical interfaces synoptic diagram under the port case of not matching of having that utilizes graphical interfaces to finish method that port connects fast proposed by the invention;
Fig. 5 is a kind of graphical interfaces synoptic diagram that utilizes graphical interfaces to finish the defined pattern match clauses and subclauses of demonstration of the method that port connects fast proposed by the invention;
Fig. 6 is a kind of another kind of closely graphic presentation interface synoptic diagram of form that utilizes graphical interfaces to finish the method that port connects fast proposed by the invention;
Fig. 7 be the embodiment of the invention summarize the displayed map of three modules according to conventional art;
Fig. 8 is the digital integrated circuit connection diagram of the embodiment of the invention;
Fig. 9 is the graphical interfaces synoptic diagram of the embodiment of the invention.
Embodiment
As shown in Figure 2, be general flow chart of the present invention, it may further comprise the steps: read the HDL source file of each module definition, analyze the external input/output port of each module, step 201; The graphical interfaces that on screen, draws, step 202; The module name and the port name of action required, step 203 are filled in relevant position in graphical interfaces; Judging whether module name that all need be operated and port name have all been filled in finishes step 204; Wait to fill in finish after, on the interface, the port that matches each other is carried out line operation, define simultaneously whole module to external port, step 205; Automatically generate the HDL source code of this top-level module, step 206.
The present invention proposes a kind of new compact graphical interface form, shows more module port on limited indicator screen, thereby makes the line process fast and convenient, and this graphical interfaces as shown in Figure 3.
As shown in Figure 4, in order to make the user can on graphical interfaces, realize quicker and operation easily, provide and connect guide, when selecting what a source port, provide prompting by program: which port can not be connected (do not match such as port width, or two output ports can not link to each other), and which port might be connected, unmatched port is by deepening or hiding, and the target port that may connect is prompted out.After for example can utilizing the pattern matching mode (or be called character string parsing handle) of regular expression to judge, two si2 signals are considered to and might link to each other among Fig. 3, because their name is identical.
Wherein, matching way can be disposed voluntarily by the user.
In the present invention, the port arrangement mode at interface does not consider whether can to cause the situation that line intersects, and in fact, prior art one is not avoided intersecting of line fully yet.
As shown in Figure 5, be a kind of graphical interfaces synoptic diagram that utilizes graphical interfaces to finish the defined pattern match clauses and subclauses of demonstration of the method that port connects fast proposed by the invention, this figure when hitting Rule1, defined pattern match clauses and subclauses;
As shown in Figure 6, finish the another kind of closely graphic presentation interface synoptic diagram of form of the method for end points connection fast for utilizing graphical interfaces in a kind of circuit design proposed by the invention, adopt this port arrangement mode, each module takies new row; Also new row can be closelyed follow in the back of previous column, thereby make the structure of display interface tightr, in same screen, show more contents, with user friendly operation.
Below by a specific embodiment, further specify technical scheme of the present invention.
For three module ModuleA, ModuleB, each module of ModuleC that needs in this example to handle realizes a function performance, the definition of each module is described in the following HDL code source file:
The definition of // module ModuleA
module?ModuleA(
input?PAa，
input?PAb，
input?PAc，
input?PAd，
output?PAe)；
assign?PAe＝PAa+PAb+PAc+PAd；
endmodule
The definition of // module ModuleB
module?ModuleB(
input?PBa，
input?PBb，
input?PBc，
output?PBd)；
assign?PBd＝PBa&PBb&PBc；
endmodule
The definition of // module ModuleC
module?ModuleC(
input?PCa，
input?PCb，
input?PCc，
output?PCd)；
assign?PCd＝PCa|PCb|PCc；
endmodule
As shown in Figure 7, for resolve three diagrammatic representations that module is summarized in the present embodiment according to traditional technology method.
Above-mentioned three modules have been formed module ModuleD by the port annexation of I/O, realize function: PCd=((PAa+PAb+PAc+PAd) ﹠amp; PBb﹠amp; PBc) | PCb|PCc, its integrated circuit (IC) design structure is as shown in Figure 8.
If it is when directly calling in the text of three sub-module definitions in the graphical interfaces that present embodiment adopts the method for prior art, place according to as shown in Figure 8 position, carry out each port line with the mouse drag port then.
And adopt method of the present invention, then at first read the HDL source file of A, B, each module definition of C, analyze input, output port, it is presented on the screen according to as shown in Figure 9 graphical interfaces form, just port being arranged in one lists, this is different from the prior art methods of lining up two row according to the difference of input, output, utilizes program to reach the purpose of quick searching when helping port number in action required a lot.
Design of the present invention is mainly derived from the design process of digital integrated circuit, but this technological thought may extend to others, such as wiring board design above-mentioned.And, along with development of science and technology, also may be used for the field of the similar software drawing of numerous needs such as the design quick online processing of optical module in the future.
Above content only is embodiments of the invention, and its purpose is not the restriction that is used for system and method proposed by the invention, and protection scope of the present invention is as the criterion with claim.Under the situation that does not break away from the spirit and scope of the present invention; those skilled in the art all should drop within protection scope of the present invention its all conspicuous modification or variation about form and details of carrying out under the situation that does not depart from scope and spirit of the present invention.
Claims (7)
1. one kind is utilized graphical interfaces to finish the method that port connects fast, and this method may further comprise the steps:
1) reads the source file of each module definition, analyze the external input/output port of each module;
2) graphical interfaces that on screen, draws;
3) module name and the port name of action required filled in the relevant position in graphical interfaces;
4) treat foregoing fill in finish after, on the interface, the port that matches each other is carried out line operation, define simultaneously whole module to external port; And
5) generate the source code of this top-level module automatically.
2. the graphical interfaces that utilizes as claimed in claim 1 is finished the method that port connects fast, it is characterized in that, described step of drawing graphical interfaces on screen comprises provides the step that connects guide.
3. the graphical interfaces that utilizes as claimed in claim 2 is finished the method that port connects fast, it is characterized in that, the described step that connects guide that provides comprises;
Select a source port;
According to the character string parsing result, analyze and obtain port that can not connect and the port that may connect.
4. the graphical interfaces that utilizes as claimed in claim 3 is finished the method that port connects fast, it is characterized in that, the described port that can not connect is shown with Stealth Modus.
5. the graphical interfaces that utilizes as claimed in claim 3 is finished the method that port connects fast, it is characterized in that, the described port that may connect is carried out the definition of pattern match clauses and subclauses according to making rule by oneself.
6. the graphical interfaces that utilizes as claimed in claim 1 is finished the method that port connects fast, it is characterized in that described graphical interfaces adopts each module to take new row, and all ports that module is relevant are therewith described the tight form that row write these row in proper order.
7. tight form as claimed in claim 6 is characterized in that, described graphical interfaces adopts new row immediately following the graphical interfaces display structure in the back of previous column.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100186261A CN100343854C (en) | 2004-01-20 | 2004-01-20 | Method for quick completing port connection using graphic interface |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100186261A CN100343854C (en) | 2004-01-20 | 2004-01-20 | Method for quick completing port connection using graphic interface |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1648904A true CN1648904A (en) | 2005-08-03 |
| CN100343854C CN100343854C (en) | 2007-10-17 |
Family
ID=34868242
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2004100186261A Expired - Lifetime CN100343854C (en) | 2004-01-20 | 2004-01-20 | Method for quick completing port connection using graphic interface |
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| CN (1) | CN100343854C (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104023254A (en) * | 2013-03-01 | 2014-09-03 | 联想(北京)有限公司 | Information processing method and electronic equipment |
| CN105956250A (en) * | 2016-04-27 | 2016-09-21 | 北京芯革电子科技有限公司 | Graphical interface-based integrated circuit SoC (System on a Chip) design fast connecting method |
| CN109492257A (en) * | 2018-10-15 | 2019-03-19 | 中国核电工程有限公司 | A kind of software aided drawing method automatically generating connecting line |
| CN109492301A (en) * | 2018-11-08 | 2019-03-19 | 北京世冠金洋科技发展有限公司 | Software and hardware switching method and system |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6557153B1 (en) * | 2000-11-15 | 2003-04-29 | Reshape, Inc. | Method and system for implementing a user interface for performing physical design operations on an integrated circuit netlist |
| JP2002312414A (en) * | 2001-04-13 | 2002-10-25 | Toshiba Corp | Layout design system of semiconductor integrated circuit device, wiring design method, wiring design program, and manufacturing method for semiconductor integrated circuit device |
| CN1170243C (en) * | 2002-04-19 | 2004-10-06 | 西安交通大学 | CAD software for horizontal internal combustion boil using oil or gas as fuel |
-
2004
- 2004-01-20 CN CNB2004100186261A patent/CN100343854C/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104023254A (en) * | 2013-03-01 | 2014-09-03 | 联想(北京)有限公司 | Information processing method and electronic equipment |
| CN105956250A (en) * | 2016-04-27 | 2016-09-21 | 北京芯革电子科技有限公司 | Graphical interface-based integrated circuit SoC (System on a Chip) design fast connecting method |
| CN109492257A (en) * | 2018-10-15 | 2019-03-19 | 中国核电工程有限公司 | A kind of software aided drawing method automatically generating connecting line |
| CN109492301A (en) * | 2018-11-08 | 2019-03-19 | 北京世冠金洋科技发展有限公司 | Software and hardware switching method and system |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100343854C (en) | 2007-10-17 |
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Granted publication date: 20071017 |