CN1635626A - Method and structure for manufacturing halftone mask for semiconductor wafer - Google Patents
Method and structure for manufacturing halftone mask for semiconductor wafer Download PDFInfo
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- CN1635626A CN1635626A CNA200310122965XA CN200310122965A CN1635626A CN 1635626 A CN1635626 A CN 1635626A CN A200310122965X A CNA200310122965X A CN A200310122965XA CN 200310122965 A CN200310122965 A CN 200310122965A CN 1635626 A CN1635626 A CN 1635626A
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- mask
- marginal texture
- mask pattern
- opaque
- quartz substrate
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- 238000000034 method Methods 0.000 title claims abstract description 65
- 239000004065 semiconductor Substances 0.000 title claims description 8
- 238000004519 manufacturing process Methods 0.000 title description 11
- 229910016006 MoSi Inorganic materials 0.000 claims abstract description 35
- 239000010453 quartz Substances 0.000 claims abstract description 26
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 26
- 239000000758 substrate Substances 0.000 claims description 39
- 239000000463 material Substances 0.000 claims description 22
- 230000010363 phase shift Effects 0.000 claims description 21
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 15
- 229910052799 carbon Inorganic materials 0.000 claims description 15
- 238000012545 processing Methods 0.000 claims description 15
- 230000015572 biosynthetic process Effects 0.000 claims description 7
- 238000000059 patterning Methods 0.000 claims description 7
- 238000010884 ion-beam technique Methods 0.000 claims description 5
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 4
- 229910052804 chromium Inorganic materials 0.000 claims description 4
- 239000011651 chromium Substances 0.000 claims description 4
- 238000002834 transmittance Methods 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 3
- 238000001259 photo etching Methods 0.000 claims description 3
- 230000000903 blocking effect Effects 0.000 claims 1
- 239000003575 carbonaceous material Substances 0.000 abstract description 6
- 230000008569 process Effects 0.000 abstract description 5
- 230000010354 integration Effects 0.000 abstract 1
- 229920002120 photoresistant polymer Polymers 0.000 description 24
- 238000005516 engineering process Methods 0.000 description 9
- 238000012986 modification Methods 0.000 description 8
- 230000004048 modification Effects 0.000 description 8
- 238000011161 development Methods 0.000 description 7
- 238000005530 etching Methods 0.000 description 6
- 239000012528 membrane Substances 0.000 description 6
- 238000000206 photolithography Methods 0.000 description 6
- 230000008901 benefit Effects 0.000 description 5
- 238000007796 conventional method Methods 0.000 description 5
- 238000000151 deposition Methods 0.000 description 5
- 238000001312 dry etching Methods 0.000 description 5
- 238000001020 plasma etching Methods 0.000 description 5
- 238000001039 wet etching Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 238000001556 precipitation Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 230000003068 static effect Effects 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000001354 calcination Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000012806 monitoring device Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000011002 quantification Methods 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 241000894007 species Species 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/26—Phase shift masks [PSM]; PSM blanks; Preparation thereof
- G03F1/32—Attenuating PSM [att-PSM], e.g. halftone PSM or PSM having semi-transparent phase shift portion; Preparation thereof
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/68—Preparation processes not covered by groups G03F1/20 - G03F1/50
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Abstract
This invention provides a method to process integration circuit element mask, which comprises the following steps: providing the quartz underlay with surface and the MoSi mask formed on it; providing the MoSi mask covered on the quartz underlay to form mask pattern; forming the opaque edge structure with carbon materials around the mask pattern boundary.
Description
Technical field
The processing of being used for producing the semiconductor devices that the present invention relates to integrated circuit and they are carried out.More particularly, the invention provides a kind of method that is used to make halftoning phase shift mask (half tone phaseshift mask), this halftoning phase shift mask is used for the advanced person's of Production Example such as dynamic RAM device, static random-access memory device (SRAM), application-specific integrated circuit (ASIC) device (ASIC), microprocessor and microcontroller, flush memory device and other devices integrated circuit.
Background technology
Integrated circuit or " IC " develop into millions of devices from a small amount of interconnect devices of making at single silicon-chip.The performance of IC and complexity are considerably beyond the initial imagination now.In order to be implemented in the improvement of complexity and current densities (promptly can be compressed to the quantity of the device on the given chip area) aspect, minimum device characteristic size (being also referred to as device " how much ") is along with each appearance for IC has become littler.Semiconductor device is manufactured to now to have less than 1/4th microns wide features.
The current densities of Zeng Jiaing has not only been improved complexity and the performance of IC gradually, but also provides lower one-tenth this part for the user.The IC manufacturing equipment spends several hundred million dollars even tens00000000 dollars possibly.Each manufacturing equipment will have definite wafer throughput, and each wafer will have the IC of quantification thereon.Therefore, littler by the independent device that makes IC, can on each wafer, make more device, thereby increase the output of manufacturing equipment.Making device is very challenging property more for a short time because in IC makes employed each handle boundary (limit) all arranged.That is to say that a given processing generally can only be reduced to some characteristic sizes, just need then to have changed processing or device layout.
An example of this boundary is an ability of making mask, and described mask uses when being used to make integrated circuit carrying out photoetching.Mask commonly used is called as phase shift mask.Used from the interference figure of light source phase shift mask has been used to print characteristic size less than 0.25 micron.Unfortunately, be difficult to carry out traditional processing to make phase shift mask with efficient and accurate way.As if in addition, traditional processing is pretty troublesome, and can cause the problem of mask itself.In whole specification, described the restriction of these and other, will more specifically describe below.
Summary of the invention
According to the present invention, provide the technology that is used for producing the semiconductor devices.More particularly, the invention provides a kind of method that is used to make the halftoning phase shift mask, this halftoning phase shift mask is used for the advanced person's of Production Example such as dynamic RAM device, static random-access memory device (SRAM), application-specific integrated circuit (ASIC) device (ASIC), microprocessor and microcontroller, flush memory device and other devices integrated circuit.
In a certain embodiments, the invention provides the manufacture method of the mask that is used for integrated circuit (IC)-components.This method comprises provides the quartz substrate with surface, covers the MoSi film of quartz substrate surface or other films (Ta for example in the formation
xO
y).This method also comprises the MoSi film that covers quartz substrate on the patterning, to form mask pattern.Also comprise the step that forms opaque marginal texture, described opaque edge is comprising the material that contains carbon on a part of surface of mask pattern neighboring area.Preferably, the wavelength of opaque marginal texture permission 0% to 3% is about the luminous transmittance of 248nm, 193nm.
In an interchangeable specific embodiment, the invention provides a kind of method that is used for the processing integrated circuit device.This method comprises provides mask arrangement, described mask arrangement comprises quartz substrate, the MoSi film that is patterned and the opaque marginal texture with surface, cover quartz substrate surface on the described MoSi film that is patterned and be used to form mask pattern, described opaque marginal texture is comprising the material that contains carbon on a part of surface of mask pattern neighboring area.This method also comprises the use mask arrangement, is used for pattern is applied to the light-sensitive material that covers Semiconductor substrate.
In another embodiment, the invention provides a kind of halftoning phase shift mask that is used for integrated circuit (IC)-components.Described mask comprise quartz substrate with surface and on cover the MoSi film that is patterned of described substrate surface.The opaque marginal texture that contains the material of carbon, it is on a part of surface of mask pattern neighboring area.
Compare with conventional art, reached a lot of advantages by the present invention.For example, the invention enables easier use to depend on the processing of conventional art.In certain embodiments, the invention provides higher device yield on the small pieces (die) at each wafer.In addition, this method provides a kind of processing compatible with conventional process, and this processing is not made modification to traditional equipment and processing basically.Preferably, the present invention can be used to multiple use, for example memory, ASIC, microprocessor and other devices.Preferably, the invention provides the method that a kind of use step is still less made the halftoning phase shift mask, this makes that processing is more efficient.Other advantages of the present invention also comprise:
1. handling process has been oversimplified largely, has therefore also shortened cycle time.
2. the control of the critical dimension of master pattern and defective becomes and is more prone to.
3. can realize depositing system by traditional focus ion beam (" FIB ") or laser beam mask repair system being made revise, this cost than traditional mask exposure system lacks.According to embodiment, can realize one or more in these advantages.In whole specification, described more these and other advantage, will more specifically describe below.
Can understand multiple other purpose, feature and advantage of the present invention more fully with reference to concrete description and accompanying drawing.
Description of drawings
Fig. 1 is the simplification viewgraph of cross-section that diagram is made the conventional method of halftoning phase shift mask to Figure 11;
Figure 12 is a kind of simplification viewgraph of cross-section of making the method for mask of diagram according to the embodiment of the invention to 17A;
Figure 17 B is the simplification vertical view according to the precipitation equipment of the embodiment of the invention and mask arrangement; And
Figure 18 is the simplification view according to the precipitation equipment of the embodiment of the invention.
Embodiment
According to the present invention, provide the technology that is used for producing the semiconductor devices.More particularly, the invention provides a kind of method that is used to make the halftoning phase shift mask, this halftoning phase shift mask is used for the advanced person's of Production Example such as dynamic RAM device, static random-access memory device (SRAM), application-specific integrated circuit (ASIC) device (ASIC), microprocessor and microcontroller, flush memory device and other devices integrated circuit.
Provided the conventional method that is used to make phase shift mask below:
1. quartz substrate is provided;
2. cover the MoSi film of substrate on forming;
3. cover antireflection chromium (ArCr) film of MoSi film on forming;
4. cover the photoresist layer of ArCr film on forming;
5. exposed photoresist layer;
6. the development photoresist layer is to be formed for the opening of mask pattern;
7. wet etching ArCr film;
8. peel off (strip) photoresist film;
9. use the ArCr film as mask dry etching MoSi film, to form mask arrangement;
10. cleaning mask arrangement;
11. the photoresist layer of the mask arrangement of cover patterning in the formation;
12. exposed photoresist layer is to limit edge (edge) structure;
13. the development photoresist layer is to be formed for protecting the opening of marginal texture;
14. the ArCr layer in the wet etching opening;
15. stripping photolithography glued membrane; And
16. if other steps are carried out in requirement.
The step of top order is used to prepare traditional halftoning phase shift mask.As can be seen, has two main photomasks (photomasking) step at least.There are a lot of restrictions in traditional method.Such as, in order to make mask 11 key steps to be arranged at least, this is very expensive and expend time in.In whole specification, described the restriction of these and other, will more specifically describe below.
Fig. 1 is the simplification viewgraph of cross-section that diagram is made the conventional method of halftoning phase shift mask to Figure 11.Go out as shown, this method provides quartz substrate 100.Quartz substrate comprises the MoSi film 101 that covers substrate.This method formed antireflection chromium (ArCr) film 103 that covers the MoSi film and on cover the film formed photoresist layer 105 of ArCr.With reference to Fig. 2, this method exposed photoresist layer 105.Go out as shown, the zone 201 that is exposed will be removed by the development shown in Fig. 3.In photoresist layer, form opening 301 and be used for mask pattern.
Then, this method as shown in Figure 4, by the wet etching ArCr film of the opening in the photoresist layer.Preferably, wet etching is used CR
2C.Then, this method as shown in Figure 5, the stripping photolithography glued membrane.Then, this method uses the ArCr film as mask etching MoSi film, with (intermediate) mask arrangement in the middle of forming, as shown in Figure 6.Preferably, use plasma etching.This plasma etching uses and contains Cl
2+ O
2Material (specie).Clean the reticle mask structure.
Illustrated as Fig. 7, carry out second mask and etching processing.Illustrated as Fig. 7, this method forms the photoresist layer of the mask arrangement of cover patterning.This method is exposed 801 photoresist layers to limit marginal texture.The development photoresist layer is to be formed for protecting the opening of marginal texture, and is illustrated as Fig. 9.To the etch step that wets of the ArCr layer in the opening, to limit marginal texture, as shown in Figure 10.Then, the stripping photolithography glue-line, with the mask pattern that comprises marginal texture that exposure is finished, illustrated as Figure 11.
The conventional method that forms phase shift mask has big quantitative limitation.As just an example, to use many steps in order to form phase shift mask, this causes producing mistake in the pattern of being finished.Here, the wet etching processing that is used to limit the ArCr layer often produces undercutting (undercut) layer, and this causes most mistake in some conventional process.For a person skilled in the art, these and other restrictions will become very clear.Can find the technology of some restriction that is used for overcoming conventional method in whole specification and in the more concrete below description.
A kind of method that is used to make mask arrangement according to the embodiment of the invention probably is described below:
1. quartz substrate is provided;
2. cover the MoSi film of substrate on forming;
3. cover the photoresist layer of MoSi film on forming;
4. exposed photoresist layer;
5. the development photoresist layer is to be formed for the opening of mask pattern;
6. by opening dry etching MoSi film;
7. stripping photolithography glued membrane;
8. deposit carbon material on the edge of substrate is to form marginal texture; And
9. if other steps are carried out in requirement.
The step of top order provides a kind of method that is used to make mask according to the embodiment of the invention.Go out as shown, this step is included in the deposition of material with carbon element on the edge of substrate, to form the marginal texture as the border (border) of mask pattern.This method has step still less, so more feasible on more efficient and the cost.In whole specification, can find further details, and can more specifically understand according to the accompanying drawing that describes below.
Figure 12 is a kind of simplification viewgraph of cross-section of making the method for mask of diagram according to the embodiment of the invention to 17A.Here, these figure only are explanations, and should not limit scope required for protection inadequately.Those skilled in the art will know many other variation, modification and replacements.Go out as shown, this method is from providing quartz substrate 1201.This quartz substrate is preferred parent material, but also can use other to demonstrate the material of similar light-transfer characteristic.Substrate comprises the MoSi material membrane 1203 that covers.Can also use other materials, for example CrF
x, Ta
xO
yAnd CrF
xO
y
Quartz substrate comprises the MoSi film 101 that covers substrate.Can also use other films, for example CrF with type characteristic
xPreferably, can use for example sputter, plating or plasma-deposited deposition technique to deposit the MoSi film.This method forms the photoresist layer 1205 that covers the MoSi film.With reference to Figure 13, this method 1301 photoresist layers 1205 that expose.Go out as shown, the zone that is exposed will be gone to peel off by the development shown in Figure 14.In photoresist layer, form opening 1401 and be used for mask pattern 1400.
Then, as shown in Figure 15, this method is by the opening etching MoSi film in the photoresist layer.Preferably, can use the dry etching technology.As just an example, this dry etching technology comprises plasma etching, reactive ion etching and ion coupling, also has other technologies.Plasma etching is removed 1501 MoSi films selectively, and can not damage quartz substrate.Quartz substrate plays the effect of etching stopping thing in the etching processing of MoSi film.Now, the MoSi film that is etched of patterning is to form the mask pattern that will use in integrated circuit is made.In addition, the MoSi film is not to use the wet process etching, and it does not have undercut area basically.Then, as shown in Figure 16, this method stripping photolithography glued membrane.Peel off the calcination (asher) that frequent use utilization contains the plasma of oxygen.Certainly, concrete lift-off technology depends on other factors.
Preferably, illustrated as Figure 17 A, this method forms border 1701 along the periphery 1703 of the masks area that is patterned.In a certain embodiments, the border is (carbon or the chromium) material that is deposited.The material with carbon element that is deposited is in C
12, C
13, C
14State.The material with carbon element that is deposited has 4800 microns width, 50nm to the thickness of 300nm with around the length of the periphery of masks area 1701.According to embodiment, can use specific technology to come the deposit carbon material.As just an example, can use focused ion beam (focused ion beam, " FIB ") instrument 1705 (seeing Figure 17 B) to come the deposit carbon material, the SIR3000 that described instrument is for example made for the NSK instrument.Perhaps, the laser deposition technique that for example can use the laser beam depositing system made by NEC Corporation to provide.The material with carbon element that is deposited has from about 0% to about 3% transmittance (transmittance), and it is as the border material that is fit to.Preferably, the material with carbon element that is deposited is opaque, but this just is in a slightly different state and still is within the scope of the present invention.Can find the further details of device with reference to the accompanying drawings with following description.
Figure 18 is the simplification view according to the precipitation equipment 1800 of the embodiment of the invention.This figure only is illustrative, and should not limit scope required for protection inadequately.Those skilled in the art will know many other variation, modification and replacements.Go out as shown, precipitation equipment 1800 comprises various features, for example ion source 1801, be coupled to ionogenic optical subsystem 1802, gas injection system 1803, electron gun 1804, ion monitoring device 1805 and other elements.This device comprises the x-y platform, and the x-y platform comprises the mask (or active gage) that can move with respect to optical subsystem.According to embodiment, can be by other conversion, modification and replacement.
Though illustrate according to certain embodiments that above other modification, replacement and conversion can be arranged.For example, boron has been used as impurity, but can also use for example other impurity of Ga.Should be appreciated that example described herein and embodiment are for illustrative purposes, therefore, for a person skilled in the art, will expect various modifications or change, and will be comprised in the application's the spirit and scope and in the principle of claims.
Be used to use this mask arrangement to make the method for integrated circuit (IC)-components according to a kind of of the embodiment of the invention, probably be described below:
1. quartz substrate is provided;
2. cover the MoSi film of substrate on forming;
3. cover the photoresist layer of MoSi film on forming;
4. exposed photoresist layer;
5. the development photoresist layer is to be formed for the opening of mask pattern;
6. by opening dry etching MoSi film;
7. stripping photolithography glued membrane;
8. deposit carbon material on the edge of substrate is to form marginal texture;
9. the mask arrangement that is patterned that is done is provided;
10. mask arrangement is used for the manufacturing of integrated circuit; And
11. if other steps are carried out in requirement.
The step of top order provides a kind of method that is used to make mask according to the embodiment of the invention.Go out as shown, this method is included in deposit carbon material on the edge of substrate, to form the marginal texture as the border of mask pattern.This method has step still less, so more feasible on more efficient and the cost.This method comprises that also the mask that will be finished is used for the manufacturing of integrated circuit.
Though illustrate according to certain embodiments that above other modification, replacement and conversion can be arranged.For example, boron has been used as impurity, but can also use for example other impurity of Ga.Should be appreciated that example described herein and embodiment are for illustrative purposes, therefore, for a person skilled in the art, will expect various modifications or change, and will be comprised in the application's the spirit and scope and in the principle of claims.
Claims (20)
1. method that is used to make the mask that is used for integrated circuit (IC)-components, described method comprises:
Quartz substrate with surface is provided, and described quartz substrate has a thickness;
Cover the MoSi film of quartz substrate surface in the formation;
Cover the MoSi film of quartz substrate on the patterning, to form mask pattern; And
Form opaque edge, described opaque edge is comprising the material that contains carbon on a part of surface of mask pattern neighboring area; Wherein, opaque marginal texture has the luminous transmittance that changes between about 0% to about 3%.
2. the method for claim 1, wherein the formation of described opaque marginal texture provides by laser deposition.
3. the method for claim 1, wherein the formation of described opaque marginal texture provides by focused ion beam.
4. the method for claim 1, wherein described opaque marginal texture has occupied the zone that does not have mask pattern on the quartz substrate.
5. the method for claim 1, wherein described mask pattern is used for the halftoning phase shift mask.
6. the method for claim 1 also comprises and cleans MoSi film and the opaque marginal texture that is patterned.
7. the method for claim 1, wherein described carbon is in C
12, C
13, C
14State.
8. the patterning of the method for claim 1, wherein described MoSi film is a photoetching treatment.
9. method as claimed in claim 8, wherein, described patterning is the employed unique photoetching treatment of described method.
10. the method for claim 1, wherein described mask pattern does not have the chromium film.
11. a method that is used for the processing integrated circuit device, described method comprises:
Mask arrangement is provided, described mask arrangement comprises quartz substrate, the MoSi film that is patterned and the opaque marginal texture with surface, cover quartz substrate surface on the described MoSi film that is patterned and be used to form mask pattern, described opaque marginal texture is comprising the material that contains carbon on a part of surface of mask pattern neighboring area; And
Use mask arrangement, be used for pattern is applied to the light-sensitive material that covers Semiconductor substrate.
12. method as claimed in claim 11, wherein, described mask arrangement is a mask.
13. method as claimed in claim 11, wherein, the described material that contains carbon is in C
12, C
13, C
14State.
14. method as claimed in claim 11, wherein, the formation of described opaque marginal texture provides by laser deposition.
15. method as claimed in claim 11, wherein, the formation of described opaque marginal texture provides by focused ion beam.
16. the method for claim 1, wherein described opaque marginal texture has occupied the zone that does not have mask pattern on the quartz substrate.
17. method as claimed in claim 11, wherein, described mask pattern is used for the halftoning phase shift mask.
18. method as claimed in claim 11 also comprises and cleans MoSi film and the opaque marginal texture that is patterned.
19. a halftoning phase shift mask that is used for integrated circuit (IC)-components, described mask comprises:
Substrate with surface;
On cover the light blocking film that is patterned of described substrate surface; And
Opaque marginal texture, it is comprising the material that contains carbon on a part of surface of mask pattern neighboring area.
20. mask as claimed in claim 19, wherein, the described material that contains carbon is in C
12, C
13, C
14State.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB200310122965XA CN100442475C (en) | 2003-12-30 | 2003-12-30 | Method and structure for manufacturing halftone mask for semiconductor wafer |
| US10/773,519 US7229932B2 (en) | 2003-12-30 | 2004-02-06 | Method and structure for fabricating a halftone mask for the manufacture of semiconductor wafers |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB200310122965XA CN100442475C (en) | 2003-12-30 | 2003-12-30 | Method and structure for manufacturing halftone mask for semiconductor wafer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1635626A true CN1635626A (en) | 2005-07-06 |
| CN100442475C CN100442475C (en) | 2008-12-10 |
Family
ID=34683167
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB200310122965XA Expired - Lifetime CN100442475C (en) | 2003-12-30 | 2003-12-30 | Method and structure for manufacturing halftone mask for semiconductor wafer |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US7229932B2 (en) |
| CN (1) | CN100442475C (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9122175B2 (en) | 2012-10-11 | 2015-09-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Image mask film scheme and method |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5674647A (en) * | 1992-11-21 | 1997-10-07 | Ulvac Coating Corporation | Phase shift mask and manufacturing method thereof and exposure method using phase shift mask |
| JP3064769B2 (en) * | 1992-11-21 | 2000-07-12 | アルバック成膜株式会社 | PHASE SHIFT MASK, ITS MANUFACTURING METHOD, AND EXPOSURE METHOD USING THE PHASE SHIFT MASK |
| KR970007822B1 (en) * | 1993-11-15 | 1997-05-17 | 현대전자산업 주식회사 | Fabricating method of semiconductor device |
| JP3440338B2 (en) * | 1993-11-30 | 2003-08-25 | 大日本印刷株式会社 | Halftone phase shift photomask |
| US6277526B1 (en) * | 1998-12-28 | 2001-08-21 | Micron Technology, Inc. | Method for repairing MoSi attenuated phase shift masks |
| CN1452009A (en) * | 2002-04-16 | 2003-10-29 | 林心迪 | Method for forming phase deviation optical mask of microimage mfg. process |
| US7011910B2 (en) * | 2002-04-26 | 2006-03-14 | Hoya Corporation | Halftone-type phase-shift mask blank, and halftone-type phase-shift mask |
| JP4014922B2 (en) * | 2002-04-26 | 2007-11-28 | Ｈｏｙａ株式会社 | Halftone phase shift mask blank and halftone phase shift mask |
-
2003
- 2003-12-30 CN CNB200310122965XA patent/CN100442475C/en not_active Expired - Lifetime
-
2004
- 2004-02-06 US US10/773,519 patent/US7229932B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US20050142892A1 (en) | 2005-06-30 |
| CN100442475C (en) | 2008-12-10 |
| US7229932B2 (en) | 2007-06-12 |
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