CN1632927A - Plasma etching method for eliminating organic substance using sulfur dioxide mixture gas - Google Patents
Plasma etching method for eliminating organic substance using sulfur dioxide mixture gas Download PDFInfo
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- CN1632927A CN1632927A CN 200410093456 CN200410093456A CN1632927A CN 1632927 A CN1632927 A CN 1632927A CN 200410093456 CN200410093456 CN 200410093456 CN 200410093456 A CN200410093456 A CN 200410093456A CN 1632927 A CN1632927 A CN 1632927A
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Abstract
This invention relates to plasm etching process to eliminate the micro-loading effect in the damascene structure in the integration copper channel. The dual damascene technique is the new metal distribution technique with the development of the deep micron integration technique.
Description
Technical field
The invention belongs to the integrated circuit processing technique field, be specifically related to a kind of sulfur dioxide mixture gas that in integrated circuit, utilizes and eliminate organic plasma etching method.
Background technology
Along with the continuous development of information technology, mechanics of communication and Internet technology, more and more higher to the requirement of performance of integrated circuits, and then constantly promoting integrated circuit fabrication process to high integration, big capacity, at a high speed, the direction high speed development of low-power consumption.Along with the speed of service of chip is more and more faster, how to solve low power consumption of maintenance and low caloric value, extend working time, maximum ground improves the chip overall performance and becomes one of key of integrated circuit technology manufacturing.
The conducting of integrated circuit is finished by metal connecting line, is to use metallic aluminium to finish this target in technology in the past, but along with the size highly integrated, that chip is relevant of chip is more and more littler, the weakness of metallic aluminium wiring is more and more obvious; Because metallic copper has lower resistivity, better electromigration stability than metallic aluminium, utilize copper to replace aluminium as integrated circuit after the road metal line become inexorable trend.But in manufactured copper wiring, the method that relies on original dry plasma etch metallic aluminium is difficulty very, is essential so use different graph technologies, the origin of Here it is copper damascene structure.Nowadays, in the road, the use of damascene structure is the most general behind the deep sub-micron technique integrated circuit, how to carry out damascene structure, eliminates anomaly, becomes one of key of integrated circuit fabrication process.According to the characteristics of damascene structure, how to carry out organic filling, utilize high-density plasma to carry out anisotropic etching, be the key point of dealing with problems.The method of utilizing carbon fluorine class etching gas organic substance eliminated commonly used with respect to industry, in etching organic matter, can carry out etching to oxide or low dielectric material down, cause structure to produce difference (micro-loading effect), finally influence circuit performance.
Summary of the invention
The objective of the invention is to propose a kind of plasma etching method of in the integrated circuit damascene structure, eliminating the organic substance packed layer.
The present invention utilizes sulfur dioxide mixture gas to eliminate organic substance to have significant effect, can obtain high etching selection ratio, in etching organic matter, to the etching not of material down, has kept the structure indifference, thereby has guaranteed the circuit performance uniformity.Use sulfur dioxide mixture gas that organic substance is carried out anisotropic etching, feature structure (being made of etching barrier layer and insulating medium layer) is formed the sidewall protection, improved the evenness of structural edge.
Therefore; the plasma etching method of in the integrated circuit damascene structure, eliminating the organic substance packed layer that the present invention proposes; be to use the mist that contains sulfur dioxide that the organic substance in the integrated circuit damascene structure is carried out anisotropic etching; thereby the feature structure that is made of etching barrier layer and insulating medium layer is formed the sidewall protection, improve the evenness of structural edge.The etching barrier layer material can adopt silicon nitride, silicon oxynitride or carbofrax material etc., and the dielectric layer material can adopt oxide-film material or advanced low-k materials; The gas that described mist can adopt oxygen, hydrogen, nitrogen, argon gas, carbon monoxide, carbon dioxide or carbon fluorine type gas to mix with sulfur dioxide gas, sulfur dioxide is 50%～300% of other gas volume in the mist.
The present invention eliminates the organic substance anti-reflecting layer of being filled on the structure by using sulfur dioxide mixture gas, can greatly improve the influence of architectural difference phenomenon (micro-loading effect) to damascene structure technology in road behind the integrated circuit, improve the rate of finished products of metal line, also eliminated owing to of the influence of architectural difference phenomenon to transistorized resistance capacitance time delay (RC Delay), (cross-talk) phenomenon of crosstalking.
Description of drawings
Fig. 1 is that traditional carbon fluorine class etching gas that utilizes is cut down the process schematic representation of organic substance packed layer.
Fig. 2 is that traditional carbon fluorine class etching gas that utilizes is cut down the structural representation that obtains behind the organic substance packed layer.
Fig. 3 is that wet method was removed the damascene structure schematic diagram (having the architectural difference phenomenon to take place) that obtains behind the organic residue after etching was finished.
Fig. 4 utilizes sulfur dioxide mixing etching gas to cut down the process schematic representation of organic substance packed layer.
Fig. 5 utilizes sulfur dioxide mixing etching gas to cut down the structural representation that obtains behind the organic substance packed layer.
Fig. 6 is that wet method was removed the complete damascene structure schematic diagram that obtains behind the organic residue after etching was finished.
Drawing reference numeral: 1 for the photoresist figure, 2 after the exposure be the organic substance packed layer, 3 for the dielectric material layer, 4 for for following ground etching barrier layer material, 5 for the organic filler of carbon fluorine type gas etching, 6 for the architectural difference phenomenon, 7 for the organic filler of sulfur dioxide mixture gas etching, 8 be complete damascene structure (non-structure difference phenomenon).
Embodiment
Implementation step of the present invention is as follows:
1, with enhancement mode plasma chemical vapor deposition method deposit etching barrier layer material: carborundum;
2, with enhancement mode plasma chemical vapor deposition method deposit dielectric material: silicon dioxide:
3, carry out first step lithography step, with the graph exposure of through hole on silicon chip;
4, through hole is carried out etching, photoresist is removed, and silicon chip cleans;
5, carry out the organic filling of anti-reflecting layer, coating;
6, carry out the second step lithography step, with the graph exposure of metal valley on silicon chip;
7, utilize sulfur dioxide mixture gas, mist can be oxygen, hydrogen, nitrogen, argon gas, carbon monoxide, carbon dioxide or carbon fluorine type gas, the volume ratio of sulfur dioxide and mist is 0.5: 1 or 1.25: 1 or 3: 1, and the organic substance packed layer is carried out etching;
8, metal valley is carried out etching, photoresist is removed, and silicon chip cleans, and obtains complete damascene structure.
Claims (5)
1, a kind of plasma etching method of in the integrated circuit damascene structure, eliminating the organic substance packed layer; it is characterized in that using the mist that contains sulfur dioxide that organic substance is carried out anisotropic etching; the feature structure that is made of etching barrier layer and insulating medium layer is formed the sidewall protection, improve the evenness of structural edge.
2, elimination organic substance packed layer plasma etching method according to claim 1 is characterized in that described etching barrier layer material adopts silicon nitride, silicon oxynitride or carbofrax material.
3, elimination organic substance packed layer plasma etching method according to claim 1 is characterized in that described dielectric layer material adopts oxide-film material or advanced low-k materials.
4, elimination organic substance packed layer plasma etching method according to claim 1 is characterized in that the described mist that contains sulfur dioxide adopts oxygen, hydrogen, nitrogen, argon gas, carbon monoxide, carbon dioxide or carbon fluorine type gas to mix composition with sulfur dioxide gas.
5,, it is characterized in that sulfur dioxide gas is 50%～300% of other gas volume in the described mist according to the plasma etching method of the described elimination organic substance of claim 4 packed layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410093456 CN1632927A (en) | 2004-12-23 | 2004-12-23 | Plasma etching method for eliminating organic substance using sulfur dioxide mixture gas |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410093456 CN1632927A (en) | 2004-12-23 | 2004-12-23 | Plasma etching method for eliminating organic substance using sulfur dioxide mixture gas |
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| Publication Number | Publication Date |
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| CN1632927A true CN1632927A (en) | 2005-06-29 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
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| CN 200410093456 Pending CN1632927A (en) | 2004-12-23 | 2004-12-23 | Plasma etching method for eliminating organic substance using sulfur dioxide mixture gas |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1996588B (en) * | 2005-12-31 | 2011-04-06 | 上海集成电路研发中心有限公司 | A copper-gas media Damascus structure and its making method |
| CN103021834A (en) * | 2011-09-21 | 2013-04-03 | 东京毅力科创株式会社 | Etching method, etching apparatus, and storage medium |
| CN101183645B (en) * | 2006-11-16 | 2013-08-21 | 瑞萨电子株式会社 | Method of manufacturing semiconductor device |
-
2004
- 2004-12-23 CN CN 200410093456 patent/CN1632927A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1996588B (en) * | 2005-12-31 | 2011-04-06 | 上海集成电路研发中心有限公司 | A copper-gas media Damascus structure and its making method |
| CN101183645B (en) * | 2006-11-16 | 2013-08-21 | 瑞萨电子株式会社 | Method of manufacturing semiconductor device |
| CN103021834A (en) * | 2011-09-21 | 2013-04-03 | 东京毅力科创株式会社 | Etching method, etching apparatus, and storage medium |
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