CN1619825A - Packaging structure of image sensing component element and its chip packaging method - Google Patents

Packaging structure of image sensing component element and its chip packaging method Download PDF

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Publication number
CN1619825A
CN1619825A CNA2003101038652A CN200310103865A CN1619825A CN 1619825 A CN1619825 A CN 1619825A CN A2003101038652 A CNA2003101038652 A CN A2003101038652A CN 200310103865 A CN200310103865 A CN 200310103865A CN 1619825 A CN1619825 A CN 1619825A
Authority
CN
China
Prior art keywords
image sensing
wafer
transparent base
sensing component
circuit layout
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2003101038652A
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Chinese (zh)
Inventor
郭文松
潘寅年
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RUNDE SEMICONDUCTOR MATERIAL CO Ltd
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RUNDE SEMICONDUCTOR MATERIAL CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RUNDE SEMICONDUCTOR MATERIAL CO Ltd filed Critical RUNDE SEMICONDUCTOR MATERIAL CO Ltd
Priority to CNA2003101038652A priority Critical patent/CN1619825A/en
Publication of CN1619825A publication Critical patent/CN1619825A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Abstract

This invention discloses chip grade package method for image sensor, which contains providing a chip and a transparent substrate joined on chip making each image sensor unit on chip matched with each unit on substrate, cutting each unit to divide into plurality of image sensor units, then connecting each image sensor unit of each image sensor assembly with flexible circuit board to complete the package. Said invention has simple process and high cleanliness.

Description

The encapsulating structure of image sensing component and methods for wafer-level packaging thereof
Technical field
The present invention relates to encapsulation and the structure and the methods for wafer-level packaging thereof of a kind of encapsulation of image sensing component, particularly a kind of image sensing component.
Background technology
In the encapsulation technology of image sensing component, known utilize chip directly to connect substrate usually (chip onboard, technology COB) reaches the encapsulation purpose.The encapsulation procedure of COB generally includes chip cutting (diesaw), glutinous brilliant (die bond), bonding wire (wire bond) and sealing steps such as (mold); Yet, this COB encapsulation technology has but that the routing processing procedure is complicated, yield is low, chip easily tilts and defective such as overall process is complicated, and gradually by winding encapsulation (tape carrier package, TCP) and glass flip chip (chip onglass, COG) etc. encapsulation technology replaces.Wherein, COG encapsulation refers to packaged type that integrated circuit (IC) chip (IC chip) is directly engaged with glass plate.
The image sensor encapsulation technology such as No. the 474100th, the Taiwan patent announcement " image sensor package and method for packing thereof " of known application COG structure, it is to form plural image sensor on a wafer earlier, wherein each image sensor has a light receiving area and a basal surface, and is formed with plural joint sheet in the light receiving area outer rim; Then around the light receiving area of each image sensor, form a solid, cover a glass plate again, then cut this wafer, to form a plurality of image sensor packages to fit on this wafer.Though this image sensor package is for comprising the COG structure of an image sensor and a glass; Yet; the image signal of its sensing must transfer out by a printed circuit board (PCB); so the basal surface of image sensor must be fitted with a printed circuit board (PCB); and utilize the complex lead pin to connect this printed circuit board (PCB) and these joint sheets; and a protective layer is set with the guardwire pin, and make this patent still desirable not to the utmost for the effect of simplifying encapsulation procedure, can't meet the trend that processing procedure is simplified; and can't effectively reduce cost of manufacture, and the volume-diminished of image sensing package assembling is limited.
Summary of the invention
Main purpose of the present invention provides a kind of structure and methods for wafer-level packaging thereof of image sensing component, by laying circuit layout corresponding to the conductive projection on the image sensing chip at the lower surface of transparent panel, and printed circuit board (PCB) need not be set, and conducting transparent panel and chip through the joint of anisotropic conductive, and do not need known routing (wire bonding) operation, effectively to reach the effect of simplifying processing procedure and reducing cost.
Another object of the present invention provides a kind of methods for wafer-level packaging of image sensing component, to provide volume little encapsulating structure.
A further object of the present invention provides a kind of methods for wafer-level packaging of image sensing component, by earlier wafer and transparent base joint then just being cut, to guarantee the high-cleanness, high of image sensing chip, and can reach the requirement of high yield easily, and then overcome known chip pollution and the low problem of yield.
For achieving the above object, the invention provides a wafer, be laid with plural image sensing unit at the upper surface of wafer, and a transparent base is provided, it is formed with plural transparent base unit corresponding to these image sensing units, and lays a circuit layout at the lower surface of each transparent base unit; Then utilize an anisotropic conductive that transparent base is engaged with wafer, make transparent base be positioned at the top of wafer, and make the circuit layout of each transparent base unit corresponding with each image sensing unit and form and be electrically connected; Be unit cut crystal and transparent base then, and then cut apart the plural image sensing component of formation with these unit on this wafer and the transparent base.
Below by the detailed description of specific embodiment conjunction with figs., with the effect that is easier to understand purpose of the present invention, technology contents, characteristics and is reached.
Description of drawings
Fig. 1 is the structure cutaway view of image sensing component of the present invention;
Fig. 2 A is the image sensing chip schematic diagram of image sensing component of the present invention;
Fig. 2 B is the transparent panel schematic diagram of image sensing component of the present invention;
Fig. 3 is a wafer schematic diagram provided by the invention;
Fig. 4 is a transparent base schematic diagram provided by the invention;
Fig. 5 to Fig. 9 is the present invention's each step organigram in the encapsulation image sensing component.
Description of reference numerals: 1 wafer; 10 image sensing chips; 10 ' image sensing unit; 12 photosensitive areas; 14 conductive projections; 2 transparent bases; 20 transparent panels; 20 ' transparent base unit; 22 circuit layouts; 24 conductive junction points; 26 transparent areas; 30 anisotropic conductives; 40 thin film circuits; 50 microscope bases; 52 optical mirror slips.
Embodiment
The present invention lays circuit layout with the conductive projection on the corresponding image sensing chip at the lower surface of the transparent panel of image sensing component, circuit layout and conductive projection by the upper and lower correspondence of joint conducting of anisotropic conductive, remove line connection process and printed circuit board (PCB) need not be set and economize, to reach the purpose that processing procedure is simplified.
The structure cutaway view of a preferred embodiment of the present invention as shown in Figure 1, the encapsulating structure of an image sensing component comprise an image sensing chip 10 and a transparent panel 20; Please consult the schematic diagram of Fig. 2 A and Fig. 2 B difference show image sensor chip 10 and transparent panel 20 simultaneously, upper surface at image sensing chip 10 is provided with a photosensitive area 12, and be provided with complex conduction projection 14 in the periphery of photosensitive area 12 and be connected to this photosensitive area 12 respectively, conductive projection 14 is generally golden projection; Transparent panel 20 is arranged on the top of image sensing chip 10, its material is generally glass or light-passing plastic, the size of transparent panel 20 is big than image sensing chip 10, transparent panel 20 is provided with a transparent area 26 corresponding to photosensitive area 12, be provided with a circuit layout 22 at the lower surface of transparent panel 20 and the periphery that is positioned at transparent area 26, and this circuit layout 22 forms with these conductive projections 14, the relation of following circuit correspondence, wherein this circuit layout 22 includes complex conduction contact 24, and these conductive junction points 24 are exposed to outside the image sensing chip 10, with the contact of externally exporting as image signal; Between image sense chip 10 and transparent panel 20 and the periphery that is positioned at photosensitive area 12 be provided with an anisotropic conductive (anisotropic conductive film, ACF) 30, so that Dui Ying circuit layout 22 and these conductive projections 14 engage and conducting up and down up and down, and then by photosensitive area 12 sensing images of image sensing chip 10, and through the conducting of projection 14 and anisotropic conductive 30 image signal of institute's sensing being sent to circuit layout 22 receives, and then connect electricity 24 by circuit layout 22 via its external conduction and be connected with an external circuitry, and this image signal is exported.
Wherein, by lay at the lower surface of transparent panel 20 circuit layout 22 corresponding to image sensing chip on 10 conductive projection 14, can economize and remove the known structure that printed circuit board (PCB) must be arranged, and conducting transparent panel 20 and image sensing chip 10 through the joint of anisotropic conductive 30, do not need known routing (wire bonding) operation, not only effectively reach the purpose of simplifying processing procedure, can effectively reduce cost of manufacture and material cost simultaneously, and have the thin little effect of volume.
After understanding encapsulating structure of the present invention, the detailed description the present invention that continues uses wafer-class encapsulation to make each step structure and method for packing of this encapsulating structure, sees also Fig. 3 to Fig. 9.At first, as shown in Figures 3 and 4, one wafer 1 and a transparent base 2 are provided, upper surface at wafer 1 is complied with required integrated circuit (integrated circuit in advance, IC) layout is laid with the image sensing unit 10 ' that complex matrix is arranged, each image sensing unit 10 ' comprises a photosensitive area 12 and peripheral complex conduction projection 14 thereof, and reserves the Cutting Road 16 of a broad; And the material of transparent base 2 is generally glass or light-passing plastic, transparent base 2 is formed with plural transparent base unit 20 ' corresponding to these image sensing units 10 ', and each transparent base unit 20 ' is preset with 26 pairs of transparent areas should photosensitive area 12, lower surface in transparent base unit 20 ' is positioned at these transparent area 26 peripheries and is provided with a circuit layout 22, and its wiring is corresponding with the conductive projection 14 on the image sensing unit 10 '.
Then, as shown in Figure 5, the lower surface in each transparent base unit 20 ' forms anisotropic conductives 30 along transparent area 26 peripheries, and the preferably uses anisotropic conductive adhesive tape, and it is attached at the periphery of transparent area 26; After soon utilize the contraposition mark (not shown) be arranged at wafer 1 and transparent base 2 surfaces, transparent base 2 is engaged with wafer 1 upper and lower aligning, as shown in Figure 6, make transparent base 2 be positioned at the top of wafer 1, and make each transparent base unit 20 ' go to upper and lower corresponding relation, simultaneously corresponding and electrical connection conducting about forming of these conductive projections on the circuit layout 22 of each transparent base unit 20 ' lower surface and each image sensing unit 10 ' 14 with each image sensing unit 10 '.
After the step of finishing joint wafer 1 and transparent base 2, then, shown in Fig. 7 A, with these unit 10 ' on wafer 1 and the transparent base 2,20 ' cuts for unit, the mode of cutting is earlier wafer 1 to be inverted, make its lower surface up, cut apart wafer 1 so that follow Cutting Road 16 down to cut from the lower surface of wafer 1, then make transparent base 2 be positioned at the top of wafer 1 wafer 1 upset again, cut apart transparent base 2 so that down cut from the upper surface of transparent base 2, and then cut apart and form plural image sensing component, shown in Fig. 7 B, promptly finish the flow process of encapsulation, make each image sensing component comprise the transparent base unit 20 ' of an image sensing unit 10 ' and top joint thereof, promptly be same as structure shown in Figure 1.
Wherein, can be according to the different demands of encapsulation degree, finish step of cutting after, the step that further comprises component film circuit and microscope base, as shown in Figure 8, a flexible thin film circuit 40 is plugged in the conductive junction point 24 of transparent base unit 20 ', thin film circuit 40 is extended to outside the transparent base unit 20 ', thin film circuit 40 is commonly called as golden finger, as the media of the signal of this circuit layout 22 and external circuitry transmission; In addition, also can be more as shown in Figure 9, the microscope base 50 that a top is provided with optical mirror slip 52 is installed on the transparent base unit 20 ', promptly finishes whole assembling flow path.
Therefore, image sensing component provided by the invention, by laying circuit layout corresponding to the conductive projection on the image sensing chip at the lower surface of transparent panel, and printed circuit board (PCB) need not be set, and conducting transparent panel and chip by the joint of anisotropic conductive, and do not need known routing (wire bonding) operation, cooperate methods for wafer-level packaging, not only effectively reach the purpose of simplifying processing procedure, make image sensing component have the easy advantage of processing procedure, can reach the essence economic benefit of low-cost and high yield simultaneously really; In addition, methods for wafer-level packaging system can guarantee the high-cleanness, high of image sensing chip, to overcome known chip pollution problems.
More than by embodiment characteristics of the present invention are described, its purpose makes those skilled in the art understand content of the present invention and is implementing according to this, and non-limiting scope of the present invention, so all other do not break away from equivalence modification or the modification that disclosed spirit is finished, and must be included in the scope of the following stated claim.

Claims (12)

1, a kind of encapsulating structure of image sensing component comprises:
One image sensing chip, the surface is provided with a photosensitive area thereon, and is provided with the complex conduction projection in the periphery of described photosensitive area;
One transparent panel is arranged on the top of described image sensing chip, is provided with a circuit layout at the lower surface of described transparent panel and the periphery that is positioned at corresponding described photosensitive area, and described circuit layout and conductive projection such as described form upper and lower circuit corresponding relation; And
One anisotropic conductive, be located at the periphery of described photosensitive area, corresponding up and down described circuit layout and the described conductive projection that waits are engaged and conducting up and down, receiving the image signal of described photosensitive area institute sensing by described circuit layout, and described image signal is exported.
2, the encapsulating structure of image sensing component as claimed in claim 1, wherein, the described circuit layout that is positioned at described transparent panel lower surface comprises the complex conduction contact, and it is exposed to outside the described image sensing chip, with the contact of externally exporting as described image signal.
3, the encapsulating structure of image sensing component as claimed in claim 1, wherein, the more described image sensing chip of the size of described transparent panel is big.
4, the encapsulating structure of image sensing component as claimed in claim 1, wherein, described circuit layout also is connected with a thin film circuit, and described thin film circuit extends to outside the described transparent panel, as the signal transmission medium of a described circuit layout and an external circuitry.
5, the encapsulating structure of image sensing component as claimed in claim 1, wherein, the material of described transparent panel be selected from glass and light-passing plastic one of them.
6, the encapsulating structure of image sensing component as claimed in claim 1 wherein, also is arranged with a microscope base on described transparent panel.
7, a kind of methods for wafer-level packaging of image sensing component may further comprise the steps:
One wafer and a transparent base are provided, upper surface at described wafer is provided with plural image sensing unit, and described transparent base is formed with plural transparent base unit corresponding to image sensing unit such as described, and wherein the lower surface of each described transparent base unit is provided with a circuit layout;
Utilize an anisotropic conductive that described transparent base is engaged with described wafer, make described transparent base be positioned at the top of described wafer, and make the described circuit layout of each described transparent base unit corresponding with each described image sensing unit and form and be electrically connected; And
With the unit such as described on described wafer and the described transparent base is that unit cuts described wafer and described transparent base, forms plural image sensing component and cut apart.
8, the methods for wafer-level packaging of image sensing component as claimed in claim 7, wherein, each described image sensing unit comprises:
One photosensitive area; And
The complex conduction projection is positioned at described photosensitive area periphery, is electrically connected with described circuit layout formation on the described transparent base by the described conductive projection that waits.
9, the methods for wafer-level packaging of image sensing component as claimed in claim 7, wherein, step of cutting is earlier to cut apart described wafer from the lower surface cutting of described wafer, then cuts apart described transparent base from the upper surface cutting of described transparent base.
10, the methods for wafer-level packaging of image sensing component as claimed in claim 7, wherein, after finishing step of cutting, also comprise the step that a thin film circuit is connected described circuit layout, described thin film circuit is extended to outside the described transparent base unit, as the signal transmission medium of a described circuit layout and an external circuitry.
11, the methods for wafer-level packaging of image sensing component as claimed in claim 7 wherein, after finishing step of cutting, comprises that also one installs the step of a microscope base on described transparent base unit.
12, the methods for wafer-level packaging of image sensing component as claimed in claim 7, wherein, the material of described transparent base be selected from glass and light-passing plastic one of them.
CNA2003101038652A 2003-11-18 2003-11-18 Packaging structure of image sensing component element and its chip packaging method Pending CN1619825A (en)

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Application Number Priority Date Filing Date Title
CNA2003101038652A CN1619825A (en) 2003-11-18 2003-11-18 Packaging structure of image sensing component element and its chip packaging method

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Application Number Priority Date Filing Date Title
CNA2003101038652A CN1619825A (en) 2003-11-18 2003-11-18 Packaging structure of image sensing component element and its chip packaging method

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CN1619825A true CN1619825A (en) 2005-05-25

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102457660A (en) * 2010-10-25 2012-05-16 致伸科技股份有限公司 Assembling method of camera module

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102457660A (en) * 2010-10-25 2012-05-16 致伸科技股份有限公司 Assembling method of camera module

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