CN1619714A - Differential pair arrangement mode for eliminating high speed digital circuit interference - Google Patents

Differential pair arrangement mode for eliminating high speed digital circuit interference Download PDF

Info

Publication number
CN1619714A
CN1619714A CN 200310112334 CN200310112334A CN1619714A CN 1619714 A CN1619714 A CN 1619714A CN 200310112334 CN200310112334 CN 200310112334 CN 200310112334 A CN200310112334 A CN 200310112334A CN 1619714 A CN1619714 A CN 1619714A
Authority
CN
China
Prior art keywords
differential pair
differential
digital circuit
speed digital
ground plane
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN 200310112334
Other languages
Chinese (zh)
Other versions
CN100561608C (en
Inventor
林有旭
叶尚苍
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hongfujin Precision Industry Shenzhen Co Ltd
Hon Hai Precision Industry Co Ltd
Original Assignee
Hongfujin Precision Industry Shenzhen Co Ltd
Hon Hai Precision Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hongfujin Precision Industry Shenzhen Co Ltd, Hon Hai Precision Industry Co Ltd filed Critical Hongfujin Precision Industry Shenzhen Co Ltd
Priority to CNB200310112334XA priority Critical patent/CN100561608C/en
Publication of CN1619714A publication Critical patent/CN1619714A/en
Application granted granted Critical
Publication of CN100561608C publication Critical patent/CN100561608C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Design And Manufacture Of Integrated Circuits (AREA)
  • Structure Of Printed Boards (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

This invention discloses a differential pairs arrangement mode, which contains the first differential pairs and second differential pairs wherein each differential pairs line is composed of two differential lines, said first and second differential pairs are arranged in polygon having plurality of combined form wherein there is no grounding layer between coactive differential pairs for reducing mutual crosstalk. Either the first or second differential pairs can be used as interference source or disturbed object. The interference source action to disturbed object in differential pairs can be reduced to minimum even zero by proper position arrangement.

Description

Eliminate the differential pair arrangement mode that high-speed digital circuit is crosstalked
[technical field]
The invention relates to a kind of differential pair wire laying mode of high-speed digital circuit, especially can eliminate the differential conductor compound mode of crosstalking in the high-speed digital circuit about a kind of.
[background technology]
The cause of crosstalking is because a signal when transmitting on transmission channel, because of electromagnetic coupled exerts an influence to adjoining transmission line, shows as on disturbed signal and injected certain coupled voltages and couple current.In the Design of Digital Circuit field, crosstalking widely exists, and along with the raising and the product shape size of signal rate are more and more littler, digital system is always crosstalked also sharply to be increased, excessive crosstalking can have influence on systematic function, even causes the false triggering of circuit, causes the system can't operate as normal.
At this situation, one of common method that adopts of industry is to utilize the differential type wire laying mode, one of usual way has 130 liang of first differential pair 120 and second differential pairs group differential pair as shown in Figure 1 among the figure, these two groups of differential pairs are to be positioned at that same wiring layer is parallel to arrange.If the differential conductor with 100 ohm is an example, its live width is 5 mils (mil), and then distance maintains about 10 mils between the differential conductor.And in the reality differential pair and between placement rule need big as far as possible at interval, can reduce differential pair with between mutual interference mutually, even in 20 mils, then on pcb board in this manner two groups of differential pairs of layout also need the space of 80 mils at least, this with obviously can not be compatible when the intensive requirement of the layout of pcb board, though, also can take to reduce the way of differential conductor width, but, can promote the difficulty on the manufacture craft like this, increase industrial cost.
Therefore, if think effectively to eliminate crosstalking in the high-speed digital circuit, the wiring arrangement mode of differential pair has played crucial effects.United States Patent (USP) announces the 6th, 017, and 247 have disclosed a kind of differential pair wire laying mode, and every pair of differential pair bends once at least, thus can with adjacent differential pair staggered positions, avoid near-end cross.But this wire laying mode need satisfy certain line length relation, can effective elimination crosstalk, and can make wiring become more intricate so undoubtedly, increases the length and the density of wiring, is not suitable for the electrical circuit pattern of high-density wiring.
Therefore, be necessary to provide a kind of more rational difference wire laying mode of high density high-speed digital circuit and layout that is applicable in fact, with the influence of effective elimination crosstalk signal.
[summary of the invention]
The object of the present invention is to provide a kind of differential pair arrangement mode that can be used for high-speed digital circuit, and be that the crosstalk differential pair that can effectively be weakened even can offset is in some cases arranged, thereby can obtain that suffered crosstalking levels off to zero Expected Results on the differential pair.
The invention is characterized in that this first differential pair and second differential pair are how much polygons and arrange, its spread geometry has multiple combination and variation form, and be provided with ground plane between the interactional differential pair, be used to reduce from each other string around, wherein, first differential pair and second differential pair all can be used as interference source or disturbed object.By appropriate position deploying, interference source acts on crosstalking on the disturbed object and can be subdued to minimum even be zero in the differential pair.
The invention has the advantages that can be when effectively saving wiring space, will crosstalk to be reduced to minimum even to be zero, complied with the demand of high-speed digital circuit development.
[description of drawings]
The present invention is further illustrated in conjunction with the embodiments with reference to the accompanying drawings.
Fig. 1 is existing differential pair arrangement mode.
Fig. 2 is that the present invention is in DIELECTRIC CONSTANT γThe differential pair of rectangular arrangement is arranged schematic diagram in the identical material.
Fig. 3 is that the present invention is in DIELECTRIC CONSTANT γThe differential pair that is trapezoidal arrangement in the different materials is arranged schematic diagram.
Fig. 4 is that the present invention is in DIELECTRIC CONSTANT γThe differential pair that parallelogram is arranged in the different materials is arranged schematic diagram.
[embodiment]
In high-speed digital circuit, the size of crosstalking and the wiring between spacing be inversely proportional to, with the wiring between parallel length be directly proportional, the factor that influence is simultaneously crosstalked also comprises: the width of lead, the thickness of lead, the dielectric constant of medium, the thickness of medium, the thickness of pad, wiring that the path of ground wire and wiring are peripheral or the like, therefore, in wiring, synthesize and coordinate many-sided factor, obtain finally that to reduce to crosstalk even make it be zero effect.
In one of preferred embodiment of the present invention, the arrangement mode of differential pair can be as shown in Figure 2, and this figure is in DIELECTRIC CONSTANT γThe differential pair of rectangular arrangement is arranged in the identical material, between first differential pair 220 of two pairs of phase mutual interference and second differential pair 230, be provided with a ground plane 240, this ground plane 240 is positioned under first differential pair 220, directly over second differential pair 230.This ground plane 240 can shield fully from the crosstalking of the other side's differential pair, thereby makes that suffered crosstalking is zero on each differential conductor.
Please in the lump referring to Fig. 3 and Fig. 4, this two figure is for being in DIELECTRIC CONSTANT γDifferential pair in the different materials, in two figure, be provided with first ground plane and second ground plane between first differential pair and second differential pair, and first ground plane all is to be positioned at same one deck with first differential pair, second ground plane all is to be positioned at same wiring layer with second differential pair.In Fig. 3, this first ground plane 350 comprises two parts, lays respectively at first differential pair, 320 two ends, and be positioned at second differential pair 330 differential conductor 331,332 directly over.340 of this second ground planes only some, and between the differential conductor 331,332 of second differential pair 330 and the differential conductor 321,322 of first differential pair 320 under.This second ground plane 340 and first ground plane 350 can also play the effect that the shielding major part is crosstalked except improving the effective impedance.Because interactional differential pair is arranged the asymmetry problem, suffered crosstalking can not be offset balance on each single-ended lead, but can subdue to leveling off to zero, with regard to whole group differential pair, also be can obtain the difference summation to be in the effect of error in can allowed band.In Fig. 4, first ground plane 450 includes only a part, it is positioned at directly over second differential pair 430, second ground plane 440 is some composition also, it is positioned under first differential pair 420, this ground plane 440,450 also has the raising effective impedance, the effect that the shielding major part is crosstalked.

Claims (9)

1. eliminate the differential pair arrangement mode that high-speed digital circuit is crosstalked for one kind, comprising: one first differential pair, described first differential pair further is made up of first differential conductor and second differential conductor; One second differential pair, described second differential lines further is made up of the 3rd differential conductor and the 4th differential conductor; One first ground plane; It is characterized in that: described first differential pair and described second differential pair are how much polygons and arrange, described first ground plane and described first differential pair are in the various wirings layer of high-speed digital circuit, and be positioned at first differential conductor of described first differential pair and second differential conductor under.
2. eliminate the differential pair arrangement mode that high-speed digital circuit is crosstalked according to claim 1, it is characterized in that: described second differential pair and described first ground plane are positioned at the various wirings layer of high-speed digital circuit, and described first ground plane be positioned at second differential pair lead directly over.
3. the differential pair arrangement mode of crosstalking as elimination high-speed digital circuit as described in the claim 2, it is characterized in that: described first differential pair and second differential pair are rectangular arrangements.
4. eliminate the differential pair arrangement mode that high-speed digital circuit is crosstalked according to claim 1, it is characterized in that: also further comprise one second ground plane, described second ground plane is made up of two parts.
5. the differential pair arrangement mode of crosstalking as elimination high-speed digital circuit as described in the claim 4, it is characterized in that: described second ground plane is the same wiring layer that is distributed in high-speed digital circuit with second differential pair, and two parts of described second ground plane lay respectively at first differential conductor of first differential pair and second differential conductor directly over.
6. the differential pair arrangement mode of crosstalking as elimination high-speed digital circuit as described in the claim 4, it is characterized in that: described first differential pair and second differential pair are to be trapezoidal arrangement.
7. eliminate the differential pair arrangement mode that high-speed digital circuit is crosstalked according to claim 1, it is characterized in that: further comprise one second ground plane, described second ground plane is the same wiring layer that is positioned at high-speed digital circuit with first differential pair.
8. the differential pair arrangement mode of crosstalking as elimination high-speed digital circuit as described in the claim 7, it is characterized in that: described first differential pair and second differential pair are that parallelogram is arranged.
9. the differential pair arrangement mode of crosstalking as elimination high-speed digital circuit as described in the claim 7 is characterized in that: described second ground plane be positioned at the 3rd differential conductor of second differential pair and the 4th differential conductor directly over.
CNB200310112334XA 2003-11-22 2003-11-22 Eliminate the differential pair spread pattern that high-speed digital circuit is crosstalked Expired - Fee Related CN100561608C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB200310112334XA CN100561608C (en) 2003-11-22 2003-11-22 Eliminate the differential pair spread pattern that high-speed digital circuit is crosstalked

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB200310112334XA CN100561608C (en) 2003-11-22 2003-11-22 Eliminate the differential pair spread pattern that high-speed digital circuit is crosstalked

Publications (2)

Publication Number Publication Date
CN1619714A true CN1619714A (en) 2005-05-25
CN100561608C CN100561608C (en) 2009-11-18

Family

ID=34759716

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB200310112334XA Expired - Fee Related CN100561608C (en) 2003-11-22 2003-11-22 Eliminate the differential pair spread pattern that high-speed digital circuit is crosstalked

Country Status (1)

Country Link
CN (1) CN100561608C (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101573632B (en) * 2006-12-19 2012-07-04 波音公司 Radio frequency navigation using frequency response matching
CN102694308A (en) * 2011-03-22 2012-09-26 富士康(昆山)电脑接插件有限公司 Electric connector
WO2013155911A1 (en) * 2012-04-17 2013-10-24 宸鸿科技(厦门)有限公司 Touch panel and fabrication method therefor
CN109546387A (en) * 2019-01-18 2019-03-29 四川华丰企业集团有限公司 Share the male end pedestal of air pocket

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW456619U (en) * 1999-07-16 2001-09-21 Molex Inc Impedance-tuned termination assembly and connectors incorporating same
US6280209B1 (en) * 1999-07-16 2001-08-28 Molex Incorporated Connector with improved performance characteristics
JP3564555B2 (en) * 2001-03-05 2004-09-15 日本航空電子工業株式会社 High-speed differential signal transmission connector
US6540559B1 (en) * 2001-09-28 2003-04-01 Tyco Electronics Corporation Connector with staggered contact pattern

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101573632B (en) * 2006-12-19 2012-07-04 波音公司 Radio frequency navigation using frequency response matching
CN102694308A (en) * 2011-03-22 2012-09-26 富士康(昆山)电脑接插件有限公司 Electric connector
CN102694308B (en) * 2011-03-22 2014-09-24 富士康(昆山)电脑接插件有限公司 Electric connector
WO2013155911A1 (en) * 2012-04-17 2013-10-24 宸鸿科技(厦门)有限公司 Touch panel and fabrication method therefor
CN109546387A (en) * 2019-01-18 2019-03-29 四川华丰企业集团有限公司 Share the male end pedestal of air pocket
CN109546387B (en) * 2019-01-18 2023-10-10 四川华丰科技股份有限公司 Common cavitation common male end base

Also Published As

Publication number Publication date
CN100561608C (en) 2009-11-18

Similar Documents

Publication Publication Date Title
JP3336527B2 (en) Flat flexible cable
US6590466B2 (en) Circuit board having shielding planes with varied void opening patterns for controlling the impedance and the transmission time of differential transmission lines
KR100283508B1 (en) Non-solid reference plane with bidirectional impedance control
US5414393A (en) Telecommunication connector with feedback
US8049118B2 (en) Printed circuit board
US6486405B2 (en) Arrangement of differential pair for eliminating crosstalk in high speed application
US4689441A (en) Routing method and pattern for reducing cross talk noise problems on printed interconnection boards
JPH0766998B2 (en) Printed circuit panel
CN1870852A (en) Printed circuit board with improved differential via
US6225568B1 (en) Circuit board having shielding planes with varied void opening patterns for controlling the impedance and the transmission time
JP2017530534A (en) High frequency RJ45 plug with discontinuous plane for crosstalk control
CN101048033A (en) Printed circuit board
CN101909401A (en) Printed circuit board structure
CN100561608C (en) Eliminate the differential pair spread pattern that high-speed digital circuit is crosstalked
CN100396165C (en) Differential wire assembling method for eliminating high speed board interferes
CN116564608A (en) Staggered shield lines extending along subsections of signal lines
EP1865757B1 (en) Reduced crosstalk in printed circuit boards by twisting tracks
CN114498201A (en) High-speed transmission cable and line end connector with same
JP7066772B2 (en) Signal transmission circuit and printed circuit board
JPH1168414A (en) Transmission line with shielded line
JPH07245575A (en) Parallel transmission line for plural signals
JP2615873B2 (en) Crosstalk shield circuit in multilayer board
KR102190809B1 (en) FPCB Cable for RF
CN111786676B (en) Circuit for improving anti-interference performance of analog signal in analog-digital hybrid circuit
CN218514574U (en) BGA via hole structure for preventing signal crosstalk of PCB

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20091118

Termination date: 20151122

EXPY Termination of patent right or utility model