CN1614880A - Current balancing method for operation amplifier design - Google Patents
Current balancing method for operation amplifier design Download PDFInfo
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- CN1614880A CN1614880A CN 200310113941 CN200310113941A CN1614880A CN 1614880 A CN1614880 A CN 1614880A CN 200310113941 CN200310113941 CN 200310113941 CN 200310113941 A CN200310113941 A CN 200310113941A CN 1614880 A CN1614880 A CN 1614880A
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Abstract
The method includes following steps: the control circuit is used to monitor the current inputted into transistor in operational amplifier, and makes the current dynamically and evenly flow across these transistors so that these transistor can work in saturation area; when the input signal is large signal, the input geminate transistors turn off , and the current passing through these transistors changes from I into U2; for making these transistors to safely work in the saturation area, the control circuit checking the working state of inputting geminate transistor controls the current passing through these transistors; when the control circuit detects there are inputting geminate transistors at turning off state, it will turn off two path current source connected with these transistors to balance the current passing through these transistors.
Description
Affiliated technical field
The present invention relates to a kind of current balance method about amplifier (Operational Amplifier) design.
Background technology
At present, during the amplifier design, bias current comes appointment by current mirror (current mirror), as shown in Figure 1.This amplifier method for designing is when being input as small-signal, and amplifier can operate as normal.If input signal is a large-signal, for example input signal amplitude is near supply voltage (supply), at this moment, the NMOS input is to pipe N1, N2 conducting, and the PMOS input is turn-offed pipe P1, P2, and N5, N6 need electric current I to be operated in the saturation region to keep it, and N3, N4 can only provide electric current I/2, thereby might force N5, N6 to enter linear zone, the gain of amplifier significantly descends.When input signal amplitude during, also can run into same problem near power supply ground (ground).
Especially, for constant input mutual conductance full swing (constant-gm rail-to-rail) amplifier, when input signal is biased in V
DD/ 2 o'clock, the PMOS input was imported all conductings to pipe N1, N2 to pipe P1, P2 and NMOS, and the electric current that they are injected into sleeve (cascode) level is I.When common mode input is biased near the supply voltage (supply) (or power supply ground (ground)), the PMOS input is turn-offed pipe P1, P2 (or the NMOS input is to pipe N1, N2), for keeping constant transconductance (constant-gm) characteristic, the NMOS input should be original four times to the tail current (tail) of pipe N1, N2, correspondingly, the NMO input is original four times to pipe from the electric current that sleeve (cascode) level absorbs, so big electric current is easy to make P4, the P5 of sleeve (cascode) level to enter linear zone, makes the gain of amplifier significantly descend.
Summary of the invention
Make the transistor of amplifier inside enter linear zone work for fear of above-mentioned variation owing to electric current, to guarantee the gain of amplifier, the present invention utilizes control circuit that the electric current of input amplifier internal transistor is effectively monitored, dynamic equiulbrium flow is through these transistorized electric currents, make these transistors always work in the saturation region, as shown in Figure 2.When input signal was small-signal, the PMOS input was I+2I to the electric current that pipe P1, P2 are injected into sleeve (cascode) level
SS, absorb by N5, N6 and two current sources in parallel with it.The NMOS input is I+2I to pipe N1, N2 from the electric current that sleeve (cascode) level absorbs
SS, provide by P4, P5 and two current sources in parallel with it.When input signal is large-signal, when for example the input signal common mode electrical level is near supply voltage (supply), the PMOS input is to pipe P1, P2 turn-offs, flow through N5, the electric current of N6 becomes I/2 by I, for making N5, N6 imports pipe P1 at PMOS, P2 is operated in the saturation region safely when turn-offing, the plumber is made the control circuit of state by detecting input, control flows is through N5, the electric current of N6, promptly, control circuit imports pipe P1 when detecting PMOS, when P2 turn-offs, this control circuit turn-offs and N5 simultaneously, the two-way current source of N6 parallel connection, equiulbrium flow is through N5, the electric current of N6, thereby in whole input voltage range, N5, N6 always works in the saturation region, and output voltage gain can not change with the variation of common mode input.In like manner, at the input signal common-mode voltage during near power supply ground (ground), the NMOS input is to pipe N1, N2 turn-offs, P4 flows through, the electric current of P5 becomes I/2 by I, for making P4, P5 in the case safety be operated in the saturation region, the plumber is made the control circuit of state by detecting input, control flows is through P4, the electric current of P5, promptly, control circuit imports pipe N1 when detecting NMOS, when N2 turn-offs, this control circuit turn-offs and P4 simultaneously, the two-way current source of P5 parallel connection, equiulbrium flow is through P4, the electric current of P5, thereby in whole input voltage range, P4, P5 always works in the saturation region, and output voltage gain can not change with the variation of common mode input.
This current balance method is simply effective, uses this method, and when amplifier was worked under the large-signal excitation, inner each transistor of amplifier all was operated under the saturation region, obtains the amplitude of oscillation to greatest extent, has improved the performance of amplifier to a great extent.
Description of drawings
Fig. 1 is the structural representation of traditional fully differential amplifier;
Fig. 2 is the structural representation of amplifier current balance method of the present invention.
Embodiment
On the electric current framework, adopt current balance method of the present invention, under three kinds of technology edges (corner), when input voltage during near power supply ground (ground), have only the PMOS input to the pipe conducting, control circuit has turn-offed the current source of relative parallel connection when the NMOS input is turn-offed pipe; When input voltage during near supply voltage (supply), have only the NMOS input to the pipe conducting, control circuit has turn-offed the current source of relative parallel connection when the PMOS input is turn-offed pipe; When input voltage fell between, the input of PMOS and NMOS was to managing all conductings, and control circuit does not turn-off these current sources in parallel simultaneously.Like this, in whole input voltage range, import mutual conductance sum substantial constant, and under three kinds of technology edges (corner), all move normal pipe.
Claims (2)
1, a kind of current balance method about the amplifier design is characterized in that: utilize control circuit that the electric current of input amplifier internal transistor is effectively monitored, dynamic equiulbrium flow is through these transistorized electric currents.
2, current balance method according to claim 1 is characterized in that: when control circuit had detected the transistor input to the pipe shutoff, this control circuit can turn-off the current source with relevant transistor parallel connection simultaneously.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN 200310113941 CN1614880A (en) | 2003-11-09 | 2003-11-09 | Current balancing method for operation amplifier design |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN 200310113941 CN1614880A (en) | 2003-11-09 | 2003-11-09 | Current balancing method for operation amplifier design |
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CN1614880A true CN1614880A (en) | 2005-05-11 |
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CN 200310113941 Pending CN1614880A (en) | 2003-11-09 | 2003-11-09 | Current balancing method for operation amplifier design |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116827276A (en) * | 2023-08-30 | 2023-09-29 | 江苏润石科技有限公司 | Operational amplifier input stage circuit and common mode state detection method |
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2003
- 2003-11-09 CN CN 200310113941 patent/CN1614880A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116827276A (en) * | 2023-08-30 | 2023-09-29 | 江苏润石科技有限公司 | Operational amplifier input stage circuit and common mode state detection method |
CN116827276B (en) * | 2023-08-30 | 2023-11-14 | 江苏润石科技有限公司 | Operational amplifier input stage circuit and common mode state detection method |
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