CN1612355A - Transistor structure with thermal protection function - Google Patents
Transistor structure with thermal protection function Download PDFInfo
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- CN1612355A CN1612355A CN 200310104671 CN200310104671A CN1612355A CN 1612355 A CN1612355 A CN 1612355A CN 200310104671 CN200310104671 CN 200310104671 CN 200310104671 A CN200310104671 A CN 200310104671A CN 1612355 A CN1612355 A CN 1612355A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
Structure of the disclosed transistor comprises primary N type metal oxide semiconductor (MOS) transistor, secondary P type MOS transistor and thermal protection unit. Drain pole and grid pole of P type MOS transistor are connected to grid pole of N type MOS transistor and thermal protection unit. Integral architecture of the two transistors is similar to N type MOS transistor. Source pole of P type MOS transistor is as grid pole of the disclosed transistor. Drain pole and source pole of the N type MOS transistor are as drain pole and source pole of the disclosed transistor. Based on sensing quantity of heat, interrupting current passing through transistors, and turning on/off transistor, the thermal protection unit prevents failures occurred in the two MOS transistors of the disclosed transistor caused by heat.
Description
(1) technical field
The relevant a kind of metal oxide semiconductor field effect of the present invention is answered transistor (Metal-Oxide-SemiconductorField-Effect Transistor, MOSFET) element, and especially in regard to the transistor arrangement with thermal protection (thermalprotection) function.
(2) background technology
Mos field effect transistor (hereinafter to be referred as metal oxide semiconductor transistor) problem (burnt out problem) overheated or that burn out often occurs in many different the electronic application products and operational circumstances.Normal, metal oxide semiconductor transistor can operate in the situation that the face of connecing (junction) temperature is 150 degree Celsius, if but internal heat energy is increased to temperature and surpasses 300 degree Celsius, metal oxide semiconductor transistor may be overheated or be burnt out.Heat can be by conduction, convection current or radiation mode transmission.The ifs circuit design is good, and the temperature change that is run in manufacturing, storage and the operating process of metal-oxide semiconductor transistor component usually can be even as big as the characterization (characterization) and the life-span of limiting element.Yet, problem overheated or that burn out still may occur under the various undesired situation of the circuit that comprises metal-oxide semiconductor transistor component, and these undesired situations may be about making, transport, operate or not enough design margin (design margin) or the like.
In operating process, individual elements can suffer the warm heat of its inside and therefore temperature rise.Inner warm heat may be because the electric current by element, and for example from the interior resistance or the switching loss (switchingloss) of element.In addition, Wai Bu warm heat also is very significant.An element is subjected to the influence of outside warm heat from other elements or environment.For integrated component, the extremely small or element in the space between the element in fact contacts with each other.In this case, convection current takes place and the chance of cooling element seldom, and the propagation of heat is easy to contain many elements.Therefore, if undesired situation exists, inner warm heat adds that outside warm heat may cause the hot stall (thermal failure) of metal-oxide semiconductor transistor component.
Hot stall is by the interference of heat (disturbance) or the element that caused of infringement or the temporary transient or permanent infringement of systemic-function.By the fault that heat caused, the restriction on the reliability may be caused in crack and space in for example consume of oxide, the fracture of breaking, encapsulate multi-layer sheet (packagedelamination) or closing line (bond wire), the chip in the distortion of metal level and chip, base material (substrate), crystal grain binding element (die bond) or the welding thing (solder joint).In addition, problem overheated or that burn out is serious hot stall result, and may cause the fusing of fire, cigarette and plastic material, so cause the misgivings on the critical safety.Overheated or the problem that burns out may be directly from cold welding (cold solder), bad gate driving (gate drive), metal oxide semiconductor transistor itself or the like.
Particularly, when metal-oxide semiconductor transistor component is used in the electric power application product, for example direct current is to direct current transducer (DC-to-DC converter), battery and switch, and metal-oxide semiconductor transistor component problem overheated or that burn out takes place probably.Please refer to Fig. 1, it illustrates a pulse width modulation, and (Pulse-Width-Modulated, PWM) direct current is to galvanic step-down (buck) change-over circuit.This circuit is an exchange adjuster (switching regulator) circuit.This circuit will convert to across the DC input voitage Vin that is regulated of the filtering capacitor Cin of previous stage circuit and wish to get the VD Vo that is regulated.Inductor Lf becomes the output filter of decompression converting circuit for this reason jointly with capacitor Cf.Hot stall may occur in two power transistor Mp and Mn.Transistor Mp is current element (pass component), and is a P-type mos transistor (PMOS).Transistor Mn is rectifier cell (rectifier), and is a N type metal oxide semiconductor transistor (NMOS).Problem overheated or that burn out takes place for fear of metal oxide semiconductor transistor, overheat protection element traditionally, for example hot fuse (thermal fuse), be used for interrupt flow and cross the electric current of metal-oxide semiconductor transistor component, in the time of the specified heat of fusible part in the thermal effect over insurance silk of electric current.If temperature surpasses the rated value of hot fuse, the fusible part that the heat that electric current produces can melt fuse is with interruptive current (open circuit).
Hot fuse can place connects with metal oxide semiconductor transistor or very close to the integrated circuit (IC) chip that will protect.Yet, use hot fuse that a lot of shortcomings are arranged.The first, fuse normally can only be used once, just can not reuse.The second, the open circuit that is directly caused by the hot stall of metal oxide semiconductor transistor itself may take place, but the hot fuse of series connection is still excellent.Because metal-oxide semiconductor transistor component burns out earlier, just make circuit become short circuit or open circuit then, so make traditional open circuit or the possibly reason that can't correctly pick out fault of short-circuit test.The 3rd, hot fuse is welded on very close to the element that will protect or carries out reflow soldering (reflow soldering) processing procedure be easy to element is produced infringement.Generally speaking, cost, size, the conductor that uses hot fuse can influence metal-oxide semiconductor transistor component contacts situation or the like, and can cause aforesaid shortcoming.
Because foregoing reason uses hot fuse can't effectively reach the thermal protection of metal-oxide semiconductor transistor component.Therefore, the solution that need find out for the thermal protection metal-oxide semiconductor transistor component is arranged.
(3) summary of the invention
According to noted earlier, the solution that need find out for the thermal protection metal-oxide semiconductor transistor component is arranged.The purpose of this invention is to provide a kind of transistor arrangement with as solution.This transistor arrangement has built-in thermal protection unit (thermal protection unit).One type of transistor arrangement of the present invention comprises a main N type metal oxide semiconductor transistor, a less important control P-type mos transistor and a thermal protection unit.Control P-type mos transistor drain end (drain) is connected to the main transistorized gate terminal of N type metal oxide semiconductor (gate).The transistorized gate terminal of control P-type mos is connected to a thermal protection unit.This double metal oxide semiconductor transistor arrangement is on the whole imitated a standard N type metal oxide semiconductor transistor.The control transistorized source terminal of P-type mos (source) is as the gate terminal of this transistor arrangement.The drain electrode end of this transistor arrangement and source terminal are N type metal oxide semiconductor transistor drain end and the source terminals that is respectively main.The critical voltage of this transistor arrangement (threshold voltage) is equivalent to the main transistorized critical voltage of N type metal oxide semiconductor.
Similarly, the another kind of type of transistor arrangement of the present invention comprises a main P-type mos transistor, a less important control N type metal oxide semiconductor transistor and a thermal protection unit.This transistor arrangement is on the whole imitated the P-type mos transistor of a standard.
For the transistor arrangement of the above first kind, when the gate terminal voltage of this transistor arrangement surpasses the critical voltage of this transistor arrangement with respect to source terminal voltage, control P-type mos transistor must be opened (turn on).Temperature is very high in element operation; for example be higher than 150 degree approximately Celsius; in order to protect this new transistor can not take place overheated or to burn out,, this transistorized gate terminal voltage must be closed (turn off) no matter, controlling the P-type mos transistor why.
Generally speaking; in various application; use the metal oxide semiconductor transistor of this new transistor arrangement as a standard; the thermal protection unit that suitable design is wherein arranged; can make two metal oxide semiconductor transistors of this transistor arrangement hot stall can not take place, and can remove the shortcoming of traditional overtemperature protection element (for example hot fuse).
For further specifying above-mentioned purpose of the present invention, design feature and effect, the present invention is described in detail below with reference to accompanying drawing.
(4) description of drawings
Fig. 1 illustrates a pulse width modulation direct current to galvanic decompression converting circuit;
Fig. 2 illustrates a type of transistor arrangement of the present invention;
Fig. 3 is a transistorized simple sectional view of standard N type metal oxide semiconductor; And
Fig. 4 illustrates the another kind of type of transistor arrangement of the present invention.
(5) embodiment
Below be description, with better explanation the present invention by two embodiment.The transistor arrangement of the present invention's first preferred embodiment is to imitate a standard N type metal oxide semiconductor transistor, and Fig. 2 then is the circuit diagram of this transistor arrangement.In Fig. 2, this transistor arrangement comprises a main N type metal oxide semiconductor transistor 200 and a less important P-type mos transistor 210.Main N type metal oxide semiconductor transistor 200 can be enhancement mode (enhancement-mode) or vague and general type (depletion-mode) N type metal oxide semiconductor transistor.Less important P-type mos transistor 210 can be enhancement mode or vague and general type P-type mos transistor.
For can clearer description standard N type metal oxide semiconductor of the present invention transistor, please be earlier with reference to the standard N type metal oxide semiconductor transistor sectional view of Fig. 3, a standard N type metal oxide semiconductor transistor uses a control electrode, be grid 302, lead (conductance) with the electricity of modulation (capacitively modulate) surface channel 304 capacitively.This surface channel 304 connects the two ends contact layer, i.e. N+ type source electrode 306 and N+ type drain electrode 308.P type semiconductor base material or matrix (body) the 300th, between source electrode 306 and drain electrode 308, and the part under grid 302.Gate insulator 310 separates matrix 300 and grid 302, and the material of gate insulator 310 is generally silicon dioxide.Surface channel 304 is the conductive regions between source electrode 306 and the drain electrode 308, and is the contact-making surface at semiconductor substrate 300 and gate insulator 310, owing to attracting carrier (carrier) to form.When grid bias surpassed the transistorized critical voltage of this N type metal oxide semiconductor, carrier can form the surface channel 304 of conduction, and contacted grids 302 by gate insulator 310 to avoid surface channel 304.In brief, the conductive capability of grid 302 modulation surface channels 304, and the grid-controlled resistance between 308 at source electrode 306 and drain electrode is provided.As for another common metal oxide semiconductor transistor type, P-type mos transistor, its matrix are N type semiconductor and source electrode and drain electrode are the P+ N-type semiconductor Ns.
Please refer to Fig. 2, the symbol of drain electrode end, source terminal and the gate terminal of main N type metal oxide semiconductor transistor 200 is respectively D1, S1 and G1.The symbol of drain electrode end, source terminal and the gate terminal of less important P-type mos transistor 210 is respectively D2, S2 and G2, and the drain electrode end D2 of less important P-type mos transistor 210 is connected to the gate terminal G1 of main N type metal oxide semiconductor transistor 200, and the gate terminal G2 of less important again P-type mos transistor 210 then is connected to a thermal protection unit.This double metal oxide semiconductor transistor arrangement overall architecture is to imitate a standard N type metal oxide semiconductor transistor.The source terminal S2 of less important P-type mos transistor 210 can be used as the gate terminal G of this transistor arrangement.The drain electrode end of this transistor arrangement and source terminal are the drain electrode end D1 and the source terminal S1 of main N type metal oxide semiconductor transistor 200, and the critical voltage of this transistor arrangement is made an appointment with the critical voltage of slightly main N type metal oxide semiconductor transistor 200 again.
The execution mode of the thermal protection unit among Fig. 2 for example can use, the voltage regulator (voltage regulator) of low leakage voltage (low dropoutvoltage) grade.In order to reach the thermal protection purpose, this thermal protection unit should be able to sensing and restriction electric current and/or heat, and can control the switch of this two metal oxide semiconductor transistor 200 and 210.When the gate terminal G of this transistor arrangement voltage surpasses the critical voltage of this transistor arrangement with respect to source terminal S1 voltage, less important P-type mos transistor 210 must be opened by the voltage of gate terminal G2, follows main N type metal oxide semiconductor transistor 200 then and also therefore is opened.The voltage of gate terminal G2 is to control by this thermal protection unit; temperature is very high in element operation; for example be higher than 150 degree approximately Celsius; in order to protect this transistor can not take place overheated or to burn out; no matter this transistorized gate terminal G voltage why, less important P-type mos transistor 210 must be closed.
In addition, carrying out the surface adhering technology of integrated circuit (IC) chip (Surface Mount Technology, during SMT) reflow soldering processing procedure, it is necessary rising to rough 200 degree Celsius in the refluxing stage temperature, so this thermal protection unit must be able to bear so high temperature, and this thermal protection unit also must be in the non-transformer supply status safely under without any the situation of element operation.What need special declaration is, the thermal protection unit of various different designs is possible and to be allowed to, as long as can reach its due function in this transistor arrangement, that is the thermal protection function.
The transistor arrangement of second preferred embodiment of the present invention then is a P-type mos transistor of imitating a standard, and Fig. 4 is the circuit diagram of this transistor arrangement.Please refer among Fig. 4, this transistor arrangement comprises a main P-type mos transistor 400 and a less important N type metal oxide semiconductor transistor 410.Main P-type mos transistor 400 can be enhancement mode or vague and general type P-type mos transistor.Less important N type metal oxide semiconductor transistor 410 can be enhancement mode or vague and general type N type metal oxide semiconductor transistor.
The symbol of drain electrode end, source terminal and the gate terminal of main P-type mos transistor 400 is respectively D1, S1 and G1.The symbol of drain electrode end, source terminal and the gate terminal of less important N type metal oxide semiconductor transistor 410 is respectively D2, S2 and G2, and the drain electrode end D2 of less important N type metal oxide semiconductor transistor 410 is connected to the gate terminal G1 of main P-type mos transistor 400, and the gate terminal G2 of less important again N type metal oxide semiconductor transistor 410 then is connected to a thermal protection unit.This double metal oxide semiconductor transistor arrangement overall architecture is to imitate the P-type mos transistor of a standard.The source terminal S2 of less important N type metal oxide semiconductor transistor 410 can be used as the gate terminal G of this transistor arrangement.The drain electrode end of this transistor arrangement and source terminal are the drain electrode end D1 and the source terminal S1 of main P-type mos transistor 400, the critical voltage of this transistor arrangement is equivalent to the critical voltage of main P-type mos transistor 400 again, and is negative value.Moreover, this thermal protection unit senses and restriction electric current and/or heat, and can control the switch of this two metal oxide semiconductor transistor 400 and 410.
When the voltage of the gate terminal G of this transistor arrangement is lower than the negative critical voltage of this transistor arrangement with respect to the voltage of source terminal S1, less important N type metal oxide semiconductor transistor 410 must be opened by the voltage of gate terminal G2, follows main P-type mos transistor 400 then and also therefore is opened.The voltage of gate terminal G2 is to control by this thermal protection unit.When temperature in the element operation is very high, for example be higher than 150 degree approximately Celsius, in order to protect this new transistor can not take place overheated or to burn out, no matter this transistorized gate terminal G voltage is why, less important N type metal oxide semiconductor transistor 410 must be closed.In addition, when the reflow soldering processing procedure of the surface adhering technology of carrying out integrated circuit (IC) chip, it is necessary rising to rough 200 degree Celsius in the refluxing stage temperature, so this thermal protection unit must be able to bear so high temperature, and under the situation without any element operation, this thermal protection unit also must be in the non-transformer supply status safely.
Though the present invention describes with reference to current specific embodiment, but those of ordinary skill in the art will be appreciated that, above embodiment is used for illustrating the present invention, under the situation that does not break away from spirit of the present invention, also can make the variation and the modification of various equivalences, therefore, as long as variation, the modification to the foregoing description all will drop in the scope of claims of the present invention in connotation scope of the present invention.
Claims (10)
1. transistor arrangement comprises at least:
One main N type metal oxide semiconductor transistor, it is extreme that it has one first drain electrode end, one first source terminal and a first grid;
One control P-type mos transistor, it has one second drain electrode end, one second source terminal and a second grid end, and it is extreme that wherein this second drain electrode end is electrically connected to this first grid; And
One thermal protection unit, be coupled to this second grid end, when any temperature in this transistor arrangement surpasses a particular value, this thermal protection unit is by closing this control P-type mos transistor, therefore and controlled avoiding this transistor arrangement because high temperature or thermal effect cause hot stall, this main N type metal oxide semiconductor transistor; Wherein, this second source terminal, this first drain electrode end, and this first source terminal respectively as gate terminal, drain electrode end and the source terminal of this transistor arrangement.
2. transistor arrangement as claimed in claim 1 is characterized in that the critical voltage of this transistor arrangement is equivalent to this main transistorized critical voltage of N type metal oxide semiconductor.
3. transistor arrangement as claimed in claim 1 is characterized in that this main N type metal oxide semiconductor transistor is to be an enhancement mode N type metal oxide semiconductor transistor or a vague and general type N type metal oxide semiconductor transistor.
4. transistor arrangement as claimed in claim 1 is characterized in that this control P-type mos transistor is to be an enhancement mode P-type mos transistor or a vague and general type P-type mos transistor.
5. transistor arrangement as claimed in claim 1 is characterized in that this thermal protection unit can bear a required high temperature that a reaches when integrated circuit (IC) chip that comprises this transistor arrangement carried out the reflow soldering processing procedure of surface adhering technology.
6. transistor arrangement comprises at least:
One main P-type mos transistor, it have one first drain electrode end, one first source terminal, and a first grid extreme;
One control N type metal oxide semiconductor transistor, it has one second drain electrode end, one second source terminal, reaches a second grid end, and it is extreme that wherein this second drain electrode end is electrically connected to this first grid; And
One thermal protection unit, be coupled to this second grid end, when any temperature in this transistor arrangement surpasses a particular value, this thermal protection unit is by closing this control N type metal oxide semiconductor transistor, to avoid this transistor arrangement because high temperature or thermal effect cause hot stall, therefore and controlled this main P-type mos transistor, wherein, this second source terminal, this first drain electrode end, and this first source terminal respectively as gate terminal, drain electrode end and the source terminal of this transistor arrangement.
7. transistor arrangement as claimed in claim 6 is characterized in that the critical voltage of this transistor arrangement is equivalent to the transistorized critical voltage of this main P-type mos.
8. transistor arrangement as claimed in claim 6 is characterized in that this main P-type mos transistor is to be an enhancement mode P-type mos transistor or a vague and general type P-type mos transistor.
9. transistor arrangement as claimed in claim 6 is characterized in that this control N type metal oxide semiconductor transistor is to be an enhancement mode N type metal oxide semiconductor transistor or a vague and general type N type metal oxide semiconductor transistor.
10. transistor arrangement as claimed in claim 6 is characterized in that this thermal protection unit can bear a required high temperature that a reaches when integrated circuit (IC) chip that comprises this transistor arrangement carried out the reflow soldering processing procedure of surface adhering technology.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200310104671 CN1612355A (en) | 2003-10-29 | 2003-10-29 | Transistor structure with thermal protection function |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200310104671 CN1612355A (en) | 2003-10-29 | 2003-10-29 | Transistor structure with thermal protection function |
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| Publication Number | Publication Date |
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| CN1612355A true CN1612355A (en) | 2005-05-04 |
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| CN 200310104671 Pending CN1612355A (en) | 2003-10-29 | 2003-10-29 | Transistor structure with thermal protection function |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104078430A (en) * | 2012-11-15 | 2014-10-01 | 英飞凌科技股份有限公司 | System and method for an electronic package with a fail-open mechanism |
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2003
- 2003-10-29 CN CN 200310104671 patent/CN1612355A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104078430A (en) * | 2012-11-15 | 2014-10-01 | 英飞凌科技股份有限公司 | System and method for an electronic package with a fail-open mechanism |
| CN104078430B (en) * | 2012-11-15 | 2017-07-07 | 英飞凌科技股份有限公司 | For the system and method for the Electronic Packaging with fail-open mechanism |
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