CN1598766A - Method for detecting whether cinewidth of circuit layout card and flow hole number according to power-supply design rule - Google Patents
Method for detecting whether cinewidth of circuit layout card and flow hole number according to power-supply design rule Download PDFInfo
- Publication number
- CN1598766A CN1598766A CN 03157414 CN03157414A CN1598766A CN 1598766 A CN1598766 A CN 1598766A CN 03157414 CN03157414 CN 03157414 CN 03157414 A CN03157414 A CN 03157414A CN 1598766 A CN1598766 A CN 1598766A
- Authority
- CN
- China
- Prior art keywords
- circuit
- power supply
- design rule
- software
- comparisons
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
The invention relates to an approach to detect whether the number of linewidth and through hole in circuit layout conforms to power supply design stipulation. A detecting program is set in circuit layout software. When the detecting program is executed, pins and through holes set in circuit layout are detected whether they conform to the stipulations or not and an error mark is made in place that doesn't conform the stipulation. Therefore, circuit layout can be modified according to the error mark.
Description
Technical field
The invention relates to the method for circuit for detecting layout, especially refer to a kind of detection process that in a circuit layout software, adds, this detection process is to detect the power pin or the via of side one circuit arrangement map, whether meet the power supply design rule, and do not meeting power supply design rule position, produce an error flag, check out conveniently that for layout person or deviser this circuit arrangement map does not meet power supply design rule position, or do not need again by deviser's rechecking, whether meet a kind of live width of circuit for detecting layout of power supply design rule and the method whether via quantity meets the power supply design code.
Background technology
In the electronic equipment now, all be provided with a printed circuit board (PCB) (the Printedcircuit board that various electronic packages are installed, be called for short: PCB), this printed circuit board (PCB) is except installing various electronic packages, the mutual electric current that its major function provides between every electronic package connects, to produce specific function or the effect that this electronic equipment is provided.
Printed circuit board (PCB) with general single face, it is that material heat insulation by insulation, also can't be crooked is made, its surface is provided with a plurality of leads (conductor pattern) or claims wiring, this lead is to provide the circuit of electronic package on the printed circuit board (PCB) to connect, but because electronic equipment constantly adds new function now, make the wiring of printed circuit board (PCB) become increasingly complex, the part that needs is also more and more, makes the printed circuit board (PCB) of single face produce the problem of using of not applying.
In order to solve the above problems, at present existing dual platen (Double-Sided Boards) and multilayer board (Multi-Layer Boards), wherein dual platen is that lead and guide hole (via) are all arranged in its two sides, this guide hole is to be full of on the printed circuit board (PCB) or coated with metal and the duck eye that runs through, in order to connect the lead on two sides.Because the area of dual platen is bigger one times than single sided board, and lead can intermesh (can around to another side), makes that dual platen is more suitable for being used on the complicated circuit.
And multilayer board is the area that can connect up in order to increase, it is to be provided with several dual platens, and cements (pressing) after putting an insulcrete between each dual platen into, and which floor independently wiring layer is multiple-plate number of plies just represented, usually the number of plies all is an even number, and comprises outermost two-layer.But in multilayer board if only want to connect the some of them circuit, guide hole may be wasted the circuit space of some other layers so, therefore, for fear of this problem, be to utilize buried via hole (Buried vias) and blind hole (Blind vias) technology which floor penetrates wherein, wherein the blind hole technology is which floor internal printed circuit board is connected with the surface printing circuit board, must not penetrate whole plank, buried via hole then is only to connect inner printed circuit board (PCB), so only can't see from the surface.
Moreover, each time during the circuit diagram of design circuit plate, all must meet a set of regulations, for example: the minimum between lead keeps space, minimum conductor width and other similar physical constraints etc., these regulations owing to the speed of circuit, transmit the power of signal again, circuit is to the susceptibility of power consumption and noise, and the material quality is with factors such as manufacturing equipments and have different.For example: strength of current rises, and the thickness of lead also must increase so.
According to the above, printed circuit board (PCB) (especially multilayer board) now, it is quite complicated that the circuit diagram of its wires design has become, so, to be difficult for the actual sample printed circuit board (PCB) of making, if by the manual measurement mode, be difficult to also confirm whether wires design is up to specification, therefore, can normal operation on printed circuit board (PCB) in order to ensure the circuit diagram that designs, deviser (as: the Electronics Engineer of now general design circuit figure, hereinafter to be referred as the deviser), mostly utilize a circuit design software (as: CircuitMaker) to draw out a circuit design drawing (as: shown in Figure 2), this circuit design software can read this circuit design drawing, and the various functions that can utilize this software to provide show the situation of this circuit design drawing running, whether reach purpose of design to check designed circuit design drawing.
For the circuit layout personnel (hereinafter to be referred as layout person) that implement circuit board, be by another set of circuit layout software, will be about each electronic record of this circuit design drawing, automatically convert a circuit arrangement map to, but because this circuit layout software is in the process of conversion automatically, and can't avoid cross-line automatically, circuit intersects or circuit is connected on another layer, therefore, this circuit arrangement map is to present circuit condition intricate and that be interweaved, if circuit arrangement map directly carries out the presswork of circuit board according to this, can't reach the purpose of design of circuit design drawing at all, so this layout person need utilize this circuit layout software usually again, intricate to this circuit arrangement map again and circuit that be interweaved is disposed, make the circuit of different signals can not be interweaved, to be depicted as a practical layout figure.
In the circuit design work flow of present circuit board, after this practical layout figure finishes, must be again by the deviser, confirm live width or via number on it, the every regulation whether coincidence circuit designs, for example: the electric current that power pin flow through of certain some brilliant electricity is bigger, make this power pin must use thicker live width, or how many vias this power pin must have, just the power supply that can successfully this power pin be exported is sent on another layer, these all are that layout person can't make strain immediately, or change directly that practical layout figure solves, and all will wait for and just can make amendment after the deviser confirms, so, the following points problem will take place in this layout person when revising practical layout figure:
(1) after the overstriking live width, will stack mutually by the circuit adjacent with other;
(2) can't around this power pin, increase via;
And make layout person need adjust the circuit of this practical layout figure, even the position that needs to move other electronic package, and revise this practical layout figure significantly, the time that makes circuit board finish will be delayed, especially, if the deviser fail once with on this practical layout figure wrong position point out, and want layout person constantly to revise, that is between circuit layout personnel and deviser, will make circuit board finish the time delays of design, cause and to release the product that uses this circuit board in the scheduled time, and make this product lose its product competitiveness because of the delay of time.
Summary of the invention
Because layout person can't confirm practical layout figure voluntarily, coincidence circuit design code whether, and directly revise the problem of practical layout figure, the inventor is through the permanent research and experiment of making great efforts, finally development and Design goes out the live width of lateral circuit layout and the method whether via quantity meets the power supply design code of detecing of the present invention, be to be provided with a detection process at a circuit layout software, this detection process can be detected each power pin or via set on the circuit arrangement map, whether meet the power supply design rule, and power supply design rule position can not met, produce an error flag, so, this error flag can be used as the foundation of revising this circuit arrangement map.
Can be for ease of the auditor to purpose of the present invention, shape, constructing apparatus feature and effect thereof, do further understanding and understand, cooperate graphicly now for embodiment, be described in detail as follows:
Description of drawings
Fig. 1 is the configuration diagram that circuit layout software of the present invention and circuit design software cooperatively interact;
Fig. 2 is the synoptic diagram of circuit design drawing of the present invention;
Fig. 3 is the synoptic diagram of the correct circuit arrangement map of Fig. 2;
Fig. 4 is the synoptic diagram of the wrong circuit arrangement map of Fig. 2;
Fig. 5 is the synoptic diagram of another wrong circuit arrangement map of Fig. 2;
Fig. 6 is the synoptic diagram of detecting menu of the present invention;
Fig. 7 is the process flow diagram under the side form formula detectd of appointed area of the present invention;
Fig. 8 is the process flow diagram that circuit layout software of the present invention and circuit design software cooperatively interact.
The figure number explanation
Circuit layout software ... 1 detection process ... 10 error flags ... 11
Circuit arrangement map ... 12 appointed areas ... the 13 attribute tables of comparisons ... 14
The detecting menu ... 16 sense modes ... 18 power pins ... 120
Via ... 122 circuits ... 124
Circuit design software ... 2 circuit design drawings ... 20 attribute setting programs ... 22
Power pin ... 24 current values ... 26 attribute report files ... 3
Embodiment
The present invention is a kind of live width of circuit for detecting layout and the method whether via quantity meets the power supply design code, see also Fig. 1,2 and shown in Figure 3, this method is to be provided with a detection process 10 in a circuit layout software 1, in order to do this circuit layout software 1 with after circuit design Figure 20 conversion and being configured to a circuit layout Figure 12, if carry out this detection process 10, be to detect each power pin 120 or via 122 on this circuit layout Figure 12, whether meet the power supply design rule, if each power pin 120 or via 122 do not meet the power supply design rule, then in the position of each power pin 120 or via 122, produce an error flag 11 (as shown in Figure 5), so, layout person can directly make amendment to this mark part, to finish accurate circuit arrangement map apace.
In the present invention, this circuit design Figure 20 utilizes a circuit design software 2 to complete, this circuit design software 2 is provided with an attribute setting program 22, this attribute setting program 22 is can be for the deviser at least one power pin (POWER PIN) 24 of this circuit design Figure 20 or the position of via (via), indicate a current value 26 respectively, and still be provided with an attribute table of comparisons 14 in the circuit layout software 1, this attribute table of comparisons 14 is to formulate according to the power supply design rule, it is respectively to transmit with the live width of which kind of thickness and the via of how many numbers that this power supply design rule includes various current values, after 1 conversion of this circuit layout software and being configured to a circuit layout Figure 12 in order to do this circuit design Figure 20, this circuit layout software 1 is can be according to the current value on this circuit design Figure 20, by the power supply design rule of seeking coupling in this attribute table of comparisons 14, and produce an attribute report file 3 of each power pin 120 or via 122 corresponding power design rules, so, layout person also can be by these attribute report file 3 listed contents, inspect this circuit layout Figure 12, to confirm each power pin 120 or the via 122 of this circuit layout Figure 12, whether meet the power supply design rule.
In a preferred embodiment of the present invention, see also Fig. 1 and shown in Figure 6, after this detection process 10 is performed, this circuit layout software 1 is to produce a detecting menu 16, include a plurality of sense modes 18 and this attribute table of comparisons 14 on this detecting menu 16, this attribute table of comparisons 14 provides layout person and defines its corresponding live width and via quantity at various electric currents, and this sense mode 18 is to set this detection process 10, be to entire circuit layout Figure 12, one of them circuit layer or appointed area 13 are detected, and this appointed area 13 is as coordinate (X on Fig. 3 and Fig. 4
1, Y
1), (X
2, Y
2), (X
3, Y
3), (X
4, Y
4) zone that surrounded, or coordinate (X on Fig. 5
1, Y
1) and (X
2, Y
2) between the zone, and no matter be to carry out which sense mode 18, this detection process 10 all is to utilize this attribute table of comparisons 14, detection mark has each power pin 120 of current value or the position of via 122, whether meet this attribute table of comparisons 14 definition, and do not meeting this attribute table of comparisons 14 definition place, produce this error flag 11 of this error flag (as Fig. 4 and shown in Figure 5) and be the circuit 124 that each power pin 120 or via 122 can be connected to be different from the circuit color showing of correct circuit.
For understanding this sense mode 18 is how to the position of each power pin 120 or via 122, detects, and below will describe with the sense mode 18 of appointed area, sees also shown in Figure 7:
(701) at first, this sense mode 18 requires a power pin 120 or the via 122 among this circuit layout of selection Figure 12 earlier;
(702) this sense mode 18 indicates the zone that this power pin 120 or via 122 are connected with circuit 124;
(703) again by this circuit layout software 1 according to the current value on this circuit design Figure 20, seek the power supply design rule of coupling certainly in this attribute table of comparisons 14;
(704) utilize power supply design rule that should current value, judge 122 connection lines 124 of this power pin 120 or via, whether meet this power supply design rule,, otherwise carry out step (706) if carry out step (705);
(705) finish this sense mode;
(706), produce error flag 11 promptly in the position that does not meet this power supply design rule.
From the above, the deviser needs only each power pin 24 or the via at this circuit design Figure 20, correctly indicate its current value, and provide the power supply design rule to layout person, behind the defined attribute table of comparisons 14, this circuit layout software 1 can utilize this attribute table of comparisons 14, judges whether each power pin 120 or via 122 have met the power supply design rule, and the circuit layout Figure 12 that makes this layout person complete need not ask the deviser to confirm whether to have the power supply of not being inconsistent design code again.
For more clearly understanding this case when reality is implemented, this circuit layout software 1, circuit design software 2 are the application that how to cooperatively interact, below the step implemented according to reality illustrate one by one, see also shown in Figure 8:
(801) at first, in this circuit layout software 1, set up this attribute table of comparisons 14;
(802) power pin 24 of the circuit design Figure 20 that is drawn at this circuit design software 2 or the position of via, indicating respectively has a current value;
(803) this circuit layout software 1 is can be according to the current value on this circuit design Figure 20, by seeking the power supply design rule of coupling in this attribute table of comparisons 14, and produces an attribute report file 3 of each power pin 120 or via 122 corresponding power design rules;
When (804) this detection process 10 was performed, this detection process 10 produced a detecting menu 16 earlier;
(805) last, read selecteed sense mode 18 on the detecting menu 16 again, with this selecteed sense mode 18 of basis, detection mark has each power pin 120 of current value or the position of via 122, whether meet 14 definition of this attribute table of comparisons, and produce an error flag 11 not meeting these attribute table of comparisons 14 definition place.
In sum, when the deviser utilizes this circuit design software 2 to draw out this circuit design Figure 20, if in each power pin 24 of this circuit design Figure 20 or the position of via, indicate current value respectively, can utilize this detection process 10 at this circuit layout software 1, this circuit layout Figure 12 subscript is illustrated each supply pin 120 that do not meet this power supply design rule or the position of via 122, check out conveniently that for layout person or deviser this circuit layout Figure 12 does not meet power supply design rule position, or do not need again by deviser's rechecking, so, can solve layout person and can't confirm practical layout Figure 12 voluntarily, whether the problem of coincidence circuit design code.
The above only is a specific embodiment of the best of the present invention, and structural attitude of the present invention is not limited thereto, and anyly is familiar with this skill person in field of the present invention, can think easily and variation or modification, all can be encompassed in the claim scope of following this case.
Claims (5)
1. whether the live width of a circuit for detecting layout and via quantity meet the method for power supply design code, it is characterized in that, this method is to be provided with a detection process in a circuit layout software, in order to do this circuit layout software with after circuit design drawing conversion and being configured to a circuit arrangement map, if carry out this detection process, this circuit layout software will be handled according to the following step:
At first, detect the position of each power pin on this circuit arrangement map or via, whether meet the power supply design rule;
If there is the situation that does not meet the power supply design rule power pin of circuit arrangement map or the position of via,, produce wrong a sign then in the position of power pin that does not meet the power supply design rule or via.
2. the method for claim 1, it is characterized in that, still be provided with an attribute table of comparisons in this circuit layout software, this attribute table of comparisons is to formulate according to the power supply design rule, and it is respectively to transmit with the live width of which kind of thickness and the via of how many numbers that this power supply design rule includes various current values;
And this circuit design drawing is to utilize a circuit design software to complete, this circuit design software is provided with an attribute setting program, this attribute setting program is to indicate a current value respectively for the deviser at least one power pin of this circuit design drawing or the position of via;
After the conversion of this circuit layout software and being configured to a circuit arrangement map in order to do this circuit design drawing, this circuit layout software is according to the following step, handles:
At first, according to the current value on this circuit design drawing, by the power supply design rule of seeking coupling in this attribute table of comparisons;
Secondly, according to the power supply design rule of being sought out, produce an attribute report file of each power pin or via corresponding power design rule.
3. method as claimed in claim 2, it is characterized in that, after this detection process is performed, this circuit layout software is to produce a detecting menu, include a plurality of sense modes and this attribute table of comparisons on this detecting menu, this attribute table of comparisons provides layout person and defines its corresponding live width and via quantity at various electric currents, and this sense mode is to set this detection process, be to the entire circuit layout, one of them circuit layer or appointed area are detected, in order to do this sense mode designated after, to carry out subsequent treatment according to the treatment step of this sense mode.
4. method as claimed in claim 3 is characterized in that, this sense mode is according to the position of the following step to each power pin or via, detects:
At first, this sense mode indicates the zone that this power pin or via are connected with circuit;
Again by this circuit layout software according to the current value on this circuit design drawing, seek the power supply design rule of coupling certainly in this attribute table of comparisons;
Then, utilize, judge this power pin or via institute connection line, whether meet this power supply design rule power supply design rule that should current value;
If do not meet this power supply design rule,, produce error flag promptly in the position that does not meet this power supply design rule.
5. method as claimed in claim 2 is characterized in that, this circuit layout software, circuit design software are to handle according to the following step, to detect each power pin or the via of this circuit arrangement map, whether meets the power supply design rule:
At first, in this circuit layout software, set up this attribute table of comparisons;
Secondly, the power pin of the circuit design drawing of being drawn at this circuit design software or the position of via, indicating respectively has a current value;
Once more, this circuit layout software is can be according to the current value on this circuit design drawing, by seeking the power supply design rule of coupling in this attribute table of comparisons, and produces an attribute report file of each power pin or via corresponding power design rule;
Then, when this detection process was performed, this detection process produced a detecting menu earlier;
At last, read selecteed sense mode on this detecting menu again, with this selecteed sense mode of basis, detection mark has each supply pin of current value or the position of via, whether meet the definition of this attribute table of comparisons, and produce an error flag not meeting this attribute table of comparisons definition place.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03157414 CN1275146C (en) | 2003-09-19 | 2003-09-19 | Method for detecting whether cinewidth of circuit layout card and flow hole number according to power-supply design rule |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03157414 CN1275146C (en) | 2003-09-19 | 2003-09-19 | Method for detecting whether cinewidth of circuit layout card and flow hole number according to power-supply design rule |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1598766A true CN1598766A (en) | 2005-03-23 |
| CN1275146C CN1275146C (en) | 2006-09-13 |
Family
ID=34660291
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 03157414 Expired - Fee Related CN1275146C (en) | 2003-09-19 | 2003-09-19 | Method for detecting whether cinewidth of circuit layout card and flow hole number according to power-supply design rule |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1275146C (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101539954B (en) * | 2008-03-21 | 2011-01-19 | 奇景光电股份有限公司 | Method for inspecting layout design of integrated circuit |
-
2003
- 2003-09-19 CN CN 03157414 patent/CN1275146C/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101539954B (en) * | 2008-03-21 | 2011-01-19 | 奇景光电股份有限公司 | Method for inspecting layout design of integrated circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1275146C (en) | 2006-09-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN111278227B (en) | Layout and wiring method for PCB Layout of SMT32 system mainboard | |
| CN102036511A (en) | Method for classifying and compensating nonlinear variation of core boards for manufacturing multilayer circuit boards | |
| CN1313722A (en) | Multi-layer printed circuit board and method for measuring impendance thereof | |
| CN101071150B (en) | Flexible circuit board circuit on-off detecting method | |
| CN108990318A (en) | A kind of method for manufacturing circuit board of loophole lamination mistake proofing | |
| US6091026A (en) | Multi-layer printed circuit board with human detectable layer misregistration, and manufacturing method therefor | |
| CN1275146C (en) | Method for detecting whether cinewidth of circuit layout card and flow hole number according to power-supply design rule | |
| CN205898964U (en) | Conducting hole pick -up plate and semi -manufactured goods printed circuit board | |
| CN102081682A (en) | Layout method of multilayer printed circuit board | |
| CN103037629A (en) | Solder resist printing method of metal circuit board | |
| CN103747625B (en) | The GND holes layout method and system of a kind of HDI plates | |
| CN112504183B (en) | Hole deviation detection method | |
| KR101420309B1 (en) | apparatus for inspecting printed circuit board | |
| JPH069166U (en) | Printed wiring board with electromagnetic wave shield | |
| JP2001244601A (en) | Printed circuit board manufacturing system | |
| CN111542178B (en) | Manufacturing process of multilayer circuit board and multilayer circuit board | |
| CN209517617U (en) | A kind of pcb board with probe aperture | |
| CN108650795B (en) | Coding method and processing method of packaging substrate and packaging substrate | |
| JP3206635B2 (en) | Multilayer printed wiring board | |
| CN110188463A (en) | A kind of sawtooth smoothing method of arrays of vias | |
| CN1052374C (en) | Method for testing copper slag of grounding layer of power source on inner layer of printed-circuit board and equipment | |
| CN1942048A (en) | Circuit board with verified laminated layer sequence | |
| CN114679844B (en) | Automatic pin-up method | |
| JPS61171199A (en) | Drilling of reference manufacture hole for multilayer printed wiring board | |
| CN113899759B (en) | Graph accuracy judging method and judging device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20060913 Termination date: 20100919 |