CN1595403A - Analog circuit layout oriented symmetrical constraint extraction method based on graph isomorphism - Google Patents

Abstract

The invention relates to a symmetry constraint extraction of the analog circuit oriented mapping based on the image isomorphism, which belongs to the analog circuit automatically mapping technical field. Its characteristics lie in the following. The connection relationship between the circuit components is represented by the bisection image. Calculate a label value for each node of the image to collectively reflect the topology connection relation between the node and its perimeter ones. When the label values of two nodes are equal, they form a symmetry pair. According to the connection relation between the symmetry pair, determine the symmetry group. The invention eliminates the returning probability when forming the symmetry pair. By this means, it is highly effective and all the symmetry structures of the circuit can be found conveniently.

Description

Symmetry constraint extracting method based on the isomorphism of graph towards the mimic channel layout

Technical field

The symmetry constraint extracting method towards the mimic channel layout based on the isomorphism of graph belongs to the integrated circuit CAD field, relates in particular to Analogous Integrated Electronic Circuits automatic graph generation field.

Background technology

The appearance of the progress of semiconductor technology, particularly SOC in recent years (System on-Chip) technology, making digital circuit and mimic channel be integrated on the same chip becomes possibility.Since earlier 1990s, hybrid digital-analog integrated circuit market is with the speed increment in every year 15% to 20%.Calendar year 2001, this market was above 22,000,000,000 dollars.In the digital circuit field, there has been pretty good cad tools to appear on the market.But because mimic channel is for non-identity (nonidealities), high order effect (higher order effect), parasitic disturbances (parasitic disturbances, comprise crosstalk, substrate noise, power noise etc.) very responsive, so the Circuits CAD instrument can not simply be used the method for digital circuit cad tools.Compare with Design of Digital Circuit, traditional Analog Circuit Design more is based on deviser's experience and knowledge, didactic design process.So far, also do not have enough ripe commercial CAD instrument, be used for supporting Design of Simulating Circuits and layout design.The design automation of Analogous Integrated Electronic Circuits has become the bottleneck in the integrated circuit (IC) design.

Because the singularity of mimic channel above-mentioned must consider that in the mimic channel instrument various layout constraints reduce the harmful effect of layout to circuit, as above-mentioned parasitism, process deviation etc.Symmetry constraint is a kind of constraint common in the mimic channel Butut.The symmetry of device is put and can effectively be reduced the Butut parasitism, can reduce the sensitivity of circuit to thermal gradient on the chip.So symmetrical structure is widely used in mimic channel, as complete symmetry amplifier and the differential configuration in the mimic channel.Traditional constraints, layout provides by experienced circuit designers, but along with the progress of technology and the shortening of product life cycle, this method can't satisfy the demands.The constraints, layout method that mimic channel is extracted in design effectively automatically becomes urgent demand.

The method of existing extraction symmetry constraint has search symmetrical threaded tree (symmetrical connection tree), weighting bipartite graph matching (Weighted Bipartite Matching) method and obtain the method for symmetry constraint by Calculation of Sensitivity.These methods all need the process of a backtracking when generating symmetry to group, thus the time complexity of method than higher, wherein sensitivity method also needs through complicated sensitivity analysis.

The present invention proposes a kind of new extracting method of symmetry constraint fast and effectively.We are with the annexation between bipartite graph (be called for short figure) indication circuit device, and are label value of each node calculating among the figure by certain method, and it is the center that this label value can be embodied a concentrated reflection of with certain node, the topological connection relation of its all mid-side node; When two node label values equate, illustrate that these two nodes have identical topology with other nodes respectively and are connected, can be used as symmetry and handle; Then by symmetry between annexation determine the symmetry group.This method has been got rid of the possibility of backtracking when generating the symmetry group, so efficient is very high, this method also is very effective simultaneously, can find all symmetrical structures in the circuit.

Summary of the invention

The object of the present invention is to provide a kind of symmetry constraint extracting method towards the mimic channel layout based on the isomorphism of graph.

The invention is characterized in: it be a kind of label value with each node in the bipartite graph indicate each node in the mimic channel respectively with the topological connection relation of its all mid-side node, and two groups of nodes that therefrom the label value equated become symmetry right, again by symmetry between annexation determine the symmetry constraint extracting method based on the isomorphism of graph of symmetry group, it contains following steps successively:

(1) sets the initial label value of dissimilar device nodes and depositing in the computing machine;

(2) computing machine reads the net meter file of Spice form, the structure bipartite graph, and it comprises following steps successively:

(2.1) read net meter file, device classification is deposited in chained list;

(2.11) read in net meter file by row earlier;

Row initial * represents comment line,

Row initial m/M represents MOS device description row,

Row initial c/C represents capacitor element description row,

Row initial r/R represents resistance device description row;

(2.12) reading device is described the device name and the various parameter of row, and classification deposits chained list in;

(2.2) reading device chained list generates bipartite graph, and (wherein V is a vertex set, V=V for V, E) expression with G ₁∪ V ₂, V ₁Be device nodes, contain following message: device name, type, electrical parameter, with and gauze that each terminals were connected; V ₂Be the gauze node, each device end topological tie point each other, i.e. gauze in the circuit in its indication circuit;

E is the set on limit, E={ (v ₁, v ₂) | v ₁∈ V ₁v ₂∈ V ₂, it is writing down the terminals of each device that is connected to each gauze;

(3) initialization of the pre-service of bipartite graph and node label value:

(3.1) handle unwanted node in the bipartite graph

The MOS device of resistance and realization resistance function is done short circuit and is handled, and the MOS device of described realization resistance function is meant that the biasing of its grid is the MOS device of constant pressure source;

Electric capacity and realize that the MOS device of capacitive function does to open circuit processing, the MOS device of described realization capacitive function are meant its drain electrode and the MOS device that is connected together of source electrode;

(3.2) the label value of each node in the initialization bipartite graph:

The initial label value of device nodes is chosen different parameters according to the type of device difference;

The initial label value of gauze node equals the degree of gauze node, and described degree is defined as the limit number that is connected to this gauze node, but is connected to from the grid of device except that limit of this gauze node;

(4) the label value of each node in the calculating bipartite graph:

The label value of each node is upgraded by following formula in given cycle index, and the label value of each node is its final label value during loop ends; Described cycle index equals the number of device nodes in the bipartite graph; It contains following steps successively:

(4.1) cycle index counter i=1 is set;

(4.2) upgrade the label value of all device nodes:

${{\mathrm{Label}}^i}_{M_k}={{\mathrm{Label}}^{i-1}}_{M_k}+\mathrm{so}\×{{\mathrm{Label}}^{i-1}}_{{{\mathrm{net}}_j}^{\mathrm{so}}}+\mathrm{dr}\×{{\mathrm{Label}}^{i-1}}_{{{\mathrm{net}}_{j^{\′}}}^{\mathrm{dr}}}----\left(1\right)$

Label wherein ⁱ _Mk, k=1 ..., n is the device nodes M that current circulation i will calculate _kThe label value, n is the number of all device nodes,

Label ^I-1 _MkBe the i-1 time circulation obtained device node M _kThe label value,

Label ^I-1 _NetjsoBe the i-1 time circulation time device M _kThe gauze node net that source electrode connects _j ^SoThe label value,

Label ^I-1 _{Netj ' dr}Be the i-1 time circulation time device M _kThe gauze node net that drain electrode connects _{J '} ^DrThe label value, so and dr are respectively the weighted numbers of the label value of gauze node that source electrode is connected with drain electrode, are chosen for different prime numbers usually,

(4.3) the label value of renewal institute wired network node

${{\mathrm{Label}}^i}_{{\mathrm{net}}_j}={{\mathrm{Label}}^{i-1}}_{{\mathrm{net}}_j}+\mathrm{so}\×\underset{M_l\∈{S^{\mathrm{so}}}_{N_1}N\left({\mathrm{net}}_j\right)}{\mathrm{\Σ}}{\mathrm{Labe}{l}^i}_{M_l}+\mathrm{dr}\×\underset{M_l\∈{S^{\mathrm{dr}}}_{N_2}\left({\mathrm{net}}_j\right)}{\mathrm{\Σ}}{{\mathrm{Label}}^i}_{M_l}----\left(2\right)$

The Label in the formula wherein ⁱ _Netj, j=1 ..., m is j the gauze node net that current circulation i will calculate _jThe Label value, m is the number of institute's wired network node,

Label ^I-1 _NetjBe j the gauze node net that the i-1 time circulation time obtains _jThe Label value,

$\underset{M_l\∈{S^{\mathrm{so}}}_{N_1}\left({\mathrm{net}}_j\right)}{\mathrm{\Σ}}{{\mathrm{Label}}^i}_{M_l}$ Expression pair set S ^So _N1(net _j) in N ₁The current label value summation of individual node, current being meant calculated gained in the step (4.2) among the current circulation i, down together, S ^So _N1(net _j) represent by source electrode and j gauze net _jThe N that connects ₁The set of individual device nodes,

$\underset{M_l\∈{S^{\mathrm{dr}}}_{N_2}\left({\mathrm{net}}_j\right)}{\mathrm{\Σ}}{{\mathrm{Label}}^i}_{M_l}$ Expression pair set S ^Dr _N2(net _j) in N ₂The current label value summation of individual node, S ^Dr _N2(net _j) represent by drain electrode and j gauze node net _jThe N that connects ₂The set of individual device nodes,

(4.4) cycle index i adds 1, if i≤n then changes step (4.2), otherwise, loop ends, the current label value of each node is final label value;

(5) search bipartite graph finds the symmetry group, and it contains following steps successively:

(5.1), find all symmetries right according to the label value of each device:

If: represent symmetrical right set in all device nodes, SYS={ (v with SYS _i, v _i') | v _i≠ v _i', v _i∈ V ₁, v _i' ∈ V ₁, v _iAnd v _i' have an identical label value, this is according to the label value all device nodes to be carried out after from small to large ascending order arranges, and takes out two devices that label value equates again in turn and forms symmetrical to obtaining v _i, v _i' the MOS device M of also available their representatives _i, M _i' represent;

(5.2) according to symmetry between annexation, set up the symmetry group

According to symmetrical pair set, at first find symmetry to (M _i, M _i'), earlier from M _i, M _i' drain electrode to begin search symmetry right, in the time of will finding their common gauze nodes that connects, stop the search that drains again always; And then from M _i, M _i' source electrode set out, it is right to begin search symmetry, also will finish to search for when finding their common gauze nodes that connects always; Above-mentioned all symmetries that found are organized SGr (p to using symmetry ₁, p ₂) expression, p ₁, p ₂Be respectively the node array, p ₁, p ₂In the node arranged in turn line up man-to-man symmetry group correspondingly.

This method is that effect is best up to now, the method for fastest extraction symmetry constraint.Can obtain to be attached thereto the topological relation of node by the label value of computing node, when the abundant number of times of circulation, the label value of each node just can reflect to be the topological connection relation of its peripheral all other nodes of center in the drawings with this node.If the label value of two nodes equates that we just can conclude that they are symmetrical.If, just represent that these two nodes have identical topological environmental so two nodes are symmetrical when seeking the symmetry group; Two kinds of situations must be arranged like this, they all link other symmetry to or they be connected to same gauze node, so by symmetry between annexation, can be at an easy rate different symmetries be formed the symmetry group to putting together.Therefore, when generating the symmetry group, do not need the process of backtracking, significantly reduce the searching times of method, improved search efficiency.

Description of drawings

Fig. 1: overall procedure synoptic diagram of the present invention.

Fig. 2: the ifq circuit figure that the present invention adopts.

Fig. 3: the bipartite graph of the ifq circuit figure that the present invention adopts.

Fig. 4: the schematic flow sheet of new node label value more.

Fig. 5: the program flow diagram of seeking the symmetry group.

Fig. 6: net hoist pennants.

Fig. 7: the bipartite graph of circuit diagram among the embodiment.

Fig. 8: delete the bipartite graph behind resistance, the electric capacity among the embodiment.

Fig. 9: the bipartite graph after the initialization label value, its label value of the top-right numeral of node.

Embodiment

The unix workstation Sun v880 that the present invention is based on Sun Microsystems finishes.

Fig. 1 is an overview flow chart.

Device in the following circuit is that MOS transistor is M, and the present invention also is applicable to the circuit of being made up of various devices.

1. read the net meter file of Spice form, the structure bipartite graph

1) reads net meter file, device classification is deposited in chained list.

● read in net meter file by row earlier, judge the character of one's own profession according to the row initial:

■ * represents comment line

The row of ■ m/M beginning is that the MOS device is described row

The row of ■ c/C beginning is that row is described in capacitor element

The row of ■ r/R beginning is that resistance device is described row

● reading device is described the device name and the various parameter of row, and classification deposits chained list in.

2) reading device chained list, and generation bipartite graph (Fig. 3 has provided the bipartite graph of circuit diagram shown in Figure 2 and represented) G (V, E), wherein V represents vertex set, E represents the set on limit.V=V ₁∪ V ₂, V ₁The expression device nodes, V ₂Expression gauze node; Device in the device nodes indication circuit, comprising information has: the title of device, type, electrical parameter, and the gauze of each terminals connection.The gauze node be used in the indication circuit gauze (in the circuit the topological tie point of device end we be called gauze, be the gauze that connects power supply and device as the VDD among Fig. 2); E={ (v ₁, v ₂) | v ₁∈ V ₁v ₂∈ V ₂, device v ₁Be connected to gauze v ₂, which end that can write down institute's interface unit in the gauze node is connected to this gauze.

In the process of structure bipartite graph, do not consider that the grid of device connects, because it is being connected in the mimic channel of grid is very complicated, nonsensical to extracting symmetric information.Experiment showed, that we do not consider that the connection of grid can not influence the device that finds actual symmetry.

2. pre-service and initialization

1) handles and not need node in the bipartite graph, comprise resistance, electric capacity, and the metal-oxide-semiconductor of realizing resistance, capacitive function.

Resistance is to handle when short circuit, and electric capacity is to open circuit.We judge the metal-oxide-semiconductor of realizing resistance or capacitive function with following mode:

Realize the MOS transistor of resistance function: if the biasing of the grid of a MOS transistor is a constant pressure source, VDD for example, VSS, this MOS transistor is exactly to realize the function of resistance so;

Realize the MOS transistor of capacitive function: if the drain electrode of a MOS transistor and source electrode link together, this MOS transistor is exactly to realize the function of electric capacity so.

2) the label value of each node among the initialization figure G.The initial label value of device nodes is according to the difference of type of device and difference (table one), but all be chosen for prime number usually, in the calculating of label value, the product of two groups of different numbers is different basically like this, thereby the node of avoiding not satisfying symmetry has identical label value; The initial label value of device nodes is designated as Label _Mk ⁰, M _k∈ V ₁, k=1 ..., n, n is device nodes number among the figure G.The initial label value of gauze node equals its degree (not comprising that grid connects), and the degree of node is defined as the limit number that is connected to this point among the figure; The initial label value of gauze node is designated as Label _Netj ⁰, net wherein _j∈ V ₂, j=1 ..., m, m is gauze node number among the figure G.

Type of device	The Label value
		??NMOS	??23
??PMOS	??7
		??NPN?BJT	??31
??PNP?BJT	??3

Table one: the initial label value of dissimilar device nodes

3. calculate the label value of each node

As shown in Figure 4, the label value of each node is upgraded by given formula in given cycle index, and the label value of each node is final label value during loop ends.In each the renewal, upgrade the label value of all device nodes earlier, upgrade the label value of institute's wired network node then.Calculate by this round-robin label value, all will obtain a final label value to each node among the figure, this label value is to be the center with this node, a concentrated reflection of its peripheral node topology annexation.It is that the peripheral node topology annexation at center is different that two nodes with different label values mean among the figure respectively with these two nodes; And two nodes with identical label value are that the topological connection relation of all mid-side nodes at center must be identical with them, and it is symmetrical can judging these two nodes thus.The initial label value by reasonably choosing each node and the account form of Label value can guarantee this point.Provide us below and calculate the method for each node label value.

1) counter i=1 is set;

2) upgrade the label value of all device nodes:

${{\mathrm{Label}}^i}_{M_k}={{\mathrm{Label}}^{i-1}}_{M_k}+\mathrm{so}\×{{\mathrm{Label}}^{i-1}}_{{{\mathrm{net}}_j}^{\mathrm{so}}}+\mathrm{dr}\×{{\mathrm{Label}}^{i-1}}_{{{\mathrm{net}}_{j^{\′}}}^{\mathrm{dr}}}$

Label wherein ⁱ _Mk, k=1 ..., n is the device nodes M that current circulation i will calculate _kThe label value, Label ^I-1 _Mk, k is the same, is the i-1 time circulation obtained device node M _kThe label value, Label ^I-1 _NetjsoBe the i-1 time circulation time device M _kThe gauze node net that source electrode connects _j ^SoThe label value, Label ^I-1 _NetjdrBe the i-1 time circulation time device M _kThe gauze node net that drain electrode connects _j ^DrThe label value.So and dr are respectively the weightings of the label value of gauze node that source electrode is connected with drain electrode, are chosen for prime number usually, finally obtain identical label value with the node of avoiding having different peripheral topological connection relations.

In brief, this formula is by calculating the link information of collecting its drain electrode and source electrode to the label value of device nodes.

3) the label value of renewal institute wired network node

${{\mathrm{Label}}^i}_{{\mathrm{net}}_j}={{\mathrm{Label}}^{i-1}}_{{\mathrm{net}}_j}+\mathrm{so}\×\underset{M_l\∈{S^{\mathrm{so}}}_{N_1}N\left({\mathrm{net}}_j\right)}{\mathrm{\Σ}}{\mathrm{Labe}{l}^i}_{M_l}+\mathrm{dr}\×\underset{M_l\∈{S^{\mathrm{dr}}}_{N_2}\left({\mathrm{net}}_j\right)}{\mathrm{\Σ}}{{\mathrm{Label}}^i}_{M_l}----\left(2\right)$

Label in the formula ⁱ _Netj, j=1 ..., m is j the gauze node net that current circulation will be calculated _jThe Label value, m is the number of institute's wired network node, Label ^I-1 _EntjBe j gauze node net of the i-1 time cycle calculations _jThe Label value, $\underset{M_l\∈{S^{\mathrm{so}}}_{N_1}\left({\mathrm{net}}_j\right)}{\mathrm{\Σ}}{{\mathrm{Label}}^i}_{M_l}$ Expression pair set S ^So _N1(net _j) in N ₁The current label value of node (step 2 in this circulation) is calculated gained) summation, S ^So _N1(net _j) represent by source electrode and gauze net _jThe device nodes set that connects. $\underset{M_l\∈{S^{\mathrm{dr}}}_{N_2}\left({\mathrm{net}}_j\right)}{\mathrm{\Σ}}{{\mathrm{Label}}^i}_{M_l},$ Expression pair set S ^Dr _N2(net _j) in N ₂The current label value of node (step 2 in this circulation) is calculated gained) summation, S ^Dr _N2(net _j) represent by drain electrode and gauze node net _jThe device nodes set that connects.So and dr be respectively to by source electrode and drain electrode be connected to gauze net _jThe weighting of device label value, be chosen for prime number equally.

4) i ← i+1; If i＜=n would change step 2), otherwise end loop, the current label value of each node is final label value.

In the calculating of label value, cycle index can be selected with reference to following principle:

If we define two node v among the figure _s, v _tBetween the path be path (v _s, v _t)=(v _s, v ₁..., v _p, v _t), (v _I-1, v _i) ∈ E, and v _i, i=2 ..., p is different; V so _sAnd v _tBetween distance definition be v _sAnd v _tBetween shortest path length (path show the way the footpath on the node number).Cycle index should equal the maximal value of the distance between any two nodes among the figure in theory.But because the characteristics of mimic channel, any point-to-point transmission can not count n above device nodes apart from maximal value among the figure G, we use n, and promptly the device nodes number just enough obtains the label value of each node of internodal topological connection relation among the reflection figure as cycle index.

4. the search bipartite graph finds the symmetry group

In step 3, we have obtained the label value of all nodes, and in this step, we are based on the label value of being obtained in the step 3, the symmetrical node that identifies all expression devices is to (be called for short symmetry to), and according to symmetry between annexation set up the symmetry group.Flow process is shown in figure five, and step is as follows:

1) the label value according to each device finds all symmetries right;

We carry out ascending sort according to the label value to device nodes, judge successively according to the order of ranking results whether the label of two devices equates then, if equate, represent these two nodes that identical topological environmental and identical type of device are arranged, we just think that they are to need symmetry, and it is right to constitute a symmetry, establishes SYS and represents all symmetrical pair sets, SYS={ (v _i, v _i') | v _i≠ v _i', v _i∈ V ₁, v _i' ∈ V ₁, v _iAnd v _i' have an identical label value.In the description of back, we also use (M _i, M _i') represent that symmetry is right, M _iExpression node v _iThe MOS transistor of representative, M _i' expression node v _i' representative MOS transistor.

2) according to symmetry to annexation set up the symmetry group;

1. all symmetries are not visited being labeled as among the .SYS;

2.. from SYS, choose one not the symmetry of accessed mistake to (M _i, M _i'), it is labeled as visits; Based on this symmetry to set up new symmetry group SGr (p1, p2), p1, p2 are respectively the node array, set counter c1=0, c2=0;

③.p ₁[c1]←M _i，p ₂[c1]←M _i’，c1←c1+1；c2←c2+1；

④.M ^t _i←M _i，M ^t _i’←M _i’；

If 5.. (M ^t _i, M ^t _i') be labeled as not visit, then it is labeled as and visits; In the drawings from M ^tI and M ^tI ' begins to carry out following search;

If with M ^t _iThe gauze node net that drain electrode is connected _jWith with M ^t _i' the gauze node net that is connected of drain electrode _j' be different gauze nodes, then check all and gauze net _jBe connected device nodes and with gauze net _j' continuous device nodes; If with net _jThe device nodes M that is connected ^a _iWith with net _j' the device nodes M that is connected ^a _i' belong to a symmetry together to (M ^a _i, M ^a _i'), and should symmetry visit being labeled as, should symmetry organize so adding current symmetry:

p ₁[c1]←M ^a _i，p ₂[c1]←M ^a _i’，c1←c1+1；

If 6.. c2＜c1, c2 ← c2+1 so, M ^t _i← p1[c2], M ^t _i' ← p2[c2]; Change step 5.; Otherwise continue next step;

⑦.M ^t _i←M _i，M ^t _i’←M _i’；

If 8.. (M ^t _i, M ^t _i') be labeled as not visit, then it is labeled as and visits; In the drawings from M ^tI and M ^tI ' begins to carry out following search;

If with M ^t _iThe gauze node net that source electrode is connected _jWith with M ^t _i' the gauze node net that is connected of source electrode _j' be different gauze nodes, then check all and gauze net _jBe connected device nodes and with gauze net _j' continuous device nodes; If with net _jThe device nodes M that is connected ^a _iWith with net _j' the device nodes M that is connected ^a _i' belong to a symmetry together to (M ^a _i, M ^a _i'), and should symmetry visit being labeled as, should symmetry organize so adding current symmetry:

p ₁[c1]←M ^a _i，p ₂[c1]←M ^a _i’，c1←c1+1；

If 9.. c2＜c1, c2 ← c2+1 so, M ^t _i← p1[c2], M ^t _i' ← p2[c2]; Change step 7.;

If 10.. there is not access node among the SYS, changes step 2.;

Fig. 5 has provided process flow diagram.

Below we explain the concrete steps of the method by an example:

1. read the net meter file of Spice form, the structure bipartite graph

Fig. 6 is the circuit description document of the Spice form of circuit shown in Figure 2, and wherein the description row of MOS transistor is defined as follows:

The PMOS transistor: transistor name drain terminal connects and connects gauze transistor types channel width (um) channel length (um) at the bottom of gauze grid end connects gauze source end connecting line mesh liner;

Nmos pass transistor: transistor name source end connects and connects gauze transistor types channel width (um) channel length (um) at the bottom of gauze grid end connects gauze drain terminal connecting line mesh liner.

After having generated the device chained list, generate bipartite graph, see Fig. 7.Square frame among Fig. 7 is represented device nodes, and circle is represented the gauze node.Limit among the figure is the annexation in the circuit diagram, and the letter representation on the limit is connected into device by what terminals.

2. pre-service and initialization

1) do not need node in the treatment circuit.

Processing procedure is that the resistance nodes in the circuit is deleted in bipartite graph, and the gauze node that is connected with the resistance two ends merges becomes one.The metal-oxide-semiconductor node of realizing the resistance function is deletion too, and the gauze node that the drain electrode of metal-oxide-semiconductor is connected with source electrode merges becomes one.Electric capacity in the circuit is used as and is opened circuit, and the deletion capacitive node gets final product.The metal-oxide-semiconductor node of realizing capacitive function also is to do deletion to handle.In Fig. 7, RN is a resistance, merges net5 and net9, and disconnects capacitive node CC, and bipartite graph becomes Fig. 8;

2) the label value of each node of initialization.All nodes in the circuit diagram all have corresponding initial label value.As Fig. 9;

3. calculate the label value of each node.

1) upgrades the label value of all device nodes according to the described method of summary of the invention step (4).We use formula

(1) the label value of calculating device node is provided with so=37, dr=11 simultaneously.

For example the label value of the device nodes M6 among the figure is calculated as follows during i=1:

${\mathrm{<figure-callout\; id="6"\; label="Label\; M"\; filenames="A200410009262.000161.png,A200410009262.000171.png"\; state="\{\{state\}\}">Label</figure-callout>}}_{M_{}}^{{}_6}={\mathrm{<figure-callout\; id="6"\; label="Label\; M"\; filenames="A200410009262.000161.png,A200410009262.000171.png"\; state="\{\{state\}\}">Label</figure-callout>}}_{M_{}}^{{}_6}+37\&times;{\mathrm{<figure-callout\; id="0"\; label="Label\; VDD"\; filenames="A200410009262.000171.png"\; state="\{\{state\}\}">Label</figure-callout>}}_{\mathrm{VDD}}^{}+11\&times;{\mathrm{<figure-callout\; id="1"\; label="Label\; net"\; filenames="A200410009262.000191.png"\; state="\{\{state\}\}">Label</figure-callout>}}_{{\mathrm{net}}_{}}^{{}_1}$

$=7+37\&times;3+11\&times;3$

$=151$

${\mathrm{<figure-callout\; id="1"\; label="Label\; M"\; filenames="A200410009262.000191.png"\; state="\{\{state\}\}">Label</figure-callout>}}_M^1=140,$ ${\mathrm{<figure-callout\; id="2"\; label="Label\; M"\; filenames="A200410009262.000161.png,A200410009262.000191.png"\; state="\{\{state\}\}">Label</figure-callout>}}_M^2=140$

We can upgrade the label value of all device nodes by this formula.

2) upgrade the label value of institute's wired network node according to the described method of summary of the invention step (4).We are provided with so=37, dr=11 simultaneously with the label value of formula (2) calculating gauze node.For example during i=1, the gauze node net among the figure ₁The label value be calculated as follows:

${{\mathrm{<figure-callout\; id="1"\; label="Label"\; filenames="A200410009262.000191.png"\; state="\{\{state\}\}">Label</figure-callout>}}^1}_{{\mathrm{net}}_1}={{\mathrm{<figure-callout\; id="0"\; label="Label"\; filenames="A200410009262.000171.png"\; state="\{\{state\}\}">Label</figure-callout>}}^0}_{{\mathrm{net}}_1}=\mathrm{so}\&times;\underset{l\&Element;S^{\mathrm{so}}\left({\mathrm{net}}_1\right)}{\mathrm{\&Sigma;}}{{\mathrm{Label}}^1}_{M_l}+\mathrm{dr}\&times;\underset{l\&Element;S^{\mathrm{dr}}\left({\mathrm{net}}_1\right)}{\mathrm{\&Sigma;}}{{\mathrm{Label}}^1}_{M_l}$

$={{\mathrm{<figure-callout\; id="0"\; label="Label"\; filenames="A200410009262.000171.png"\; state="\{\{state\}\}">Label</figure-callout>}}^0}_{{\mathrm{<figure-callout\; id="1"\; label="Net"\; filenames="A200410009262.000191.png"\; state="\{\{state\}\}">Net</figure-callout>}}_1}+37\&times;({\mathrm{<figure-callout\; id="1"\; label="Label\; M"\; filenames="A200410009262.000191.png"\; state="\{\{state\}\}">Label</figure-callout>}}_{M_{}}^{{}_1}+{\mathrm{<figure-callout\; id="2"\; label="Label\; M"\; filenames="A200410009262.000161.png,A200410009262.000191.png"\; state="\{\{state\}\}">Label</figure-callout>}}_{M_{}}^{{}_2})+11\&times;{\mathrm{<figure-callout\; id="6"\; label="Label\; M"\; filenames="A200410009262.000161.png,A200410009262.000171.png"\; state="\{\{state\}\}">Label</figure-callout>}}_{M_{}}^{{}_6}$

$=3+37\&times;(140+140)+11\&times;151$

$=12024$

Update calculation is counted device i, repeats 1), 2) go on foot up to satisfying cycle index (be 11 times, device count is 11) herein.

4. the search bipartite graph finds the symmetry group

Be the process of seeking the symmetry group in conjunction with previous example below:

The label value of it is now know that all devices: following is result through quicksort

the?M9?MOS：the?label：328910385

the?M8?MOS：the?label：328910385

the?M4?MOS：the?label：720647383

the?M3?MOS：the?label：720647383

the?M2?MOS：the?label：1369685009

the?M1?MOS：the?label：1369685009

the?M11?MOS：the?label：1644954288

the?M10?MOS：the?label：1644954288

the?M7?MOS：the?label：1644954568

the?M5?MOS：the?label：1644954568

the?M6?MOS：the?label：1672941169

According to this result, we at first find symmetry to (M9, M8), it is right earlier to begin the search symmetry from the drain electrode of device, finds their common gauze node GND that connects, the search that stops to drain.Begin the search of source electrode again, find the symmetry to (M4, M3), again from (M4, source electrode M3) sets out, find the symmetry to (M2 M1), finds the gauze node net of common connection then ₁, finish search.This symmetry group is: (M9 M4 M2, M8 M3 M1); In like manner can find symmetry group (M11 M5, M10 M7).

Claims (1)

1. based on the symmetry constraint extracting method towards the mimic channel layout of the isomorphism of graph, it is characterized in that, it be a kind of label value with each node in the bipartite graph indicate each node in the mimic channel respectively with the topological connection relation of its all mid-side node, and two groups of nodes that therefrom the label value equated become symmetry right, again by symmetry between annexation determine the symmetry constraint extracting method based on the isomorphism of graph of symmetry group, it contains following steps successively:

(1) sets the initial label value of dissimilar device nodes and depositing in the computing machine;

(2) computing machine reads the net meter file of Spice form, the structure bipartite graph, and it comprises following steps successively:

(2.1) read net meter file, device classification is deposited in chained list;

(2.11) read in net meter file by row earlier;

Row initial * represents comment line,

Row initial m/M represents MOST device description row,

Row initial c/C represents capacitor element description row,

Row initial r/R represents resistance device description row;

(2.12) reading device is described the device name and the various parameter of row, and classification deposits chained list in;

(2.2) reading device chained list generates bipartite graph, and (wherein V is a vertex set, V=V for V, E) expression with G ₁∪ V ₂, V ₁Be device nodes, contain following message: device name, type, electrical parameter, with and gauze that each terminals were connected; V ₂Be the gauze node, each device end topological tie point each other, i.e. gauze in the circuit in its indication circuit;

E is the set on limit, E={ (v ₁, v ₂) | v ₁∈ V ₁v ₂∈ V ₂, it is writing down the terminals of each device that is connected to each gauze;

(3) initialization of the pre-service of bipartite graph and node label value

(3.1) handle unwanted node in the bipartite graph

The MOS device of resistance and realization resistance function is done short circuit and is handled, and the MOS device of described realization resistance function is meant that the biasing of its grid is the MOS device of constant pressure source;

Electric capacity and realize that the MOS device of capacitive function does to open circuit processing, the MOS device of described realization capacitive function are meant its drain electrode and the MOS device that is connected together of source electrode;

(3.2) the label value of each node in the initialization bipartite graph:

The initial label value of device nodes is chosen different parameters according to the type of device difference; The initial label value of gauze node equals the degree of gauze node, and described degree is defined as the limit number that is connected to this gauze node,

But be connected to from the grid of device except that limit of this gauze node;

(4) the label value of each node in the calculating bipartite graph

The label value of each node is upgraded by following formula in given cycle index, and the label value of each node is its final label value during loop ends; Described cycle index equals the number of device nodes in the bipartite graph; It contains following steps successively:

(4.1) cycle index counter i=1 is set;

(4.2) upgrade the label value of all device nodes:

${{\mathrm{Label}}^i}_{M_k}={{\mathrm{Label}}^{i-1}}_{M_k}+\mathrm{so}\&times;{{\mathrm{Label}}^{i-1}}_{{{\mathrm{net}}_j}^{\mathrm{so}}}+\mathrm{dr}\&times;{{\mathrm{Label}}^{i-1}}_{{{\mathrm{net}}_j,}^{\mathrm{dr}}}$

Wherein K=1 ..., n is the device nodes M that current circulation i will calculate _kThe label value, n is the number of all device nodes,

Be the i-1 time circulation obtained device node M _kThe label value,

Be the i-1 time circulation time device M _kThe gauze node net that source electrode connects _j ^SoThe label value,

Be the i-1 time circulation time device M _kThe gauze node net that drain electrode connects _{J '} ^DrThe label value, so and dr are respectively the weighted numbers of the label value of gauze node that source electrode is connected with drain electrode, are chosen for different prime numbers usually,

(4.3) the label value of renewal institute wired network node

${{\mathrm{Label}}^i}_{{\mathrm{net}}_j}={{\mathrm{Label}}^{i-1}}_{{\mathrm{net}}_j}+\mathrm{so}\&times;\underset{M_i\&Element;{S^{\mathrm{so}}}_{N_1}\left({\mathrm{net}}_j\right)}{\mathrm{\&Sigma;}}{{\mathrm{Label}}^i}_{M_i}+\mathrm{dr}\&times;\underset{M_i\&Element;{S^{\mathrm{dr}}}_{N_2}\left({\mathrm{net}}_j\right)}{\mathrm{\&Sigma;}}{{\mathrm{Label}}^i}_{M_i},$

Wherein in the formula

J=1 ..., m is j the gauze node net that current circulation i will calculate _jThe label value, m is the number of institute's wired network node,

Be j the gauze node net that the i-1 time circulation time obtains _jThe label value,

$\underset{M_i\&Element;{S^{\mathrm{so}}}_{N_1}\left({\mathrm{net}}_j\right)}{\mathrm{\&Sigma;}}{{\mathrm{Label}}^i}_{M_i}$ The expression pair set In N ₁The current label value summation of individual node, current being meant calculated gained in the step (4.2) among the current circulation i, down together, Expression is by source electrode and j gauze net _jThe N that connects ₁The set of individual device nodes,

$\underset{M_i\&Element;{S^{\mathrm{dr}}}_{N_2}\left({\mathrm{net}}_j\right)}{\mathrm{\&Sigma;}}{{\mathrm{Label}}^i}_{M_i}$ The expression pair set

In N ₂The current label value summation of individual node,

Expression is by drain electrode and j gauze node net _jThe N that connects ₂The set of individual device nodes,

(4.4) cycle index i adds 1, if i≤n then changes step (4.2), otherwise, loop ends, the current label value of each node is final label value;

(5) search bipartite graph finds the symmetry group, and it contains following steps successively:

(5.1), find all symmetries right according to the label value of each device:

If: represent symmetrical right set in all device nodes, SYS={ (v with SYS _i, v _i') | v _i≠ v _i', v _i∈ V ₁, v _i' ∈ V ₁, v _iAnd v _i' have an identical label value, this is according to the label value all device nodes to be carried out after from small to large ascending order arranges, and takes out two devices that label value equates again in turn and forms symmetrical to obtaining v _i, v _i' the MOS device M of also available their representatives _i, M _i' represent;

(5.2) according to symmetry between annexation, set up the symmetry group

According to symmetrical pair set, at first find symmetry to (M _i, M _i'), earlier from M _i, M _i' drain electrode to begin search symmetry right, in the time of will finding their common gauze nodes that connects, stop the search that drains again always; And then from M _i, M _i' source electrode set out, it is right to begin search symmetry, also will finish to search for when finding their common gauze nodes that connects always; Above-mentioned all symmetries that found are organized SGr (p to using symmetry ₁, p ₂) expression, p ₁, p ₂Be respectively the node array, p ₁, p ₂In the node arranged in turn line up man-to-man symmetry group correspondingly.

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